WO2013187085A1 - 固体撮像装置の製造方法及び固体撮像装置 - Google Patents
固体撮像装置の製造方法及び固体撮像装置 Download PDFInfo
- Publication number
- WO2013187085A1 WO2013187085A1 PCT/JP2013/054391 JP2013054391W WO2013187085A1 WO 2013187085 A1 WO2013187085 A1 WO 2013187085A1 JP 2013054391 W JP2013054391 W JP 2013054391W WO 2013187085 A1 WO2013187085 A1 WO 2013187085A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- hole
- main surface
- imaging device
- electrode
- solid
- Prior art date
Links
- 238000003384 imaging method Methods 0.000 title claims abstract description 82
- 238000004519 manufacturing process Methods 0.000 title abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000006243 chemical reaction Methods 0.000 claims abstract description 9
- 238000005304 joining Methods 0.000 claims abstract description 6
- 239000004020 conductor Substances 0.000 claims description 30
- 229910000679 solder Inorganic materials 0.000 claims description 30
- 238000007747 plating Methods 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 46
- 239000004065 semiconductor Substances 0.000 description 26
- 239000002243 precursor Substances 0.000 description 15
- 239000011229 interlayer Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 229920005989 resin Polymers 0.000 description 7
- 239000011347 resin Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 238000005530 etching Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14634—Assemblies, i.e. Hybrid structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
Definitions
- the present invention relates to a method for manufacturing a solid-state imaging device and a solid-state imaging device.
- Patent Document 1 discloses a back-illuminated solid-state imaging device using a CMOS image sensor (hereinafter referred to as “sensor”).
- This solid-state imaging device includes a support substrate having a pair of opposing main surfaces and a sensor provided on one main surface of the support substrate.
- the support substrate has a through electrode extending in the thickness direction and penetrating the support substrate.
- One end of the through electrode is electrically connected to the sensor electrode.
- the other end of the through electrode is exposed on the other main surface of the support substrate.
- the solid-state imaging device mounted on the IC chip for signal processing the other end of the through electrode is electrically connected to the electrode of the IC chip via the bump electrode.
- the solid-state imaging device manufacturing method includes a step of bonding a sensor to a support substrate, a step of forming a resist pattern on the other main surface of the support substrate, and etching through the support substrate from the other main surface side. A step of forming a hole, and a step of filling the metal into the through hole to form a through electrode.
- the back-illuminated solid-state imaging device In the back-illuminated solid-state imaging device, light and various energy beams (for example, ultraviolet rays, electron beams, radiation, charged particle beams, etc.) are incident on the sensor from the back surface. Need to be increased. However, the mechanical strength of the sensor decreases with the reduction in thickness, and the handling of the sensor becomes difficult.
- energy beams for example, ultraviolet rays, electron beams, radiation, charged particle beams, etc.
- the light receiving portion of the sensor is partially thinned and the outer edge portion surrounding the light receiving portion is thickened.
- the area of the light receiving portion relative to the area of the sensor becomes relatively small due to the presence of the outer edge portion, the light receiving efficiency per unit area of the sensor is lowered.
- the sensor is joined to the support substrate without using it alone.
- the sensor and the IC chip are electrically connected using the through electrode. This eliminates the need for electrical connection between the sensor and the IC chip by wire bonding, thereby reducing the size.
- An object of the present invention is to provide a method of manufacturing a solid-state imaging device and a solid-state imaging device that can be easily manufactured.
- a method of manufacturing a solid-state imaging device includes a first main surface on which energy rays are incident, and a second main surface that is opposed to the first main surface and has at least one electrode disposed thereon. And a first step of preparing an imaging device including a photoelectric conversion unit that photoelectrically converts incident energy rays to generate a signal charge, and at least one through-hole extending in the thickness direction is provided and opposed to each other. The second step of preparing the support substrate having the third and fourth main surfaces to be opposed to the second main surface and the third main surface and exposing one electrode from one through hole. A third step of aligning the image pickup device and the support substrate and joining the image pickup device and the support substrate, and a fourth step of embedding the conductive member in the through hole after the third step. .
- the conductive member is embedded in the through hole of the support substrate joined to the imaging element. Therefore, an electrical connection process is easy when manufacturing a solid-state imaging device. Therefore, the solid-state imaging device can be easily manufactured, and the yield can be improved.
- the conductive member may be embedded in the through hole by disposing a conductive first conductor in the through hole and melting the first conductor.
- the conductive member since the solid first conductor is melted in the state of being disposed in the through hole, the conductive member is placed outside the through hole as compared with the case where the molten conductive material is poured into the through hole. There is almost no risk of protruding.
- the first conductor may be a solder ball. In this case, the first conductor can be easily disposed in the through hole.
- the first conductor having conductivity is disposed in the through hole, and after melting the first conductor, the second conductor having conductivity is disposed in the through hole.
- the conductive member may be embedded in the through hole by melting the second conductor.
- the conductive member is formed in the through holes as compared with the case where the molten conductive material is poured into the through holes. There is almost no risk of protruding outside.
- bubbles may remain in the conductive member.
- the second conductor having conductivity is disposed in the through hole, and the second conductor When the conductor is melted, the conductive member is embedded in the through hole in two portions, so that the possibility that bubbles remain in the conductive member is extremely reduced.
- Both the first and second conductors may be solder balls.
- the first and second conductors can be easily disposed in the through hole.
- a plating film may be formed on the electrode after the third step and before the fourth step. In this case, the conductive member is more reliably connected to the electrode via the plating film.
- the through hole may be enlarged in diameter from the third main surface to the fourth main surface. In this case, it becomes easy to embed the conductive member in the through hole in the third step.
- a metal film may be formed on the inner wall surface of the through hole.
- a plating film can be formed also on the inner wall surface of the through hole.
- the electrode and the second main surface are covered with a planarizing film, and at least the surface of the electrode is provided after the third step and before the fourth step.
- a part of the planarization film may be removed so that a part is exposed. In this case, since the surface of the image sensor is flattened by the flattening film, the image sensor and the support substrate can be more reliably joined.
- a solid-state imaging device includes a first main surface on which energy rays are incident, a second main surface opposite to the first main surface and having at least one electrode disposed thereon, An imaging device including a photoelectric conversion unit that photoelectrically converts incident energy rays to generate signal charges, and a third and fourth main surfaces that are provided with through holes extending in the thickness direction and that face each other.
- a solid-state imaging device is manufactured by embedding a conductive member in a through-hole of a support substrate bonded to an imaging element and electrically connecting the conductive member and the electrode. Therefore, an electrical connection process is easy when manufacturing a solid-state imaging device. Therefore, the solid-state imaging device can be easily manufactured, and the yield can be improved.
- a plating film may be formed on the electrode.
- the conductive member is more reliably connected to the electrode via the plating film.
- the through hole may be enlarged in diameter from the third main surface to the fourth main surface. In this case, it becomes easy to embed the conductive member in the through hole when the solid-state imaging device is manufactured.
- a metal film may be formed on the inner wall surface of the through hole.
- a plating film can be formed also on the inner wall surface of the through hole.
- a planarization film covering the second main surface may be further provided, and at least a part of the surface of the electrode may be exposed from the planarization film.
- the image sensor and the support substrate can be more reliably joined.
- FIG. 1A is a top view of the electronic component according to the present embodiment
- FIG. 1B is a cross-sectional view taken along line BB in FIG. 1A
- FIG. 2 is a cross-sectional view of the electronic component according to the present embodiment, and is an enlarged view of FIG. 3 is a cross-sectional view taken along line III-III in FIG. 4A
- FIG. 4A is a diagram illustrating a state where the solid-state imaging device according to the present embodiment is viewed from the support substrate side
- FIG. 4B is a diagram illustrating a state in which the conductive member is removed in FIG. is there.
- FIG. 5 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 6 is a diagram illustrating a process for manufacturing the solid-state imaging device according to the present embodiment.
- 7 is a cross-sectional view taken along line VII-VII in FIG.
- FIG. 8 is a diagram illustrating a process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 9 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 10 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 11 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 12 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- FIG. 13 is a diagram illustrating one process for manufacturing the solid-state imaging device according to the present embodiment.
- the solid-state imaging device 1 includes a CCD-type back-illuminated imaging element 10, a support substrate 20 that supports the imaging element 10, and a plurality of conductive members 30.
- the imaging element 10 includes an element body 11, an AR coat 12, a wiring 13, and a plurality of electrodes 14.
- the element body 11 includes a p-type semiconductor layer 11a, an n-type semiconductor layer 11b, a p + type semiconductor layer 11c, an insulating layer 11d, an electrode film 11e, and an interlayer insulating layer 11f.
- the p-type semiconductor layer 11a has a protruding portion that is thicker than other portions.
- the n-type semiconductor layer 11b is formed with a predetermined thickness on the protrusion.
- a PN junction is formed at the interface between the p-type semiconductor layer 11a and the n-type semiconductor layer 11b.
- the vicinity of the interface functions as a photoelectric conversion unit, and various energy beams (for example, light, ultraviolet rays, electron beams, radiation, or charged particle beams) incident on the interface are photoelectrically converted to generate signal charges. .
- the p + type semiconductor layer 11c does not cover the main surface of the n type semiconductor layer 11b, but is disposed so as to cover the side surface of the n type semiconductor layer 11b and the surface of the p type semiconductor layer 11a.
- the insulating layer 11d is disposed so as to cover the main surface of the n-type semiconductor layer 11b and the surface of the p + -type semiconductor layer 11c.
- the insulating layer 11d is made of, for example, SiO 2 .
- the thickness of the portion of the insulating layer 11d that covers the main surface of the n-type semiconductor layer 11b is smaller than the thickness of the portion of the insulating layer 11d that covers the surface of the p + -type semiconductor layer 11c.
- the electrode film 11e is a belt-like film extending so as to cover the thin portion of the insulating layer 11d and the vicinity thereof.
- a plurality of electrode films 11 e are arranged in the width direction of the image sensor 10. Adjacent electrode films 11e are insulated from each other by an insulating film, and end portions overlap each other when viewed from the thickness direction of the image sensor 10.
- the electrode film 11e is made of, for example, poly-Si.
- the interlayer insulating layer 11f is disposed so as to cover the electrode film 11e and the insulating layer 11d.
- the interlayer insulating layer 11f is constituted by, for example, a borophosphosilicate glass layer (BPSG).
- the AR coat 12 has a function of preventing reflection of light within a predetermined wavelength band.
- the AR coat 12 is made of, for example, SiO 2 or SiN.
- the AR coat 12 is formed on the surface of the p-type semiconductor layer 11a.
- the wiring 13 and the plurality of electrodes 14 are patterned on the surface of the interlayer insulating layer 11f (the main surface S2 of the photoelectric conversion unit 11).
- the wiring 13 and the electrode 14 are made of, for example, Al.
- the thickness of the wiring 13 and the electrode 14 is set to about 0.1 ⁇ m to 1 ⁇ m, for example.
- a plurality of electrodes 14 (in this embodiment, five electrodes 14) are arranged in a line on both sides of the light detection region A1 when viewed from the opposing direction of the main surfaces S1 and S2. Yes.
- a region where the p-type semiconductor layer 11a, the n-type semiconductor layer 11b, the insulating layer 11d, and the electrode film 11e are stacked functions as the light detection region A1.
- This region functions as the wiring region A2.
- the surface on the AR coat 12 side of the image sensor 10 functions as a main surface S1 on which energy rays are incident.
- the surface on the interlayer insulating layer 11 f side in the image sensor 10 functions as a main surface S ⁇ b> 2 that faces the support substrate 20.
- the planarizing film 16 is provided on the main surface S2 of the image sensor 10 as shown in FIG.
- the planarizing film 16 is disposed so as to cover the interlayer insulating layer 11 f, the wiring 13, and a part of the electrode 14. Therefore, the surface of the interlayer insulating layer 11 f that is uneven due to the presence of the wiring 13 and the electrode 14 is planarized by the planarizing film 16.
- the planarization film 16 is made of, for example, TEOS (tetraethoxysilane).
- the support substrate 20 is bonded to the imaging element 10 via the planarization film 16.
- the support substrate 20 includes a substrate 21 and an insulating film 22 that covers the entire surface of the substrate 21.
- the substrate 21 is made of Si, for example.
- the insulating film 22 is configured by an oxide film formed by, for example, thermal oxidation.
- the support substrate 20 is provided with the same number of through holes 23 as the electrodes 14 extending in the thickness direction.
- eight through holes 23 are formed.
- four through holes 23 are arranged on both sides of the light detection region A1 when viewed from the opposing direction of the main surfaces S1 and S2.
- a part of the electrode 14 is exposed from each through hole 23.
- each through hole 23 is also covered with an insulating film 22. That is, the support substrate 20 is provided with a through hole 23 extending in the thickness direction and having an inner wall surface covered with an insulating film.
- each through-hole 23 increases in diameter from one main surface S3 to the other main surface S4 of the support substrate. That is, the inner wall surface of each through hole 23 is tapered.
- the openings on the main surface S3 side and the main surface S4 side in the through hole 23 both have a square shape.
- a metal film 24 serving as a base of a plating film 25 described later is provided.
- the metal film 24 is made of, for example, Al.
- a plating film 25 is formed on a portion of the electrode 14 that is not covered with the planarization film 16 and on the surface of the metal film 24.
- the plating film 15 is made of, for example, Au or Ni.
- the conductive member 30 is a conductive metal and is made of, for example, solder. As shown in FIGS. 1, 2, and 4 (a), the conductive member 30 is embedded in each through hole 23. That is, each conductive member 30 is disposed in each through hole 23. Each conductive member 30 has a one-to-one correspondence with each electrode 14 and each plating film 15, and is electrically connected to each electrode 14 and each plating film 15.
- the IC chip 2 includes a chip body 2a, a plurality of lead terminals 2b, an electrode 2c, a plating film 2d, and an insulating film 2e, as shown in FIGS.
- the chip body 2a performs signal processing of electrical signals output from the image sensor 10, operation control of the image sensor 10, and the like.
- the plurality of lead terminals 2b extend from the chip body 2a, and are electrically connected to electrodes of the circuit board when the IC chip 2 is mounted on a circuit board (not shown) or the like.
- the electrode 2c is patterned on the chip body 2a.
- the electrode 2c is made of, for example, Al.
- the plating film 2d is disposed on a part of the main surface of the electrode 2c.
- the plating film 2d is made of, for example, Au or Ni.
- the insulating film 2e is formed so as to cover the chip body 2a and the electrode 2c while the main surface of the plating film 2d is exposed. Insulating film 2e, for example composed of such SiO 2.
- a resin material 40 is filled between the solid-state imaging device 1 and the IC chip 2.
- the resin material for example, an epoxy resin can be used.
- the precursor 10 a of the image sensor 10 is manufactured.
- a so-called epi-wafer is first prepared in which a p-type semiconductor layer 11a is epitaxially grown on the surface of a p + semiconductor substrate 11g.
- the thickness of the substrate 11g is, for example, about 620 ⁇ m
- the thickness of the p-type semiconductor layer 11a is, for example, 10 ⁇ m to 30 ⁇ m.
- a p-type impurity is added onto the epi-wafer (p-type semiconductor layer 11a) by a so-called LOCOS method using a Si 3 N 4 film (not shown) as a mask by ion implantation.
- an insulating layer 11d is formed by oxidation using the same Si 3 N 4 film as a mask.
- an n-type semiconductor layer 11b is formed by adding an n-type impurity by an ion implantation method, and an electrode film 11e and an interlayer insulating layer 11f are stacked in this order. .
- a plurality of strips of electrode films 11e are formed so that the ends of the adjacent electrode films 11e overlap each other when viewed from the thickness direction of the image sensor 10 (see FIG. 7).
- the element body 11 is formed on the substrate 11g.
- the wiring 13 and the electrode 14 are patterned on the interlayer insulating layer 11f (on the main surface S2). In this way, the precursor 10a of the image sensor 10 shown in FIGS. 5A and 6 is formed.
- a planarizing film 16 is formed on the interlayer insulating layer 11 f (on the main surface S ⁇ b> 2) so as to cover the wiring 13 and the electrode 14.
- the thickness of the planarizing film 16 can be set to, for example, about 1 ⁇ m to 5 ⁇ m.
- the surface of the planarizing film 16 is planarized by chemical mechanical polishing (CMP). Thereby, the precursor 10b of the image sensor 10 shown in FIGS. 5B and 9 is formed. At this time, the wiring 13 and the electrode 14 are still covered with the planarizing film 16.
- a support substrate 20 provided with a through hole 23 is prepared.
- a high-quality oxide film having a uniform film thickness is formed on the inner wall surface of the through hole 23 by, for example, thermal oxidation.
- the precursor of the imaging element 10 so that the main surface S ⁇ b> 2 and the main surface S ⁇ b> 3 face each other and one electrode 14 is exposed from one through hole 23.
- 10b and the support substrate 20 are aligned, and the precursor 10b and the support substrate 20 are joined.
- the precursor 10b and the support substrate 20 may be pressed and joined directly by room temperature joining, or an adhesive such as a resin may be bonded to the main surface S2 of the precursor 10b. You may join the precursor 10b and the support substrate 20 in the state which apply
- the substrate 11g in the precursor 1a is removed by etching or polishing to expose the p-type semiconductor layer 11a.
- the thickness from the p-type semiconductor layer 11a to the planarization film 16 is set to about 10 ⁇ m to 30 ⁇ m, for example.
- the precursor 1b of the solid-state imaging device 1 shown in FIG. 5 (f) and FIG. 11 is formed.
- an AR coat 12 is formed on the surface of the p-type semiconductor layer 11 a in the precursor 1 b of the solid-state imaging device 1.
- a region of the electrode 14 where the plating film 15 is to be formed is exposed by etching using a resist or the like.
- the precursor 1c of the solid-state imaging device 1 shown in FIG. 5G and FIG. 12 is formed.
- a plating film 25 is formed so as to cover the exposed electrode 14 and the metal film 24 on the inner wall surface of the support substrate 20.
- the precursor 1Ad of the solid-state imaging device 1A shown in FIG. 13 is formed.
- one spherical solder ball (not shown) is disposed in each through hole 23, and the solder ball is melted by reflow to embed solder in each through hole 23.
- the solder ball has a size that contacts the portion of the plating film 15 that covers the electrode 14 when the solder ball is disposed in the through hole 23.
- each through hole 23 is filled with solder, and the conductive member 30 is formed.
- the solid-state imaging device 1 is completed.
- the solid-state imaging device 1 is mounted on the IC chip 2. Specifically, the conductive member 30 and the electrode 2c of the IC chip 2 are aligned, and the conductive member 30 and the electrode 2c are joined by flip chip bonding. Thereby, the solid-state imaging device 1 and the IC chip 2 are electrically connected via the conductive member 30. Next, the resin material 40 is filled between the solid-state imaging device 1 and the IC chip 2. Thus, the electronic component 3 shown in FIG. 2 is completed.
- the conductive member 30 is embedded in the through hole 23 of the support substrate 20 joined to the imaging element 10, and the conductive member 30 and the electrode 14 are electrically connected. Therefore, when the solid-state imaging device 1 is manufactured, an electrical connection process is easy. Therefore, the solid-state imaging device 1 can be easily manufactured, and the yield can be improved.
- a conventional method for manufacturing a solid-state imaging device includes a step of bonding a sensor to a support substrate, a step of forming a resist pattern on the other main surface of the support substrate, and etching the support substrate from the other main surface side. Forming a through hole and filling the metal into the through hole to form a through electrode.
- CVD Chemical Vapor It is necessary to form a high-quality oxide film having a uniform film thickness on the inner wall surface of the through hole by a method such as Deposition).
- a method such as Deposition
- a high quality oxide film having a uniform film thickness can be formed in advance on the inner wall surface of the through hole 23 of the support substrate 20 by thermal oxidation or the like. Therefore, sufficient insulation can be ensured between the support substrate 20 (the inner wall surface of the through hole 23) and the electrode, and a highly reliable solid-state imaging device 1A can be obtained.
- the first solder ball is disposed in the through hole 23, and after the solder ball is melted, the second solder ball is disposed in the through hole 23 and the solder ball is melted.
- the conductive member 30 may be embedded in the through hole 23.
- the conductive member 30 since the solid solder balls are melted in the state where they are disposed in the through holes 23, the conductive member 30 is located outside the through holes 23 as compared to the case where the molten conductive material is poured into the through holes 23. There is almost no risk of sticking out. Further, if a conductive member is tried to be embedded in the through hole at a time using a large solder ball, bubbles may remain in the conductive member. However, in this case, since the conductive member 30 is embedded in the through hole 23 in two steps, the possibility that bubbles remain in the conductive member 30 is extremely reduced.
- solder ball is used to embed the conductive member 30 in the through hole 23. Therefore, the solder ball can be easily disposed in the through hole 23.
- the plating film 25 is formed on the electrode 14 and the metal film 24. Therefore, the conductive member 30 can be more reliably connected to the electrode 14 via the plating film 25.
- the through hole 23 increases in diameter from the main surface S3 toward the main surface S4. Therefore, when forming the conductive member 30, it becomes easy to dispose the conductive member 30 in the through hole 23. Further, when the solder ball is used for embedding the conductive member 30 in the through hole 23, the solder ball is stabilized in the through hole 23.
- the support substrate 20 is provided with a plurality of through holes 23, and one electrode 14 (plating film 15) corresponds to one through hole 23. Therefore, when the conductive member 30 is formed, the conductive member 30 and the electrode 14 can be easily associated with each other simply by placing solder ball members one by one in the through hole 23 and performing reflow.
- the solid-state imaging device 1 further includes a planarizing film 16 that covers the surface of the interlayer insulating layer 11f and the wiring 13. Therefore, since the surface of the image sensor 10 is flattened by the planarization film 16, the bonding between the image sensor 10 and the support substrate 20 becomes more reliable.
- the planarization film 16 is planarized by CMP.
- the imaging element 10 and the support substrate 20 are attached with an adhesive or the like, the bonding surface is flat compared to the case of room temperature bonding. Therefore, the planarization film 16 may not be planarized by CMP.
- planarizing film 16 is provided on the main surface S2 of the photoelectric conversion unit 11, but the planarizing film 16 may not be provided.
- the diameter of the through hole 23 is increased from the main surface S3 toward the main surface S4.
- the size of the opening of the through hole 23 may be constant in the extending direction.
- the through hole 23 may be reduced in diameter from the main surface S3 toward the main surface S4.
- the resin material 40 is filled between the solid-state imaging device 1 and the IC chip 2, but the resin material 40 may not be filled.
- a spherical solder ball is used to embed the conductive member 30 in the through hole 23.
- a conductor having a spherical shape for example, a rectangular parallelepiped shape, a cylindrical shape, a cylindrical shape, a prismatic shape, a polyhedron
- a conductor having a shape other than a spherical shape, such as a shape, can be used.
- a CCD solid-state image pickup device has been described as an example of the solid-state image pickup device.
- the present invention is not limited to the CCD solid-state image pickup device, and various backside illumination types including a CMOS solid-state image pickup device. Needless to say, the present invention can be applied to a light receiving element array.
- SYMBOLS 1A, 1B Solid-state imaging device, 2 ... IC chip, 3 ... Electronic component, 10 ... Imaging element, 11 ... Photoelectric conversion part, 14 ... Electrode, 16 ... Planarization film, 20 ... Support substrate, 23 ... Through-hole, 24 ... Metal film, 25 ... Plating film, 30 ... Conductive member, 40 ... Resin material, S1, S2, S3, S4 ... Main surface.
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
Deposition)等の方法で、膜厚が均一な質の高い酸化膜を貫通孔の内壁面に形成する必要がある。しかしながら、この場合、十分な品質の絶縁膜を得るには難易度が高く、信頼性を確保することが困難であった。
Claims (14)
- エネルギー線が入射される第1の主面と、前記第1の主面に対向すると共に少なくとも一つの電極が配置された第2の主面と、入射されたエネルギー線を光電変換して信号電荷を発生する光電変換部とを含む撮像素子を用意する第1の工程と、
厚さ方向に延びる貫通孔が少なくとも一つ設けられると共に互いに対向する第3及び第4の主面を有する支持基板を用意する第2の工程と、
前記第2の主面と前記第3の主面とが対向し且つ一つの前記貫通孔から一つの前記電極が露出するように前記撮像素子と前記支持基板とを位置合わせして、前記撮像素子と前記支持基板とを接合する第3の工程と、
前記第3の工程の後に、前記貫通孔内に導電部材を埋め込む第4の工程とを有する、固体撮像装置の製造方法。 - 前記第4の工程では、導電性を有する第1の導電体を前記貫通孔内に配置し、当該第1の導電体を溶融することで、前記貫通孔内に前記導電部材を埋め込む、請求項1に記載の方法。
- 前記第1の導電体ははんだボールである、請求項2に記載の方法。
- 前記第4の工程では、導電性を有する第1の導電体を前記貫通孔内に配置し、当該第1の導電体を溶融した後に、導電性を有する第2の導電体を前記貫通孔内に配置し、当該第2の導電体を溶融することで、前記貫通孔内に前記導電部材を埋め込む、請求項1に記載の方法。
- 前記第1及び第2の導電体は共にはんだボールである、請求項4に記載の方法。
- 前記第3の工程の後で且つ前記第4の工程の前に前記電極にめっき膜を形成する、請求項1~5のいずれか一項に記載の方法。
- 前記貫通孔は前記第3の主面から前記第4の主面に向かうにつれて拡径している、請求項1~6のいずれか一項に記載の方法。
- 前記貫通孔の内壁面に金属膜が形成されている、請求項1~7のいずれか一項に記載の方法。
- 前記第1の工程で用意された前記撮像素子の前記電極及び前記第2の主面は、平坦化膜によって覆われており、
前記第3の工程の後で且つ前記第4の工程の前に、前記電極の表面の少なくとも一部が露出するように前記平坦化膜の一部を除去する、請求項1~8のいずれか一項に記載の方法。 - エネルギー線が入射される第1の主面と、前記第1の主面に対向すると共に少なくとも一つの電極が配置された第2の主面と、入射されたエネルギー線を光電変換して信号電荷を発生する光電変換部とを含む撮像素子と、
厚さ方向に延びる貫通孔が設けられると共に互いに対向する第3及び第4の主面を有し、前記第3の主面が前記第2の主面と対向し且つ一つの前記貫通孔から一つの前記電極が露出するように前記撮像素子と接合された支持基板と、
前記貫通孔内に埋め込まれると共に前記各電極に電気的に接続された導電部材とを備える、固体撮像装置。 - 前記電極にめっき膜が形成されている、請求項10に記載の固体撮像装置。
- 前記貫通孔は前記第3の主面から前記第4の主面に向かうにつれて拡径している、請求項10又は11に記載の固体撮像装置。
- 前記貫通孔の内壁面に金属膜が形成されている、請求項10~12のいずれか一項に記載の固体撮像装置。
- 前記第2の主面を覆う平坦化膜をさらに備え、
前記電極の表面の少なくとも一部は前記平坦化膜から露出している、請求項10~13のいずれか一項に記載の固体撮像装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP13804695.8A EP2863436B1 (en) | 2012-06-15 | 2013-02-21 | Manufacturing method for solid-state imaging device and solid-state imaging device |
KR1020147029929A KR102135982B1 (ko) | 2012-06-15 | 2013-02-21 | 고체 촬상 장치의 제조 방법 및 고체 촬상 장치 |
CN201380031682.6A CN104364906B (zh) | 2012-06-15 | 2013-02-21 | 固体摄像装置的制造方法及固体摄像装置 |
US14/406,851 US9754995B2 (en) | 2012-06-15 | 2013-02-21 | Manufacturing method for solid-state imaging device and solid-state imaging device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012-136201 | 2012-06-15 | ||
JP2012136201A JP6095904B2 (ja) | 2012-06-15 | 2012-06-15 | 固体撮像装置の製造方法及び固体撮像装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2013187085A1 true WO2013187085A1 (ja) | 2013-12-19 |
Family
ID=49757927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2013/054391 WO2013187085A1 (ja) | 2012-06-15 | 2013-02-21 | 固体撮像装置の製造方法及び固体撮像装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US9754995B2 (ja) |
EP (1) | EP2863436B1 (ja) |
JP (1) | JP6095904B2 (ja) |
KR (1) | KR102135982B1 (ja) |
CN (1) | CN104364906B (ja) |
TW (1) | TWI569433B (ja) |
WO (1) | WO2013187085A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107170842B (zh) * | 2017-06-12 | 2019-07-02 | 京东方科技集团股份有限公司 | 光电探测结构及其制作方法、光电探测器 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004057507A (ja) * | 2002-07-29 | 2004-02-26 | Toshiba Corp | X線検出装置、貫通電極の製造方法及びx線断層撮影装置 |
JP2007013089A (ja) | 2005-06-02 | 2007-01-18 | Sony Corp | 固体撮像素子及びその製造方法 |
JP2008300613A (ja) * | 2007-05-31 | 2008-12-11 | Fujifilm Corp | 撮像素子及び撮像素子の製造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10335491A (ja) * | 1997-06-05 | 1998-12-18 | Sony Corp | 半導体装置及びその製造方法 |
JP2000349194A (ja) * | 1999-06-08 | 2000-12-15 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法および半導体装置 |
JP4427949B2 (ja) | 2002-12-13 | 2010-03-10 | ソニー株式会社 | 固体撮像素子及びその製造方法 |
JP2005108991A (ja) * | 2003-09-29 | 2005-04-21 | Seiko Epson Corp | 実装構造体、液晶表示装置および電子機器 |
US20090298277A1 (en) * | 2008-05-28 | 2009-12-03 | Mackay John | Maskless Process for Solder Bumps Production |
JP5422236B2 (ja) * | 2009-03-23 | 2014-02-19 | 株式会社東芝 | 撮像装置 |
JP2011086828A (ja) * | 2009-10-16 | 2011-04-28 | Sumco Corp | 半導体装置およびその製造方法 |
-
2012
- 2012-06-15 JP JP2012136201A patent/JP6095904B2/ja active Active
-
2013
- 2013-02-21 KR KR1020147029929A patent/KR102135982B1/ko active IP Right Grant
- 2013-02-21 US US14/406,851 patent/US9754995B2/en active Active
- 2013-02-21 WO PCT/JP2013/054391 patent/WO2013187085A1/ja active Application Filing
- 2013-02-21 EP EP13804695.8A patent/EP2863436B1/en active Active
- 2013-02-21 CN CN201380031682.6A patent/CN104364906B/zh active Active
- 2013-03-13 TW TW102108901A patent/TWI569433B/zh active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004057507A (ja) * | 2002-07-29 | 2004-02-26 | Toshiba Corp | X線検出装置、貫通電極の製造方法及びx線断層撮影装置 |
JP2007013089A (ja) | 2005-06-02 | 2007-01-18 | Sony Corp | 固体撮像素子及びその製造方法 |
JP2008300613A (ja) * | 2007-05-31 | 2008-12-11 | Fujifilm Corp | 撮像素子及び撮像素子の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN104364906A (zh) | 2015-02-18 |
JP2014003092A (ja) | 2014-01-09 |
TWI569433B (zh) | 2017-02-01 |
TW201351624A (zh) | 2013-12-16 |
EP2863436A4 (en) | 2016-02-24 |
EP2863436B1 (en) | 2018-11-28 |
KR102135982B1 (ko) | 2020-07-20 |
US9754995B2 (en) | 2017-09-05 |
KR20150032657A (ko) | 2015-03-27 |
US20150137301A1 (en) | 2015-05-21 |
EP2863436A1 (en) | 2015-04-22 |
JP6095904B2 (ja) | 2017-03-15 |
CN104364906B (zh) | 2018-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9373653B2 (en) | Stepped package for image sensor | |
JP2008130738A (ja) | 固体撮像素子 | |
TW201143044A (en) | Wafer level compliant packages for rear-face illuminated solid state image sensors | |
US20120242876A1 (en) | Solid-state image sensing device, camera module, and solid-state image sensing device manufacturing method | |
US20130222657A1 (en) | Solid-state image sensor and method of manufacturing the same | |
CN102148262A (zh) | 电子装置封装及其制造方法 | |
WO2018146965A1 (ja) | 半導体装置、および半導体装置の製造方法 | |
US8633572B2 (en) | Low ohmic through substrate interconnection for semiconductor carriers | |
US10825730B2 (en) | Manufacturing method for solid-state imaging device and solid-state imaging device | |
US11955499B2 (en) | Image sensor package including glass substrate and a plurality of redistribution layers disposed below the glass substrate and spaced apart from each other by a predetermined distance | |
JP5422236B2 (ja) | 撮像装置 | |
JP6095904B2 (ja) | 固体撮像装置の製造方法及び固体撮像装置 | |
US20200144322A1 (en) | Imaging apparatus and method of manufacturing imaging apparatus | |
WO2000044027A1 (fr) | Tube electronique | |
US20120306076A1 (en) | Semiconductor Micro-Connector With Through-Hole Via and a Method for Making the Same | |
JP2017126783A (ja) | 固体撮像装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 13804695 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 20147029929 Country of ref document: KR Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2013804695 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 14406851 Country of ref document: US |
|
NENP | Non-entry into the national phase |
Ref country code: DE |