WO2013168148A3 - Procédé de génération et de modification dynamiques d'une architecture d'entité électronique - Google Patents

Procédé de génération et de modification dynamiques d'une architecture d'entité électronique Download PDF

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Publication number
WO2013168148A3
WO2013168148A3 PCT/IL2013/050382 IL2013050382W WO2013168148A3 WO 2013168148 A3 WO2013168148 A3 WO 2013168148A3 IL 2013050382 W IL2013050382 W IL 2013050382W WO 2013168148 A3 WO2013168148 A3 WO 2013168148A3
Authority
WO
WIPO (PCT)
Prior art keywords
modification
function
dynamic generation
electronic entity
chip
Prior art date
Application number
PCT/IL2013/050382
Other languages
English (en)
Other versions
WO2013168148A2 (fr
Inventor
David Korman
Efraim SASSON
Original Assignee
Serentic Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Serentic Ltd. filed Critical Serentic Ltd.
Priority to KR20147034412A priority Critical patent/KR20150022815A/ko
Priority to CA2872443A priority patent/CA2872443A1/fr
Priority to SG11201407208UA priority patent/SG11201407208UA/en
Priority to JP2015510938A priority patent/JP2015527624A/ja
Priority to US14/399,166 priority patent/US9767270B2/en
Priority to EP13788144.7A priority patent/EP2847645A4/fr
Priority to CN201380036231.1A priority patent/CN104704437B/zh
Publication of WO2013168148A2 publication Critical patent/WO2013168148A2/fr
Publication of WO2013168148A3 publication Critical patent/WO2013168148A3/fr
Priority to IL235559A priority patent/IL235559A/en
Priority to HK15111654.7A priority patent/HK1211093A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/45—Structures or tools for the administration of authentication
    • G06F21/46—Structures or tools for the administration of authentication by designing passwords or checking the strength of passwords
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55—Detecting local intrusion or implementing counter-measures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/20—Network architectures or network communication protocols for network security for managing network security; network security policies in general
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/321—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving a third party or a trusted authority
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/03—Indexing scheme relating to G06F21/50, monitoring users, programs or devices to maintain the integrity of platforms
    • G06F2221/032—Protect output to user by software means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Storage Device Security (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)
  • Telephone Function (AREA)
  • User Interface Of Digital Computer (AREA)
  • Computer And Data Communications (AREA)

Abstract

La présente invention concerne un procédé pour générer une nouvelle fonction dynamique incorporée à l'intérieur d'une puce, la puce comprenant une pluralité de blocs de construction, une première fonction et une spécification définissant la nouvelle fonction dynamique ; le procédé comprenant les étapes consistant à : à l'intérieur de la puce, réaliser la première fonction conformément à la spécification et/ou à une analyse ; et à l'intérieur de la puce, générer la nouvelle fonction dynamique lors de la réalisation de la première fonction.
PCT/IL2013/050382 2012-05-08 2013-05-06 Procédé de génération et de modification dynamiques d'une architecture d'entité électronique WO2013168148A2 (fr)

Priority Applications (9)

Application Number Priority Date Filing Date Title
KR20147034412A KR20150022815A (ko) 2012-05-08 2013-05-06 일렉트로닉 엔티티 아키텍처의 동적 생성과 변경을 위한 방법
CA2872443A CA2872443A1 (fr) 2012-05-08 2013-05-06 Procede de generation et de modification dynamiques d'une architecture d'entite electronique
SG11201407208UA SG11201407208UA (en) 2012-05-08 2013-05-06 A method for dynamic generation and modification of an electronic entity architecture
JP2015510938A JP2015527624A (ja) 2012-05-08 2013-05-06 電子実体アーキテクチャの動的生成及び修正のための方法
US14/399,166 US9767270B2 (en) 2012-05-08 2013-05-06 Method for dynamic generation and modification of an electronic entity architecture
EP13788144.7A EP2847645A4 (fr) 2012-05-08 2013-05-06 Procédé de génération et de modification dynamiques d'une architecture d'entité électronique
CN201380036231.1A CN104704437B (zh) 2012-05-08 2013-05-06 电子实体结构的动态产生和改变的方法
IL235559A IL235559A (en) 2012-05-08 2014-11-06 A method for dynamically creating and modifying an electronic architectural entity
HK15111654.7A HK1211093A1 (en) 2012-05-08 2015-11-26 A method for dynamic generation and modification of an electronic entity architecture

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201261688084P 2012-05-08 2012-05-08
US61/688,084 2012-05-08
US201261742029P 2012-08-02 2012-08-02
US61/742,029 2012-08-02

Publications (2)

Publication Number Publication Date
WO2013168148A2 WO2013168148A2 (fr) 2013-11-14
WO2013168148A3 true WO2013168148A3 (fr) 2014-03-13

Family

ID=49551410

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/IL2013/050385 WO2013168151A2 (fr) 2012-05-08 2013-05-06 Procédé et système d'authentification d'une communication et d'une opération
PCT/IL2013/050382 WO2013168148A2 (fr) 2012-05-08 2013-05-06 Procédé de génération et de modification dynamiques d'une architecture d'entité électronique

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/IL2013/050385 WO2013168151A2 (fr) 2012-05-08 2013-05-06 Procédé et système d'authentification d'une communication et d'une opération

Country Status (9)

Country Link
US (1) US9767270B2 (fr)
EP (2) EP2847645A4 (fr)
JP (2) JP2015527624A (fr)
KR (2) KR20150011376A (fr)
CN (2) CN104488220A (fr)
CA (2) CA2872443A1 (fr)
HK (2) HK1208972A1 (fr)
SG (2) SG11201407208UA (fr)
WO (2) WO2013168151A2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013168151A2 (fr) * 2012-05-08 2013-11-14 Serentic Ltd. Procédé et système d'authentification d'une communication et d'une opération
US9509707B2 (en) * 2014-06-24 2016-11-29 Qualcomm Incorporated Methods and systems for thwarting side channel attacks
US9774614B2 (en) 2014-06-24 2017-09-26 Qualcomm Incorporated Methods and systems for side channel analysis detection and protection
EP3279823B1 (fr) * 2016-08-01 2020-09-23 Secure-IC SAS Surveillance de sécurité
US10776460B2 (en) 2018-10-15 2020-09-15 KameleonSec Ltd. Proactive security system based on code polymorphism
CN111931444B (zh) * 2019-05-09 2021-07-20 长江存储科技有限责任公司 用于功能对等检测中的仿真方法
US11403403B2 (en) 2020-04-13 2022-08-02 KameleonSec Ltd. Secure processing engine for securing a computing system

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5870588A (en) * 1995-10-23 1999-02-09 Interuniversitair Micro-Elektronica Centrum(Imec Vzw) Design environment and a design method for hardware/software co-design
US20020073380A1 (en) * 1998-09-30 2002-06-13 Cadence Design Systems, Inc. Block based design methodology with programmable components
US20060015862A1 (en) * 1998-02-17 2006-01-19 National Instruments Corporation Reconfigurable measurement system utilizing a programmable hardware element and fixed hardware resources
US20100010706A1 (en) * 2005-09-23 2010-01-14 Joseph Gormley Vehicle control and interconnection system
US20120002803A1 (en) * 2010-07-02 2012-01-05 Wael Adi Self reconfiguring vlsi architectures for unknown secret physical functions based crypto security systems
US20120086471A1 (en) * 2000-10-26 2012-04-12 Warren Snyder Psoc architecture
US8160864B1 (en) * 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5581763A (en) 1988-06-14 1996-12-03 Progressive Technology Inc. Secure architecture and apparatus using an independent computer cartridge
US5896499A (en) 1997-02-21 1999-04-20 International Business Machines Corporation Embedded security processor
GB2391082B (en) 2002-07-19 2005-08-03 Ritech Internat Ltd Portable data storage device with layered memory architecture
JP3806077B2 (ja) * 2002-08-26 2006-08-09 株式会社東芝 メモリカード認識システム、容量切り替え型メモリカード・ホスト機器、容量切り替え型メモリカード、記憶容量設定方法及び記憶容量設定プログラム
WO2005045681A1 (fr) * 2003-11-06 2005-05-19 Matsushita Electric Industrial Co., Ltd. Support d'enregistrement d'informations, dispositif d'acces au support d'enregistrement d'informations, et procede d'etablissement de zones
US7607025B1 (en) * 2004-02-26 2009-10-20 Xilinx, Inc. Methods of intrusion detection and prevention in secure programmable logic devices
WO2006026676A2 (fr) 2004-08-30 2006-03-09 California Institute Of Technology Circuits quasi insensibles aux retards tolerant un basculement intempestif d'evenement non recurrent
US7068168B2 (en) * 2004-11-12 2006-06-27 Simon Girshovich Wireless anti-theft system for computer and other electronic and electrical equipment
JP2006244429A (ja) * 2005-03-07 2006-09-14 Canon Inc データ処理装置及びその制御方法
JP4890976B2 (ja) * 2005-08-31 2012-03-07 キヤノン株式会社 暗号処理装置
US7921303B2 (en) 2005-11-18 2011-04-05 Qualcomm Incorporated Mobile security system and method
CN100437502C (zh) 2005-12-30 2008-11-26 联想(北京)有限公司 基于安全芯片的防病毒方法
US8190885B2 (en) * 2006-12-21 2012-05-29 Spansion Llc Non-volatile memory sub-system integrated with security for storing near field transactions
FR2910666B1 (fr) 2006-12-26 2013-02-08 Oberthur Card Syst Sa Dispositif electronique portable et procede de securisation d'un tel dispositif
WO2008090470A2 (fr) 2007-01-16 2008-07-31 Absolute Software Corporation Module de sécurité doté d'un agent secondaire en coordination avec un agent hôte
US20080228580A1 (en) * 2007-03-12 2008-09-18 Mynewpedia Corp. Method and system for compensating online content contributors and editors
CN101051293A (zh) * 2007-05-11 2007-10-10 广东天海威数码技术有限公司 对个人电脑存储空间的访问控制方法
CN101315617A (zh) 2007-06-01 2008-12-03 鸿富锦精密工业（深圳）有限公司 总线电路装置
US20090006272A1 (en) * 2007-06-18 2009-01-01 David Korman Methods for reorganizing an equity float structure
US8595491B2 (en) * 2008-11-14 2013-11-26 Microsoft Corporation Combining a mobile device and computer to create a secure personalized environment
EP2428019A4 (fr) 2009-05-03 2015-01-28 Toshiba Kk Sécurité de protocole de transfert intracellulaire indépendant du support
US8225021B2 (en) 2009-05-28 2012-07-17 Lexmark International, Inc. Dynamic address change for slave devices on a shared bus
US20110093958A1 (en) 2009-10-21 2011-04-21 Gilles Bruno Marie Devictor Secure Data Storage Apparatus and Method
US8407633B2 (en) * 2009-10-26 2013-03-26 International Business Machines Corporation Dynamically reconfigurable self-monitoring circuit
US20110154501A1 (en) 2009-12-23 2011-06-23 Banginwar Rajesh P Hardware attestation techniques
US20110309789A1 (en) * 2010-06-21 2011-12-22 Kyocera Wireless Corp Charger with data storage
US8438416B2 (en) * 2010-10-21 2013-05-07 Advanced Micro Devices, Inc. Function based dynamic power control
CN103827881B (zh) 2011-03-09 2017-12-12 爱迪德技术有限公司 用于设备操作系统中的动态平台安全的方法和系统
US8884757B2 (en) 2011-07-11 2014-11-11 Verifone, Inc. Anti-tampering protection assembly
WO2013168151A2 (fr) * 2012-05-08 2013-11-14 Serentic Ltd. Procédé et système d'authentification d'une communication et d'une opération
US20150113602A1 (en) * 2012-05-08 2015-04-23 Serentic Ltd. Method and system for authentication of communication and operation

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5870588A (en) * 1995-10-23 1999-02-09 Interuniversitair Micro-Elektronica Centrum(Imec Vzw) Design environment and a design method for hardware/software co-design
US20060015862A1 (en) * 1998-02-17 2006-01-19 National Instruments Corporation Reconfigurable measurement system utilizing a programmable hardware element and fixed hardware resources
US20020073380A1 (en) * 1998-09-30 2002-06-13 Cadence Design Systems, Inc. Block based design methodology with programmable components
US20120086471A1 (en) * 2000-10-26 2012-04-12 Warren Snyder Psoc architecture
US8160864B1 (en) * 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US20100010706A1 (en) * 2005-09-23 2010-01-14 Joseph Gormley Vehicle control and interconnection system
US20120002803A1 (en) * 2010-07-02 2012-01-05 Wael Adi Self reconfiguring vlsi architectures for unknown secret physical functions based crypto security systems

Also Published As

Publication number Publication date
CN104704437B (zh) 2019-02-05
SG11201407208UA (en) 2014-12-30
WO2013168151A2 (fr) 2013-11-14
US20150161379A1 (en) 2015-06-11
CN104488220A (zh) 2015-04-01
KR20150022815A (ko) 2015-03-04
WO2013168151A3 (fr) 2014-02-27
SG11201407253PA (en) 2014-12-30
CN104704437A (zh) 2015-06-10
EP2859681A2 (fr) 2015-04-15
JP2015517700A (ja) 2015-06-22
JP6176866B2 (ja) 2017-08-09
WO2013168148A2 (fr) 2013-11-14
CA2873905A1 (fr) 2013-11-14
JP2015527624A (ja) 2015-09-17
US9767270B2 (en) 2017-09-19
HK1211093A1 (en) 2016-05-13
KR20150011376A (ko) 2015-01-30
HK1208972A1 (en) 2016-03-18
EP2847645A2 (fr) 2015-03-18
CA2872443A1 (fr) 2013-11-14
EP2847645A4 (fr) 2016-03-09
EP2859681A4 (fr) 2016-03-30

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