WO2013155683A1 - Dispositif d'affichage à cristaux liquides et le circuit de commande correspondant - Google Patents

Dispositif d'affichage à cristaux liquides et le circuit de commande correspondant Download PDF

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Publication number
WO2013155683A1
WO2013155683A1 PCT/CN2012/074257 CN2012074257W WO2013155683A1 WO 2013155683 A1 WO2013155683 A1 WO 2013155683A1 CN 2012074257 W CN2012074257 W CN 2012074257W WO 2013155683 A1 WO2013155683 A1 WO 2013155683A1
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Prior art keywords
line
field effect
effect transistor
scan
electrically connected
Prior art date
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PCT/CN2012/074257
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English (en)
Chinese (zh)
Inventor
王金杰
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深圳市华星光电技术有限公司
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Priority to US13/510,928 priority Critical patent/US8830154B2/en
Publication of WO2013155683A1 publication Critical patent/WO2013155683A1/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a liquid crystal display device and a display panel thereof.
  • the liquid crystal display device generally includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate.
  • the liquid crystal display device includes a plurality of pixel units, each of the pixel units includes a pixel electrode disposed on the array substrate and a common electrode disposed on the color filter substrate, and the pixel electrode and the color filter substrate
  • the common electrode constitutes a liquid crystal capacitor.
  • an array substrate as shown in FIG. 1 in order to drive the liquid crystal display device, an array substrate as shown in FIG. 1 is used.
  • the array substrate includes a scan line 101 disposed in a row direction, and a data line 103 disposed in the direction of the scan line 101 but not conductive.
  • the pixel electrode 105 and the thin film transistor 107 in the plurality of unit regions divided by the scanning line 101 and the data line 103.
  • a data driver and a scan driver (not shown) are connected to the data line 103 and the scan line 101, respectively.
  • the gates of the thin film transistors 107 of the same row are electrically connected to the same nearest scan line; the sources of the thin film transistors 107 of the same column are electrically connected to the same nearest data line; the drain of each thin film transistor 107 Electrically connected to the pixel electrode 105 in the same cell region.
  • the liquid crystal molecules in the liquid crystal layer deflect The direction also changes to control the light passing rate through the pixel, thereby controlling the display brightness of each pixel.
  • a liquid crystal display device having a resolution of m ⁇ n is taken as an example, and 3 m data lines and n scanning lines are required. If the channels of the data driver and the scan driver are a and b, respectively, the number of required data drivers and scan drivers is 3 m/a and n/b, respectively. Data drives and scan drives are relatively expensive, resulting in higher production costs.
  • the technical problem to be solved by the present invention is to provide a liquid crystal display device and a driving circuit thereof, which can reduce the required number of scan drivers and data drivers at the same resolution, thereby reducing production costs.
  • the present invention further provides a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer sandwiched between the first substrate and the second substrate.
  • the first substrate includes a plurality of pixel units arranged in an array and a plurality of scan drivers located at a periphery of the pixel unit array, a plurality of data drivers, a plurality of first switch units, and a plurality of second switch units; wherein each of the The pixel unit includes a columnar data line, a first scan line and a second scan line in a row direction, a pixel electrode located in a region surrounded by the data line and the scan line, and a controlled switch, wherein the controlled switch is a first film a transistor, in the pixel unit of each row, an gate of the odd-numbered column of the first thin film transistor is electrically connected to the first scan line, and a gate of the even-numbered column of the first thin film transistor is electrically connected to the second scan line a source of the first thin switch
  • a pixel unit provides a data signal; when the first driver outputs a high level to a third select line, a fourth select line, and a fifth select line, output a low level to a first select line, a second select line, a sixth
  • the third field effect transistor, the fourth field effect transistor and the fifth field effect transistor are turned on, the first field effect transistor, the second field effect transistor and the sixth field effect transistor Closed, so that the scan signal outputted by the channel of the scan driver is transmitted to the first scan line or the second scan line of the second row of pixel units through the third field effect transistor, and the low level signal output by the low level signal line Transmitting to a first scan line of the first row of pixel cells through the fourth field effect transistor and to a second scan line of the first row of pixel cells through the fifth field effect transistor to select an odd column in the second row of pixel cells Or the pixel unit of the even column provides the scan signal; when the second driver outputs the high
  • the present invention further provides a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer sandwiched between the first substrate and the second substrate, the first The substrate includes a plurality of pixel units arranged in an array and a plurality of scan drivers located at a periphery of the pixel unit array, a plurality of data drivers, a plurality of first switching units, and a plurality of second switching units; wherein each of the pixel units a data line including a column direction, at least two scan lines in a row direction, pixel electrodes located in a region surrounded by the data lines and the scan lines, and a controlled switch, in each of the pixel units of each row, each of the controlled switches The controlled end is electrically connected to one of the at least two scan lines, the input end of the controlled switch is electrically connected to the data line, and the output end of the controlled switch is electrically connected to the pixel electrode; each of the first switch unit and the scan One of the channels of the driver correspond
  • the controlled switch is a first thin film transistor; each of the pixel units includes a first scan line and a second scan line in a row direction, wherein the number of odd columns in the pixel unit of each row a gate of a thin film transistor is electrically connected to the first scan line, and a gate of the even thin film of the first thin film transistor is electrically connected to the second scan line; each of the first switch unit and an adjacent first row of pixels a unit, a second row of pixel units, each of the first switch units includes a first output end, a second output end, a third output end, and a fourth output end, and the first output end of the first switch unit is The first scan lines of the first row of pixel units are electrically connected to each other, the second output end of the first row of pixel units is electrically connected to the second scan line of the first row of pixel units, and the third output end of the first switch unit is The first scan line of the second row of pixel units is electrically connected, and the fourth output end of the first switch unit is electrically
  • the controlled switch is a first thin film transistor; each of the pixel units includes a first scan line and a second scan line in a row direction, wherein the number of odd columns in the pixel unit of each row a gate of a thin film transistor is electrically connected to the first scan line, and a gate of the first thin film transistor of the even column is electrically connected to the second scan line; the first switch unit and the first row of pixel units, the second row Corresponding to the pixel unit, each of the first switch units includes a first output end, a second output end, and a third output end, and the first output end of the first switch unit and the first scan line of the first row of pixel units Electrically connected, the second output end of the first switch unit is electrically connected to the second scan line of the first row of pixel units, and the third output end of the first switch unit and the first scan line of the second row of pixel units Or a second scan line electrically connected for selectively outputting a scan signal from one of the scan drivers to an odd-numbered column or an
  • the first switching unit includes: a first selection line, a second selection line, a third selection line, a fourth selection line, a fifth selection line, a sixth selection line, and a low level signal line arranged in a column direction; a first driver for outputting a level selection signal to the first selection line, the second selection line, the third selection line, the fourth selection line, the fifth selection line, and the sixth selection line, and outputting a low level to a low level a first signal transistor, the gate of the first FET is electrically connected to the first selection line, and the source of the first FET is electrically connected to one of the channels of the scan driver, The drain of one effect transistor is electrically connected to the first scan line of the pixel unit of the first row; the second field effect transistor, the gate of the second field effect transistor is electrically connected to the second select line, and the second field effect transistor a source is electrically connected to the channel of the scan driver, a drain of the second field effect transistor is electrically connected to a second scan line of the first row of pixel
  • the second switching unit includes: a seventh selection line and an eighth selection line disposed in a row direction; a second driver configured to output a level selection signal to the seventh selection line or the eighth selection line; a field effect transistor, a gate of the seventh field effect transistor is electrically connected to a seventh selection line, a source of the seventh field effect transistor is electrically connected to one of the channels of the data driver, and a drain of the seventh field effect transistor Electrically connecting with a data line of one of the odd columns; the eighth field effect transistor, the gate of the eighth field effect transistor is electrically connected to the eighth selection line, the source of the eighth field effect transistor and the data driver The channel is electrically connected, and the drain of the eighth field effect transistor is electrically connected to the data line of the adjacent even column; wherein, when the second driver outputs a high level to a seventh selection line, the output is low to the eighth When the line is selected, the seventh FET is turned on, and the eighth FET is closed, so that the signal outputted by one of the channels of the data driver is transmitted to
  • the present invention further provides a liquid crystal display driving circuit, comprising: a plurality of scan drivers disposed on a periphery of a pixel unit array of a liquid crystal display, a plurality of data drivers, a plurality of first switch units, and a plurality of second a switching unit; each of the pixel units includes a column of data lines, at least two scan lines in a row direction, pixel electrodes located in a region surrounded by the data lines and the scan lines, and a controlled switch in the pixel unit of each row
  • the controlled end of each of the controlled switches is electrically connected to one of the at least two scan lines, the input end of the controlled switch is electrically connected to the data line, and the output end of the controlled switch is electrically connected to the pixel electrode;
  • the first switch unit corresponds to one of the channels of the scan driver and the pixel unit having a row number greater than one row, and each of the first switch units includes an input end and at least three output terminals, the first switch unit The input end is
  • the controlled switch is a first thin film transistor; each of the pixel units includes a first scan line and a second scan line in a row direction, wherein the number of odd columns in the pixel unit of each row a gate of a thin film transistor is electrically connected to the first scan line, and a gate of the even thin film of the first thin film transistor is electrically connected to the second scan line; each of the first switch unit and an adjacent first row of pixels a unit, a second row of pixel units, each of the first switch units includes a first output end, a second output end, a third output end, and a fourth output end, and the first output end of the first switch unit is The first scan lines of the first row of pixel units are electrically connected to each other, the second output end of the first row of pixel units is electrically connected to the second scan line of the first row of pixel units, and the third output end of the first switch unit is The first scan line of the second row of pixel units is electrically connected, and the fourth output end of the first switch unit is electrically
  • the controlled switch is a first thin film transistor; each of the pixel units includes a first scan line and a second scan line in a row direction, wherein the number of odd columns in the pixel unit of each row a gate of a thin film transistor is electrically connected to the first scan line, and a gate of the first thin film transistor of the even column is electrically connected to the second scan line; the first switch unit and the first row of pixel units, the second row Corresponding to the pixel unit, each of the first switch units includes a first output end, a second output end, and a third output end, and the first output end of the first switch unit and the first scan line of the first row of pixel units Electrically connected, the second output end of the first switch unit is electrically connected to the second scan line of the first row of pixel units, and the third output end of the first switch unit and the first scan line of the second row of pixel units Or a second scan line electrically connected for selectively outputting a scan signal from one of the scan drivers to an odd-numbered column or an
  • the first switching unit includes: a first selection line, a second selection line, a third selection line, a fourth selection line, a fifth selection line, a sixth selection line, and a low level signal line arranged in a column direction; a first driver for outputting a level selection signal to the first selection line, the second selection line, the third selection line, the fourth selection line, the fifth selection line, and the sixth selection line, and outputting a low level to a low level a first signal transistor, the gate of the first FET is electrically connected to the first selection line, and the source of the first FET is electrically connected to one of the channels of the scan driver, The drain of one effect transistor is electrically connected to the first scan line of the pixel unit of the first row; the second field effect transistor, the gate of the second field effect transistor is electrically connected to the second select line, and the second field effect transistor a source is electrically connected to the channel of the scan driver, a drain of the second field effect transistor is electrically connected to a second scan line of the first row of pixel
  • the second switching unit includes: a seventh selection line and an eighth selection line disposed in a row direction; a second driver configured to output a level selection signal to the seventh selection line or the eighth selection line; a field effect transistor, a gate of the seventh field effect transistor is electrically connected to a seventh selection line, a source of the seventh field effect transistor is electrically connected to one of the channels of the data driver, and a drain of the seventh field effect transistor Electrically connecting with a data line of one of the odd columns; the eighth field effect transistor, the gate of the eighth field effect transistor is electrically connected to the eighth selection line, the source of the eighth field effect transistor and the data driver The channel is electrically connected, and the drain of the eighth field effect transistor is electrically connected to the data line of the adjacent even column; wherein, when the second driver outputs a high level to a seventh selection line, the output is low to the eighth When the line is selected, the seventh FET is turned on, and the eighth FET is closed, so that the signal outputted by one of the channels of the data driver is transmitted to
  • the invention has the beneficial effects that the first switch unit and the second switch unit are arranged, so that the first switch unit can drive more than one pixel unit in a time-division manner to realize multiple scan line sharing. Scanning the same channel of the drive reduces the number of scan drives required and reduces production costs. At the same time, the pixel unit of the same row is driven in multiple times, so that the same channel of the data driver can be shared by the plurality of data lines by the control of the second switching unit, thereby reducing the required number of data drivers and further reducing the production cost.
  • FIG. 1 is a schematic structural view of an array substrate of the prior art
  • Figure 2 is a front elevational view showing a first embodiment of the liquid crystal display device of the present invention
  • Figure 3 is a side view of the liquid crystal display device shown in Figure 2;
  • Figure 4 is a circuit diagram of a first embodiment of a liquid crystal display driving circuit on the first substrate shown in Figure 2;
  • FIG. 5 is a specific circuit diagram of the liquid crystal display driving circuit shown in Figure 4.
  • Figure 6 is a circuit diagram of a second embodiment of a liquid crystal display driving circuit on the first substrate shown in Figure 2 .
  • Figure 2 is a front elevational view of a first embodiment of a liquid crystal display device of the present invention.
  • Fig. 3 is a side view of the liquid crystal display device shown in Fig. 2;
  • the first embodiment of the liquid crystal display device of the present invention includes a first substrate 201, a second substrate 203, and a liquid crystal layer 205 sandwiched between the first substrate 201 and the second substrate 203.
  • the first substrate 201 is an array substrate
  • the second substrate 203 is a color filter substrate.
  • FIG. 4 is a circuit diagram of the first embodiment of the liquid crystal display driving circuit on the first substrate 201 shown in FIG. 2.
  • the first substrate 201 includes a plurality of pixel units 410 arranged in an array, a plurality of scan drivers 420 located at the periphery of the array of pixel units 410, a plurality of data drivers 430, a plurality of first switch units 440, and a plurality of Second switching units 450.
  • Each of the pixel units 410 includes a columnar data line 415, a first scan line 416 and a second scan line 417 that are insulated from the data line 415, and pixels in the area surrounded by the data line 415 and the scan lines 416, 417.
  • the pixel electrode 411 is located in a region surrounded by the data line 415, the first scan line 416, and the second scan line 417.
  • the first thin film transistor 413 is also disposed in a region surrounded by the data line 415, the first scan line 416, and the second scan line 417.
  • the gates of the odd-numbered columns of the first thin film transistors 413 are electrically connected to the first scan lines 416, and the gates of the even-numbered first thin film transistors 413 are electrically connected to the second scan lines 417.
  • the source of the first thin film transistor 413 is connected to the data line 415, and the drain of the first thin film transistor 413 is connected to the pixel electrode 411.
  • Each of the first switching unit 440 corresponds to one of the channels and rows of the scan driver 420 being greater than one row of pixel units 410 for selectively outputting scan signals from one of the scan drivers 420 to odd columns in the same row or Pixel unit 410 of even columns.
  • the first switching unit 440 includes an input terminal 441, a first output terminal 442, a second output terminal 443, and a third output terminal 444.
  • the input end 441 of the first switch unit 440 is electrically connected to one of the channels of the scan driver 420, and the first output end 442 of the first switch unit 440 is electrically connected to the first scan line 416 of the first row of pixel units, the first switch unit
  • the second output 443 of the 440 is electrically connected to the second scan line 417 of the first row of pixel units, and the third output 444 of the first switch unit 440 is electrically connected to the first scan line 416 of the adjacent second row of pixel units.
  • Each of the second switching units 450 corresponds to one of the channels of the data driver 430 and the two columns of pixel units 410 for selectively outputting data signals from one of the channels of the data driver 430 to the adjacent two columns of pixel units 410. Odd or even columns.
  • the second switching unit 450 includes an input terminal 451, a first output terminal 452, and a second output terminal 453.
  • the input end 451 of the second switching unit 450 is electrically connected to one of the channels of the data driver 430
  • the first output end 452 of the second switching unit 450 is electrically connected to the odd-numbered data line 415
  • the second output of the second switching unit 450 End 453 is electrically coupled to even-numbered data lines 415 adjacent to odd-numbered columns of data lines 415.
  • each of the first switch unit 440 and the scan driver 420 has one channel and the number of rows corresponding to one row of pixel units 410, that is, the plurality of first switch units 440 share one scan driver 420; each of the second switch units 450 and One of the channels of the data driver 430 corresponds to the two columns of pixel units 410, that is, the plurality of second switching units 450 share one data driver 430, while the two columns of pixel units 410 share one channel of the data driver 430 through one second switching unit 450.
  • FIG. 4 shows only one scan driver 420 and one data driver 430. In practical applications, the number of scan drivers 420 and data drivers 430 should be set as needed.
  • first thin film transistor 413 may also be replaced by a triode, a Darlington tube or other controlled switches, which is not specifically limited in the present invention.
  • the first switching unit 440 does not selectively output the scan signals from the scan driver to the pixel units in the same row only in the order of odd and even numbers. In other embodiments, it may be a random arrangement or other rules, for example:
  • the first switching unit 440 includes four output terminals, wherein the three output terminals are connected to three scanning lines of the same row of pixel units, and the remaining one output terminal is connected to the scanning lines of the adjacent another row of pixel units.
  • the pixel units of one or more rows can be driven in a time-division manner, so that multiple scan lines share the same channel of the scan driver, thereby reducing the required number of scan drivers and reducing the production cost.
  • a row of pixel units are separately divided into parity columns for driving, thereby realizing multiplexing of the data driver 430 channels, saving at least half of the channels, thereby reducing the number of data drivers 430 and reducing the production cost.
  • FIG. 5 is a specific circuit diagram of the liquid crystal display driving circuit shown in FIG.
  • Each of the first switching units 540 includes a first selection line 5471, a second selection line 5472, a third selection line 5473, a fourth selection line 5474, a fifth selection line 5475, a sixth selection line 5476, and a low level signal line 5477.
  • the first selection line 5471, the second selection line 5472, the third selection line 5473, the fourth selection line 5474, the fifth selection line 5475, the sixth selection line 5476, and the low-level signal line 5477 are arranged in the first substrate 201. on.
  • the first driver 547 is electrically connected to the first selection line 5471, the second selection line 5472, the third selection line 5473, the fourth selection line 5474, the fifth selection line 5475, the sixth selection line 5476, and the low level signal line 5477, respectively. .
  • the first driver 545 is configured to output a level selection signal to the first selection line 5471, the second selection line 5472, the third selection line 5473, the fourth selection line 5474, the fifth selection line 5475, and the sixth selection line 5476, and the output is low. Level to low signal line 5477.
  • the gate of the first field effect transistor 541 is electrically connected to the first selection line 5471.
  • the source of the first field effect transistor 541 is electrically connected to one of the channels of the scan driver 420, and the drain of the first field effect transistor 541 is first.
  • the first scan line 416 of the row of pixel cells is electrically connected.
  • the gate of the second field effect transistor 542 is electrically connected to the second selection line 5472, the source of the second field effect transistor 542 is electrically connected to the channel of the scan driver 420, and the drain of the second field effect transistor 542 is first.
  • the second scan lines 417 of the row pixel units are electrically connected.
  • the gate of the third field effect transistor 543 is electrically connected to the third selection line 5473, the source of the third field effect transistor 543 is electrically connected to the channel of the scan driver 420, and the drain of the third field effect transistor 543 is second.
  • the first scan line 416 of the row of pixel cells is electrically connected.
  • the drain of the third field effect transistor 543 can also be electrically connected to the second scan line 417 of the second row of pixel units.
  • the gate of the fourth field effect transistor 544 is connected to the fourth select line 5474, the source of the fourth field effect transistor 544 is electrically connected to the low level signal line 5477, and the drain and the first line of the fourth field effect transistor 544 are connected.
  • the first scan line 416 of the pixel unit is electrically connected.
  • the gate of the fifth field effect transistor 545 is electrically connected to the fifth selection line 5475, the source of the fifth field effect transistor 545 is electrically connected to the low level signal line 5477, and the drain and the first line of the fifth field effect transistor 545 are connected.
  • the second scan line 417 of the pixel unit is electrically connected.
  • the gate of the sixth field effect transistor 546 is electrically connected to the sixth selection line 5476, the source of the sixth field effect transistor 546 is electrically connected to the low level signal line 5477, and the drain and the second line of the sixth field effect transistor 546 are connected.
  • the first scan line 416 of the pixel unit is electrically connected.
  • the drain of the sixth FET 546 may also be electrically connected to the second scan line 417 of the second row of pixel units.
  • Each of the second switching units 550 includes a seventh selection line 5531, an eighth selection line 5532, a second driver 553, a seventh field effect transistor 551, and an eighth field effect transistor 552.
  • the seventh selection line 5531 and the eighth selection line 5532 are laterally disposed on the first substrate 201.
  • the second driver 553 is electrically connected to the seventh selection line 5531 and the eighth selection line 5532, respectively.
  • the second driver 553 is for outputting the level selection signal to the seventh selection line 5531 and the eighth selection line 5532.
  • the gate of the seventh field effect transistor 551 is electrically connected to the seventh selection line 5531, the source of the seventh field effect transistor 551 is electrically connected to one of the channels of the data driver 430, and the drain of the seventh field effect transistor 551 and one of the columns
  • the data lines 415 of the odd columns are electrically connected.
  • the gate of the eighth field effect transistor 552 is electrically connected to the eighth selection line 5532, the source of the eighth field effect transistor 552 is electrically connected to the channel of the data driver 430, and the drain of the eighth field effect transistor 552 is adjacent to the drain.
  • the data lines 415 of the even columns are electrically connected.
  • the liquid crystal display device adopts a line scan form. Therefore, when scanning each frame, for example, starting from the first row, after the first switching unit 440 selects to supply the scan signal to the pixel unit 410 of the odd column in the first row, all the second switching units 450 simultaneously select the odd number
  • the pixel unit 410 of the column provides a data signal; after the first switching unit 440 selects to supply the scan signal to the pixel unit 410 which is the even column in the first row, all the second switching units 450 simultaneously select the even number adjacent to the odd column.
  • the pixel unit 410 of the column provides a data signal.
  • the first switching unit 440 selects to supply the scan signals to the pixel units 410 of the odd columns in the second row
  • all of the second switch units 450 simultaneously select to provide the data signals to the pixel units 410 of the odd columns. After that, the analogy is repeated until the last line is scanned to complete the scanning and data input of one frame.
  • the output is low level to
  • the second selection line 5472, the third selection line 5473, the fourth selection line 5474, and the low level signal line 5477, the first field effect transistor 541, the fourth field effect transistor 544, and the fifth field effect transistor are turned on 545,
  • the second field effect transistor 542, the third field effect transistor 543, and the fourth field effect transistor 544 are closed, so that the scan signal outputted by one of the channels of the scan driver 420 is transmitted to the first row of pixel units through the first field effect transistor 541.
  • a scan line 416, the low level signal output by the low level signal line 5477 is transmitted to the second scan line 417 of the first row of pixel units through the fifth field effect transistor 545 and to the second line through the sixth field effect transistor 546.
  • the first scan line 416 or the second scan line 417 of the pixel unit selects to provide a scan signal to the pixel unit of the odd column in the first row of pixel units.
  • the seventh FET is turned on 551, and the eighth FET 552 is closed, so that the data
  • the signal output by one of the channels of the driver 430 is transmitted through the seventh field effect transistor 551 to the data line 415 of one of the columns of odd columns to select to supply data signals to the pixel cells of the odd column of the same column.
  • the fourth selection line 5474 and the sixth selection line 5476 When the first driver 547 outputs a high level to the second selection line 5472, the fourth selection line 5474 and the sixth selection line 5476, outputs a low level to the first selection line 5471, the third selection line 5473, the fifth selection
  • the line 5475 and the low level signal line 5477 are turned on, the second field effect transistor 542, the fourth field effect transistor 544, and the sixth field effect transistor 546 are turned on, the first field effect transistor 541, the third field effect transistor 543, and the first
  • the fifth field effect transistor 545 is closed, so that the scan signal outputted by the channel of the scan driver 420 is transmitted to the second scan line 417 of the first row of pixel units through the second field effect transistor 542, and the low level signal line 5477 outputs low power.
  • the flat signal is transmitted to the first scan line 416 of the first row of pixel units through the fourth field effect transistor 544 and to the first scan line 416 or the second scan line 417 of the second row of pixel units through the sixth field effect transistor 546.
  • a scan signal is provided to select pixel cells that are even columns in the first row of pixel cells.
  • the eighth FET is turned on 552, and the seventh FET 551 is closed, so that the data driver
  • the signal output by the channel of 430 is transmitted through an eighth field effect transistor 552 to an adjacent one column of even-numbered data lines 415 to select to provide data signals to pixel cells of the same column of even columns.
  • the first driver 547 When the first driver 547 outputs a high level to the third selection line 5473, the fourth selection line 5474 and the fifth selection line 5475, and outputs a low level to the first selection line 5471, the second selection line 5472, and the sixth selection line 5476.
  • the low level signal line 5477, the third field effect transistor 543, the fourth field effect transistor 544 and the fifth field effect transistor 545 are turned on, the first field effect transistor 541, the second field effect transistor 542 and the sixth field The effect transistor 546 is closed, so that the scan signal output by the channel of the scan driver 420 is transmitted to the first scan line 416 or the second scan line 417 of the second row of pixel units through the third field effect transistor 543, and the low level signal line 5477
  • the output low level signal is transmitted to the first scan line 416 of the first row of pixel units through the fourth field effect transistor 544 and to the second scan line 417 of the first row of pixel units through the fifth field effect transistor 545 to select
  • a scan signal is supplied to the odd-numbered or even-numbered pixel cells in the second row of pixel cells.
  • the seventh FET is turned on 551, and the eighth FET 552 is closed.
  • the signal output from the channel of the data driver 430 is transmitted through the seventh field effect transistor 551 to the data line 415 of one of the columns of odd columns to select to supply data signals to the pixel cells of the odd column of the same column.
  • the above is a specific case for one channel of the data driver 430, and the remaining channels of the data driver 430, as well as all the channels of the other data drivers 430, operate simultaneously and neatly with reference to the previous mode.
  • the first first switching unit 440 selects to supply the scanning signals to the pixel units 410 of the odd columns in the first row, after which all the second switching units 450 simultaneously select the direction.
  • the pixel unit 410 of the odd column provides a data signal.
  • the first first switching unit 440 selects to provide scan signals to the pixel units 410 of the even columns in the first row, after which all of the second switching units 450 simultaneously select to provide data signals to the pixel units 410 of the even columns.
  • the first first switching unit 440 selects to supply scan signals to the pixel units 410 of the odd columns in the second row, after which all of the second switching units 450 simultaneously select to provide data signals to the pixel units 410 of the odd columns.
  • each row is scanned until one frame of scanning is completed.
  • one switching unit 440 corresponds to more rows of pixels, the driving method thereof is similar to the above, and details are not described herein.
  • FIG. 6 is a circuit diagram of a second embodiment of the liquid crystal display driving circuit on the first substrate 201 shown in FIG. 2. The difference between this embodiment and the first embodiment shown in FIG. 4 is that:
  • Each of the first switching units 640 corresponds to an adjacent first row of pixel units and a second row of pixel units.
  • Each of the first switching units 640 includes an input end 641 , a first output end 642 , a second output end 643 , a third output end 644 , and a fourth output end 645 .
  • the input end of the first switch unit 640 is electrically connected to one of the channels of the scan driver 420.
  • the first output end 642 of the first switch unit 640 is electrically connected to the first scan line 416 of the first row of pixel units, and the first switch unit 640
  • the second output end 643 is electrically connected to the second scan line 417 of the first row of pixel units, and the third output end 644 of the first row of the pixel unit 640 is electrically connected to the first scan line 416 of the second row of pixel units, the first switch
  • the fourth output 645 of the unit 640 is electrically coupled to the second scan line 417 of the second row of pixel units for selectively outputting a scan signal from one of the scan driver 420 to one of the two rows of pixel units Pixel cells of odd or even columns.
  • the first switching unit 640 in the above embodiment may also correspond to more rows of pixel units. At this time, correspondingly, the first switching unit 640 is provided with the same number of output lines as the number of scanning lines of the plurality of rows of pixel units. Thereby, the multiplexing of the scan driver channels is further realized, which saves more than half of the channels and reduces the production cost.
  • first switch unit 440 and the second switch unit 450 are not limited to the above-described forms, and those skilled in the art can utilize the related knowledge in the field after understanding the spirit of the present invention and the above structure.
  • the first switching unit 440 and the second switching unit 450 of other structures that implement the same or similar functions are designed. Different from the prior art, the first switch unit and the second switch unit are arranged, so that the first switch unit can drive more than one pixel unit in a time-sharing manner, so that multiple scan lines share the same channel of the scan driver. Reduce the number of scan drives required and reduce production costs.
  • the pixel unit of the same row is driven in multiple times, so that the same channel of the data driver can be shared by the plurality of data lines by the control of the second switching unit, thereby reducing the required number of data drivers and further reducing the production cost.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)

Abstract

L'invention concerne un dispositif d'affichage à cristaux liquides et son circuit de commande. Le dispositif d'affichage à cristaux liquides comprend une première unité de commutation (440) et une seconde unité de commutation (450). La première unité de commutation (440) correspond à un canal dans un pilote de balayage (420) et à plus d'une rangée d'unités de pixels (410); une extrémité d'entrée (441) de la première unité de commutation (440) est reliée électriquement à un canal dans le pilote de balayage (420), et chaque extrémité de sortie (442, 443, 444) de la première unité de commutation (440) est reliée électriquement à une ligne de balayage (416, 417) dans les plusieurs rangées d'unités de pixels (410) dans une correspondance d'un à un, de façon à délivrer un signal de balayage d'un canal, dans le pilote de balayage (420), à l'unité de pixel (410) reliée électriquement à la ligne de balayage correspondante (416, 417). La seconde unité de commutation (450) correspond à un canal dans un pilote de données (430) et à au moins deux colonnes d'unités de pixels (410); une extrémité d'entrée (451) de la seconde unité de commutation (450) est reliée électriquement à un canal dans le pilote de données (430), et chaque extrémité de sortie (452, 453) de la seconde unité de commutation (450) est reliée électriquement aux au moins deux colonnes d'unités de pixels (410) dans une correspondance d'un à un, de façon à délivrer un signal de données d'un canal, dans le pilote de données (430), à une colonne de nombre impair ou une colonne de nombre pair des deux colonnes adjacentes d'unités de pixels (410).
PCT/CN2012/074257 2012-04-16 2012-04-18 Dispositif d'affichage à cristaux liquides et le circuit de commande correspondant WO2013155683A1 (fr)

Priority Applications (1)

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US13/510,928 US8830154B2 (en) 2012-04-16 2012-04-18 Liquid crystal display device and driving circuit with reduced number of scan drivers and data drivers

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CN201210110926.7A CN102621758B (zh) 2012-04-16 2012-04-16 液晶显示装置及其驱动电路
CN201210110926.7 2012-04-16

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CN111052212A (zh) * 2017-09-21 2020-04-21 苹果公司 高帧率显示器
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CN104952883B (zh) 2015-05-11 2019-04-19 京东方科技集团股份有限公司 柔性阵列基板、显示面板、键盘组件和电子设备
CN104900181A (zh) * 2015-07-03 2015-09-09 京东方科技集团股份有限公司 一种阵列基板及其驱动方法和显示装置
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CN109188806A (zh) * 2018-09-18 2019-01-11 深圳市华星光电技术有限公司 液晶显示装置
CN110264934A (zh) * 2019-06-11 2019-09-20 重庆惠科金渝光电科技有限公司 显示面板的驱动电路、显示面板及显示装置
CN111292666A (zh) * 2020-03-27 2020-06-16 武汉华星光电技术有限公司 一种列反转驱动电路及显示面板
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