WO2013153937A1 - Semiconductor diode device - Google Patents

Semiconductor diode device Download PDF

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Publication number
WO2013153937A1
WO2013153937A1 PCT/JP2013/058354 JP2013058354W WO2013153937A1 WO 2013153937 A1 WO2013153937 A1 WO 2013153937A1 JP 2013058354 W JP2013058354 W JP 2013058354W WO 2013153937 A1 WO2013153937 A1 WO 2013153937A1
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Prior art keywords
mosfet
diode device
semiconductor diode
breakdown voltage
semiconductor
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PCT/JP2013/058354
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French (fr)
Japanese (ja)
Inventor
上野　勝典
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次世代パワーデバイス技術研究組合
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Publication of WO2013153937A1 publication Critical patent/WO2013153937A1/en

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Definitions

  • the present invention relates to a semiconductor diode device.
  • GaN semiconductor elements wide band gap gallium nitride (GaN) compound semiconductors have been used as semiconductor materials for semiconductor elements for high frequency devices (hereinafter referred to as GaN semiconductor elements).
  • GaN-based semiconductor element a buffer layer or a GaN doped layer formed by using, for example, a metal-organic chemical vapor deposition (MOCVD) method is provided on the surface of a semiconductor substrate.
  • MOCVD metal-organic chemical vapor deposition
  • wide band gap semiconductor elements have been studied as devices that handle high withstand voltages and large currents in recognition that they can be applied to power devices for power devices in addition to high frequency applications. Power devices are roughly divided into transistors and diodes.
  • silicon has been mainly used as a semiconductor material for power devices, but silicon carbide (SiC) has been used because of its low resistance, and devices using GaN are also being studied.
  • FIG. 9 is a schematic cross-sectional view of a Schottky barrier diode using a known GaN-based semiconductor.
  • a buffer layer 102 for laminating a GaN layer, a GaN layer 103 and an aluminum gallium nitride (AlGaN) layer 104 are sequentially laminated on a substrate 101.
  • the AlGaN layer 104 is a mixed crystal of AlN and GaN, and the characteristics of the band gap, spontaneous polarization, and piezoelectric polarization change depending on the composition ratio.
  • a two-dimensional electron gas (2DEG) layer 103a whose concentration is controlled by controlling the Al composition ratio and thickness of the AlGaN layer 104 is formed. ing.
  • the 2DEG layer 103a serves as a passage through which electrons flow.
  • the Schottky barrier diode 100 has two main electrodes.
  • the anode electrode 105 is in Schottky contact with the AlGaN layer 104 and is electrically connected to the 2DEG layer 103a by electron tunneling current.
  • the cathode electrode 106 is in ohmic contact with the AlGaN layer 104.
  • the anode electrode 105 side when a positive bias voltage is applied to the cathode electrode 106 side, the anode electrode 105 side is in a reverse bias state, and the 2DEG layer 103a under the anode electrode is depleted and maintains a high breakdown voltage.
  • a positive bias voltage when a positive bias voltage is applied to the anode electrode 105 side, electrons are tunneled from the anode electrode 105 side to the 2DEG layer 103a, and a large current flows, thereby functioning as a diode having so-called rectification characteristics.
  • the Schottky barrier diode 100 can be used for a power device.
  • the Schottky barrier diode 100 has a low band resistance of the 2DEG layer 103a and a wide band gap of the GaN material, the insulating electric field strength is more than an order of magnitude larger than that of silicon, and a high breakdown voltage can be realized. Application to is expected.
  • the Schottky barrier diode 100 has a feature that it can be switched at high speed because there is no accumulation of minority carriers.
  • the buffer layer 102 formed on the substrate 101 is inserted in order to form the GaN layer 103 and the AlGaN layer 104 thereon, and is formed of a different substrate made of a material different from GaN, for example, silicon or sapphire, This is for absorbing a difference in thermal expansion coefficient and lattice constant from SiC or the like and stacking the GaN layer 103 and the AlGaN layer 104 with good crystallinity.
  • the buffer layer 102 has a high resistance or insulating characteristic and is used to maintain a breakdown voltage in a high breakdown voltage element.
  • a silicon substrate that is high quality, inexpensive, and capable of using a large diameter is often used.
  • a vertical Schottky barrier diode formed on a single crystal of SiC is also frequently used recently.
  • the Schottky barrier diode using SiC also has a characteristic that high-speed switching can be performed at a high breakdown voltage as in the case of using a GaN material.
  • a high withstand voltage and a low conduction resistance (on-resistance) as described above are great merits, but when maintaining a high withstand voltage in an off state, there is a large gap between the electrodes.
  • a leakage current may flow. Since this leak current is generated when a high voltage is applied, it causes power loss. This lost power is converted into heat in the device, increasing the temperature of the device, and electrons accelerated by a large internal electric field become hot electrons that are injected and accumulated in unnecessary locations, causing deterioration of reliability. There is a problem of inviting.
  • the leakage current must be suppressed to 1 mA / cm 2 or less at room temperature at the minimum.
  • the forward voltage drop (Vf) is determined by the work function difference between the metal (Schottky metal) constituting the Schottky electrode and the semiconductor in contact therewith.
  • the leakage current (Ileak) in the reverse direction is also determined by the work function difference. At this time, if the work function difference is large, there is a trade-off relationship that Vf increases but Ileak decreases. For this reason, it is common to select a Schottky metal having a small work function in order to lower Vf as much as possible within the allowable range of Ileak.
  • GaN has a characteristic that Vf of a Schottky junction with a metal hardly changes corresponding to the work function of the metal. This factor is understood to be due to the fact that there are many interface states on the GaN surface, so the position of the Fermi level is always kept constant near the surface regardless of the work function of the metal (Fermi level). Called pinning).
  • a semiconductor diode device 200 is formed by cascode-connecting a low breakdown voltage Schottky barrier diode 203 made of a silicon material and a normally-on transistor 204 between an anode electrode 201 and a cathode electrode 202.
  • a method of realizing low Vf and low Ileak by configuring has been proposed (see Non-Patent Document 1). According to this method, Vf and Ileak are determined by the Schottky barrier diode 203 having a low breakdown voltage, and it is therefore possible to control their values relatively freely.
  • Schottky metal may be selected in the same manner as described above.
  • Ileak is determined by the low breakdown voltage Schottky barrier diode 203.
  • the low withstand voltage Schottky barrier diode 203 made of silicon material has a very large leakage current of about several mA or more. This is because the design emphasizes lowering Vf than lowering leakage current.
  • the leakage current of the Schottky barrier diode 203 also flows through the normally-on transistor 204 having a high breakdown voltage. Therefore, it is considered that there is a problem that heat is generated on the high withstand voltage device side maintaining a large voltage.
  • the present invention has been made in view of the above, and an object thereof is to provide a semiconductor diode device that can simultaneously realize a low forward voltage drop and a low leakage current.
  • a semiconductor diode device includes a normally-on high voltage transistor made of a wide bandgap semiconductor material and a series connection to the high voltage transistor. And a MOSFET having a breakdown voltage lower than that of the high breakdown voltage transistor and a threshold voltage of 0.3 V or more and 1 V or less, and a gate and a source of the MOSFET are connected to each other. .
  • the semiconductor diode device according to the present invention is characterized in that the withstand voltage of the MOSFET is higher than the threshold voltage of the high withstand voltage transistor.
  • the semiconductor diode device according to the present invention is characterized in that the wide band gap semiconductor material is a gallium nitride compound semiconductor or silicon carbide.
  • the semiconductor diode device according to the present invention is characterized in that the MOSFET is made of a silicon material.
  • the semiconductor diode device according to the present invention is characterized in that the high breakdown voltage transistor is a HEMT.
  • the semiconductor diode device according to the present invention is characterized in that the high breakdown voltage transistor is a JFET.
  • the semiconductor diode device according to the present invention is characterized in that the MOSFET is an up drain type.
  • the semiconductor diode device according to the present invention is characterized in that the high-breakdown-voltage transistor and the MOSFET are incorporated in one package.
  • FIG. 1 is a schematic diagram of a semiconductor diode device according to the first embodiment.
  • FIG. 2 is a diagram showing IV characteristics of the semiconductor diode device shown in FIG.
  • FIG. 3 is a schematic cross-sectional view of a HEMT that is an example of a high voltage transistor.
  • FIG. 4 is a schematic cross-sectional view of a JFET which is an example of a high voltage transistor.
  • FIG. 5 is a schematic diagram of a semiconductor diode device according to the second embodiment.
  • FIG. 6 is a schematic diagram of a semiconductor diode device according to the third embodiment.
  • FIG. 7 is a schematic diagram of a semiconductor diode device according to the fourth embodiment.
  • FIG. 8 is a schematic diagram of a semiconductor diode device according to the fifth embodiment.
  • FIG. 9 is a schematic cross-sectional view of a Schottky barrier diode using a known GaN-based semiconductor.
  • FIG. 10 is a schematic diagram of a conventional semiconductor di
  • FIG. 1 is a schematic diagram of a semiconductor diode device according to Embodiment 1 of the present invention.
  • the semiconductor diode device 10 includes an anode electrode 11, a cathode electrode 12, a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) 13, and a high breakdown voltage transistor 14.
  • MOSFET Metal-Oxide-Semiconductor Field Effect Transistor
  • the MOSFET 13 includes a source electrode 13a, a gate electrode 13b, and a drain electrode 13c.
  • Reference numeral 13d denotes a built-in diode.
  • MOSFET 13 has a lower breakdown voltage than a high breakdown voltage transistor and a threshold voltage of 1 V or less.
  • MOSFET 13 is made of, for example, a silicon material.
  • the high breakdown voltage transistor 14 includes a source electrode 14a, a gate electrode 14b, and a drain electrode 14c.
  • the high breakdown voltage transistor 14 is a normally-on transistor having a high breakdown voltage of about 200 V to 2 kV and made of a wide band gap semiconductor material such as a GaN-based semiconductor material or SiC material.
  • the high voltage transistor 14 and the MOSFET 13 are cascode-connected in series.
  • the gate electrode 14 b of the high breakdown voltage transistor 14 and the gate electrode 13 b of the MOSFET 13 are connected to the anode electrode 11.
  • the gate electrode 13b and the source electrode 13a of the MOSFET 13 are connected.
  • the breakdown voltage of MOSFET 13 is preferably higher than the threshold voltage of high breakdown voltage transistor 14.
  • this semiconductor diode device 10 will be described. First, when a positive bias voltage is applied to the cathode electrode 12 side, the MOSFET 13 is in an off state, so that the anode-cathode of the semiconductor diode device 10 is in an off state.
  • the breakdown voltage of the semiconductor diode device 10 is determined by the breakdown voltage of the high breakdown voltage transistor 14.
  • the overall leakage current of the semiconductor diode device 10 is determined by the leakage current of the MOSFET 13.
  • a positive bias voltage is applied to the anode electrode 11 and a voltage exceeding the threshold value of the MOSFET 13 is applied to the gate electrode 13b, the channel of the MOSFET 13 is opened and a conduction current flows.
  • FIG. 2 is a diagram showing IV characteristics between the anode and the cathode of the semiconductor diode device 10.
  • Vbr is a withstand voltage.
  • the internal diode 13d associated with the PN junction is connected to the MOSFET 13 in parallel, if a positive bias voltage is applied to the anode electrode 11, a forward current may flow through the internal diode 13d.
  • a broken line L1 indicates the IV characteristic of the built-in diode 13d.
  • Vf can be controlled by setting the threshold voltage of the MOSFET 13. Therefore, Vf can be controlled by a principle different from that in the conventional Schottky barrier diode in which Vf is determined by the work function difference between the metal and the semiconductor. Since the threshold voltage of the MOSFET 13 can be freely designed by ion implantation such as channel doping or heat treatment, it is easy to realize low Vf.
  • the leakage current there is a trade-off relationship between the leakage current and Vf. That is, as Vf is decreased, the leakage current increases.
  • the bias voltage dependence of the leakage current is 60 mV / dec in the most ideal case, and is practically about 100 mV / dec. This value is referred to as an S value (subthreshold swing value), and is a parameter indicating the voltage change of the gate voltage when the leakage current increases by an order of magnitude in the gate voltage dependency of the drain current below the threshold value.
  • the ratio of the current at the threshold voltage to the leakage current is a five-digit difference. Become. Therefore, for example, if the current at the threshold voltage is 1 A, the leakage current is a sufficiently small value of 10 ⁇ A.
  • a typical Schottky barrier diode made of a conventional GaN-based semiconductor material or SiC material has a Vf of about 1 to 1.2V. Therefore, by setting the threshold voltage of the MOSFET 13 to 1 V or less, the semiconductor diode device 10 has a sufficiently lower Vf and a lower leakage current (Ileak) than the conventional one. Further, when the allowable value of the leakage current is 1 mA / cm 2 , the threshold voltage may be 0.3 V or more when the S value of the MOSFET 13 is 100 mV / dec.
  • FIG. 3 is a schematic cross-sectional view of a HEMT (High Electron Mobility Transistor) which is an example of a high voltage transistor.
  • a buffer layer 14A2, a GaN layer 14A3, and an AlGaN layer 14A4 are sequentially stacked on a substrate 14A1, and a source electrode 14A5, a gate electrode 14A6, and a drain electrode 14A7 are formed on the AlGaN layer 14A4.
  • a 2DEG layer 14A3a is formed at the interface between the GaN layer 14A3 and the AlGaN layer 14A4.
  • Such a GaN-based HEMT 14A has high breakdown voltage characteristics and low on-resistance characteristics, and is therefore suitable as the high breakdown voltage transistor 14.
  • the capacitance component is small, high-speed switching is realized and the HEMT can be prepared at a lower cost.
  • the threshold is about -3 to -10V. It is usually a normally-on device.
  • FIG. 4 is a schematic cross-sectional view of a JFET (Junction FET) which is an example of a high voltage transistor.
  • the JFET 14B is made of SiC, and a source electrode 14B4 and a drain electrode 14B5 are formed on the respective surfaces of N + type regions 14B2 and 14B3 formed so as to sandwich the N type region 14B1. Further, a P + type region 14B6 is formed in a part of the N type region 14B1, and a gate electrode 14B7 is connected to the P + type region 14B6.
  • SIT Static Induction Transistor
  • a normally-off type device is also designed by appropriately reducing the distance between the P + type regions 14B6. However, when this distance is reduced, the on-resistance increases. Therefore, there is a trade-off with on-resistance and the design is difficult.
  • the threshold value is designed to be about ⁇ 5V to ⁇ 15V.
  • SiC-based JFET 14B has high breakdown voltage characteristics and low on-resistance characteristics, and is therefore suitable as the high breakdown voltage transistor 14.
  • SiC-JFET has a large area and a highly reliable element on the market, and can be prepared relatively easily.
  • the semiconductor diode device 10 according to the first embodiment is obtained by connecting a MOSFET 13 and a high voltage transistor 14.
  • a MOSFET 13 a MOSFET 13
  • a high voltage transistor 14 a MOSFET 13
  • a high voltage transistor 14 a MOSFET 13
  • it can be handled in the same manner as a diode composed of a single element, and thus it is convenient and preferable.
  • an embodiment in which two elements are incorporated into one package will be described.
  • FIG. 5 is a schematic diagram of a semiconductor diode device according to Embodiment 2 of the present invention.
  • the semiconductor diode device 20 includes an anode electrode 21, a cathode electrode 22, a MOSFET 23, a high breakdown voltage transistor 24, and a conductive substrate 25 mounted in a single package 26.
  • the MOSFET 23 and the high voltage transistor 24 are mounted on the conductive substrate 25.
  • the MOSFET 23 is a vertical MOSFET and includes a drain electrode (not shown) formed on the back surface, and a source electrode 23a and a gate electrode 23b formed on the front surface.
  • the drain electrode formed on the back surface is directly connected to the conductive substrate 25.
  • the source electrode 23a is connected to the anode electrode 21 with a wiring wire W1.
  • the gate electrode 23b is connected to the source electrode 23a by the wiring wire W2.
  • the high breakdown voltage transistor 24 is a lateral GaN-HEMT, and includes a source electrode 24a, a gate electrode 24b, and a drain electrode 24c formed on the surface.
  • the source electrode 24a is connected to the drain of the MOSFET 23 through the conductive substrate 25 by the wiring wire W3.
  • the gate electrode 24b is connected to the anode electrode 21 with a wiring wire W4.
  • the drain electrode 24c is connected to the cathode electrode 22 by a wiring wire W5.
  • the components including the MOSFET 23 and the high breakdown voltage transistor 24 are incorporated in one package 26. Therefore, part of the anode electrode 21 and the cathode electrode 22 protrudes from the package 26 as terminals, and can be handled in the same manner as a diode composed of a single element.
  • FIG. 6 is a schematic diagram of a semiconductor diode device according to Embodiment 3 of the present invention.
  • the semiconductor diode device 30 includes an anode electrode 31, a cathode electrode 22, a MOSFET 33, and a high breakdown voltage transistor 24 that are mounted and incorporated in one package 36.
  • the cathode electrode 22 and the high breakdown voltage transistor 24 are the same as those of the semiconductor diode device 20 shown in FIG.
  • the MOSFET 33 and the high breakdown voltage transistor 24 are mounted on the anode electrode 31.
  • the MOSFET 33 is an up drain type MOSFET exemplified in Patent Document 1 and the like, and includes a source electrode (not shown) formed on the back surface, and a gate electrode 33b and a drain electrode 33c formed on the surface.
  • the source electrode formed on the back surface is directly connected to the anode electrode 31.
  • the gate electrode 33b is connected to the source electrode through the anode electrode 31 by the wiring wire W6.
  • the drain electrode 33c is connected to the source electrode 24a of the high breakdown voltage transistor 24 by a wiring wire W7.
  • the components including the MOSFET 33 and the high voltage transistor 24 are incorporated in one package 36. Therefore, part of the anode electrode 31 and the cathode electrode 22 protrudes from the package 36 as terminals, and can be handled in the same manner as a diode composed of a single element. Further, since the source electrode of the MOSFET 33 is formed on the back surface, a power wiring wire for connecting the source electrode and the anode electrode 31 can be omitted, and it is easy to directly connect them. As a result, there are merits such as a reduction in defect rate due to a reduction in assembly man-hours, a reduction in cost, and a reduction in inductance caused by wiring.
  • FIG. 7 is a schematic diagram of a semiconductor diode device according to Embodiment 4 of the present invention.
  • an anode electrode 21, a cathode electrode 42, a MOSFET 23, a high breakdown voltage transistor 44, and a conductive substrate 45 are mounted and incorporated in one package 46.
  • the anode electrode 21 and the MOSFET 23 are the same as those of the semiconductor diode device 20 shown in FIG.
  • the MOSFET 23 is mounted on the conductive substrate 45.
  • the high breakdown voltage transistor 44 is mounted on the cathode electrode 42.
  • the high breakdown voltage transistor 44 is a vertical SiC-JFET, and includes a drain electrode (not shown) formed on the back surface, and a source electrode 44a and a gate electrode 44b formed on the front surface.
  • the gate electrode 44b is connected to the anode electrode 21 with a wiring wire W8.
  • the source electrode 44a is connected to the drain of the MOSFET 23 through the conductive substrate 45 by the wiring wire W9.
  • the drain electrode is directly connected to the cathode electrode 42.
  • the components including the MOSFET 23 and the high breakdown voltage transistor 44 are incorporated in one package 46. Therefore, part of the anode electrode 21 and the cathode electrode 42 protrudes from the package 46 as terminals, and can be handled in the same manner as a diode made of a single element. Further, since the drain electrode of the high voltage transistor 44 is formed on the back surface, the power wiring wire for connecting the drain electrode and the cathode electrode 42 can be omitted, and it is easy to directly connect them. As a result, there are merits such as a reduction in defect rate due to a reduction in assembly man-hours, a reduction in cost, and a reduction in inductance caused by wiring.
  • FIG. 8 is a schematic diagram of a semiconductor diode device according to Embodiment 5 of the present invention.
  • the semiconductor diode device 50 includes an anode electrode 51, a cathode electrode 42, an up drain MOSFET 33, and a high breakdown voltage transistor 44, which is a vertical SiC-JFET, mounted in a single package 56. It is.
  • the MOSFET 33 is mounted on the anode electrode 51.
  • the high breakdown voltage transistor 44 is mounted on the cathode electrode 42.
  • the drain electrode 33c of the MOSFET 33 and the source electrode 44a of the high breakdown voltage transistor 44 are connected by a wiring wire W10.
  • the semiconductor diode device 50 is a combination of elements used in the semiconductor diode devices 30 and 40 according to the third and fourth embodiments.
  • both the power wiring wire for connecting the source electrode of the MOSFET 33 and the anode electrode 51 and the power wiring wire for connecting the drain electrode of the high voltage transistor 44 and the cathode electrode 42 are omitted. it can.
  • the merits of reducing the defective rate due to the reduction in assembly man-hours, reducing the cost, and further reducing the inductance caused by the wiring become more remarkable.
  • different elements MOSFET and high voltage transistor
  • the semiconductor diode device according to the present invention is useful for power devices used for power conversion devices such as inverters, motor drive devices, various power supply devices, uninterruptible power supplies, etc. that require high withstand voltage.
  • the wide band gap semiconductor material is a gallium nitride compound semiconductor or silicon carbide, but is not particularly limited as long as a desired high breakdown voltage can be obtained. Further, the constituent material of the MOSFET is not limited to silicon, and the threshold voltage may be 1 V or less.
  • the semiconductor diode device according to the present invention is suitable for application to a power device.

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Abstract

This semiconductor diode device comprises a normally-on high-voltage transistor (14) made of a wide-band-gap semiconductor material, and a MOSFET (13) that is serially connected to the high-voltage transistor (14), has a lower withstand voltage than the high-voltage transistor (14), and has a threshold voltage of from 0.3 V to 1 V inclusive, wherein the gate and the source of the MOSFET (13) are connected. Thus, it is possible to provide a semiconductor diode device that can achieve a low forward voltage drop and a low leakage current at the same time.

Description

半導体ダイオード装置Semiconductor diode device
　本発明は、半導体ダイオード装置に関するものである。 The present invention relates to a semiconductor diode device.
　従来から、高周波デバイス用半導体素子には、半導体材料としてワイドバンドギャップ型の窒化ガリウム（ＧａＮ）系化合物半導体が用いられている（以下、ＧａＮ系半導体素子とする）。ＧａＮ系半導体素子では、半導体基板の表面に、例えば有機金属化学気相蒸着（ＭＯＣＶＤ：Ｍｅｔａｌ－Ｏｒｇａｎｉｃ　Ｃｈｅｍｉｃａｌ　Ｖａｐｏｒ　Ｄｅｐｏｓｉｔｉｏｎ）法を用いて形成されたバッファ層やＧａＮドープ層が設けられている。最近では、ワイドバンドギャップ型半導体素子は、高周波用途に加え、電力装置用のパワーデバイスにも適用可能であるという認識から、高耐圧、大電流を扱うデバイスとしての検討も行われている。パワーデバイスには、大きく分けてトランジスタとダイオードがある。パワーデバイスでは、従来主にシリコンが半導体材料として用いられていたが、抵抗が低いことから炭化珪素（ＳｉＣ）が用いられるようになっており、さらにＧａＮを用いたデバイスの検討も進んでいる。 Conventionally, wide band gap gallium nitride (GaN) compound semiconductors have been used as semiconductor materials for semiconductor elements for high frequency devices (hereinafter referred to as GaN semiconductor elements). In a GaN-based semiconductor element, a buffer layer or a GaN doped layer formed by using, for example, a metal-organic chemical vapor deposition (MOCVD) method is provided on the surface of a semiconductor substrate. Recently, wide band gap semiconductor elements have been studied as devices that handle high withstand voltages and large currents in recognition that they can be applied to power devices for power devices in addition to high frequency applications. Power devices are roughly divided into transistors and diodes. Conventionally, silicon has been mainly used as a semiconductor material for power devices, but silicon carbide (SiC) has been used because of its low resistance, and devices using GaN are also being studied.
　図９は、公知のＧａＮ系半導体を用いたショットキーバリアダイオードの模式的な断面図である。図９に示すショットキーバリアダイオード１００は、基板１０１の上に、ＧａＮ層を積層するためのバッファ層１０２、ＧａＮ層１０３および窒化アルミニウムガリウム（ＡｌＧａＮ）層１０４が順次積層されている。ＡｌＧａＮ層１０４はＡｌＮとＧａＮの混晶であり、その構成比によってバンドギャップや自発分極、ピエゾ分極の特性が変化する。ＧａＮ層１０３とＡｌＧａＮ層１０４の界面には、ＡｌＧａＮ層１０４のＡｌ組成比と厚さとを制御することによってその濃度が制御された２次元電子ガス（２ＤＥＧ：Ｔｗｏ　Ｄｉｍｅｎｓｉｏｎａｌ　Ｅｌｅｃｔｒｏｎ　Ｇａｓ）層１０３ａが形成されている。この２ＤＥＧ層１０３ａが電子を流す通路となる。 FIG. 9 is a schematic cross-sectional view of a Schottky barrier diode using a known GaN-based semiconductor. In a Schottky barrier diode 100 shown in FIG. 9, a buffer layer 102 for laminating a GaN layer, a GaN layer 103 and an aluminum gallium nitride (AlGaN) layer 104 are sequentially laminated on a substrate 101. The AlGaN layer 104 is a mixed crystal of AlN and GaN, and the characteristics of the band gap, spontaneous polarization, and piezoelectric polarization change depending on the composition ratio. At the interface between the GaN layer 103 and the AlGaN layer 104, a two-dimensional electron gas (2DEG) layer 103a whose concentration is controlled by controlling the Al composition ratio and thickness of the AlGaN layer 104 is formed. ing. The 2DEG layer 103a serves as a passage through which electrons flow.
　この２ＤＥＧ層１０３ａは、電子の不純物散乱が小さいため、高移動度で低抵抗の電気伝導層となり、ＡｌＧａＮ層１０４上に形成された電極間の電流経路を提供する。ショットキーバリアダイオード１００には主たる電極が２つある。アノード電極１０５はＡｌＧａＮ層１０４とショットキー接触して、電子のトンネル電流によって２ＤＥＧ層１０３ａと電気的に接続している。カソード電極１０６はＡｌＧａＮ層１０４とオーミック接触している。 Since the 2DEG layer 103a has a small electron impurity scattering, the 2DEG layer 103a becomes a high mobility and low resistance electric conductive layer, and provides a current path between the electrodes formed on the AlGaN layer 104. The Schottky barrier diode 100 has two main electrodes. The anode electrode 105 is in Schottky contact with the AlGaN layer 104 and is electrically connected to the 2DEG layer 103a by electron tunneling current. The cathode electrode 106 is in ohmic contact with the AlGaN layer 104.
　ここで、カソード電極１０６側に正のバイアス電圧を印加すると、アノード電極１０５側は逆バイアス状態となり、アノード電極下の２ＤＥＧ層１０３ａが空乏化して高耐圧を維持する。一方、アノード電極１０５側に正のバイアス電圧を印加すると、アノード電極１０５側から電子が２ＤＥＧ層１０３ａへとトンネルして、大きな電流が流れ、いわゆる整流特性をもったダイオードとしての働きをする。これによって、ショットキーバリアダイオード１００は、パワーデバイスに使用することが可能となる。ショットキーバリアダイオード１００は、２ＤＥＧ層１０３ａの抵抗が低いことと併せて、ＧａＮ材料のバンドギャップが広いことから、絶縁電界強度がシリコンよりも一桁以上大きく、高耐圧を実現できるため、パワーデバイスへの応用が期待されている。 Here, when a positive bias voltage is applied to the cathode electrode 106 side, the anode electrode 105 side is in a reverse bias state, and the 2DEG layer 103a under the anode electrode is depleted and maintains a high breakdown voltage. On the other hand, when a positive bias voltage is applied to the anode electrode 105 side, electrons are tunneled from the anode electrode 105 side to the 2DEG layer 103a, and a large current flows, thereby functioning as a diode having so-called rectification characteristics. As a result, the Schottky barrier diode 100 can be used for a power device. Since the Schottky barrier diode 100 has a low band resistance of the 2DEG layer 103a and a wide band gap of the GaN material, the insulating electric field strength is more than an order of magnitude larger than that of silicon, and a high breakdown voltage can be realized. Application to is expected.
　また、ショットキーバリアダイオード１００は、少数キャリアの蓄積が無いため、高速でスイッチングできるという特徴を有している。基板１０１の上に形成されているバッファ層１０２は、その上のＧａＮ層１０３やＡｌＧａＮ層１０４を形成するために挿入されるもので、ＧａＮとは異なる材料からなる異種基板、たとえばシリコンやサファイヤ、ＳｉＣなどとの熱膨張係数や格子定数の違いを吸収して、結晶性のよいＧａＮ層１０３やＡｌＧａＮ層１０４を積むためのものである。一般的には、このバッファ層１０２は高抵抗または絶縁性の特性を有し、高耐圧素子において耐圧を維持するために利用される。また、基板１０１としては、最近では高品質で、安価で、大口径が利用可能なシリコン基板を用いることが多い。 Also, the Schottky barrier diode 100 has a feature that it can be switched at high speed because there is no accumulation of minority carriers. The buffer layer 102 formed on the substrate 101 is inserted in order to form the GaN layer 103 and the AlGaN layer 104 thereon, and is formed of a different substrate made of a material different from GaN, for example, silicon or sapphire, This is for absorbing a difference in thermal expansion coefficient and lattice constant from SiC or the like and stacking the GaN layer 103 and the AlGaN layer 104 with good crystallinity. In general, the buffer layer 102 has a high resistance or insulating characteristic and is used to maintain a breakdown voltage in a high breakdown voltage element. Further, as the substrate 101, recently, a silicon substrate that is high quality, inexpensive, and capable of using a large diameter is often used.
　一方、ＳｉＣの単結晶上に形成した、縦型のショットキーバリアダイオードも最近では多く使用されている。ＳｉＣを用いたショットキーバリアダイオードも、ＧａＮ材料を用いた場合と同様に高耐圧で高速のスイッチングが可能という特徴を有している。 On the other hand, a vertical Schottky barrier diode formed on a single crystal of SiC is also frequently used recently. The Schottky barrier diode using SiC also has a characteristic that high-speed switching can be performed at a high breakdown voltage as in the case of using a GaN material.
　電力装置に使用する半導体素子としては、上記のように高耐圧で、導通抵抗（オン抵抗）が低いということは大きなメリットであるが、オフ状態で高耐圧を維持するときに、電極間に大きな電圧が印加されたとき、リーク電流が流れる場合がある。このリーク電流は、高電圧印加時に発生するため、電力損失を発生させる。この損失された電力は、素子内で熱に変わり、素子の温度を上昇させたり、大きな内部電界で加速された電子がホットエレクトロンとなって不要な場所に注入、蓄積して信頼性の劣化を招いたりするという課題がある。 As a semiconductor element used in a power device, a high withstand voltage and a low conduction resistance (on-resistance) as described above are great merits, but when maintaining a high withstand voltage in an off state, there is a large gap between the electrodes. When a voltage is applied, a leakage current may flow. Since this leak current is generated when a high voltage is applied, it causes power loss. This lost power is converted into heat in the device, increasing the temperature of the device, and electrons accelerated by a large internal electric field become hot electrons that are injected and accumulated in unnecessary locations, causing deterioration of reliability. There is a problem of inviting.
　このため、リーク電流は最低でも、室温で１ｍＡ／ｃｍ２以下に抑えられなければならないとされている。ショットキーバリアダイオードは、ショットキー電極を構成する金属（ショットキー金属）と接触する半導体との仕事関数差によって、順方向の電圧降下（Ｖｆ）が決まる。一方、逆方向でのリーク電流（Ｉｌｅａｋ）も仕事関数差で決まる。このとき、仕事関数差が大きければ、Ｖｆは大きくなるが、Ｉｌｅａｋは少なくなるというトレードオフ関係が存在する。このため、許容できるＩｌｅａｋの範囲で、できるだけＶｆを下げるために、小さな仕事関数を有するショットキー金属を選択するのが一般的である。 For this reason, it is said that the leakage current must be suppressed to 1 mA / cm 2 or less at room temperature at the minimum. In the Schottky barrier diode, the forward voltage drop (Vf) is determined by the work function difference between the metal (Schottky metal) constituting the Schottky electrode and the semiconductor in contact therewith. On the other hand, the leakage current (Ileak) in the reverse direction is also determined by the work function difference. At this time, if the work function difference is large, there is a trade-off relationship that Vf increases but Ileak decreases. For this reason, it is common to select a Schottky metal having a small work function in order to lower Vf as much as possible within the allowable range of Ileak.
　ところが、ＧａＮは金属とのショットキー接合のＶｆが金属の仕事関数に対応して変化しにくいという特性を有している。この要因はＧａＮ表面に界面準位が多く存在するため、フェルミレベルの位置が、表面付近で、金属の仕事関数に関わらずいつも一定に保たれてしまうという状況によると理解されている（フェルミレベルピニングと呼ばれる）。 However, GaN has a characteristic that Vf of a Schottky junction with a metal hardly changes corresponding to the work function of the metal. This factor is understood to be due to the fact that there are many interface states on the GaN surface, so the position of the Fermi level is always kept constant near the surface regardless of the work function of the metal (Fermi level). Called pinning).
　このため、図１０に示されるように、アノード電極２０１、カソード電極２０２間で、シリコン材料からなる低耐圧のショットキーバリアダイオード２０３とノーマリオン型のトランジスタ２０４をカスコード接続して半導体ダイオード装置２００を構成することによって低いＶｆと低いＩｌｅａｋを実現しようという方法が提案されている（非特許文献１参照）。この方法によれば、ＶｆやＩｌｅａｋは低耐圧のショットキーバリアダイオード２０３によって決まるため、比較的自由にその値を制御することが可能であるとされている。 Therefore, as shown in FIG. 10, a semiconductor diode device 200 is formed by cascode-connecting a low breakdown voltage Schottky barrier diode 203 made of a silicon material and a normally-on transistor 204 between an anode electrode 201 and a cathode electrode 202. A method of realizing low Vf and low Ileak by configuring has been proposed (see Non-Patent Document 1). According to this method, Vf and Ileak are determined by the Schottky barrier diode 203 having a low breakdown voltage, and it is therefore possible to control their values relatively freely.
　一方、ＳｉＣショットキーバリアダイオードにおいても、同様にＶｆとＩｌｅａｋを同時に低くしたいという要求が強く、上記と同様にショットキー金属を選択する方法が取られることがある。 On the other hand, in SiC Schottky barrier diodes, there is a strong demand for lowering Vf and Ileak at the same time, and Schottky metal may be selected in the same manner as described above.
特開２０１１－８２４０１号公報JP 2011-84401 A
　しかしながら、図１０の構成の場合、Ｉｌｅａｋは低耐圧のショットキーバリアダイオード２０３によって決まる。シリコン材料からなる低耐圧のショットキーバリアダイオード２０３はリーク電流が数ｍＡ程度以上と非常に大きい。これはリーク電流を低くするよりもＶｆを低くすることを重視する設計となっているためである。低耐圧のショットキーバリアダイオード２０３では、カソード電極２０２にはあまり大きな電圧は印加されないため（たとえば＜１００Ｖ）、かかる設計が可能である。しかしながら、これをカスコードに使用する場合には、ショットキーバリアダイオード２０３のリーク電流は高耐圧のノーマリオン型トランジスタ２０４にも流れる。そのため、大きな電圧を維持している高耐圧デバイス側で発熱するという問題が生じると考えられる。 However, in the configuration of FIG. 10, Ileak is determined by the low breakdown voltage Schottky barrier diode 203. The low withstand voltage Schottky barrier diode 203 made of silicon material has a very large leakage current of about several mA or more. This is because the design emphasizes lowering Vf than lowering leakage current. In the low breakdown voltage Schottky barrier diode 203, since a very large voltage is not applied to the cathode electrode 202 (for example, <100V), such a design is possible. However, when this is used for the cascode, the leakage current of the Schottky barrier diode 203 also flows through the normally-on transistor 204 having a high breakdown voltage. Therefore, it is considered that there is a problem that heat is generated on the high withstand voltage device side maintaining a large voltage.
　本発明は、上記に鑑みてなされたものであって、低い順方向電圧降下と低いリーク電流とを同時に実現できる半導体ダイオード装置を提供することを目的とする。 The present invention has been made in view of the above, and an object thereof is to provide a semiconductor diode device that can simultaneously realize a low forward voltage drop and a low leakage current.
　上述した課題を解決し、目的を達成するために、本発明に係る半導体ダイオード装置は、ワイドバンドギャップ型半導体材料で構成されたノーマリオン型の高耐圧トランジスタと、前記高耐圧トランジスタに直列に接続し、前記高耐圧トランジスタよりも耐圧が低く、かつしきい値電圧が０．３Ｖ以上、１Ｖ以下であるＭＯＳＦＥＴと、を備え、前記ＭＯＳＦＥＴのゲートとソースとが接続されていることを特徴とする。 In order to solve the above-described problems and achieve the object, a semiconductor diode device according to the present invention includes a normally-on high voltage transistor made of a wide bandgap semiconductor material and a series connection to the high voltage transistor. And a MOSFET having a breakdown voltage lower than that of the high breakdown voltage transistor and a threshold voltage of 0.3 V or more and 1 V or less, and a gate and a source of the MOSFET are connected to each other. .
　また、本発明に係る半導体ダイオード装置は、前記ＭＯＳＦＥＴの耐圧は前記高耐圧トランジスタのしきい値電圧よりも高いことを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the withstand voltage of the MOSFET is higher than the threshold voltage of the high withstand voltage transistor.
　また、本発明に係る半導体ダイオード装置は、前記ワイドバンドギャップ型半導体材料は窒化ガリウム系化合物半導体または炭化珪素であることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the wide band gap semiconductor material is a gallium nitride compound semiconductor or silicon carbide.
　また、本発明に係る半導体ダイオード装置は、前記ＭＯＳＦＥＴはシリコン材料で構成されていることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the MOSFET is made of a silicon material.
　また、本発明に係る半導体ダイオード装置は、前記高耐圧トランジスタはＨＥＭＴであることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the high breakdown voltage transistor is a HEMT.
　また、本発明に係る半導体ダイオード装置は、前記高耐圧トランジスタはＪＦＥＴであることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the high breakdown voltage transistor is a JFET.
　また、本発明に係る半導体ダイオード装置は、前記ＭＯＳＦＥＴはアップドレイン型であることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the MOSFET is an up drain type.
　また、本発明に係る半導体ダイオード装置は、前記高耐圧トランジスタと前記ＭＯＳＦＥＴとが１つのパッケージに組み込まれていることを特徴とする。 The semiconductor diode device according to the present invention is characterized in that the high-breakdown-voltage transistor and the MOSFET are incorporated in one package.
　本発明によれば、低い順方向電圧降下と低いリーク電流とを同時に実現できるという効果を有する。 According to the present invention, there is an effect that a low forward voltage drop and a low leakage current can be realized simultaneously.
図１は、実施の形態１に係る半導体ダイオード装置の模式図である。FIG. 1 is a schematic diagram of a semiconductor diode device according to the first embodiment. 図２は、図１に示す半導体ダイオード装置のＩ－Ｖ特性を示す図である。FIG. 2 is a diagram showing IV characteristics of the semiconductor diode device shown in FIG. 図３は、高耐圧トランジスタの一例であるＨＥＭＴの模式的な断面図である。FIG. 3 is a schematic cross-sectional view of a HEMT that is an example of a high voltage transistor. 図４は、高耐圧トランジスタの一例であるＪＦＥＴの模式的な断面図である。FIG. 4 is a schematic cross-sectional view of a JFET which is an example of a high voltage transistor. 図５は、実施の形態２に係る半導体ダイオード装置の模式図である。FIG. 5 is a schematic diagram of a semiconductor diode device according to the second embodiment. 図６は、実施の形態３に係る半導体ダイオード装置の模式図である。FIG. 6 is a schematic diagram of a semiconductor diode device according to the third embodiment. 図７は、実施の形態４に係る半導体ダイオード装置の模式図である。FIG. 7 is a schematic diagram of a semiconductor diode device according to the fourth embodiment. 図８は、実施の形態５に係る半導体ダイオード装置の模式図である。FIG. 8 is a schematic diagram of a semiconductor diode device according to the fifth embodiment. 図９は、公知のＧａＮ系半導体を用いたショットキーバリアダイオードの模式的な断面図である。FIG. 9 is a schematic cross-sectional view of a Schottky barrier diode using a known GaN-based semiconductor. 図１０は、従来の半導体ダイオード装置の模式図である。FIG. 10 is a schematic diagram of a conventional semiconductor diode device.
　以下に、図面を参照して本発明に係る半導体ダイオード装置の実施の形態を詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。また、各図面において、同一または対応する要素には適宜同一の符号を付している。さらに、図面は模式的なものであり、各要素の寸法の関係などは、現実のものとは異なる場合があることに留意する必要がある。図面の相互間においても、互いの寸法の関係や比率が異なる部分が含まれている場合がある。 Hereinafter, embodiments of a semiconductor diode device according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments. Moreover, in each drawing, the same code | symbol is attached | subjected suitably to the same or corresponding element. Furthermore, it should be noted that the drawings are schematic, and dimensional relationships between elements may differ from actual ones. Even between the drawings, there are cases in which portions having different dimensional relationships and ratios are included.
（実施の形態１）
　図１は、本発明の実施の形態１に係る半導体ダイオード装置の模式図である。半導体ダイオード装置１０は、アノード電極１１と、カソード電極１２と、ＭＯＳＦＥＴ（Ｍｅｔａｌ－Ｏｘｉｄｅ－Ｓｅｍｉｃｏｎｄｕｃｔｏｒ　Ｆｉｅｌｄ　Ｅｆｆｅｃｔ　Ｔｒａｎｓｉｓｔｏｒ）１３と、高耐圧トランジスタ１４とを備えている。 (Embodiment 1)
FIG. 1 is a schematic diagram of a semiconductor diode device according to Embodiment 1 of the present invention. The semiconductor diode device 10 includes an anode electrode 11, a cathode electrode 12, a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) 13, and a high breakdown voltage transistor 14.
　ＭＯＳＦＥＴ１３は、ソース電極１３ａと、ゲート電極１３ｂと、ドレイン電極１３ｃとを備えている。符号１３ｄは内蔵ダイオードである。ＭＯＳＦＥＴ１３は、高耐圧トランジスタよりも耐圧が低く、かつしきい値電圧が１Ｖ以下である。ＭＯＳＦＥＴ１３は、たとえばシリコン材料で構成されている。 The MOSFET 13 includes a source electrode 13a, a gate electrode 13b, and a drain electrode 13c. Reference numeral 13d denotes a built-in diode. MOSFET 13 has a lower breakdown voltage than a high breakdown voltage transistor and a threshold voltage of 1 V or less. MOSFET 13 is made of, for example, a silicon material.
　高耐圧トランジスタ１４は、ソース電極１４ａと、ゲート電極１４ｂと、ドレイン電極１４ｃとを備えている。高耐圧トランジスタ１４は、ＧａＮ系半導体材料やＳｉＣ材料などのワイドバンドギャップ型半導体材料で構成された、耐圧が２００Ｖ～２ｋＶ程度と高耐圧のノーマリオン型のトランジスタである。 The high breakdown voltage transistor 14 includes a source electrode 14a, a gate electrode 14b, and a drain electrode 14c. The high breakdown voltage transistor 14 is a normally-on transistor having a high breakdown voltage of about 200 V to 2 kV and made of a wide band gap semiconductor material such as a GaN-based semiconductor material or SiC material.
　高耐圧トランジスタ１４とＭＯＳＦＥＴ１３とは直列にカスコード接続されている。高耐圧トランジスタ１４のゲート電極１４ｂおよびＭＯＳＦＥＴ１３のゲート電極１３ｂはアノード電極１１に接続している。ＭＯＳＦＥＴ１３のゲート電極１３ｂとソース電極１３ａとが接続している。なお、ＭＯＳＦＥＴ１３の耐圧は高耐圧トランジスタ１４のしきい値電圧よりも高いことが好ましい。 The high voltage transistor 14 and the MOSFET 13 are cascode-connected in series. The gate electrode 14 b of the high breakdown voltage transistor 14 and the gate electrode 13 b of the MOSFET 13 are connected to the anode electrode 11. The gate electrode 13b and the source electrode 13a of the MOSFET 13 are connected. The breakdown voltage of MOSFET 13 is preferably higher than the threshold voltage of high breakdown voltage transistor 14.
　この半導体ダイオード装置１０の動作を説明する。まず、カソード電極１２側に正バイアス電圧を印加すると、ＭＯＳＦＥＴ１３はオフ状態であることから、半導体ダイオード装置１０のアノード－カソード間はオフ状態である。この場合半導体ダイオード装置１０の耐圧は高耐圧トランジスタ１４の耐圧で決定される。また、半導体ダイオード装置１０の全体のリーク電流はＭＯＳＦＥＴ１３のリーク電流で決定される。一方、アノード電極１１側に正バイアス電圧を印加してＭＯＳＦＥＴ１３のしきい値を超えた電圧がゲート電極１３ｂに印加されると、ＭＯＳＦＥＴ１３のチャネルが開いて、導通電流が流れる。 The operation of this semiconductor diode device 10 will be described. First, when a positive bias voltage is applied to the cathode electrode 12 side, the MOSFET 13 is in an off state, so that the anode-cathode of the semiconductor diode device 10 is in an off state. In this case, the breakdown voltage of the semiconductor diode device 10 is determined by the breakdown voltage of the high breakdown voltage transistor 14. The overall leakage current of the semiconductor diode device 10 is determined by the leakage current of the MOSFET 13. On the other hand, when a positive bias voltage is applied to the anode electrode 11 and a voltage exceeding the threshold value of the MOSFET 13 is applied to the gate electrode 13b, the channel of the MOSFET 13 is opened and a conduction current flows.
　図２は、半導体ダイオード装置１０のアノード－カソード間のＩ－Ｖ特性を示す図である。Ｖｂｒは耐圧である。このとき、ＭＯＳＦＥＴ１３にはＰＮ接合に伴う内蔵ダイオード１３ｄが並列に接続されているため、アノード電極１１側に正バイアス電圧が印加されると、その内蔵ダイオード１３ｄにも順電流が流れる可能性がある。破線Ｌ１は内蔵ダイオード１３ｄのＩ－Ｖ特性を示している。しかしながら、ＭＯＳＦＥＴ１３のしきい値電圧が、内蔵ダイオード１３ｄがオンする電圧（順方向電圧降下）よりも低ければ、より低いアノード電圧Ｖｆで順方向電流が流れ（実線Ｌ２で示すＩ－Ｖ特性）、内蔵ダイオード１３ｄ側には電流は流れない。 FIG. 2 is a diagram showing IV characteristics between the anode and the cathode of the semiconductor diode device 10. Vbr is a withstand voltage. At this time, since the internal diode 13d associated with the PN junction is connected to the MOSFET 13 in parallel, if a positive bias voltage is applied to the anode electrode 11, a forward current may flow through the internal diode 13d. . A broken line L1 indicates the IV characteristic of the built-in diode 13d. However, if the threshold voltage of MOSFET 13 is lower than the voltage at which built-in diode 13d is turned on (forward voltage drop), a forward current flows at a lower anode voltage Vf (IV characteristic indicated by solid line L2), No current flows on the built-in diode 13d side.
　すなわち、半導体ダイオード装置１０では、ＭＯＳＦＥＴ１３のしきい値電圧の設定でＶｆを制御することが可能である。そのため、従来のショットキーバリアダイオードが金属と半導体との仕事関数差でＶｆが決定されていたものとは異なる原理でＶｆを制御することができる。なお、ＭＯＳＦＥＴ１３のしきい値電圧はチャネルドープなどのイオン注入や熱処理によって自由に設計することが可能であるため、低Ｖｆの実現は容易である。 That is, in the semiconductor diode device 10, Vf can be controlled by setting the threshold voltage of the MOSFET 13. Therefore, Vf can be controlled by a principle different from that in the conventional Schottky barrier diode in which Vf is determined by the work function difference between the metal and the semiconductor. Since the threshold voltage of the MOSFET 13 can be freely designed by ion implantation such as channel doping or heat treatment, it is easy to realize low Vf.
　なお、ＭＯＳＦＥＴ１３でも、リーク電流とＶｆとの間にトレードオフの関係がある。すなわち、Ｖｆを小さくしていくと、リーク電流が増加する。リーク電流のバイアス電圧依存性は、もっとも理想的な場合には６０ｍＶ／ｄｅｃで、現実的には１００ｍＶ／ｄｅｃ程度である。この値はＳ値（ｓｕｂｔｈｒｅｓｈｏｌｄ　ｓｗｉｎｇ　ｖａｌｕｅ）と呼ばれるもので、しきい値以下のドレイン電流のゲート電圧依存性において、リーク電流が一桁増加するときの、ゲート電圧の電圧変化を示すパラメータである。したがって、ＭＯＳＦＥＴ１３のＳ値が１００ｍＶ／ｄｅｃの場合、しきい値電圧を０．５Ｖに設定すると、半導体ダイオード装置１０において、しきい値電圧での電流とリーク電流との比率は５桁の差になる。したがって、たとえばしきい値電圧での電流が１Ａなら、リーク電流は１０μＡと、十分に小さな値である。従来のＧａＮ系半導体材料やＳｉＣ材料で構成される典型的なショットキーバリアダイオードのＶｆは１～１．２Ｖ程度である。よって、ＭＯＳＦＥＴ１３のしきい値電圧を１Ｖ以下にすることで、半導体ダイオード装置１０は、従来よりも十分に低いＶｆと低いリーク電流（Ｉｌｅａｋ）とを有するものとなる。また、リーク電流の許容値を１ｍＡ／ｃｍ２とすると、ＭＯＳＦＥＴ１３のＳ値が１００ｍＶ／ｄｅｃの場合、しきい値電圧は０．３Ｖ以上とすれば良い。 Also in the MOSFET 13, there is a trade-off relationship between the leakage current and Vf. That is, as Vf is decreased, the leakage current increases. The bias voltage dependence of the leakage current is 60 mV / dec in the most ideal case, and is practically about 100 mV / dec. This value is referred to as an S value (subthreshold swing value), and is a parameter indicating the voltage change of the gate voltage when the leakage current increases by an order of magnitude in the gate voltage dependency of the drain current below the threshold value. Therefore, when the S value of MOSFET 13 is 100 mV / dec and the threshold voltage is set to 0.5 V, in the semiconductor diode device 10, the ratio of the current at the threshold voltage to the leakage current is a five-digit difference. Become. Therefore, for example, if the current at the threshold voltage is 1 A, the leakage current is a sufficiently small value of 10 μA. A typical Schottky barrier diode made of a conventional GaN-based semiconductor material or SiC material has a Vf of about 1 to 1.2V. Therefore, by setting the threshold voltage of the MOSFET 13 to 1 V or less, the semiconductor diode device 10 has a sufficiently lower Vf and a lower leakage current (Ileak) than the conventional one. Further, when the allowable value of the leakage current is 1 mA / cm 2 , the threshold voltage may be 0.3 V or more when the S value of the MOSFET 13 is 100 mV / dec.
　つぎに、高耐圧トランジスタ１４の例について説明する。図３は、高耐圧トランジスタの一例であるＨＥＭＴ（Ｈｉｇｈ　Ｅｌｅｃｔｒｏｎ　Ｍｏｂｉｌｉｔｙ　Ｔｒａｎｓｉｓｔｏｒ）の模式的な断面図である。このＨＥＭＴ１４Ａは、基板１４Ａ１の上に、バッファ層１４Ａ２、ＧａＮ層１４Ａ３およびＡｌＧａＮ層１４Ａ４が順次積層され、ＡｌＧａＮ層１４Ａ４上に、ソース電極１４Ａ５、ゲート電極１４Ａ６、ドレイン電極１４Ａ７を形成したものである。ＧａＮ層１４Ａ３とＡｌＧａＮ層１４Ａ４の界面には、２ＤＥＧ層１４Ａ３ａが形成されている。 Next, an example of the high voltage transistor 14 will be described. FIG. 3 is a schematic cross-sectional view of a HEMT (High Electron Mobility Transistor) which is an example of a high voltage transistor. In this HEMT 14A, a buffer layer 14A2, a GaN layer 14A3, and an AlGaN layer 14A4 are sequentially stacked on a substrate 14A1, and a source electrode 14A5, a gate electrode 14A6, and a drain electrode 14A7 are formed on the AlGaN layer 14A4. A 2DEG layer 14A3a is formed at the interface between the GaN layer 14A3 and the AlGaN layer 14A4.
　このようなＧａＮ系のＨＥＭＴ１４Ａは、高耐圧特性と低オン抵抗特性を有するので、高耐圧トランジスタ１４として好適である。特に、シリコン基板を用いたＧａＮ－ＨＥＭＴを用いると、容量成分が小さいので、高速スイッチングが実現され、かつより安価にＨＥＭＴを準備できる。このようなＨＥＭＴは最近ではノーマリオフ型のデバイスもあるが、構造に制約が多く、またオン抵抗とのトレードオフもあるなど、設計が難しいという難点があり、しきい値が－３～－１０Ｖ程度のノーマリオンデバイスであるのが通常である。 Such a GaN-based HEMT 14A has high breakdown voltage characteristics and low on-resistance characteristics, and is therefore suitable as the high breakdown voltage transistor 14. In particular, when a GaN-HEMT using a silicon substrate is used, since the capacitance component is small, high-speed switching is realized and the HEMT can be prepared at a lower cost. Recently, there is a normally-off type of HEMT. However, there are many structural limitations and trade-offs with on-resistance, which makes it difficult to design. The threshold is about -3 to -10V. It is usually a normally-on device.
　図４は、高耐圧トランジスタの一例であるＪＦＥＴ（Ｊｕｎｃｔｉｏｎ　ＦＥＴ）の模式的な断面図である。このＪＦＥＴ１４Ｂは、ＳｉＣからなるものであって、Ｎ型領域１４Ｂ１を挟むように形成されたＮ＋型領域１４Ｂ２、１４Ｂ３の各表面にソース電極１４Ｂ４、ドレイン電極１４Ｂ５がそれぞれ形成されている。さらにＮ型領域１４Ｂ１の一部にＰ＋型領域１４Ｂ６が形成され、Ｐ＋型領域１４Ｂ６にゲート電極１４Ｂ７が接続された構成を有する。このようなＳＩＴ（Ｓｔａｔｉｃ　Ｉｎｄｕｃｔｉｏｎ　Ｔｒａｎｓｉｓｔｏｒ）型のＪＦＥＴにおいては、Ｐ＋型領域１４Ｂ６間の距離を適切に狭くすることによって、ノーマリオフ型のデバイスも設計されているが、この距離を狭くするとオン抵抗が上昇するため、オン抵抗とのトレードオフがあり設計が難しい。一般的にはしきい値が－５Ｖ～－１５Ｖ程度に設計されている。 FIG. 4 is a schematic cross-sectional view of a JFET (Junction FET) which is an example of a high voltage transistor. The JFET 14B is made of SiC, and a source electrode 14B4 and a drain electrode 14B5 are formed on the respective surfaces of N + type regions 14B2 and 14B3 formed so as to sandwich the N type region 14B1. Further, a P + type region 14B6 is formed in a part of the N type region 14B1, and a gate electrode 14B7 is connected to the P + type region 14B6. In such a SIT (Static Induction Transistor) type JFET, a normally-off type device is also designed by appropriately reducing the distance between the P + type regions 14B6. However, when this distance is reduced, the on-resistance increases. Therefore, there is a trade-off with on-resistance and the design is difficult. Generally, the threshold value is designed to be about −5V to −15V.
　このようなＳｉＣ系のＪＦＥＴ１４Ｂは、高耐圧特性と低オン抵抗特性を有するので、高耐圧トランジスタ１４として好適である。特にＳｉＣ－ＪＦＥＴは大面積で高信頼の素子が市販されており、比較的容易に準備できる。 Such a SiC-based JFET 14B has high breakdown voltage characteristics and low on-resistance characteristics, and is therefore suitable as the high breakdown voltage transistor 14. In particular, SiC-JFET has a large area and a highly reliable element on the market, and can be prepared relatively easily.
　実施の形態１に係る半導体ダイオード装置１０は、ＭＯＳＦＥＴ１３と高耐圧トランジスタ１４とを接続したものである。このように、これらの２つの素子が１つのパッケージに組み込まれていれば、単一の素子からなるダイオードと同様に取り扱うことができるので、使い勝手がよく好ましい。以下では、２つの素子が１つのパッケージに組み込まれた実施の形態について説明する。 The semiconductor diode device 10 according to the first embodiment is obtained by connecting a MOSFET 13 and a high voltage transistor 14. Thus, if these two elements are incorporated in one package, it can be handled in the same manner as a diode composed of a single element, and thus it is convenient and preferable. Hereinafter, an embodiment in which two elements are incorporated into one package will be described.
（実施の形態２）
　図５は、本発明の実施の形態２に係る半導体ダイオード装置の模式図である。半導体ダイオード装置２０は、アノード電極２１と、カソード電極２２と、ＭＯＳＦＥＴ２３と、高耐圧トランジスタ２４と、導電性基板２５とが、１つのパッケージ２６に実装されて組み込まれたものである。 (Embodiment 2)
FIG. 5 is a schematic diagram of a semiconductor diode device according to Embodiment 2 of the present invention. The semiconductor diode device 20 includes an anode electrode 21, a cathode electrode 22, a MOSFET 23, a high breakdown voltage transistor 24, and a conductive substrate 25 mounted in a single package 26.
　ＭＯＳＦＥＴ２３と、高耐圧トランジスタ２４とは導電性基板２５上に実装されている。ＭＯＳＦＥＴ２３は縦型のＭＯＳＦＥＴであり、裏面に形成された不図示のドレイン電極と、表面に形成されたソース電極２３ａおよびゲート電極２３ｂとを備えている。裏面に形成されたドレイン電極は導電性基板２５と直接的に接続している。ソース電極２３ａは配線ワイヤＷ１でアノード電極２１と接続している。ゲート電極２３ｂは配線ワイヤＷ２でソース電極２３ａと接続している。 The MOSFET 23 and the high voltage transistor 24 are mounted on the conductive substrate 25. The MOSFET 23 is a vertical MOSFET and includes a drain electrode (not shown) formed on the back surface, and a source electrode 23a and a gate electrode 23b formed on the front surface. The drain electrode formed on the back surface is directly connected to the conductive substrate 25. The source electrode 23a is connected to the anode electrode 21 with a wiring wire W1. The gate electrode 23b is connected to the source electrode 23a by the wiring wire W2.
　高耐圧トランジスタ２４は横型のＧａＮ－ＨＥＭＴであり、表面に形成されたソース電極２４ａ、ゲート電極２４ｂ、およびドレイン電極２４ｃを備えている。ソース電極２４ａは配線ワイヤＷ３で導電性基板２５を介してＭＯＳＦＥＴ２３のドレインと接続している。ゲート電極２４ｂは配線ワイヤＷ４でアノード電極２１と接続している。ドレイン電極２４ｃは配線ワイヤＷ５でカソード電極２２と接続している。 The high breakdown voltage transistor 24 is a lateral GaN-HEMT, and includes a source electrode 24a, a gate electrode 24b, and a drain electrode 24c formed on the surface. The source electrode 24a is connected to the drain of the MOSFET 23 through the conductive substrate 25 by the wiring wire W3. The gate electrode 24b is connected to the anode electrode 21 with a wiring wire W4. The drain electrode 24c is connected to the cathode electrode 22 by a wiring wire W5.
　この半導体ダイオード装置２０はＭＯＳＦＥＴ２３および高耐圧トランジスタ２４を含めた構成要素が１つのパッケージ２６に組み込まれている。そのため、アノード電極２１とカソード電極２２の一部が端子としてパッケージ２６から突出しているので、単一の素子からなるダイオードと同様に取り扱うことができる。 In the semiconductor diode device 20, the components including the MOSFET 23 and the high breakdown voltage transistor 24 are incorporated in one package 26. Therefore, part of the anode electrode 21 and the cathode electrode 22 protrudes from the package 26 as terminals, and can be handled in the same manner as a diode composed of a single element.
（実施の形態３）
　図６は、本発明の実施の形態３に係る半導体ダイオード装置の模式図である。半導体ダイオード装置３０は、アノード電極３１と、カソード電極２２と、ＭＯＳＦＥＴ３３と、高耐圧トランジスタ２４とが、１つのパッケージ３６に実装されて組み込まれたものである。カソード電極２２および高耐圧トランジスタ２４は図５に示す半導体ダイオード装置２０のものと同じである。 (Embodiment 3)
FIG. 6 is a schematic diagram of a semiconductor diode device according to Embodiment 3 of the present invention. The semiconductor diode device 30 includes an anode electrode 31, a cathode electrode 22, a MOSFET 33, and a high breakdown voltage transistor 24 that are mounted and incorporated in one package 36. The cathode electrode 22 and the high breakdown voltage transistor 24 are the same as those of the semiconductor diode device 20 shown in FIG.
　ＭＯＳＦＥＴ３３と、高耐圧トランジスタ２４とはアノード電極３１上に実装されている。ＭＯＳＦＥＴ３３は特許文献１等に例示されているアップドレイン型のＭＯＳＦＥＴであり、裏面に形成された不図示のソース電極と、表面に形成されたゲート電極３３ｂおよびドレイン電極３３ｃとを備えている。裏面に形成されたソース電極はアノード電極３１と直接的に接続している。ゲート電極３３ｂは配線ワイヤＷ６でアノード電極３１を介してソース電極と接続している。ドレイン電極３３ｃは配線ワイヤＷ７で高耐圧トランジスタ２４のソース電極２４ａと接続している。 The MOSFET 33 and the high breakdown voltage transistor 24 are mounted on the anode electrode 31. The MOSFET 33 is an up drain type MOSFET exemplified in Patent Document 1 and the like, and includes a source electrode (not shown) formed on the back surface, and a gate electrode 33b and a drain electrode 33c formed on the surface. The source electrode formed on the back surface is directly connected to the anode electrode 31. The gate electrode 33b is connected to the source electrode through the anode electrode 31 by the wiring wire W6. The drain electrode 33c is connected to the source electrode 24a of the high breakdown voltage transistor 24 by a wiring wire W7.
　この半導体ダイオード装置２０はＭＯＳＦＥＴ３３および高耐圧トランジスタ２４を含めた構成要素が１つのパッケージ３６に組み込まれている。そのため、アノード電極３１とカソード電極２２の一部が端子としてパッケージ３６から突出しているので、単一の素子からなるダイオードと同様に取り扱うことができる。また、ＭＯＳＦＥＴ３３のソース電極が裏面に形成されているため、ソース電極とアノード電極３１とを接続する電力用の配線ワイヤを省略でき、これらを直接接続することが容易である。これによって、組み立て工数の低減による不良率の低減、コスト低減、さらには配線に起因するインダクタンスの低減という各メリットが生じる。 In this semiconductor diode device 20, the components including the MOSFET 33 and the high voltage transistor 24 are incorporated in one package 36. Therefore, part of the anode electrode 31 and the cathode electrode 22 protrudes from the package 36 as terminals, and can be handled in the same manner as a diode composed of a single element. Further, since the source electrode of the MOSFET 33 is formed on the back surface, a power wiring wire for connecting the source electrode and the anode electrode 31 can be omitted, and it is easy to directly connect them. As a result, there are merits such as a reduction in defect rate due to a reduction in assembly man-hours, a reduction in cost, and a reduction in inductance caused by wiring.
（実施の形態４）
　図７は、本発明の実施の形態４に係る半導体ダイオード装置の模式図である。半導体ダイオード装置４０は、アノード電極２１と、カソード電極４２と、ＭＯＳＦＥＴ２３と、高耐圧トランジスタ４４と、導電性基板４５とが、１つのパッケージ４６に実装されて組み込まれたものである。アノード電極２１およびＭＯＳＦＥＴ２３は図５に示す半導体ダイオード装置２０のものと同じである。また、ＭＯＳＦＥＴ２３は導電性基板４５上に実装されている。高耐圧トランジスタ４４はカソード電極４２上に実装されている。 (Embodiment 4)
FIG. 7 is a schematic diagram of a semiconductor diode device according to Embodiment 4 of the present invention. In the semiconductor diode device 40, an anode electrode 21, a cathode electrode 42, a MOSFET 23, a high breakdown voltage transistor 44, and a conductive substrate 45 are mounted and incorporated in one package 46. The anode electrode 21 and the MOSFET 23 are the same as those of the semiconductor diode device 20 shown in FIG. The MOSFET 23 is mounted on the conductive substrate 45. The high breakdown voltage transistor 44 is mounted on the cathode electrode 42.
　高耐圧トランジスタ４４は縦型のＳｉＣ－ＪＦＥＴであり、裏面に形成された不図示のドレイン電極と、表面に形成されたソース電極４４ａおよびゲート電極４４ｂとを備えている。ゲート電極４４ｂは配線ワイヤＷ８でアノード電極２１と接続している。ソース電極４４ａは配線ワイヤＷ９で導電性基板４５を介してＭＯＳＦＥＴ２３のドレインと接続している。ドレイン電極はカソード電極４２と直接的に接続している。 The high breakdown voltage transistor 44 is a vertical SiC-JFET, and includes a drain electrode (not shown) formed on the back surface, and a source electrode 44a and a gate electrode 44b formed on the front surface. The gate electrode 44b is connected to the anode electrode 21 with a wiring wire W8. The source electrode 44a is connected to the drain of the MOSFET 23 through the conductive substrate 45 by the wiring wire W9. The drain electrode is directly connected to the cathode electrode 42.
　この半導体ダイオード装置４０はＭＯＳＦＥＴ２３および高耐圧トランジスタ４４を含めた構成要素が１つのパッケージ４６に組み込まれている。そのため、アノード電極２１とカソード電極４２の一部が端子としてパッケージ４６から突出しているので、単一の素子からなるダイオードと同様に取り扱うことができる。また、高耐圧トランジスタ４４のドレイン電極が裏面に形成されているため、ドレイン電極とカソード電極４２とを接続する電力用の配線ワイヤを省略でき、これらを直接接続することが容易である。これによって、組み立て工数の低減による不良率の低減、コスト低減、さらには配線に起因するインダクタンスの低減という各メリットが生じる。 In this semiconductor diode device 40, the components including the MOSFET 23 and the high breakdown voltage transistor 44 are incorporated in one package 46. Therefore, part of the anode electrode 21 and the cathode electrode 42 protrudes from the package 46 as terminals, and can be handled in the same manner as a diode made of a single element. Further, since the drain electrode of the high voltage transistor 44 is formed on the back surface, the power wiring wire for connecting the drain electrode and the cathode electrode 42 can be omitted, and it is easy to directly connect them. As a result, there are merits such as a reduction in defect rate due to a reduction in assembly man-hours, a reduction in cost, and a reduction in inductance caused by wiring.
（実施の形態５）
　図８は、本発明の実施の形態５に係る半導体ダイオード装置の模式図である。半導体ダイオード装置５０は、アノード電極５１と、カソード電極４２と、アップドレイン型のＭＯＳＦＥＴ３３と、縦型のＳｉＣ－ＪＦＥＴである高耐圧トランジスタ４４とが、１つのパッケージ５６に実装されて組み込まれたものである。ＭＯＳＦＥＴ３３はアノード電極５１上に実装されている。高耐圧トランジスタ４４はカソード電極４２上に実装されている。ＭＯＳＦＥＴ３３のドレイン電極３３ｃと高耐圧トランジスタ４４のソース電極４４ａとは配線ワイヤＷ１０で接続している。 (Embodiment 5)
FIG. 8 is a schematic diagram of a semiconductor diode device according to Embodiment 5 of the present invention. The semiconductor diode device 50 includes an anode electrode 51, a cathode electrode 42, an up drain MOSFET 33, and a high breakdown voltage transistor 44, which is a vertical SiC-JFET, mounted in a single package 56. It is. The MOSFET 33 is mounted on the anode electrode 51. The high breakdown voltage transistor 44 is mounted on the cathode electrode 42. The drain electrode 33c of the MOSFET 33 and the source electrode 44a of the high breakdown voltage transistor 44 are connected by a wiring wire W10.
　半導体ダイオード装置５０は、実施の形態３、４に係る半導体ダイオード装置３０、４０でそれぞれ使用されている要素を組み合わせたものである。半導体ダイオード装置５０では、ＭＯＳＦＥＴ３３のソース電極とアノード電極５１とを接続する電力用の配線ワイヤと、高耐圧トランジスタ４４のドレイン電極とカソード電極４２とを接続する電力用の配線ワイヤとの両方を省略できる。これによって、組み立て工数の低減による不良率の低減、コスト低減、さらには配線に起因するインダクタンスの低減という各メリットが、さらに顕著となる。また、同一電極または基板上に異なる素子（ＭＯＳＦＥＴと高耐圧トランジスタ）を搭載しない構成なので、組み立て工程において安定的に作業ができるという利点がある。 The semiconductor diode device 50 is a combination of elements used in the semiconductor diode devices 30 and 40 according to the third and fourth embodiments. In the semiconductor diode device 50, both the power wiring wire for connecting the source electrode of the MOSFET 33 and the anode electrode 51 and the power wiring wire for connecting the drain electrode of the high voltage transistor 44 and the cathode electrode 42 are omitted. it can. As a result, the merits of reducing the defective rate due to the reduction in assembly man-hours, reducing the cost, and further reducing the inductance caused by the wiring become more remarkable. Further, since different elements (MOSFET and high voltage transistor) are not mounted on the same electrode or substrate, there is an advantage that the work can be stably performed in the assembly process.
　なお、本発明にかかる半導体ダイオード装置は、高耐圧が必要なインバータなどの電力変換装置やモーター駆動装置や、種々の電源装置や無停電電源などに使用されるパワーデバイスに有用である。 The semiconductor diode device according to the present invention is useful for power devices used for power conversion devices such as inverters, motor drive devices, various power supply devices, uninterruptible power supplies, etc. that require high withstand voltage.
　また、上記実施の形態では、ワイドバンドギャップ型半導体材料は窒化ガリウム系化合物半導体または炭化珪素であるが、所望の高耐圧が得られるものであれば、特に限定はされない。また、ＭＯＳＦＥＴの構成材料もシリコンに限定されず、しきい値電圧が１Ｖ以下であればよい。 In the above embodiment, the wide band gap semiconductor material is a gallium nitride compound semiconductor or silicon carbide, but is not particularly limited as long as a desired high breakdown voltage can be obtained. Further, the constituent material of the MOSFET is not limited to silicon, and the threshold voltage may be 1 V or less.
　また、上記実施の形態により本発明が限定されるものではない。上述した各構成要素を適宜組み合わせて構成したものも本発明に含まれる。また、さらなる効果や変形例は、当業者によって容易に導き出すことができる。よって、本発明のより広範な態様は、上記の実施の形態に限定されるものではなく、様々な変更が可能である。 Further, the present invention is not limited by the above embodiment. What was comprised combining each component mentioned above suitably is also contained in this invention. Further effects and modifications can be easily derived by those skilled in the art. Therefore, the broader aspect of the present invention is not limited to the above-described embodiment, and various modifications can be made.
　以上のように、本発明に係る半導体ダイオード装置は、パワーデバイスに適用して好適なものである。 As described above, the semiconductor diode device according to the present invention is suitable for application to a power device.
　１０、２０、３０、４０、５０　半導体ダイオード装置
　１１、２１、３１、５１　アノード電極
　１２、２２、４２　カソード電極
　１３、２３、３３　ＭＯＳＦＥＴ
　１３ａ、１４ａ、１４Ａ５、１４Ｂ４、２３ａ、２４ａ、４４ａ　ソース電極
　１３ｂ、１４ｂ、１４Ａ６、１４Ｂ７、２３ｂ、２４ｂ、３３ｂ、４４ｂ　ゲート電極
　１３ｃ、１４ｃ、１４Ａ７、１４Ｂ５、２４ｃ、３３ｃ　ドレイン電極
　１３ｄ　内蔵ダイオード
　１４、２４、４４　高耐圧トランジスタ
　１４Ａ　ＨＥＭＴ
　１４Ａ１　基板
　１４Ａ２　バッファ層
　１４Ａ３　ＧａＮ層
　１４Ａ３ａ　２ＤＥＧ層
　１４Ａ４　ＡｌＧａＮ層
　１４Ｂ　ＪＦＥＴ
　１４Ｂ１　Ｎ型領域
　１４Ｂ２、１４Ｂ３　Ｎ＋型領域
　１４Ｂ６　Ｐ＋型領域
　２５、４５　導電性基板
　２６、３６、４６、５６　パッケージ
　Ｌ１　破線
　Ｌ２　実線
　Ｗ１、Ｗ２、Ｗ３、Ｗ４、Ｗ５、Ｗ６、Ｗ７、Ｗ８、Ｗ９、Ｗ１０　配線ワイヤ 10, 20, 30, 40, 50 Semiconductor diode device 11, 21, 31, 51 Anode electrode 12, 22, 42 Cathode electrode 13, 23, 33 MOSFET
13a, 14a, 14A5, 14B4, 23a, 24a, 44a Source electrode 13b, 14b, 14A6, 14B7, 23b, 24b, 33b, 44b Gate electrode 13c, 14c, 14A7, 14B5, 24c, 33c Drain electrode 13d Built-in diode 14, 24, 44 High voltage transistor 14A HEMT
14A1 substrate 14A2 buffer layer 14A3 GaN layer 14A3a 2DEG layer 14A4 AlGaN layer 14B JFET
14B1 N-type region 14B2, 14B3 N + -type region 14B6 P + - type region 25, 45 Conductive substrate 26, 36, 46, 56 Package L1 Broken line L2 Solid line W1, W2, W3, W4, W5, W6, W7, W8, W9, W10 wiring wire

Claims (8)

  1. 　ワイドバンドギャップ型半導体材料で構成されたノーマリオン型の高耐圧トランジスタと、
    　前記高耐圧トランジスタに直列に接続し、前記高耐圧トランジスタよりも耐圧が低く、かつしきい値電圧が０．３Ｖ以上、１Ｖ以下であるＭＯＳＦＥＴと、
    　を備え、前記ＭＯＳＦＥＴのゲートとソースとが接続されていることを特徴とする半導体ダイオード装置。     A normally-on high voltage transistor composed of a wide bandgap semiconductor material;
    A MOSFET connected in series to the high breakdown voltage transistor, having a breakdown voltage lower than that of the high breakdown voltage transistor and having a threshold voltage of 0.3 V or more and 1 V or less;
    And a gate and a source of the MOSFET are connected.
  2. 　前記ＭＯＳＦＥＴの耐圧は前記高耐圧トランジスタのしきい値電圧よりも高いことを特徴とする請求項１に記載の半導体ダイオード装置。 2. The semiconductor diode device according to claim 1, wherein a breakdown voltage of the MOSFET is higher than a threshold voltage of the high breakdown voltage transistor.
  3. 　前記ワイドバンドギャップ型半導体材料は窒化ガリウム系化合物半導体または炭化珪素であることを特徴とする請求項１または２に記載の半導体ダイオード装置。 3. The semiconductor diode device according to claim 1, wherein the wide band gap type semiconductor material is a gallium nitride compound semiconductor or silicon carbide.
  4. 　前記ＭＯＳＦＥＴはシリコン材料で構成されていることを特徴とする請求項１～３のいずれか一つに記載の半導体ダイオード装置。 The semiconductor diode device according to any one of claims 1 to 3, wherein the MOSFET is made of a silicon material.
  5. 　前記高耐圧トランジスタはＨＥＭＴであることを特徴とする請求項１～４のいずれか一つに記載の半導体ダイオード装置。 5. The semiconductor diode device according to claim 1, wherein the high breakdown voltage transistor is a HEMT.
  6. 　前記高耐圧トランジスタはＪＦＥＴであることを特徴とする請求項１～４のいずれか一つに記載の半導体ダイオード装置。 5. The semiconductor diode device according to claim 1, wherein the high breakdown voltage transistor is a JFET.
  7. 　前記ＭＯＳＦＥＴはアップドレイン型であることを特徴とする請求項１～６のいずれか一つに記載の半導体ダイオード装置。 7. The semiconductor diode device according to claim 1, wherein the MOSFET is an up drain type.
  8. 　前記高耐圧トランジスタと前記ＭＯＳＦＥＴとが１つのパッケージに組み込まれていることを特徴とする請求項１～７のいずれか一つに記載の半導体ダイオード装置。 The semiconductor diode device according to any one of claims 1 to 7, wherein the high-breakdown-voltage transistor and the MOSFET are incorporated in one package.
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