WO2013129980A1 - Method and apparatus for forming solder bumps - Google Patents

Method and apparatus for forming solder bumps Download PDF

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Publication number
WO2013129980A1
WO2013129980A1 PCT/SE2012/050216 SE2012050216W WO2013129980A1 WO 2013129980 A1 WO2013129980 A1 WO 2013129980A1 SE 2012050216 W SE2012050216 W SE 2012050216W WO 2013129980 A1 WO2013129980 A1 WO 2013129980A1
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WO
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Application
Patent type
Prior art keywords
flattening
pcb
surface
device
method
Prior art date
Application number
PCT/SE2012/050216
Other languages
French (fr)
Inventor
Igor PEREZ-URIA
Per Ferm
Original Assignee
Telefonaktiebolaget L M Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions ; Methods of application thereof
    • H05K3/3478Applying solder paste, particles or preforms; Transferring prefabricated solder patterns
    • H05K3/3484Paste or slurry or powder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/094Array of pads or lands differing from one another, e.g. in size, pitch, thickness; Using different connections on the pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0182Using a temporary spacer element or stand-off during processing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/043Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494Heating methods for reflowing of solder

Abstract

The present application relates to a method and an apparatus for producing solder bumps with an improved co-planarity (flatness) on printed circuit boards, PCBs. Different methods to improve the flatness of solder bumps are known from prior art but are performed after the reflow process and require advance technical equipment. The method in the present application solves this by first applying solder paste (104) and in a next step applying a flattening surface (201) with a predefined co-planarity (C2) in parallel to and facing a PCB reference surface (101) at a predetermined distance (S) as to restrict the height of the solder bumps created in response to the subsequent reflow process of the solder paste (104).

Description

METHOD AND APPARATUS FOR FORMING SOLDER BUMPS TECHNICAL FIELD

The present application relates to a method and an apparatus for producing solder bumps with an improved co-planarity on printed circuit boards, PCBs .

BACKGROUND

The chosen size and geometrical shape of electrical contact areas (such as lands or pads of a copper layer) at printed circuit boards, PCBs depends on several factors such as required current level, thermal relief etc. Smaller pad sizes are for example used to transport digital communication buses, whereas bigger pad sizes can be designed to transport high currents sometimes with transients.

Within the industry there are needs to ensure the flatness/co-planarity of solder areas of PCBs in order to secure that components are properly received when soldering. The migration to smaller components drives the amount of deposited solder paste down to avoid short circuits. This demands better co-planarity (i.e. flatness) when also using bigger components. Requirements within the industry are currently striving for a degree of co-planarity of 0,08 rnm. In this context the requirement means that the difference between the minimum and maximum solder bump height (standoff) on a PCB reference surface should be equal or less than 0.08 mm. The term 'reference surface' is used here because it can be a bare epoxy surface on the PCB but also a copper land surface or a copper land with a solder mask surface. The co-planarity requirement is difficult to meet when using different pad sizes. This is schematically illustrated by Figures 1A-1C. These figures comprise a PCB 100 with two copper pads 102,103 on the PCB epoxy surface 101. In Figure 1A a tacky solder paste 104 is applied to the pads 102,103. When the solder paste 104 is subject to heat, for example in an oven or by infrared rays IR as illustrated in Figure IB (the reflow process), the solder paste transforms into solder bumps 105,106 as can be seen in Figure 1C. Due to surface tension, the melted solder bumps 105,106 strive to take a dome shaped form.

Larger pads 103, require more solder paste to cover the whole pad. The stand-off SI for the resulting solder dome 106 will therefore be larger than the stand-off S2 for the solder dome .105 for the smaller pad 102. The co-plana it y of the solder bumps is here indicated as the distance C1'.

To reduce the distance C1' and to meet industry requirements, the solder bumps need to be flattened. One method to flatten solder bumps is disclosed in the US patent 5,167,361. In this patent, the solder bumps are flattened after the reflow process by compressing the solder bumps using a flattening tool having a heat controlled flattening plate. The patent also mentions that an alternative method to flatten the solder bumps is to use a rotating cutter.

In US patent 6,416,398 a number of flattening tools are disclosed. One tool includes a rotating cutter head with a plurality of cutter blades for flattening solder balls. In order to measure the achieved planarization, a planarization sensor is used. Another disclosed embodiment is similar to the thermo-mechanical solution in US patent 5,167,361. That is, a flat heated platen is engaged with the outer surface of the solder balls until the balls soften and become mechanically flattened by the heated platen. Yet another embodiment disclosed in US patent 6,416,398 is a centrifuge that mechanically compresses the bumped device against a planarization chuck. A disadvantage that a 1.1. these solutions have in common is that they all require a number of specifically designed tools for heating, cutting and compressing. When using the cutting tool, also precision instruments for measuring the achieved co-planarity are needed. This also has the result that a multitude of operational steps are needed. Mechanical flattening only (as in the embodiment with the centrifuge) has the additional risk of causing fractures within the solder ball. SUMMARY

With this background it is the object of the flattening method and apparatus described below to obviate at least some of the disadvantages mentioned above.

The object is achieved by a method of initially applying solder paste with a predetermined thickness and pattern on the contact areas on the EJCB. In a next step (and before the reflow process) a flattening device having a flattening surface (with a predefined co-planarity) is arranged so that the flattening surface is parallel to and facing a PCB reference surface at a predetermined distance. The distance can for example be kept by using distance elements (such as shims) with predefined thickness between the flattening surface and the PCB reference surface. The predetermined distance between the flattening surface and the PCB reference surface restricts the height of the solder bumps created in response to the reflow. Before the reflow process, the flattening device can optionally be fixed to the PCB in order to avoid relative movements during the reflow process. The solder paste is then exposed to the reflow process, for example in an oven or by infrared, IR radiation. After the reflow process and after the solder has solidified, the flatten ng device is removed. The apparatus includes an industrial robot system programmed to execute the steps of the method above.

The method has the advantage of ensuring a high and well- defined degree of co-planarity of solder bumps on the PCB boards. The method requires fewer operational steps and less specifically designed tools. The steps can be performed manually or automatically by for example programmable industrial robots. The method also has the advantage of requiring less solder paste and gives a bigger process window because it is not necessary to compensate for the big co-planarity difference that otherwise would have been the result .

The method and apparatus will now be described in more detail and with preferred embodiments and referring to accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figures 1A to 1C are block diagrams illustrating solder paste transformation before and after a traditional reflow process . Figures 2A to 2D are block diagrams illustrating an embodiment of the flattening method.

Figures 3A to 3C and 4A to 4C are block diagrams illustrating different embodiments of arranging a flattening device . Figure 5 is a flow chart illustrating an embodiment of the flattening method.

Figure 6 is a block diagram illustrating an embodiment of an industrial robot system performing the flattening method. DETAILED DESCRIPTION

Figures 2A to 2C and the flow chart in Figure 5 illustrate an embodiment of a method of forming solder bumps with improved co-planarity on a PCB 100. The method includes the step 501 of initially applying solder paste 104 with a predetermined thickness and pattern on the contact areas 102,103 on the PCB as illustrated in Figure 2A. In a next step 503 (and before the reflow process) a flattening device 200 having a flattening surface 201 (with a predefined co-planarity C2) is arranged so that the flattening surface is parallel to and facing a PCB reference surface (here the epoxy surface 101) at a predetermined distance S as to rest ict the height of the solder bumps created in response to the reflow. This is also illustrated in Figure 2B. The distance S can be kept fixed by using different distant keeping means as further described below.

The solder paste 104 is then as illustrated in Figure 2C exposed to the reflow process, for example in an oven or by infrared, IR radiation. After the reflow process in step 505 and after the created solder bumps 202,203 have solidified in step 506, the flattening device 200 is removed in step 507 as can be seen in Figure 2D.

The resulting solder bumps 202,203 now have a stand-off S and a co-planarity C2. The solder areas of the PCB 100 can now securely receive both small and large components for soldering .

The surface 201 of flattening device 200 can be of a suitable material that can stand heat from the reflow process 505 and that does not allow the molten solder 202,203 to wet the surface 201. The flattening device 200 and its surface 201 can preferably be a platen made of ceramics but can also be a PCB laminate with an non-wetable metallization layer (such as stainless steel) or a laminate only (such as a FR4 laminate) depending on the required co- planarity C2. Stainless steel is particular suitable for scribing grooves or patterns in the surface 201 that can act as ventilation canals for the flux in the solder.

Figures 3A-3C illustrate different embodiments of how to achieve the predetermined distance, stand-off S between the PCB reference surface 101 and the flattening surface 201. In Figures 3A-3B, distance elements or shims 301,302 with a predetermined thickness are applied in step 502 between the flattening surface 201 and the PCB reference surface 101. The shims 301,302 can preferably be made of metal but can also be made or other material that sustains the heat from the reflow process without deformation. The shims 301,302 can be applied di ectly on the PCB reference surface 101 or on free copper lands 303. In Figure 3C the distance elements 312 are integral:ed wi t h the f 1a11en i ng device 300. The distance elements 312 are surrounded by the flattening surface 311. Figures 4A--4C illustrates different embodiments of how to reduce relative movements between the PCB 100 and the flattening device 200.

If the used flattening device 200 is made out of a enough heavy material such as a thick ceramic platen, the weight of the platen itself ca be sufficiently enough to reduce the relative movements between the PCB 100 and the flattening device 200 during the reflow 505 and cooling 506. But the relative movements can be further reduced by using additional fastening means 411A-B, 421, 431A-B as illustrated by arrangements 410,420,430 in Figures 4A-4C respectively. The fastening means can consist of one or several clamps 411A, 411B but can also be a frame 421 with integrated clamps as illustrated by the arrangement 420 in Figure 4B. P T/SE2012/050216

7

The method is not limited to one-sided PCBs only. Figure illustrates an arrangement 430 with a PCB 100 where solder paste has been applied to contact areas on both sides of the PCB 100. In this arrangement 430, two flattening devices 200A and 200B are used, one on each side of the PCB 100. The predetermined distance S, the stand-off is secured by distance elements 435 between the PCB 100 and the flattening devices 200A and 200B. Both the PCB 100 and the flattening devices 200A and 200B are fastened together with two clamps 431A and 431B. The distance elements 435 can be individual metal shims as described above, but they can also be integrated parts of the two clamps 431A and 3 IB.

Other arrangements comprising further combinations of distance elements and fastening means may also be possible as long as the p edeter ined distance S is kept constant during the reflow 505 and cooling 506 processes.

The method described above and illustrated by the flow chart in Figure 5 can be performed manually but for larger volumes it can be desirable to use automation. Figures 6A and 6B illustrate an industrial robot system 600 and a reflow oven 620 in which the PCB 100 and the flattening device 200 are inserted for the reflow process.

The industrial robot system 600 comprises one or several industrial robots 601 that are controlled by a controlling unit 602. This controlling unit 602 can be a single separate entity coupled to and common to all robots 601 involved but can also be integrated in each robot. 601. The controlling unit 602 comprises a processor device P and a memory device M coupled with the processor device P. The memory device M stores computer program instructions wherein the processor device P executes the instructions so that the industrial robot system 600 is caused to perform the method described above. All steps in the method are not illustrated in Figures 6A and 6B but the robot system 600 is caused to perform the steps to:

501: apply solder paste 104 with a predetermined thickness and pattern on the contact areas 102,103 on the PCB 100. 503: arrange the flattening device 200 having a flattening surface 201 with a predefined co-planarity C2 in parallel to and facing the PCB reference surface .101 at a predetermined distance S between the flattening surface 201 and the PCB reference surface 101 as to restrict the height of the solder bumps created in response to a reflow process of the solder paste 10 .

505: expose the solder paste 104 to the reflow process for example in the reflow oven 620.

506: cool the created solder bumps 202,203. 508: remove the flattening device 200.

Optionally, the robot system 600 is also caused to perform the steps to:

502: apply distance keeping elements 301,302 between the PCB 100 and the flattening device 200 as to secure the predetermined distance S;

504: prior to the reflow in step 505 apply a fastening means 411A-B, 21, 431A-B to the flattening device 200 and to the PCB 100 as to reduce relative movements and

507: after the step of cooling 506 remove said fastening means 11A-B, 421 , 31A-B .

Claims

1. A method of forming solder bumps with improved co- planarity on contact areas (102,103) on a printed circuit board, PCB (100) having a reference surface (101), the method comprising the steps of:
- applying (501) solder paste (104) with a predetermined thickness and pattern on said contact areas (102,103); ar anging (503) a flaLtening device (200) having a flattening surface (201) with a predefined co-planarity (C2) in parallel to and facing the PCB reference surface (101) at a predetermined distance (S) between the flattening surface (201) and the PCB reference surface (101) as to restrict the height of the solder bumps created in response to a reflow process of the solder paste {104}; - exposing (505) the solder paste (104) to a reflow process;
- cooling (506) the created solder bumps (202,203);
- removing (508) the flattening device (200).
2. A method as in claim 1 where the step of arranging the flattening surface at the predetermined distance (S) involves the step of applying (502) at least one distance keeping element (301,302) between the PCB (100) and the flattening device (200) as to secure the predetermined distance (S) between the flattening surface (201) and the PCB reference surface (101).
3. A method as in claim 1 or 2 further comprising the steps of
- prior to the reflow (505) applying (504) a fastening means (411A-B, 21, 431A-B) to the flattening device (200) and to the PCB (100) as to reduce relative movements between the flattening surface (201/311) and the PCB reference surface (101) ; after the cooling (506) removing (507) said fastening means (411A-B, 421, 431A-B) .
4. A method as in claim 3 where the distance element (301,302) comprises a metal shim.
5. A method as in claim 3 where the flattening device (300) has an integrated distance keeping element (312} as to secure the predetermined distance (S) between the flattening surface (311) and the PCB reference surface (101) .
6. A method as in any preceding claim where the flattening device (200,300) comprises a plate of a material having a flattening surface (201,311) that is non-wetable to solder.
7. A method as in claim 6 where the non-wetable flattening surface (201,311) is made of ceramics.
8. An industrial robot system (600), comprising at least one industrial robot (601) for working a printed circuit board, PCB (100) having a reference surface (101) and a control system (602) including a processor device (P) and a memory device (M) coupled with the processor device (P) and storing computer program instructions wherein the processor device (P) executes the instructions, the industrial robot system (600) is caused to: apply (501) solder paste (104) with a predetermined thickness and pattern on contact areas (102,103) on the PCB (100) ; arrange (503) a flattening device (200) having a flattening surface (201) with a predefined co-planarity (C2) in parallel to and facing the PCB reference surface (1.01) at a predetermined distance (S) between the flattening surface (201) and the PCB reference surface (101) as to restrict the height of the solder bumps created in response to a reflow process of the solder paste (104);
- expose (505) the solder paste (104) to a reflow process;
- cool (506) the created solder bumps (202,203); - remove (508) the flattening device (200).
9. An industrial robot system (600) as in claim 8 wherein the processor device (P) executes the instructions, the industrial robot system (600) is further caused to: apply (502) at least one distance keeping element (301,302) between the PCB (100) and the flattening device (200) as to secure the predetermined distance (S) between the flattening surface (201) and the PCB reference surface (101) .
10. An industrial robot system (600) as in claim 9 wherein the processor device (P) executes the instructions, the industrial robot system (600) is further caused to:
- prior to the reflow (505) apply (504) a fastening means (411A-B, 421, 43.1A-B) to the flattening device (200) and to the PCB (100) as to reduce relative movements between the flattening surface (201,311) and the PCB reference surface (101) ;
- after the cooling (506) remove (507) said fastening means (411A-B, 421, 431A-B) .
PCT/SE2012/050216 2012-02-27 2012-02-27 Method and apparatus for forming solder bumps WO2013129980A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/SE2012/050216 WO2013129980A1 (en) 2012-02-27 2012-02-27 Method and apparatus for forming solder bumps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SE2012/050216 WO2013129980A1 (en) 2012-02-27 2012-02-27 Method and apparatus for forming solder bumps

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5167361A (en) 1991-05-16 1992-12-01 Motorola, Inc. Method and apparatus for two sided solder cladded surface mounted printed circuit boards
EP1074844A2 (en) * 1999-08-03 2001-02-07 Lucent Technologies Inc. Testing integrated circuits
US6416398B2 (en) 1999-08-09 2002-07-09 Micron Technology, Inc. Apparatus and methods for substantial planarization of solder bumps
US6465338B1 (en) * 2000-07-10 2002-10-15 Lsi Logic Corporation Method of planarizing die solder balls by employing a die's weight
US6660944B1 (en) * 1996-03-29 2003-12-09 Ngk Spark Plug Co., Ltd. Circuit board having solder bumps

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5167361A (en) 1991-05-16 1992-12-01 Motorola, Inc. Method and apparatus for two sided solder cladded surface mounted printed circuit boards
US6660944B1 (en) * 1996-03-29 2003-12-09 Ngk Spark Plug Co., Ltd. Circuit board having solder bumps
EP1074844A2 (en) * 1999-08-03 2001-02-07 Lucent Technologies Inc. Testing integrated circuits
US6416398B2 (en) 1999-08-09 2002-07-09 Micron Technology, Inc. Apparatus and methods for substantial planarization of solder bumps
US6465338B1 (en) * 2000-07-10 2002-10-15 Lsi Logic Corporation Method of planarizing die solder balls by employing a die's weight

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