WO2013118517A1 - Electron beam generating appartus, electron beam irradaition apparatus, multi-electron beam irradiation apparatus, electron beam exposure apparatus, electron beam irradiation method, and manufacture method - Google Patents

Electron beam generating appartus, electron beam irradaition apparatus, multi-electron beam irradiation apparatus, electron beam exposure apparatus, electron beam irradiation method, and manufacture method Download PDF

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Publication number
WO2013118517A1
WO2013118517A1 PCT/JP2013/000722 JP2013000722W WO2013118517A1 WO 2013118517 A1 WO2013118517 A1 WO 2013118517A1 JP 2013000722 W JP2013000722 W JP 2013000722W WO 2013118517 A1 WO2013118517 A1 WO 2013118517A1
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Prior art keywords
electron beam
electron
substrate
beam irradiation
electron emission
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PCT/JP2013/000722
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French (fr)
Japanese (ja)
Inventor
江刺 正喜
池上 尚克
明 小島
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国立大学法人東北大学
株式会社クレステック
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Priority claimed from JP2012027488A external-priority patent/JP5994271B2/en
Priority claimed from JP2012027499A external-priority patent/JP6018386B2/en
Application filed by 国立大学法人東北大学, 株式会社クレステック filed Critical 国立大学法人東北大学
Publication of WO2013118517A1 publication Critical patent/WO2013118517A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02Details
    • H01J37/04Arrangements of electrodes and associated parts for generating or controlling the discharge, e.g. electron-optical arrangement, ion-optical arrangement
    • H01J37/06Electron sources; Electron guns
    • H01J37/063Geometrical arrangement of electrodes for beam-forming
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02Details
    • H01J37/04Arrangements of electrodes and associated parts for generating or controlling the discharge, e.g. electron-optical arrangement, ion-optical arrangement
    • H01J37/06Electron sources; Electron guns
    • H01J37/073Electron guns using field emission, photo emission, or secondary emission electron sources
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174Particle-beam lithography, e.g. electron beam lithography
    • H01J37/3177Multi-beam, e.g. fly's eye, comb probe
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/26Electron or ion microscopes
    • H01J2237/28Scanning microscopes
    • H01J2237/2802Transmission microscopes

Definitions

  • the present invention relates to an electron beam generating apparatus, an electron beam irradiation apparatus, a multi-electron beam irradiation apparatus, an electron beam exposure apparatus, an electron beam irradiation method, and a manufacturing method.
  • Patent Documents 1 and 2 Conventionally, in a semiconductor integrated circuit provided with a fine pattern, an electron beam exposure apparatus is used, and the electron beam is directly drawn on a semiconductor substrate in accordance with pattern data to form the fine pattern (for example, Patent Documents 1 and 2). reference).
  • An electron beam exposure apparatus that generates a plurality of electron beams and irradiates the sample with the plurality of electron beams is formed into an area beam by a collimator lens or the like after the electron beam generated from the electron beam generation source is formed into a mask. A plurality of beams are generated through lenses, blanking arrays, and the like (see, for example, Patent Documents 1 and 2).
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2007-329220
  • Patent Document 2 Japanese Patent Application Laid-Open No.
  • Non-Patent Document 1 PNMinh, LTTTuyen, T. Ono, H. Mimura, K. Yokoo and M. Esashi: Carbon nanotube on a Si tip for electron field emitter, Jpn. J. Appl. Phys., 41 Part2, 12A (2002), L1409-L1411
  • Non-Patent Document 2 PNMinh, LTTTuyen, T. Ono, H. Miyashita, Y. Suzuki, H. Mimura and M. Esashi: Selective growth of carbon nanotubes on Si microfabricated tips and application for electron field emitters, J. Vac. Sci. Technol. B 21, 4, (2003), 1705-1709
  • Non-Patent Document 3 PNMinh, T.
  • Non-Patent Document 4 JHBae, PNMinh, T. Ono and M. Esashi: Schottky emitter using boron-doped diamond, J. Vac. Sci. Technol., B22, 3 (2004) 1349-1352
  • Non-Patent Document 5 C.-H. Tsai, T. Ono and M. Esashi: Fabrication of diamond Schottky emitter array by using electrophoresis pre-treatment and hot-filament chemical vapor deposition, diamond and related materials, 16 (2007) 1398- 1402
  • the throughput of the electron beam exposure apparatus has decreased due to the miniaturization of the pattern to be drawn and the increase in the diameter of the semiconductor wafer.
  • the number of pixels to be drawn has increased to about 20,000 times in about 30 years, and there has been a case where one semiconductor wafer is drawn over 10 hours or more.
  • the electron beam irradiation apparatus accommodates a complicated optical system and becomes large, and the exposure apparatus itself is huge.
  • the electron beam irradiation apparatus is larger than the sample, it is difficult to mount a plurality of electron beam irradiation apparatuses and irradiate a plurality of drawing patterns in parallel with one sample.
  • a substrate provided with a plurality of hole portions, a plurality of electron emission portions that are provided on the bottom surfaces of the plurality of hole portions, emit electrons, and a plurality of electron emission portions are provided.
  • An electron beam generator comprising: a plurality of first electrode portions that are provided in correspondence with each other and that accelerate electrons emitted from the corresponding electron emission portions and output the electrons as holes from the holes provided with the electron emission portions.
  • An electron beam irradiation apparatus, an electron beam exposure apparatus, and a manufacturing method are provided.
  • an electron beam irradiation apparatus that outputs a plurality of electron beams, having a plurality of electron emission portions, and accelerating electrons emitted from each of the plurality of electron emission portions.
  • An electron comprising: a surface electron beam source that is focused and output as a plurality of electron beams; and an electron lens that irradiates an object with a drawing pattern by the plurality of electron beams output from the surface electron beam source at a predetermined magnification.
  • a beam irradiation apparatus is provided.
  • a configuration example of an electron beam exposure apparatus 1000 according to the present embodiment is shown together with a semiconductor wafer 10.
  • a configuration example of an electron beam irradiation apparatus 100 according to the present embodiment is shown together with a semiconductor wafer 10.
  • the structural example of the electron beam generation source 212 formed in the electron beam generator 200 which concerns on this embodiment is shown.
  • a modification of the electron beam exposure apparatus 1000 according to this embodiment is shown together with the semiconductor wafer 10.
  • An example of the manufacturing flow which forms the electron beam generator 200 which concerns on this embodiment is shown.
  • a cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where a hole 214 is formed in the substrate 210 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where a polysilicon layer 216 is formed on the bottom surface 402 of the hole 214 according to the present embodiment is shown.
  • a cross-sectional configuration at the stage where the first insulating film 218 is formed on the surface of the substrate 210 on which the polysilicon layer 216 is formed is shown.
  • a cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the first insulating film 218 is formed is shown.
  • a cross-sectional configuration at a stage where the first insulating film 218 formed on the bottom surface 402 of the hole 214 according to the present embodiment has been removed is shown.
  • a cross-sectional configuration at a stage where the electron emission unit 300 is formed on the bottom surface 402 of the hole 214 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 on which an electron emission unit 300 according to the present embodiment is formed is shown.
  • a cross-sectional configuration at a stage where a connection portion 322 is formed on one surface of the first insulating film 218 according to this embodiment on the opposite side to the substrate 210 is shown.
  • a cross-sectional configuration at the stage where the second electrode unit 320 is formed on the surface of the substrate 210 according to the present embodiment on which the electron emission unit 300 is formed is shown.
  • a cross-sectional configuration at a stage where the polymer layer 410 is formed on the surface on which the second electrode part 320 of the substrate 210 according to the present embodiment is formed is shown.
  • a cross-sectional configuration at a stage where a part of the second electrode part 320 according to the present embodiment is etched and the second electrode part 320 is electrically separated is shown.
  • a cross-sectional configuration at a stage where the second insulating film 330 is formed on the surface of the substrate 210 on which the polymer layer 410 is formed according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the second insulating film 330 according to the present embodiment is polished and the polymer layer 410 is exposed is shown.
  • a cross-sectional configuration at a stage where the metal film 420 is formed on the surface of the substrate 210 where the polymer layer 410 is exposed according to the present embodiment is shown.
  • a cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 on which the metal film 420 is formed according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the metal film 420 is further formed on the surface of the substrate 210 on which the metal film 420 is formed according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the first electrode part 310 having the opening 312 is formed on the surface of the substrate 210 where the electron emission part 300 is formed according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the holding substrate 440 is bonded to the surface of the substrate 210 according to the present embodiment on which the electron emission unit 300 is formed is shown.
  • a cross-sectional configuration at a stage where a resist 400 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed is shown.
  • a cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 formed in the substrate 210 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the isolation part 340 is formed on the substrate 210 according to the present embodiment is shown.
  • a cross-sectional configuration at a stage where the third electrode portion 350 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed is shown.
  • a cross-sectional configuration at a stage where the substrate 210 and the electronic circuit unit 220 according to the present embodiment are bonded together is shown.
  • a cross-sectional configuration at a stage where the holding substrate 440 is removed from the substrate 210 according to the present embodiment is shown.
  • the cross-sectional structure of the stage in which the electron beam generator 200 which concerns on this embodiment was formed is shown.
  • FIG. 1 shows a configuration example of an electron beam exposure apparatus 1000 according to this embodiment together with a semiconductor wafer 10.
  • the electron beam exposure apparatus 1000 includes an electron beam irradiation apparatus 100 that irradiates a plurality of electron beams, and draws a fine pattern on the semiconductor wafer 10 using the electron beam irradiation apparatus 100.
  • the semiconductor wafer 10 may be a plate-like substrate formed by processing a crystal of a semiconductor material such as silicon, silicon carbide, germanium, gallium arsenide, gallium nitride, gallium phosphide, or indium phosphide.
  • the electron beam exposure apparatus 1000 includes an electron beam irradiation apparatus 100, a stage unit 110, a storage unit 120, a control unit 130, a communication unit 140, and a computer unit 150.
  • the electron beam irradiation apparatus 100 is an electron column that irradiates a plurality of electron beams.
  • the electron beam irradiation apparatus 100 draws a predetermined drawing pattern by irradiating the surface of the semiconductor wafer 10 with a plurality of electron beams. Details of the electron beam irradiation apparatus 100 will be described later.
  • the stage unit 110 places an object to be irradiated with an electron beam.
  • the object is a semiconductor wafer 10
  • the stage unit 110 moves the mounted semiconductor wafer 10 in the horizontal direction, and causes the electron beam irradiation apparatus 100 to draw a predetermined fine pattern on one surface of the semiconductor wafer 10 at a predetermined position.
  • the stage unit 110 may have an XY stage.
  • the stage unit 110 may have a ⁇ stage.
  • the stage unit 110 may further include a tilt stage that adjusts the horizontal position.
  • the stage unit 110 may further include a Z stage that moves the semiconductor wafer 10 in the vertical direction and adjusts the distance between the semiconductor wafer 10 and the electron beam irradiation apparatus 100.
  • the storage unit 120 stores drawing pattern information drawn by the electron beam irradiation apparatus 100.
  • the drawing pattern information may be position information on one surface of the semiconductor wafer 10, information on whether or not to irradiate an electron beam, and the like.
  • the storage unit 120 may store predetermined drawing pattern information in advance.
  • the control unit 130 is connected to the electron beam irradiation apparatus 100 and the storage unit 120, and transmits a control signal for causing the electron beam irradiation apparatus 100 to output a plurality of electron beams according to the drawing pattern information stored in the storage unit 120. To do.
  • the control unit 130 may be connected to the stage unit 110 and may transmit a control signal for moving the stage unit 110 according to the drawing pattern information stored in the storage unit 120.
  • the control unit 130 may transmit a control signal to the electron beam irradiation apparatus 100 and / or the stage unit 110 according to the instruction signal received via the communication unit 140.
  • the communication unit 140 connects the control unit 130 and the computer unit 150.
  • the communication unit 140 may have a general-purpose or dedicated interface, and the control unit 130 and the computer unit 150 may be connected to communicate with each other.
  • the communication unit 140 may use a general-purpose high-speed serial interface such as Ethernet (registered trademark), USB, Serial RapidIO, or a parallel interface.
  • the communication unit 140 may connect the control unit 130 and the computer unit 150 wirelessly.
  • the computer unit 150 transmits an instruction signal for operating the electron beam irradiation apparatus 100 and / or the stage unit 110 to the control unit 130.
  • the computer unit 150 may execute an operation program for operating the electron beam exposure apparatus 1000 and transmit an instruction signal according to the operation program.
  • the computer unit 150 may have an input device for inputting a user instruction, and may transmit an instruction signal according to the user instruction.
  • the computer unit 150 may be a personal computer or a server machine.
  • FIG. 2 shows a configuration example of the electron beam irradiation apparatus 100 according to the present embodiment together with the semiconductor wafer 10.
  • FIG. 2 shows a configuration example of a vertical cross section of the electron beam irradiation apparatus 100.
  • the electron beam irradiation apparatus 100 includes an electron beam generation apparatus 200, an acceleration electrode 230, and an electron lens 240.
  • the electron beam generator 200 generates a plurality of electron beams according to the control signal.
  • the electron beam generator 200 is a planar electron beam source as an example.
  • the electron beam generator 200 includes a substrate 210 and an electronic circuit unit 220.
  • the substrate 210 is provided with a plurality of holes.
  • the plurality of holes may be formed in a matrix on one surface of the substrate 210.
  • a plurality of electron beam generation sources 212 are formed in the hole. Details of the electron beam generation source 212 will be described later.
  • the substrate 210 may be a semiconductor crystal such as silicon.
  • the electronic circuit unit 220 is formed on the other surface of the substrate 210 and outputs an electron beam from a plurality of electron beam generation sources 212.
  • a circuit for supplying a driving voltage for driving each of the plurality of electron beam generation sources 212 is formed.
  • the electronic circuit unit 220 receives a control signal from the control unit 130 and outputs an electron beam from the plurality of electron beam generation sources 212 according to the drawing pattern information.
  • the electronic circuit unit 220 may be formed of a semiconductor substrate such as silicon.
  • the electronic circuit unit 220 is substantially the same as the thermal expansion coefficient of the substrate 210 to such an extent that the substrate 210 or the electronic circuit unit 220 is not bent or peeled even when the temperature is increased by the driving of the electron beam generator 200. It may be formed of a material having a similar coefficient of thermal expansion.
  • the acceleration electrode 230 is provided on the side of the electron beam generator 200 that outputs the electron beam, and a voltage higher than that of the electrode that outputs the electron beam of the electron beam generator 200 is applied to accelerate the electron beam.
  • the acceleration electrode 230 is formed with a plurality of through holes respectively corresponding to the plurality of electron beam generation sources 212, and allows the plurality of electron beams to pass therethrough.
  • the acceleration electrode 230 may have a plurality of through holes arranged in a matrix. A constant voltage is applied to the acceleration electrode 230, and as an example, approximately 0V is applied.
  • the electron lens 240 irradiates the semiconductor wafer 10 as an object with a drawing pattern by a plurality of electron beams output from the electron beam generator 200 at a predetermined magnification. For example, the electron lens 240 reduces the drawing pattern drawn by a plurality of electron beams to 1/100 or less.
  • the electron lens 240 has a coil part 242, a lens part 244, and a speed reducing part 246.
  • the coil unit 242 controls the deflection of the plurality of electron beams in the XY directions. That is, the coil unit 242 controls the beam shape of the electron beam on the surface of the semiconductor wafer 10 where the electron beam is irradiated.
  • the coil unit 242 may be a rotation coil that corrects the correspondence between the X axis or Y axis of the electron beam irradiation apparatus 100 and the X axis or Y axis on the surface of the semiconductor wafer 10.
  • the coil unit 242 may correct the amplitudes of the beam diameter on the surface of the semiconductor wafer 10 in the X and Y directions.
  • the lens unit 244 images a plurality of electron beams on the surface of the semiconductor wafer 10.
  • the lens unit 244 may constitute a telecentric lens system and functions as an objective lens of the electron beam generator 200.
  • the deceleration unit 246 receives a deceleration voltage and applies a deceleration electric field corresponding to the deceleration voltage to the plurality of electron beams.
  • the decelerating unit 246 decelerates a plurality of electron beams and irradiates the semiconductor wafer 10 as an object with an electron beam having a predetermined energy.
  • the deceleration unit 246 sets the incident voltage to the semiconductor wafer 10 as a difference between the acceleration voltage of the acceleration electrode 230 and the deceleration voltage.
  • FIG. 3 shows a configuration example of the electron beam generation source 212 formed in the electron beam generation apparatus 200 according to the present embodiment.
  • the electron beam generator 200 has a plurality of electron emission units, accelerates and focuses the electrons emitted from each of the plurality of electron emission units, and outputs the electrons as a plurality of electron beams.
  • the electron beam generator 200 includes the substrate 210 and the electronic circuit unit 220. Further, the electron beam generator 200 may include a voltage supply unit 202 that supplies a drive voltage to each unit.
  • the voltage supply unit 202 includes a plurality of electrode units 204 and supplies drive voltages to connection destinations connected to the respective electrode units 204.
  • the plurality of electrode portions 204 may be connected to a plurality of connection destinations by wire bonding or the like.
  • the voltage supply unit 202 is provided on the surface of the electronic circuit unit 220 opposite to the substrate 210 side.
  • the electrode part described in this embodiment may include nickel, gold, chromium, titanium, aluminum, tungsten, palladium, rhodium, platinum, copper, ruthenium, indium, iridium, osmium, and / or molybdenum. Further, the electrode portion may be an alloy of two or more materials including these materials.
  • the substrate 210 has a plurality of holes 214, an isolation part 340, and a third electrode part 350.
  • Each bottom surface of the plurality of hole portions 214 is formed in a concave shape.
  • each bottom surface of the plurality of hole portions 214 may be formed in a spherical shape or a parabolic shape.
  • Each of the plurality of holes 214 is formed in a cylindrical shape, and an electron beam generation source 212 that generates an electron beam is formed.
  • the electron beam generation source 212 includes a polysilicon layer 216, a first insulating film 218, an electron emission unit 300, a first electrode unit 310, a second electrode unit 320, and a second insulating film 330.
  • the polysilicon layer 216 is formed on the surface of the substrate 210 where the plurality of holes 214 are formed. A part of the polysilicon layer 216 formed at the bottom of the hole 214 is nano-crystallized by anodic activation to form the electron emission unit 300.
  • the first insulating film 218 is formed on the surface of the substrate 210 where the polysilicon layer 216 is formed.
  • the first insulating film 218 may be a SiN film formed by a CVD method or the like.
  • the electron emission unit 300 is provided on the bottom surface of each of the plurality of holes 214 and emits electrons.
  • the plurality of electron emission units 300 are arranged in a matrix and emit electrons according to the driving voltage.
  • the electron emission part 300 has a nanocrystal.
  • the electron emission unit 300 is formed of nanocrystalline silicon. Nanocrystalline silicon forms a surface oxide film that functions as an electron tunneling barrier, and a plurality of nanocrystalline silicons are arranged to form a column connecting the electron tunneling barriers.
  • the electron emission part 300 can control the amount of electron emission precisely and with good reproducibility by having a nanocrystal.
  • the electron emission unit 300 when the electron emission unit 300 is formed of nanowires in which a plurality of such nanocrystalline silicons are arranged, the nanowires are not formed perpendicular to the surface that outputs electrons, and the output surface depends on the crystal orientation. May be tilted with respect to the normal. In this case, the electron emission unit 300 may output electrons in a direction different from the normal direction of the output surface. In this case, the electron emission unit 300 determines the electron emission amount by multiplying the distribution of the tunnel probability in a different direction with respect to the normal of the output surface and the distribution in which the nanowire emits electrons in the direction.
  • the electron emission unit 300 can output more electrons as an electron beam by making the bottom surface of the hole 214 concave to have an electron emission amount when the bottom surface is flattened. For example, in the case where the bottom surface of the electron emission unit 300 is made flat by forming the direction in which the electron emission distribution is higher and / or the direction in which the tunnel probability distribution is higher in the direction in which the electron beam is output. More electrons can be output as an electron beam than the amount of emitted electrons.
  • the shape of the bottom surface of the hole 214 is such that the direction in which the electrons are emitted from the plurality of electron emitting units 300 and the tunnel probability of the electrons in the directions are more multiplied is the center of the first electrode unit 310. Turn to.
  • the electron emission unit 300 may include an insulating film that tunnels emitted electrons instead of the nanocrystal. Since such an insulating film can be adjusted by the probability of tunneling the amount of electrons emitted, the amount of electrons emitted can be controlled by the material, film thickness, and voltage applied to the insulating film. it can.
  • the first electrode unit 310 is provided corresponding to each of the plurality of electron emission units 300, accelerates electrons emitted from the corresponding electron emission unit 300, and emits an electron beam from the hole 214 provided with the electron emission unit 300. Output as.
  • Each of the plurality of first electrode portions 310 has an opening 312, is formed in a plate shape on one surface of the substrate 210 where the plurality of holes 214 are provided, and the openings are opened by a potential difference with the corresponding hole 214.
  • the electron beam is focused from 312 and output.
  • the opening 312 is formed near the center of the first electrode unit 310 and / or the electron emission unit 300.
  • the opening 312 may be a circular through hole.
  • the first electrode part 310a is provided corresponding to the electron emission part 300a, and shows an example in which electrons emitted from the electron emission part 300a are accelerated and output as an electron beam from the opening 312a.
  • the 1st electrode part 310b is provided corresponding to the electron emission part 300b, and accelerates the electron which the electron emission part 300b discharge
  • the first electrode unit 310 may be electrically connected to an electrode or the like provided outside the substrate 210 and may have a connection unit to which a driving voltage is applied.
  • the connection part may be an electrode part in which a conductive material is further formed on a part of the first electrode part by plating or the like.
  • the connecting portion may be connected to an external electrode by wire bonding or the like.
  • the second electrode portion 320 is provided in each of the plurality of hole portions 214 and is formed of a conductive material that covers the bottom surface and the side wall of the hole portion 214.
  • the second electrode unit 320 causes the electrons emitted from the electron emission unit 300 to be output as an electron beam from the opening 312 due to a potential difference from the first electrode unit 310.
  • the second electrode part 320 is formed thin enough to allow the electrons emitted from the electron emission part 300 to pass through the hole 214.
  • the first electrode unit 310 and the second electrode unit 320 may be applied with a driving voltage at which the potential difference between these electrodes is several tens to several hundreds V, respectively.
  • the first electrode unit 310 and the second electrode unit 320 are each applied with a driving voltage having a potential difference of several hundreds of volts.
  • the first electrode part 310 and the second electrode part 320 are each applied with a driving voltage with a potential difference of 150V.
  • the second electrode part 320 includes a connection part 322.
  • connection part 322 is an electrode part formed to be thicker in the second electrode part 320, and is electrically connected to an electrode provided outside the substrate 210, and applied with a drive voltage.
  • the connection part 322 may be an electrode part in which a conductive material is further formed on a part of the second electrode part by plating or the like.
  • the connection portion 322 may be connected to an external electrode by wire bonding or the like.
  • the second insulating film 330 is formed between the substrate 210 and the first electrode unit 310 and electrically insulates the first electrode unit 310 and the second electrode unit 320 while supporting the first electrode unit 310.
  • the second insulating film 330 may be a silicon oxide film formed by a CVD method or the like.
  • the electron beam generation source 212 described above applies electrons from the opening 312 by applying an electric field generated by a driving voltage applied to each of the first electrode unit 310 and the second electrode unit 320 to electrons emitted from the electron emission unit 300. Generate a beam.
  • each bottom surface of the hole 214 is formed in a concave shape, a spherical shape, or a parabolic shape, so that the electron emission surface of the electron emission unit 300 is also concave. , Spherical or parabolic.
  • the electron beam generation source 212 can easily focus the electron emitting unit 300 on the opening 312 by aligning the direction in which the electron emitting unit 300 emits electrons with the direction of the opening 312. That is, the electron beam generation source 212 can increase the number of electrons focused on the opening 312 and increase the density of the generated electron beam.
  • the electron beam generation source 212 irradiates the semiconductor wafer 10 with the generated electron beam through the subsequent electron lens 240.
  • the electron lens 240 may have an aberration that causes blurring, distortion, or the like in the image formation of the electron beam, similar to an optical lens or the like.
  • the electron lens 240 may shorten the focal position of electrons traveling near the outside of the beam compared to electrons traveling near the center of the electron beam to be imaged.
  • the electron beam generation source 212 may correct the aberration while increasing the electron beam density by forming the electron emitting surface of the electron emitting unit 300 into a concave shape, a spherical shape, or a parabolic shape. .
  • the electron beam generation source 212 flattens the bottom surface of the hole 214, the electrons output from the region where the normal direction of the electron emission surface of the electron emission unit 300 is in the vicinity of the opening 312 are It is easy to focus on the center.
  • the electron emission unit 300 is directed to a region near the edge side of the emission surface with a distance between the region near the center of the emission surface and the opening 312 while directing the electron emission surface toward the opening 312.
  • a surface for shortening the distance from the opening 312 is formed. That is, by forming the emission surface so that electrons that are likely to be focused outside the electron beam reach the opening 312 more quickly, the focal length of the electrons is increased. This is equivalent to concentrating the laminar flow of electrons emitted from a portion closer to the center point of the emission surface of the electron emission unit 300 to a position closer to the center point to generate negative aberration.
  • the electron beam generation source 212 can increase the focal length of electrons traveling near the outside of the electron beam as compared with electrons traveling near the center of the generated electron beam.
  • the electron beam generating source 212 increases the focal length of the electron beam as it moves away from the center of the optical axis of the electron beam, and concentrically distributes the focal length in a cross section perpendicular to the irradiation direction of the electron beam.
  • the electron beam generation source 212 can correct the aberration of the electron lens 240 by forming an emission surface corresponding to the aberration of the electron lens 240.
  • the region in the vicinity of the edge side of the emission surface of the electron emission unit 300 is closer to the outside of the electron beam generation source 212 than the region in the vicinity of the center. That is, electrons output from the region near the edge side of the emission surface are likely to be output in a direction inclined from the normal line of the emission surface, and the focal length tends to be long.
  • the electron beam generation source 212 forms a distribution of focal lengths in the electron beam to be output depending on the external electric field. Therefore, the shape of the emission surface of the electron emission unit 300 is adjusted according to such distribution. Then, the aberration of the electron beam imaged on the semiconductor wafer 10 may be corrected.
  • the second electrode portion 320 forms a cylindrical electrode covering the bottom surface and the side wall of the hole portion 214, and keeps the hole portion 214 at the same potential. As a result, the influence of the external electric field can be reduced while the side wall portion of the second electrode unit 320 maintains the velocity of the electrons emitted from the electron emission unit 300 and focuses the electrons near the opening 312.
  • the isolation part 340 is formed by being filled with an insulating material.
  • the isolation unit 340 is formed so as to surround each of the plurality of electron beam generation sources 212 and electrically isolates the electron beam generation sources 212 from each other.
  • the isolation part 340 is formed by filling a groove or the like formed in a lattice shape with a polymer or the like.
  • the third electrode portion 350 is formed on the surface of the substrate 210 opposite to the surface on which the plurality of hole portions 214 are formed, corresponding to each of the plurality of electron emission portions 300.
  • the third electrode unit 350 is applied with a driving voltage for emitting electrons from the plurality of electron emission units 300.
  • the third electrode unit 350 is electrically connected to the electronic circuit unit 220.
  • the electronic circuit unit 220 is formed on the other surface of the substrate 210 and individually supplies a driving voltage for emitting electrons from the plurality of electron emission units 300 to each of the plurality of electron emission units 300.
  • the electronic circuit unit 220 may be formed on a semiconductor substrate, and one surface of the semiconductor substrate may be attached to the substrate 210.
  • the electronic circuit unit 220 includes a plurality of electrode units 222 corresponding to the third electrode unit 350 formed on the substrate 210, and the electrode unit 222 is electrically connected to the corresponding third electrode unit 350.
  • a driving voltage is supplied to the substrate 210 through the electrode portion 222.
  • the electrode portions 222 are formed at the same pitch as the third electrode portions 350 so as to correspond to the third electrode portions 350 formed on the substrate 210 at a pitch of about 100 ⁇ m.
  • the electronic circuit unit 220 may include a plurality of connection units 224 that are electrically connected to external electrodes and the like and to which a drive voltage, a power supply voltage, and the like are applied.
  • the connection portion 224 may be connected to an external electrode by wire bonding or the like.
  • the electronic circuit unit 220 may further apply different offset biases depending on the arrangement of the plurality of electron emission units 300.
  • the plurality of electron emission units 300 are individually applied with a driving voltage to emit electrons, and the corresponding plurality of electron beam generation sources 212 generate a plurality of electron beams.
  • the plurality of electron beam generation sources 212 causes the generated plurality of electron beams to be imaged by the subsequent electron lens 240 to irradiate the semiconductor wafer 10 with a drawing pattern.
  • the optical system such as the electron lens 240 gives a slight difference in focal position between the electron beam passing near the center of the lens and the electron beam passing near the outer edge of the lens, and blurs the drawn image by a plurality of electron beams. May cause distortion and the like.
  • the electron lens 240 may shorten the focal position with respect to an electron beam passing near the outer edge of the lens as compared with an electron beam passing near the center of the lens.
  • the electronic circuit unit 220 has an electron beam generation source 212 that generates an electron beam that passes through the vicinity of the outer edge of the electron lens 240 as compared with an electron beam generation source 212 that generates an electron beam that passes through the vicinity of the center of the electron lens 240. Supply a high offset voltage. Accordingly, the electronic circuit unit 220 increases the output speed of the electron beam passing through the vicinity of the outer edge of the electronic lens 240 to increase the focal length, and cancels the focal position shortened by the electronic lens 240 for correction. Can do.
  • the plurality of electron emission units 300 may be distributed to a plurality of blocks according to their arrangement, and the electronic circuit unit 220 may apply an offset bias for each block.
  • the plurality of electron emission units 300 that are arranged in the vicinity of the center on one surface of the substrate 210 and emit an electron beam that passes through the vicinity of the center of the electron lens 240 are the same.
  • the other electron emission units 300 may be distributed to one or more blocks in a substantially concentric manner around the central block.
  • the plurality of electron emission units 300 are divided into one or more concentric circles in the outer edge direction of the electron lens 240 with the electron emission unit 300 that outputs an electron beam passing near the center of the electron lens 240 as a central block.
  • the electron emission unit 300 corresponding to the annular region is distributed as another block.
  • the electronic circuit unit 220 adjusts the focal position of the electron beam for each of the regions divided concentrically around the electron beam passing near the center of the electron lens 240 by applying a different offset bias for each block. It is possible to correct the image formation of the drawing pattern efficiently.
  • the electronic circuit unit 220 applies a negative voltage of several tens of kV to the first electrode unit and the second electrode unit.
  • the electronic circuit unit 220 applies ⁇ 20 kV to the second electrode unit corresponding to the electron emission unit 300 distributed in the center of the concentric circle, and ⁇ 20 kV + 150 V to the corresponding first electrode unit.
  • the electron beam generation source 212 generates an electron beam by applying an electric field generated by a potential difference of 150 V to electrons emitted from the electron emission unit 300, and the generated electron beam is generated with a potential difference of about 20 kV from the acceleration electrode 230. Accelerate.
  • the electronic circuit unit 220 applies ⁇ 20 kV + nV to the corresponding second electrode unit and ⁇ 20 kV + 150 V + nV to the corresponding first electrode unit every n blocks different from the central block toward the outer edge.
  • the electronic circuit unit 220 may finely adjust the acceleration electric field of the electron beam for each block by changing the driving voltage by about 1 V every time the block is different.
  • the electron beam generating apparatus 200 has a plurality of electron beam generation sources 212 and can individually drive the plurality of electron beam generation sources 212 to output a plurality of electron beams. .
  • the electron beam irradiation apparatus 100 including the electron beam generation apparatus 200 can irradiate the object with a predetermined drawing pattern using a plurality of electron beams.
  • the electron beam generation source 212 is formed in each of a plurality of holes 214 formed in the semiconductor substrate. Therefore, the plurality of electron beam generation sources 212 can be formed integrally with the substrate 210 by a semiconductor manufacturing process. That is, for example, the electron beam generation sources 212 are formed in an area of 1 cm ⁇ 1 cm of the substrate 210 and arranged in a matrix of 100 ⁇ 100. As described above, the electron beam generation source 212 is formed in a matrix shape with a pitch of about 100 ⁇ m, so that the object can be irradiated with a drawing pattern with a pitch of about 1 ⁇ m or less by the electron lens 240.
  • the electron beam generating apparatus 200 can include a plurality of electron beam generating sources 212 formed integrally with a plurality of electrode portions and formed with a small area and a high density. Therefore, the electron beam irradiation apparatus 100 can irradiate about 10,000 electron beams while reducing the size of the apparatus.
  • the electron beam generating apparatus 200 and the electron beam irradiation apparatus 100 may be provided in an apparatus using an electron beam, such as an electron microscope, an electron beam microanalyzer, a cathode ray tube, a transmission tube, an imaging tube, a vacuum tube, a processing device, a heating device. You may use for an apparatus or a sterilizer.
  • an electron beam such as an electron microscope, an electron beam microanalyzer, a cathode ray tube, a transmission tube, an imaging tube, a vacuum tube, a processing device, a heating device. You may use for an apparatus or a sterilizer.
  • FIG. 4 shows a modification of the electron beam exposure apparatus 1000 according to the present embodiment together with the semiconductor wafer 10.
  • the electron beam exposure apparatus 1000 of this modification the same reference numerals are given to the same operations as those of the electron beam exposure apparatus 1000 according to the present embodiment shown in FIG.
  • the electron beam exposure apparatus 1000 includes a plurality of electron beam irradiation apparatuses 100 that irradiate a plurality of electron beams.
  • the electron beam exposure apparatus 1000 irradiates a plurality of electron beams and applies a drawing pattern corresponding to the drawing pattern information to the semiconductor wafer 10 that is an object. draw.
  • the electron beam irradiation apparatus 100 includes two or more electron beam exposure apparatuses 1000.
  • an electron beam irradiation apparatus 100 shows an example in which a horizontal sectional area is formed smaller than the surface area of the semiconductor wafer 10 and a plurality of electron beam exposure apparatuses 1000 are provided.
  • the plurality of electron beam irradiation apparatuses 100 draw a predetermined drawing pattern by irradiating the surface of the semiconductor wafer 10 with a plurality of electron beams, respectively.
  • the plurality of electron beam irradiation apparatuses 100 may execute each drawing in parallel. Details of the electron beam irradiation apparatus 100 have already been described with reference to FIG.
  • the stage unit 110 moves the mounted semiconductor wafer 10 in the horizontal direction, and draws a predetermined fine pattern on one surface of the semiconductor wafer 10 at a predetermined position by the plurality of electron beam irradiation apparatuses 100.
  • the storage unit 120 stores drawing pattern information drawn by the plurality of electron beam irradiation apparatuses 100.
  • the control unit 130 is connected to each of the plurality of electron beam irradiation apparatuses 100, and receives a control signal for causing each of the plurality of electron beam irradiation apparatuses to output a plurality of electron beams according to the drawing pattern information stored in the storage unit 120. Send.
  • the electron beam irradiation apparatus 100 can be downsized, and the electron beam exposure apparatus 1000 can be downsized.
  • a plurality of electron beam irradiation apparatuses 100 can be mounted.
  • An electron beam exposure apparatus 1000 including two or more electron beam irradiation apparatuses 100 can irradiate the semiconductor wafer 10 with two or more drawing patterns in parallel, and has a throughput according to the number of electron beam irradiation apparatuses 100 to be mounted. Can be improved.
  • FIG. 5 shows an example of a manufacturing flow for forming the electron beam generator 200 according to the present embodiment.
  • 6 to 32 show cross sections of the substrate 210 in the process of forming the electron beam generator 200 according to the present embodiment.
  • the substrate 210 will be described as a silicon substrate.
  • a plurality of holes 214 are formed in the substrate 210 (S400).
  • the hole 214 is formed by photolithography.
  • FIG. 6 shows a cross-sectional configuration at a stage where the resist 400 is formed on the substrate 210.
  • a resist 400 is formed on the substrate 210 in accordance with the shape of the hole 214 to be formed.
  • the resist 400 may be a photosensitive resist, and is dissolved or solidified by exposure, and the resist 400 in a predetermined region is removed by a photomask or the like.
  • the substrate 210 is etched in the region where the resist 400 is removed.
  • the substrate 210 may be etched by dry etching.
  • the substrate 210 is etched by reactive ion etching.
  • FIG. 7 shows a cross-sectional configuration when the substrate 210 is etched from the opening of the resist 400 according to the present embodiment.
  • the etching rate of such dry etching changes according to the area of the opening of the resist. For example, the etching rate increases as the area of the opening increases. Therefore, as in the example in the drawing, the substrate 210 is etched deeper in the region where the opening area of the resist 400 is large than in the region where the opening area is small.
  • FIG. 8 shows a cross-sectional configuration at a stage where the hole 214 is formed in the substrate 210 according to the present embodiment. As in the example in the figure, the hole 214 is formed with the bottom surface 402 having a concave shape.
  • the etching rate of the substrate 210 is determined in accordance with the opening area of the resist 400, a plurality of openings of the resist 400 are formed concentrically from the center of the hole 214 to be formed. By decreasing the area in order from the center, the bottom surface of the hole 214 can be formed into a concave shape.
  • the substrate 210 can be formed in a spherical shape or a parabolic shape by adjusting the opening area of the resist 400.
  • a plurality of electron emission portions 300 that emit electrons are formed on the bottom surfaces 402 of the plurality of hole portions 214 (S410).
  • a polysilicon layer 216 is formed on one surface where the hole 214 is formed by a CVD (Chemical Vapor Deposition) method or the like.
  • FIG. 9 shows a cross-sectional configuration at the stage where the polysilicon layer 216 is formed on the bottom surface 402 of the hole 214 according to the present embodiment.
  • a first insulating film 218 is formed on the surface of the substrate 210 on which the polysilicon layer 216 is formed.
  • the first insulating film 218 may be a SiN film formed by a CVD method or the like.
  • FIG. 10 shows a cross-sectional configuration at the stage where the first insulating film 218 is formed on the surface of the substrate 210 according to the present embodiment on which the polysilicon layer 216 is formed.
  • a resist 400 that covers a region other than the hole 214 is formed on the surface on which the first insulating film 218 is formed.
  • the resist 400 may be formed by patterning a film resist.
  • FIG. 11 shows a cross-sectional configuration at the stage where a resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the first insulating film 218 is formed.
  • FIG. 12 shows a cross-sectional configuration at a stage where the first insulating film 218 formed on the bottom surface 402 of the hole 214 according to this embodiment is removed.
  • the substrate 210 covers one surface on which the plurality of holes 214 are formed with the first insulating film 218 and exposes the polysilicon layer 216 formed on the bottom surface 402 of the plurality of holes 214.
  • the exposed polysilicon layer 216 is anodized in a hydrogen fluoride (HF) aqueous solution. Then, the polysilicon layer 216 is oxidized by an RTO (Rapid-Thermal-Oxidation) method, an annealing step by an HWA (High-Pressure Water vapor) method, and an SCRD (Super Critical Rinse and Dry) method. As a result, nanocrystalline silicon with few defects is formed.
  • RTO Rapid-Thermal-Oxidation
  • HWA High-Pressure Water vapor
  • SCRD Super Critical Rinse and Dry
  • FIG. 13 shows a cross-sectional configuration at a stage where the electron emission portion 300 is formed on the bottom surface 402 of the hole 214 according to the present embodiment.
  • the second electrode part 320 is formed (S420).
  • a resist 400 that covers the hole 214 is formed on the substrate 210.
  • the resist 400 may be a film resist, and an opening is formed by a patterning process at a position where the connection portion 322 is formed on one surface of the first insulating film 218 opposite to the substrate 210.
  • FIG. 14 shows a cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 on which an electron emission unit 300 according to the present embodiment is formed.
  • a metal to be the connection portion 322 is formed on one surface of the first insulating film 218, and the metal other than the region where the connection portion 322 is formed is removed together with the resist 400 by lift-off.
  • the metal to be formed may include chromium and gold, and may be formed in the order of chromium and gold by vapor deposition.
  • the film thickness of gold may be about 300 nm.
  • FIG. 15 shows a cross-sectional configuration at a stage where the connection portion 322 is formed on one surface of the first insulating film 218 according to the present embodiment on the side opposite to the substrate 210.
  • the metal to be formed may include titanium and gold, and may be formed in the order of titanium and gold by vapor deposition.
  • the thickness of titanium may be about 1 nm
  • the thickness of gold may be about 9 nm.
  • FIG. 16 shows a cross-sectional configuration at a stage where the second electrode part 320 is formed on the surface of the substrate 210 according to the present embodiment on which the electron emission part 300 is formed.
  • the substrate 210 has the polymer layer 410 formed on the surface on which the second electrode unit 320 is formed.
  • the polymer layer 410 may be photosensitive polyimide.
  • one surface opposite to the substrate 210 is processed flat by a CMP (Chemical Mechanical Polishing) method or the like.
  • FIG. 17 shows a cross-sectional configuration at a stage where the polymer layer 410 is formed on the surface of the substrate 210 where the second electrode part 320 is formed according to the present embodiment.
  • the polymer layer 410 is irradiated with light and patterned to form an opening 412, and a part of the second electrode part 320 is etched away from the opening 412. Accordingly, the second electrode unit 320 is electrically separated for each electron emission unit 300. Instead, the second electrode unit 320 may be electrically separated for each of the plurality of second electrode units 320 corresponding to the block to which the same offset bias is applied.
  • FIG. 18 illustrates a cross-sectional configuration at a stage where a part of the second electrode unit 320 according to the present embodiment is etched and the second electrode unit 320 is electrically separated.
  • the second insulating film 330 is formed on the surface of the substrate 210 on which the polymer layer 410 is formed.
  • the second insulating film 330 may be a silicon oxide film formed by a CVD method or the like.
  • FIG. 19 shows a cross-sectional configuration at a stage where the second insulating film 330 is formed on the surface of the substrate 210 according to the present embodiment on which the polymer layer 410 is formed.
  • the second insulating film 330 is polished by a CMP method or the like to expose the polymer layer 410.
  • the thickness of the polymer layer 410 at this stage is the electrode interval between the first electrode part 310 and the second electrode part 320.
  • FIG. 20 shows a cross-sectional configuration at a stage where the second insulating film 330 according to the present embodiment is polished and the polymer layer 410 is exposed.
  • a metal film 420 is formed on the surface of the substrate 210 where the polymer layer 410 is exposed.
  • the metal film 420 forms part of the first electrode unit 310.
  • the metal film 420 contains nickel and may be formed by a sputtering method or the like.
  • FIG. 21 shows a cross-sectional configuration of a stage where a metal film 420 is formed on the surface of the substrate 210 according to the present embodiment where the polymer layer 410 is exposed.
  • a resist 400 is formed on the surface of the substrate 210 on which the metal film 420 is formed.
  • the resist 400 is formed by patterning into a region where the first electrode portion 310 to be formed later is electrically separated and a region where an opening 312 for outputting an electron beam is formed.
  • FIG. 22 shows a cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the metal film 420 is formed.
  • a material substantially the same as that of the metal film 420 is further formed on the surface of the substrate 210 on which the metal film 420 is formed.
  • nickel is further formed to form the metal film 420.
  • the metal film 420 may be formed to a thickness that covers the resist 400.
  • the metal film 420 may be formed by plating.
  • FIG. 23 shows a cross-sectional configuration at a stage where a metal film 420 is further formed on the surface of the substrate 210 according to the present embodiment on which the metal film 420 is formed.
  • the metal film 420 of the substrate 210 is polished by a CMP method or the like, and the resist 400 is exposed.
  • the resist is removed and the metal film 420 is etched. The etching removes the metal film 420 in the region where the resist 400 is formed.
  • the first electrode part 310 having the opening 312 is formed on the substrate 210.
  • the first electrode part 310 is formed by being electrically separated for each electron emission part 300.
  • the first electrode unit 310 may be electrically separated for each of the plurality of first electrode units 310 corresponding to the block to which the same offset bias is applied.
  • FIG. 24 shows a cross-sectional configuration at a stage where the first electrode part 310 having the opening 312 is formed on the surface of the substrate 210 where the electron emission part 300 is formed according to the present embodiment.
  • the holding substrate 440 is bonded to the plurality of first electrode portions 310 side of the substrate 210 (S440).
  • the substrate 210 is bonded to the holding substrate 440 with the adhesive layer 430 on the surface on which the first electrode portion 310 is formed.
  • the adhesive layer 430 may be an adhesive.
  • the holding substrate 440 is bonded via the separation layer 432.
  • the separation layer 432 is formed of a material that is melted by the separation liquid, and the holding substrate 440 is separated using the separation liquid.
  • the separation layer 432 may be formed of germanium or the like that is melted by a separation liquid containing hydrogen peroxide.
  • the holding substrate 440 may be a plate-like substrate that makes it easy for an operator to handle the substrate 210 when processing the back surface of the substrate 210 opposite to the surface on which the first electrode portion 310 is formed. That is, the substrate 210 is held from the holding substrate 440 side.
  • the holding substrate 440 is formed of glass, silicon, or the like.
  • the holding substrate 440 may have a plurality of groove portions 442.
  • the plurality of groove portions 442 have a function of penetrating the separation liquid into the bonding surface when the holding substrate 440 is separated using a separation liquid or the like.
  • FIG. 25 shows a cross-sectional configuration at a stage where the holding substrate 440 is bonded to the surface of the substrate 210 according to the present embodiment on which the electron emission portion 300 is formed.
  • the isolation part 340 is formed (S450).
  • the isolation part 340 is formed by cutting between the plurality of electron emission parts 300 from the side opposite to the plurality of first electrode parts 310 in the substrate 210 and filling with an insulator.
  • a resist 400 is formed on the back surface of the substrate 210.
  • FIG. 26 shows a cross-sectional configuration at a stage where the resist 400 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed.
  • the substrate 210 is etched by reactive ion etching or the like from the opening of the formed resist 400.
  • the etching may be performed using the second insulating film 330 as an etching stop layer.
  • a groove portion 450 is formed by the etching, and the plurality of electron emission portions 300 are separated by the groove portion 450.
  • the resist 400 is removed after performing the etching.
  • FIG. 27 shows a cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 formed in the substrate 210 according to the present embodiment.
  • the groove portion 450 is filled with an insulating material, and an isolation portion 340 is formed.
  • the insulator may be a polymer or the like.
  • the isolation part 340 is formed in a lattice shape with a pitch of approximately 100 ⁇ m in the XY direction when viewed from the back side of the substrate 210, and electrically insulates the electron emission part 300.
  • FIG. 28 shows a cross-sectional configuration at a stage where the isolation part 340 is formed on the substrate 210 according to the present embodiment.
  • the third electrode part 350 is formed (S460).
  • the third electrode unit 350 is formed by lift-off after forming a resist on the back surface of the substrate 210 and forming a metal film.
  • the metal to be formed may include chromium and gold, and may be formed in the order of chromium and gold by vapor deposition.
  • the film thickness of gold may be about 300 nm.
  • FIG. 29 shows a cross-sectional configuration at a stage where the third electrode portion 350 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed.
  • the holding substrate 440 is removed from the substrate 210 (S470).
  • the electronic circuit part 220 is bonded to the back side of the substrate 210.
  • the substrate 210 is bonded by electrically connecting the electrode part 222 of the electronic circuit part 220 and the corresponding third electrode part 350.
  • the electrode part 222 includes aluminum, chromium, gold, and indium, and is formed by vapor-depositing chromium, gold, and indium in this order on an aluminum electrode pad.
  • FIG. 30 shows a cross-sectional configuration at a stage where the substrate 210 and the electronic circuit unit 220 according to the present embodiment are bonded together.
  • FIG. 31 shows a cross-sectional configuration at a stage where the holding substrate 440 is removed from the substrate 210 according to the present embodiment.
  • the electrodes are wired (S480).
  • the polymer layer 410 may be removed by oxygen plasma or the like. Instead of this, acetic acid mixed with ozone may be removed. Through such a process, the electron beam generation source 212 is formed.
  • connection part of the first electrode part 310, the connection part 322 of the second electrode part 320, and the connection part 224 of the electronic circuit part 220 are wired to the electrode part 204 of the voltage supply part 202, respectively.
  • the wiring may be wire bonding or the like.
  • bonding pads may be further formed by plating or the like for the respective connection portions and electrode portions.
  • the electron beam generator 200 is formed by the above manufacturing flow.
  • FIG. 32 shows a cross-sectional configuration at a stage where the electron beam generator 200 according to the present embodiment is formed.

Abstract

An electron beam generating apparatus (200) of the present invention is provided with: a substrate (210), in which a plurality of holes (214) are provided; a plurality of electron emitting sections (300), which are respectively provided on the bottom surfaces of the holes, and which emit electrons; and a plurality of first electrode sections (310), which are provided corresponding to the electron emitting sections, respectively, accelerate the electrons emitted from the corresponding electron emitting sections, and output, as electron beams, the electrons from the holes that are respectively provided with electron emitting sections. Consequently, throughput of an electron beam exposure apparatus can be improved.

Description

電子ビーム発生装置、電子ビーム照射装置、マルチ電子ビーム照射装置、電子ビーム露光装置、電子ビーム照射方法、および製造方法Electron beam generation apparatus, electron beam irradiation apparatus, multi-electron beam irradiation apparatus, electron beam exposure apparatus, electron beam irradiation method, and manufacturing method
 本発明は、電子ビーム発生装置、電子ビーム照射装置、マルチ電子ビーム照射装置、電子ビーム露光装置、電子ビーム照射方法、および製造方法に関する。 The present invention relates to an electron beam generating apparatus, an electron beam irradiation apparatus, a multi-electron beam irradiation apparatus, an electron beam exposure apparatus, an electron beam irradiation method, and a manufacturing method.
 従来、微細パターンが設けられる半導体集積回路は、電子ビーム露光装置を用い、パターンデータに応じて電子ビームを半導体基板に直接描画して当該微細パターンを形成していた(例えば、特許文献1および2参照)。また、複数の電子ビームを発生させて、当該複数の電子ビームを試料に照射する電子ビーム露光装置は、電子ビーム発生源から発生させた電子ビームをコリメータレンズ等で面積ビームに成型した後に、マスク、レンズ、およびブランキングアレイ等を介して複数のビームを発生させていた(例えば、特許文献1および2参照)。
 特許文献1 特開2007-329220号公報
 特許文献2 特開平9-245708号公報
 非特許文献1 P.N.Minh, L.T.T.Tuyen, T.Ono, H.Mimura, K.Yokoo and M.Esashi : Carbon nanotube on a Si tip for electron field emitter, Jpn. J. Appl. Phys., 41 Part2, 12A (2002), L1409-L1411
 非特許文献2 P.N.Minh, L.T.T.Tuyen, T.Ono, H.Miyashita, Y.Suzuki, H.Mimura and M.Esashi : Selective growth of carbon nanotubes on Si microfabricated tips and application for electron field emitters, J. Vac. Sci. Technol. B 21, 4, (2003), 1705-1709
 非特許文献3 P.N.Minh, T.Ono, N.Sato, H.Mimura and M.Esashi : Microelectron field emitter array with focus lenses for multielectron beam lithography based on silicon on insulator wafer, J.Vac.Sci.Technol., B22, 3 (2004) 1273-1276
 非特許文献4 J.H.Bae, P.N.Minh, T.Ono and M.Esashi : Schottky emitter using boron-doped diamond, J.Vac.Sci.Technol., B22, 3 (2004) 1349-1352
 非特許文献5 C.-H.Tsai, T.Ono and M.Esashi : Fabrication of diamond Schottky emitter array by using electrophoresis pre-treatment and hot-filament chemical vapor deposition, diamond and related materials, 16 (2007) 1398-1402
Conventionally, in a semiconductor integrated circuit provided with a fine pattern, an electron beam exposure apparatus is used, and the electron beam is directly drawn on a semiconductor substrate in accordance with pattern data to form the fine pattern (for example, Patent Documents 1 and 2). reference). An electron beam exposure apparatus that generates a plurality of electron beams and irradiates the sample with the plurality of electron beams is formed into an area beam by a collimator lens or the like after the electron beam generated from the electron beam generation source is formed into a mask. A plurality of beams are generated through lenses, blanking arrays, and the like (see, for example, Patent Documents 1 and 2).
Patent Document 1 Japanese Patent Application Laid-Open No. 2007-329220 Patent Document 2 Japanese Patent Application Laid-Open No. 9-245708 Non-Patent Document 1 PNMinh, LTTTuyen, T. Ono, H. Mimura, K. Yokoo and M. Esashi: Carbon nanotube on a Si tip for electron field emitter, Jpn. J. Appl. Phys., 41 Part2, 12A (2002), L1409-L1411
Non-Patent Document 2 PNMinh, LTTTuyen, T. Ono, H. Miyashita, Y. Suzuki, H. Mimura and M. Esashi: Selective growth of carbon nanotubes on Si microfabricated tips and application for electron field emitters, J. Vac. Sci. Technol. B 21, 4, (2003), 1705-1709
Non-Patent Document 3 PNMinh, T. Ono, N. Sato, H. Mimura and M. Esashi: Microelectron field emitter array with focus lenses for multielectron beam lithography based on silicon on insulator wafer, J. Vac. Sci. Technol., B22 , 3 (2004) 1273-1276
Non-Patent Document 4 JHBae, PNMinh, T. Ono and M. Esashi: Schottky emitter using boron-doped diamond, J. Vac. Sci. Technol., B22, 3 (2004) 1349-1352
Non-Patent Document 5 C.-H. Tsai, T. Ono and M. Esashi: Fabrication of diamond Schottky emitter array by using electrophoresis pre-treatment and hot-filament chemical vapor deposition, diamond and related materials, 16 (2007) 1398- 1402
 しかしながら、描画するパターンの微細化と、半導体ウェハの大口径化が進むことにより、電子ビーム露光装置のスループットが低下していた。例えば、描画すべき画素数が30年程度で2万倍程度に増加し、1枚の半導体ウェハを10時間以上かけて描画する場合も生じていた。また、このような電子ビーム露光装置は、電子ビーム照射装置が複雑な光学系を収容して大きくなってしまい、露光装置そのものが巨大になっていた。また、試料に比べて、電子ビーム照射装置が大きいので、複数の電子ビーム照射装置を搭載して一の試料に並行して複数の描画パターンを照射することが困難であった。 However, the throughput of the electron beam exposure apparatus has decreased due to the miniaturization of the pattern to be drawn and the increase in the diameter of the semiconductor wafer. For example, the number of pixels to be drawn has increased to about 20,000 times in about 30 years, and there has been a case where one semiconductor wafer is drawn over 10 hours or more. Further, in such an electron beam exposure apparatus, the electron beam irradiation apparatus accommodates a complicated optical system and becomes large, and the exposure apparatus itself is huge. In addition, since the electron beam irradiation apparatus is larger than the sample, it is difficult to mount a plurality of electron beam irradiation apparatuses and irradiate a plurality of drawing patterns in parallel with one sample.
 本発明の第1の態様によると、複数の穴部が設けられた基板と、複数の穴部のそれぞれの底面に設けられ、電子を放出する複数の電子放出部と、複数の電子放出部のそれぞれに対応して設けられ、対応する電子放出部が放出した電子を加速して電子放出部が設けられた穴部から電子ビームとして出力する複数の第1電極部と、を備える電子ビーム発生装置、電子ビーム照射装置、電子ビーム露光装置、および製造方法を提供する。 According to the first aspect of the present invention, a substrate provided with a plurality of hole portions, a plurality of electron emission portions that are provided on the bottom surfaces of the plurality of hole portions, emit electrons, and a plurality of electron emission portions are provided. An electron beam generator comprising: a plurality of first electrode portions that are provided in correspondence with each other and that accelerate electrons emitted from the corresponding electron emission portions and output the electrons as holes from the holes provided with the electron emission portions. An electron beam irradiation apparatus, an electron beam exposure apparatus, and a manufacturing method are provided.
 本発明の第2の態様によると、複数の電子ビームを出力する電子ビーム照射装置であって、複数の電子放出部を有し、複数の電子放出部のそれぞれから放出される電子を加速して集束させ、複数の電子ビームとして出力する面電子ビーム源と、面電子ビーム源から出力される複数の電子ビームによる描画パターンを予め定められた倍率で対象物に照射する電子レンズと、を備える電子ビーム照射装置を提供する。 According to a second aspect of the present invention, there is provided an electron beam irradiation apparatus that outputs a plurality of electron beams, having a plurality of electron emission portions, and accelerating electrons emitted from each of the plurality of electron emission portions. An electron comprising: a surface electron beam source that is focused and output as a plurality of electron beams; and an electron lens that irradiates an object with a drawing pattern by the plurality of electron beams output from the surface electron beam source at a predetermined magnification. A beam irradiation apparatus is provided.
 なお、上記の発明の概要は、本発明の必要な特徴の全てを列挙したものではなく、これらの特徴群のサブコンビネーションもまた、発明となりうる。 Note that the above summary of the invention does not enumerate all the necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.
本実施形態に係る電子ビーム露光装置1000の構成例を半導体ウェハ10と共に示す。A configuration example of an electron beam exposure apparatus 1000 according to the present embodiment is shown together with a semiconductor wafer 10. 本実施形態に係る電子ビーム照射装置100の構成例を半導体ウェハ10と共に示す。A configuration example of an electron beam irradiation apparatus 100 according to the present embodiment is shown together with a semiconductor wafer 10. 本実施形態に係る電子ビーム発生装置200に形成される電子ビーム発生源212の構成例を示す。The structural example of the electron beam generation source 212 formed in the electron beam generator 200 which concerns on this embodiment is shown. 本実施形態に係る電子ビーム露光装置1000の変形例を半導体ウェハ10と共に示す。A modification of the electron beam exposure apparatus 1000 according to this embodiment is shown together with the semiconductor wafer 10. 本実施形態に係る電子ビーム発生装置200を形成する製造フローの一例を示す。An example of the manufacturing flow which forms the electron beam generator 200 which concerns on this embodiment is shown. 本実施形態に係る基板210にレジスト400が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 according to the present embodiment is shown. 本実施形態に係るレジスト400の開口部から基板210がエッチングされた段階の断面構成を示す。A cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 according to the present embodiment is shown. 本実施形態に係る基板210に穴部214が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a hole 214 is formed in the substrate 210 according to the present embodiment is shown. 本実施形態に係る穴部214の底面402に、ポリシリコン層216が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a polysilicon layer 216 is formed on the bottom surface 402 of the hole 214 according to the present embodiment is shown. 本実施形態に係る基板210のポリシリコン層216が形成された面に、第1絶縁膜218が形成された段階の断面構成を示す。A cross-sectional configuration at the stage where the first insulating film 218 is formed on the surface of the substrate 210 on which the polysilicon layer 216 is formed is shown. 本実施形態に係る基板210の第1絶縁膜218が形成された面に、レジスト400が形成された段階の断面構成を示す。A cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the first insulating film 218 is formed is shown. 本実施形態に係る穴部214の底面402に成膜された第1絶縁膜218が除去された段階の断面構成を示す。A cross-sectional configuration at a stage where the first insulating film 218 formed on the bottom surface 402 of the hole 214 according to the present embodiment has been removed is shown. 本実施形態に係る穴部214の底面402に電子放出部300が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the electron emission unit 300 is formed on the bottom surface 402 of the hole 214 according to the present embodiment is shown. 本実施形態に係る電子放出部300が形成された基板210に、レジスト400が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 on which an electron emission unit 300 according to the present embodiment is formed is shown. 本実施形態に係る第1絶縁膜218の基板210とは反対側の一方の面に、接続部322が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a connection portion 322 is formed on one surface of the first insulating film 218 according to this embodiment on the opposite side to the substrate 210 is shown. 本実施形態に係る基板210の電子放出部300が形成された面に、第2電極部320が形成された段階の断面構成を示す。A cross-sectional configuration at the stage where the second electrode unit 320 is formed on the surface of the substrate 210 according to the present embodiment on which the electron emission unit 300 is formed is shown. 本実施形態に係る基板210の第2電極部320が形成された面に、高分子層410が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the polymer layer 410 is formed on the surface on which the second electrode part 320 of the substrate 210 according to the present embodiment is formed is shown. 本実施形態に係る第2電極部320の一部がエッチングされて、当該第2電極部320が電気的に分離された段階の断面構成を示す。A cross-sectional configuration at a stage where a part of the second electrode part 320 according to the present embodiment is etched and the second electrode part 320 is electrically separated is shown. 本実施形態に係る基板210の高分子層410が形成された面に、第2絶縁膜330が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the second insulating film 330 is formed on the surface of the substrate 210 on which the polymer layer 410 is formed according to the present embodiment is shown. 本実施形態に係る第2絶縁膜330を研磨し、高分子層410を露出させた段階の断面構成を示す。A cross-sectional configuration at a stage where the second insulating film 330 according to the present embodiment is polished and the polymer layer 410 is exposed is shown. 本実施形態に係る基板210の高分子層410が露出された面に、金属膜420が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the metal film 420 is formed on the surface of the substrate 210 where the polymer layer 410 is exposed according to the present embodiment is shown. 本実施形態に係る基板210の金属膜420が形成された面に、レジスト400が形成された段階の断面構成を示す。A cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 on which the metal film 420 is formed according to the present embodiment is shown. 本実施形態に係る基板210の金属膜420が形成された面に、更に金属膜420が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the metal film 420 is further formed on the surface of the substrate 210 on which the metal film 420 is formed according to the present embodiment is shown. 本実施形態に係る基板210の電子放出部300が形成された面に、開口部312を有する第1電極部310が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the first electrode part 310 having the opening 312 is formed on the surface of the substrate 210 where the electron emission part 300 is formed according to the present embodiment is shown. 本実施形態に係る基板210の電子放出部300が形成された面に、保持用基板440が接着された段階の断面構成を示す。A cross-sectional configuration at a stage where the holding substrate 440 is bonded to the surface of the substrate 210 according to the present embodiment on which the electron emission unit 300 is formed is shown. 本実施形態に係る基板210の第1電極部310が形成された面と反対側の裏面に、レジスト400が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where a resist 400 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed is shown. 本実施形態に係る基板210に形成されたレジスト400の開口部から、基板210がエッチングされた段階の断面構成を示す。A cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 formed in the substrate 210 according to the present embodiment is shown. 本実施形態に係る基板210に、アイソレーション部340が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the isolation part 340 is formed on the substrate 210 according to the present embodiment is shown. 本実施形態に係る基板210の第1電極部310が形成された面と反対側の裏面に、第3電極部350が形成された段階の断面構成を示す。A cross-sectional configuration at a stage where the third electrode portion 350 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed is shown. 本実施形態に係る基板210と電子回路部220とが張り合わされた段階の断面構成を示す。A cross-sectional configuration at a stage where the substrate 210 and the electronic circuit unit 220 according to the present embodiment are bonded together is shown. 本実施形態に係る基板210から保持用基板440を取り外した段階の断面構成を示す。A cross-sectional configuration at a stage where the holding substrate 440 is removed from the substrate 210 according to the present embodiment is shown. 本実施形態に係る電子ビーム発生装置200が形成された段階の断面構成を示す。The cross-sectional structure of the stage in which the electron beam generator 200 which concerns on this embodiment was formed is shown.
 以下、発明の実施の形態を通じて本発明の(一)側面を説明するが、以下の実施形態は請求の範囲にかかる発明を限定するものではなく、また実施形態の中で説明されている特徴の組み合わせの全てが発明の解決手段に必須であるとは限らない。 Hereinafter, the (1) aspect of the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the scope of claims, and the features described in the embodiments are as follows. Not all combinations are essential for the solution of the invention.
 図1は、本実施形態に係る電子ビーム露光装置1000の構成例を半導体ウェハ10と共に示す。電子ビーム露光装置1000は、複数の電子ビームを照射する電子ビーム照射装置100を有し、当該電子ビーム照射装置100を用いて半導体ウェハ10に微細パターンを描画する。 FIG. 1 shows a configuration example of an electron beam exposure apparatus 1000 according to this embodiment together with a semiconductor wafer 10. The electron beam exposure apparatus 1000 includes an electron beam irradiation apparatus 100 that irradiates a plurality of electron beams, and draws a fine pattern on the semiconductor wafer 10 using the electron beam irradiation apparatus 100.
 ここで半導体ウェハ10は、シリコン、シリコンカーバイド、ゲルマニウム、ガリウムヒ素、窒化ガリウム、ガリウム燐、またはインジウム燐等の半導体材料の結晶を加工して形成された板状の基板でよい。電子ビーム露光装置1000は、電子ビーム照射装置100と、ステージ部110と、記憶部120と、制御部130と、通信部140と、計算機部150とを備える。 Here, the semiconductor wafer 10 may be a plate-like substrate formed by processing a crystal of a semiconductor material such as silicon, silicon carbide, germanium, gallium arsenide, gallium nitride, gallium phosphide, or indium phosphide. The electron beam exposure apparatus 1000 includes an electron beam irradiation apparatus 100, a stage unit 110, a storage unit 120, a control unit 130, a communication unit 140, and a computer unit 150.
 電子ビーム照射装置100は、複数の電子ビームを照射する電子カラムである。電子ビーム照射装置100は、半導体ウェハ10の表面に複数の電子ビームを照射して予め定められた描画パターンを描画する。電子ビーム照射装置100の詳細は後に説明する。 The electron beam irradiation apparatus 100 is an electron column that irradiates a plurality of electron beams. The electron beam irradiation apparatus 100 draws a predetermined drawing pattern by irradiating the surface of the semiconductor wafer 10 with a plurality of electron beams. Details of the electron beam irradiation apparatus 100 will be described later.
 ステージ部110は、電子ビームを照射する対象物を載置する。図中において、当該対象物を半導体ウェハ10とした例を示す。ステージ部110は、載置した半導体ウェハ10を水平方向に移動させ、電子ビーム照射装置100によって半導体ウェハ10の一方の面に予め定められた微細パターンを予め定められた位置に描画させる。 The stage unit 110 places an object to be irradiated with an electron beam. In the figure, an example in which the object is a semiconductor wafer 10 is shown. The stage unit 110 moves the mounted semiconductor wafer 10 in the horizontal direction, and causes the electron beam irradiation apparatus 100 to draw a predetermined fine pattern on one surface of the semiconductor wafer 10 at a predetermined position.
 ステージ部110は、XYステージを有してよい。また、ステージ部110は、θステージを有してよい。また、ステージ部110は、水平位置を調整するチルトステージを更に有してよい。また、ステージ部110は、半導体ウェハ10を垂直方向に移動させ、半導体ウェハ10および電子ビーム照射装置100の間の距離を調節するZステージを更に有してよい。 The stage unit 110 may have an XY stage. The stage unit 110 may have a θ stage. The stage unit 110 may further include a tilt stage that adjusts the horizontal position. The stage unit 110 may further include a Z stage that moves the semiconductor wafer 10 in the vertical direction and adjusts the distance between the semiconductor wafer 10 and the electron beam irradiation apparatus 100.
 記憶部120は、電子ビーム照射装置100が描画する描画パターン情報を記憶する。ここで、描画パターン情報は、半導体ウェハ10の一方の面上の位置情報、および電子ビームを照射するか否かの情報等でよい。記憶部120は、予め定められた描画パターン情報を予め記憶してよい。 The storage unit 120 stores drawing pattern information drawn by the electron beam irradiation apparatus 100. Here, the drawing pattern information may be position information on one surface of the semiconductor wafer 10, information on whether or not to irradiate an electron beam, and the like. The storage unit 120 may store predetermined drawing pattern information in advance.
 制御部130は、電子ビーム照射装置100および記憶部120にそれぞれ接続され、記憶部120に記憶された描画パターン情報に応じて、電子ビーム照射装置100に複数の電子ビームを出力させる制御信号を送信する。また、制御部130は、ステージ部110にそれぞれ接続され、記憶部120に記憶された描画パターン情報に応じて、ステージ部110を移動させる制御信号を送信してよい。また、制御部130は、通信部140を介して受け取った指示信号に応じて、電子ビーム照射装置100および/またはステージ部110に制御信号を送信してよい。 The control unit 130 is connected to the electron beam irradiation apparatus 100 and the storage unit 120, and transmits a control signal for causing the electron beam irradiation apparatus 100 to output a plurality of electron beams according to the drawing pattern information stored in the storage unit 120. To do. The control unit 130 may be connected to the stage unit 110 and may transmit a control signal for moving the stage unit 110 according to the drawing pattern information stored in the storage unit 120. In addition, the control unit 130 may transmit a control signal to the electron beam irradiation apparatus 100 and / or the stage unit 110 according to the instruction signal received via the communication unit 140.
 通信部140は、制御部130と計算機部150とを接続する。通信部140は、汎用または専用のインターフェイスを有して、制御部130と計算機部150とを接続して通信させてよい。通信部140は、Ethernet(登録商標)、USB、Serial RapidIO等の汎用の高速シリアルインターフェースまたはパラレルインターフェースを用いてよい。また、通信部140は、無線で制御部130と計算機部150とを接続してよい。 The communication unit 140 connects the control unit 130 and the computer unit 150. The communication unit 140 may have a general-purpose or dedicated interface, and the control unit 130 and the computer unit 150 may be connected to communicate with each other. The communication unit 140 may use a general-purpose high-speed serial interface such as Ethernet (registered trademark), USB, Serial RapidIO, or a parallel interface. The communication unit 140 may connect the control unit 130 and the computer unit 150 wirelessly.
 計算機部150は、制御部130に電子ビーム照射装置100および/またはステージ部110を動作させる指示信号を送信する。計算機部150は、電子ビーム露光装置1000を動作させる動作プログラムを実行して、当該動作プログラムに応じて指示信号を送信してよい。また、計算機部150は、ユーザの指示を入力させる入力デバイスを有し、ユーザの指示に応じて指示信号を送信してよい。計算機部150は、パーソナルコンピュータまたはサーバマシンでよい。 The computer unit 150 transmits an instruction signal for operating the electron beam irradiation apparatus 100 and / or the stage unit 110 to the control unit 130. The computer unit 150 may execute an operation program for operating the electron beam exposure apparatus 1000 and transmit an instruction signal according to the operation program. The computer unit 150 may have an input device for inputting a user instruction, and may transmit an instruction signal according to the user instruction. The computer unit 150 may be a personal computer or a server machine.
 図2は、本実施形態に係る電子ビーム照射装置100の構成例を半導体ウェハ10と共に示す。図2は、電子ビーム照射装置100の縦断面の構成例を示す。電子ビーム照射装置100は、電子ビーム発生装置200と、加速電極230と、電子レンズ240とを備える。 FIG. 2 shows a configuration example of the electron beam irradiation apparatus 100 according to the present embodiment together with the semiconductor wafer 10. FIG. 2 shows a configuration example of a vertical cross section of the electron beam irradiation apparatus 100. The electron beam irradiation apparatus 100 includes an electron beam generation apparatus 200, an acceleration electrode 230, and an electron lens 240.
 電子ビーム発生装置200は、制御信号に応じて、複数の電子ビームを発生させる。電子ビーム発生装置200は、一例として、面電子ビーム源である。電子ビーム発生装置200は、基板210と、電子回路部220とを有する。 The electron beam generator 200 generates a plurality of electron beams according to the control signal. The electron beam generator 200 is a planar electron beam source as an example. The electron beam generator 200 includes a substrate 210 and an electronic circuit unit 220.
 基板210は、複数の穴部が設けられる。当該複数の穴部は、基板210の一方の面にマトリクス状に形成されてよい。基板210は、当該穴部に複数の電子ビーム発生源212が形成される。電子ビーム発生源212の詳細は後に説明する。基板210は、シリコン等の半導体結晶でよい。 The substrate 210 is provided with a plurality of holes. The plurality of holes may be formed in a matrix on one surface of the substrate 210. In the substrate 210, a plurality of electron beam generation sources 212 are formed in the hole. Details of the electron beam generation source 212 will be described later. The substrate 210 may be a semiconductor crystal such as silicon.
 電子回路部220は、基板210の他方の面に形成され、複数の電子ビーム発生源212から電子ビームを出力させる。電子回路部220は、複数の電子ビーム発生源212のそれぞれを駆動する駆動電圧を供給する回路が形成される。電子回路部220は、制御部130から制御信号を受け取り、描画パターン情報に応じて、複数の電子ビーム発生源212から電子ビームを出力させる。 The electronic circuit unit 220 is formed on the other surface of the substrate 210 and outputs an electron beam from a plurality of electron beam generation sources 212. In the electronic circuit unit 220, a circuit for supplying a driving voltage for driving each of the plurality of electron beam generation sources 212 is formed. The electronic circuit unit 220 receives a control signal from the control unit 130 and outputs an electron beam from the plurality of electron beam generation sources 212 according to the drawing pattern information.
 電子回路部220の一方の面は、基板210と張り合わされる。電子回路部220は、シリコン等の半導体基板で形成されてよい。電子回路部220は、電子ビーム発生装置200が駆動して温度が上昇しても基板210または電子回路部220に撓みまたは剥がれ等が生じない程度に、基板210の熱膨張係数とほぼ同じか、同程度の熱膨張係数を有する材料で形成されてよい。 One surface of the electronic circuit unit 220 is bonded to the substrate 210. The electronic circuit unit 220 may be formed of a semiconductor substrate such as silicon. The electronic circuit unit 220 is substantially the same as the thermal expansion coefficient of the substrate 210 to such an extent that the substrate 210 or the electronic circuit unit 220 is not bent or peeled even when the temperature is increased by the driving of the electron beam generator 200. It may be formed of a material having a similar coefficient of thermal expansion.
 加速電極230は、電子ビーム発生装置200の電子ビームを出力する側に備わり、電子ビーム発生装置200の電子ビームを出力させる電極よりも高い電圧が印加され、当該電子ビームを加速する。加速電極230は、複数の電子ビーム発生源212にそれぞれ対応する複数の貫通孔が形成され、複数の電子ビームをそれぞれ通過させる。加速電極230は、複数の貫通孔をマトリクス状に配列してよい。加速電極230は、一定の電圧が印加され、一例として、略0Vが印加される。 The acceleration electrode 230 is provided on the side of the electron beam generator 200 that outputs the electron beam, and a voltage higher than that of the electrode that outputs the electron beam of the electron beam generator 200 is applied to accelerate the electron beam. The acceleration electrode 230 is formed with a plurality of through holes respectively corresponding to the plurality of electron beam generation sources 212, and allows the plurality of electron beams to pass therethrough. The acceleration electrode 230 may have a plurality of through holes arranged in a matrix. A constant voltage is applied to the acceleration electrode 230, and as an example, approximately 0V is applied.
 電子レンズ240は、電子ビーム発生装置200から出力される複数の電子ビームによる描画パターンを予め定められた倍率で対象物である半導体ウェハ10に照射する。例えば、電子レンズ240は、複数の電子ビームが描画する描画パターンを1/100以下に縮小する。電子レンズ240は、コイル部242と、レンズ部244と、減速部246とを有する。 The electron lens 240 irradiates the semiconductor wafer 10 as an object with a drawing pattern by a plurality of electron beams output from the electron beam generator 200 at a predetermined magnification. For example, the electron lens 240 reduces the drawing pattern drawn by a plurality of electron beams to 1/100 or less. The electron lens 240 has a coil part 242, a lens part 244, and a speed reducing part 246.
 コイル部242は、複数の電子ビームのXY方向の偏向を制御する。即ち、コイル部242は、半導体ウェハ10の電子ビームが照射される表面における当該電子ビームのビーム形状を制御する。コイル部242は、電子ビーム照射装置100のX軸またはY軸と、半導体ウェハ10の表面上のX軸またはY軸との対応を補正するローテーションコイルでよい。また、コイル部242は、半導体ウェハ10の表面上のビーム径のXおよびY方向の振幅を補正してもよい。 The coil unit 242 controls the deflection of the plurality of electron beams in the XY directions. That is, the coil unit 242 controls the beam shape of the electron beam on the surface of the semiconductor wafer 10 where the electron beam is irradiated. The coil unit 242 may be a rotation coil that corrects the correspondence between the X axis or Y axis of the electron beam irradiation apparatus 100 and the X axis or Y axis on the surface of the semiconductor wafer 10. The coil unit 242 may correct the amplitudes of the beam diameter on the surface of the semiconductor wafer 10 in the X and Y directions.
 レンズ部244は、半導体ウェハ10の表面上に複数の電子ビームを結像させる。レンズ部244は、テレセントリックレンズ系を構成してよく、電子ビーム発生装置200の対物レンズとして機能する。 The lens unit 244 images a plurality of electron beams on the surface of the semiconductor wafer 10. The lens unit 244 may constitute a telecentric lens system and functions as an objective lens of the electron beam generator 200.
 減速部246は、減速電圧が印加され、当該減速電圧に応じた減速電界を複数の電子ビームに印加する。減速部246は、複数の電子ビームを減速させて、予め定められたエネルギーの電子ビームを対象物である半導体ウェハ10に照射する。減速部246は、半導体ウェハ10への入射電圧を、加速電極230の加速電圧と当該減速電圧との差分とする。 The deceleration unit 246 receives a deceleration voltage and applies a deceleration electric field corresponding to the deceleration voltage to the plurality of electron beams. The decelerating unit 246 decelerates a plurality of electron beams and irradiates the semiconductor wafer 10 as an object with an electron beam having a predetermined energy. The deceleration unit 246 sets the incident voltage to the semiconductor wafer 10 as a difference between the acceleration voltage of the acceleration electrode 230 and the deceleration voltage.
 図3は、本実施形態に係る電子ビーム発生装置200に形成される電子ビーム発生源212の構成例を示す。電子ビーム発生装置200は、複数の電子放出部を有し、複数の電子放出部のそれぞれから放出される電子を加速して集束させ、複数の電子ビームとして出力する。電子ビーム発生装置200は、図2で説明したように、基板210と、電子回路部220とを有する。また、電子ビーム発生装置200は、各部に駆動電圧を供給する電圧供給部202を有してよい。 FIG. 3 shows a configuration example of the electron beam generation source 212 formed in the electron beam generation apparatus 200 according to the present embodiment. The electron beam generator 200 has a plurality of electron emission units, accelerates and focuses the electrons emitted from each of the plurality of electron emission units, and outputs the electrons as a plurality of electron beams. As described with reference to FIG. 2, the electron beam generator 200 includes the substrate 210 and the electronic circuit unit 220. Further, the electron beam generator 200 may include a voltage supply unit 202 that supplies a drive voltage to each unit.
 電圧供給部202は、複数の電極部204を含み、それぞれの電極部204に接続される接続先にそれぞれ駆動電圧を供給する。複数の電極部204は、ワイヤボンディング等で複数の接続先にそれぞれ接続されてよい。電圧供給部202は、電子回路部220の基板210側とは反対側の面に設けられる。 The voltage supply unit 202 includes a plurality of electrode units 204 and supplies drive voltages to connection destinations connected to the respective electrode units 204. The plurality of electrode portions 204 may be connected to a plurality of connection destinations by wire bonding or the like. The voltage supply unit 202 is provided on the surface of the electronic circuit unit 220 opposite to the substrate 210 side.
 ここで、本実施例で説明する電極部は、ニッケル、金、クロム、チタン、アルミニウム、タングステン、パラジウム、ロジウム、白金、銅、ルテニウム、インジウム、イリジウム、オスミウム、および/またはモリブデンを含んでよい。また、当該電極部は、これらの材料を含む2以上の材料の合金であってよい。 Here, the electrode part described in this embodiment may include nickel, gold, chromium, titanium, aluminum, tungsten, palladium, rhodium, platinum, copper, ruthenium, indium, iridium, osmium, and / or molybdenum. Further, the electrode portion may be an alloy of two or more materials including these materials.
 基板210は、複数の穴部214と、アイソレーション部340と、第3電極部350とを有する。複数の穴部214のそれぞれの底面は、凹面状に形成される。また、複数の穴部214のそれぞれの底面は、球面状または放物面状に形成されてよい。複数の穴部214のそれぞれは、円筒形上に形成され、電子ビームを発生させる電子ビーム発生源212が形成される。電子ビーム発生源212は、ポリシリコン層216と、第1絶縁膜218と、電子放出部300と、第1電極部310と、第2電極部320と、第2絶縁膜330とを含む。 The substrate 210 has a plurality of holes 214, an isolation part 340, and a third electrode part 350. Each bottom surface of the plurality of hole portions 214 is formed in a concave shape. Moreover, each bottom surface of the plurality of hole portions 214 may be formed in a spherical shape or a parabolic shape. Each of the plurality of holes 214 is formed in a cylindrical shape, and an electron beam generation source 212 that generates an electron beam is formed. The electron beam generation source 212 includes a polysilicon layer 216, a first insulating film 218, an electron emission unit 300, a first electrode unit 310, a second electrode unit 320, and a second insulating film 330.
 ポリシリコン層216は、基板210の複数の穴部214が形成された面に形成される。ポリシリコン層216のうち、穴部214の底部に形成された一部は、陽極活性されることでナノ結晶化されて電子放出部300となる。第1絶縁膜218は、基板210のポリシリコン層216が形成された面に形成される。第1絶縁膜218は、CVD法等によって成膜されるSiN膜でよい。 The polysilicon layer 216 is formed on the surface of the substrate 210 where the plurality of holes 214 are formed. A part of the polysilicon layer 216 formed at the bottom of the hole 214 is nano-crystallized by anodic activation to form the electron emission unit 300. The first insulating film 218 is formed on the surface of the substrate 210 where the polysilicon layer 216 is formed. The first insulating film 218 may be a SiN film formed by a CVD method or the like.
 電子放出部300は、複数の穴部214のそれぞれの底面に設けられ、電子を放出する。複数の電子放出部300は、マトリクス状に配列され、駆動電圧に応じて電子をそれぞれ放出する。また、電子放出部300は、ナノ結晶を有する。例えば、電子放出部300は、ナノ結晶シリコンで形成される。ナノ結晶シリコンは、電子トンネル障壁として機能する表面酸化膜を形成し、当該ナノ結晶シリコンが複数並ぶことにより、電子トンネル障壁を接続した列が形成される。 The electron emission unit 300 is provided on the bottom surface of each of the plurality of holes 214 and emits electrons. The plurality of electron emission units 300 are arranged in a matrix and emit electrons according to the driving voltage. Moreover, the electron emission part 300 has a nanocrystal. For example, the electron emission unit 300 is formed of nanocrystalline silicon. Nanocrystalline silicon forms a surface oxide film that functions as an electron tunneling barrier, and a plurality of nanocrystalline silicons are arranged to form a column connecting the electron tunneling barriers.
 このような電子トンネル障壁の列は、当該障壁に電圧を印加することで、当該障壁を通過させる電子を、例えば数個の単位といった極微量な単位で制御することができる。したがって、電子放出部300は、ナノ結晶を有することで、電子の放出量を精密に、かつ、再現性よく制御することができる。 In such an array of electron tunnel barriers, a voltage is applied to the barriers, whereby electrons passing through the barriers can be controlled in a very small unit such as several units. Therefore, the electron emission part 300 can control the amount of electron emission precisely and with good reproducibility by having a nanocrystal.
 また、電子放出部300は、このようなナノ結晶シリコンが複数並ぶナノワイヤで形成される場合、電子を出力する面に対して当該ナノワイヤが垂直に形成されずに、結晶方位に依存して出力面の法線に対して傾くことがある。この場合、電子放出部300は、出力面の法線方向とは異なる方向に電子を出力させることがある。この場合、電子放出部300は、出力面の法線に対して異なる方向のトンネル確率の分布と、当該方向にナノワイヤが電子を放出する分布との掛け算で、電子放出量が定まる。 Further, when the electron emission unit 300 is formed of nanowires in which a plurality of such nanocrystalline silicons are arranged, the nanowires are not formed perpendicular to the surface that outputs electrons, and the output surface depends on the crystal orientation. May be tilted with respect to the normal. In this case, the electron emission unit 300 may output electrons in a direction different from the normal direction of the output surface. In this case, the electron emission unit 300 determines the electron emission amount by multiplying the distribution of the tunnel probability in a different direction with respect to the normal of the output surface and the distribution in which the nanowire emits electrons in the direction.
 電子放出部300は、穴部214の底面を凹面形状にすることで、当該底面を平坦にした場合の電子放出量に比べてより多くの電子を電子ビームとして出力させることができる。例えば、電子放出部300は、電子を放出する分布がより高い方向および/またはトンネル確率の分布がより高い方向を、電子ビームを出力する方向に向けて形成することで、底面を平坦にした場合の電子放出量に比べてより多くの電子を電子ビームとして出力させることができる。一例として、穴部214の底面の形状は、複数の電子放出部300の電子を放出する方向と、当該方向の電子のトンネル確率との乗算がより大きくなる方向を、第1電極部310の中心に向ける。 The electron emission unit 300 can output more electrons as an electron beam by making the bottom surface of the hole 214 concave to have an electron emission amount when the bottom surface is flattened. For example, in the case where the bottom surface of the electron emission unit 300 is made flat by forming the direction in which the electron emission distribution is higher and / or the direction in which the tunnel probability distribution is higher in the direction in which the electron beam is output. More electrons can be output as an electron beam than the amount of emitted electrons. As an example, the shape of the bottom surface of the hole 214 is such that the direction in which the electrons are emitted from the plurality of electron emitting units 300 and the tunnel probability of the electrons in the directions are more multiplied is the center of the first electrode unit 310. Turn to.
 電子放出部300は、ナノ結晶に代えて、放出する電子をトンネリングさせる絶縁膜を有してよい。このような絶縁膜は、放出する電子の量をトンネルする確率によって調整することができるので、当該絶縁膜の材質、膜厚および絶縁膜に印加する電圧によって、電子の放出量を制御することができる。 The electron emission unit 300 may include an insulating film that tunnels emitted electrons instead of the nanocrystal. Since such an insulating film can be adjusted by the probability of tunneling the amount of electrons emitted, the amount of electrons emitted can be controlled by the material, film thickness, and voltage applied to the insulating film. it can.
 第1電極部310は、複数の電子放出部300のそれぞれに対応して設けられ、対応する電子放出部300が放出した電子を加速して電子放出部300が設けられた穴部214から電子ビームとして出力する。複数の第1電極部310のそれぞれは、開口部312を有し、基板210の複数の穴部214が設けられる一方の面に板状に形成され、対応する穴部214との電位差によって開口部312から電子ビームを集束させて出力させる。開口部312は、第1電極部310および/または電子放出部300の中心近辺に形成される。開口部312は、円形の貫通孔でよい。 The first electrode unit 310 is provided corresponding to each of the plurality of electron emission units 300, accelerates electrons emitted from the corresponding electron emission unit 300, and emits an electron beam from the hole 214 provided with the electron emission unit 300. Output as. Each of the plurality of first electrode portions 310 has an opening 312, is formed in a plate shape on one surface of the substrate 210 where the plurality of holes 214 are provided, and the openings are opened by a potential difference with the corresponding hole 214. The electron beam is focused from 312 and output. The opening 312 is formed near the center of the first electrode unit 310 and / or the electron emission unit 300. The opening 312 may be a circular through hole.
 図中において、第1電極部310aは、電子放出部300aに対応して設けられ、電子放出部300aが放出する電子を加速して開口部312aから電子ビームとして出力させる例を示す。同様に、第1電極部310bは、電子放出部300bに対応して設けられ、電子放出部300bが放出する電子を加速する。 In the drawing, the first electrode part 310a is provided corresponding to the electron emission part 300a, and shows an example in which electrons emitted from the electron emission part 300a are accelerated and output as an electron beam from the opening 312a. Similarly, the 1st electrode part 310b is provided corresponding to the electron emission part 300b, and accelerates the electron which the electron emission part 300b discharge | releases.
 第1電極部310は、基板210の外部に備わる電極等と電気的に接続され、駆動電圧が印加される接続部を有してよい。当該接続部は、第1電極部の一部にメッキ等で導電性物質が更に形成された電極部でよい。接続部は、ワイヤボンディング等によって外部の電極と接続されてよい。 The first electrode unit 310 may be electrically connected to an electrode or the like provided outside the substrate 210 and may have a connection unit to which a driving voltage is applied. The connection part may be an electrode part in which a conductive material is further formed on a part of the first electrode part by plating or the like. The connecting portion may be connected to an external electrode by wire bonding or the like.
 第2電極部320は、複数の穴部214のそれぞれに設けられ、穴部214の底面および側壁を覆う導電性物質で形成される。第2電極部320は、電子放出部300から放出された電子を、第1電極部310との電位差によって開口部312から電子ビームとして出力させる。ここで、第2電極部320は、電子放出部300から放出される電子を穴部214に通過させる程度に薄く形成される。 The second electrode portion 320 is provided in each of the plurality of hole portions 214 and is formed of a conductive material that covers the bottom surface and the side wall of the hole portion 214. The second electrode unit 320 causes the electrons emitted from the electron emission unit 300 to be output as an electron beam from the opening 312 due to a potential difference from the first electrode unit 310. Here, the second electrode part 320 is formed thin enough to allow the electrons emitted from the electron emission part 300 to pass through the hole 214.
 ここで、第1電極部310および第2電極部320は、これら電極間の電位差が数十から数百Vとなる駆動電圧がそれぞれ印加されてよい。好ましくは、第1電極部310および第2電極部320は、電位差が百数十Vとなる駆動電圧がそれぞれ印加される。一例として、第1電極部310および第2電極部320は、電位差が150Vとなる駆動電圧がそれぞれ印加される。第2電極部320は、接続部322を含む。 Here, the first electrode unit 310 and the second electrode unit 320 may be applied with a driving voltage at which the potential difference between these electrodes is several tens to several hundreds V, respectively. Preferably, the first electrode unit 310 and the second electrode unit 320 are each applied with a driving voltage having a potential difference of several hundreds of volts. As an example, the first electrode part 310 and the second electrode part 320 are each applied with a driving voltage with a potential difference of 150V. The second electrode part 320 includes a connection part 322.
 接続部322は、第2電極部320のうちで厚さがより厚く形成される電極部であって、基板210の外部に備わる電極等と電気的に接続され、駆動電圧が印加される。接続部322は、第2電極部の一部にメッキ等で導電性物質が更に形成された電極部でよい。接続部322は、ワイヤボンディング等によって外部の電極と接続されてよい。 The connection part 322 is an electrode part formed to be thicker in the second electrode part 320, and is electrically connected to an electrode provided outside the substrate 210, and applied with a drive voltage. The connection part 322 may be an electrode part in which a conductive material is further formed on a part of the second electrode part by plating or the like. The connection portion 322 may be connected to an external electrode by wire bonding or the like.
 第2絶縁膜330は、基板210と第1電極部310との間に形成され、第1電極部310を支持しつつ、第1電極部310と第2電極部320とを電気的に絶縁する。第2絶縁膜330は、CVD法等によって成膜される酸化シリコン膜でよい。 The second insulating film 330 is formed between the substrate 210 and the first electrode unit 310 and electrically insulates the first electrode unit 310 and the second electrode unit 320 while supporting the first electrode unit 310. . The second insulating film 330 may be a silicon oxide film formed by a CVD method or the like.
 以上の電子ビーム発生源212は、電子放出部300が放出する電子に、第1電極部310と第2電極部320にそれぞれ印加される駆動電圧によって生じる電界を印加することによって開口部312から電子ビームを発生させる。ここで、電子ビーム発生源212は、穴部214のそれぞれの底面が凹面状、球面状、または放物面状に形成されることで、電子放出部300の電子を放出する面もまた凹面状、球面状、または放物面状に形成される。 The electron beam generation source 212 described above applies electrons from the opening 312 by applying an electric field generated by a driving voltage applied to each of the first electrode unit 310 and the second electrode unit 320 to electrons emitted from the electron emission unit 300. Generate a beam. Here, in the electron beam generation source 212, each bottom surface of the hole 214 is formed in a concave shape, a spherical shape, or a parabolic shape, so that the electron emission surface of the electron emission unit 300 is also concave. , Spherical or parabolic.
 これによって、電子ビーム発生源212は、電子放出部300が電子を放出する方向を開口部312の方向に合わせて、当該開口部312に集束させやすくすることができる。即ち、電子ビーム発生源212は、開口部312に集束させる電子の数を増加させることができ、発生する電子ビームの密度を高めることができる。 Thereby, the electron beam generation source 212 can easily focus the electron emitting unit 300 on the opening 312 by aligning the direction in which the electron emitting unit 300 emits electrons with the direction of the opening 312. That is, the electron beam generation source 212 can increase the number of electrons focused on the opening 312 and increase the density of the generated electron beam.
 電子ビーム発生源212は、発生させた電子ビームを後段の電子レンズ240によって半導体ウェハ10に照射させる。ここで、電子レンズ240は、光学レンズ等と同様に電子ビームの結像にボケやゆがみ等を生じさせる収差を有する場合がある。例えば、電子レンズ240は、結像させる電子ビームに対して、ビームの中央近傍を走行する電子に比べてビームの外側近傍を走行する電子の焦点位置を短くさせる場合がある。 The electron beam generation source 212 irradiates the semiconductor wafer 10 with the generated electron beam through the subsequent electron lens 240. Here, the electron lens 240 may have an aberration that causes blurring, distortion, or the like in the image formation of the electron beam, similar to an optical lens or the like. For example, the electron lens 240 may shorten the focal position of electrons traveling near the outside of the beam compared to electrons traveling near the center of the electron beam to be imaged.
 そこで、電子ビーム発生源212は、電子放出部300の電子を放出する面を凹面状、球面状、または放物面状に形成させて電子ビームの密度を高めつつ、当該収差を補正してよい。ここで、電子ビーム発生源212が穴部214の底面を平坦にした場合、電子放出部300の電子の放出面の法線方向が開口部312近傍にある領域から出力される電子は、電子ビームの中央に集束されやすい。 Therefore, the electron beam generation source 212 may correct the aberration while increasing the electron beam density by forming the electron emitting surface of the electron emitting unit 300 into a concave shape, a spherical shape, or a parabolic shape. . Here, when the electron beam generation source 212 flattens the bottom surface of the hole 214, the electrons output from the region where the normal direction of the electron emission surface of the electron emission unit 300 is in the vicinity of the opening 312 are It is easy to focus on the center.
 そこで電子放出部300は、電子の放出面を開口部312に向けつつ、当該領域である放出面の中央近傍の領域と開口部312との間の距離よりも、放出面の縁側近傍の領域と開口部312との間の距離を、より短くする面を形成する。即ち、電子ビームの外側に集束されやすい電子がより速く開口部312に到達するように放出面を形成することで、当該電子の焦点距離を長くさせる。これは、電子放出部300の放出面の中心点により近い部分から放出される電子の層流を、当該中心点により近い位置に集中させて負の収差を発生させることに相当する。 Therefore, the electron emission unit 300 is directed to a region near the edge side of the emission surface with a distance between the region near the center of the emission surface and the opening 312 while directing the electron emission surface toward the opening 312. A surface for shortening the distance from the opening 312 is formed. That is, by forming the emission surface so that electrons that are likely to be focused outside the electron beam reach the opening 312 more quickly, the focal length of the electrons is increased. This is equivalent to concentrating the laminar flow of electrons emitted from a portion closer to the center point of the emission surface of the electron emission unit 300 to a position closer to the center point to generate negative aberration.
 これによって、電子ビーム発生源212は、発生させる電子ビームの中央近傍を走行する電子に比べて、電ビームの外側近傍を走行する電子の焦点距離を長くすることができる。例えば、電子ビーム発生源212は、電子ビームの光軸の中心から離れるに応じて電子ビームの焦点距離を長くして、電子ビームの照射方向に対する垂直方向の断面において、同心円状に焦点距離の分布を持たせる。このように、電子ビーム発生源212は、電子レンズ240の収差に対応させた放出面を形成することで、電子レンズ240の収差を補正することができる。 Thereby, the electron beam generation source 212 can increase the focal length of electrons traveling near the outside of the electron beam as compared with electrons traveling near the center of the generated electron beam. For example, the electron beam generating source 212 increases the focal length of the electron beam as it moves away from the center of the optical axis of the electron beam, and concentrically distributes the focal length in a cross section perpendicular to the irradiation direction of the electron beam. To have. As described above, the electron beam generation source 212 can correct the aberration of the electron lens 240 by forming an emission surface corresponding to the aberration of the electron lens 240.
 ここで、電子放出部300の放出面の縁側近傍の領域は、中央近傍の領域に比べて電子ビーム発生源212の外部に近いので、外部電界の影響を受けやすい。即ち、放出面の縁側近傍の領域から出力される電子は、放出面の法線から傾いた方向に出力されやすく焦点距離が長くなりやすい。このように、電子ビーム発生源212は、外部電界に依存して出力させる電子ビームに焦点距離の分布を形成させるので、このような分布に応じて、電子放出部300の放出面の形状を調整して半導体ウェハ10に結像する電子ビームの収差を補正してよい。 Here, the region in the vicinity of the edge side of the emission surface of the electron emission unit 300 is closer to the outside of the electron beam generation source 212 than the region in the vicinity of the center. That is, electrons output from the region near the edge side of the emission surface are likely to be output in a direction inclined from the normal line of the emission surface, and the focal length tends to be long. As described above, the electron beam generation source 212 forms a distribution of focal lengths in the electron beam to be output depending on the external electric field. Therefore, the shape of the emission surface of the electron emission unit 300 is adjusted according to such distribution. Then, the aberration of the electron beam imaged on the semiconductor wafer 10 may be corrected.
 ここで、第2電極部320は、穴部214の底面および側壁を覆って円筒形状の電極を形成し、当該穴部214を同電位に保つ。これによって、第2電極部320の側壁部は、電子放出部300から放出された電子の速度を保持して開口部312近傍に集束させつつ、上記の外部電界の影響を低減させることができる。 Here, the second electrode portion 320 forms a cylindrical electrode covering the bottom surface and the side wall of the hole portion 214, and keeps the hole portion 214 at the same potential. As a result, the influence of the external electric field can be reduced while the side wall portion of the second electrode unit 320 maintains the velocity of the electrons emitted from the electron emission unit 300 and focuses the electrons near the opening 312.
 アイソレーション部340は、絶縁物質が充填されて形成される。アイソレーション部340は、複数の電子ビーム発生源212のそれぞれの周囲を囲むように形成され、電子ビーム発生源212間を電気的に分離する。一例として、アイソレーション部340は、格子状に形成された溝にポリマー等を充填させて形成される。 The isolation part 340 is formed by being filled with an insulating material. The isolation unit 340 is formed so as to surround each of the plurality of electron beam generation sources 212 and electrically isolates the electron beam generation sources 212 from each other. As an example, the isolation part 340 is formed by filling a groove or the like formed in a lattice shape with a polymer or the like.
 第3電極部350は、基板210の複数の穴部214が形成される面とは反対側の面に、複数の電子放出部300のそれぞれに対応して形成される。第3電極部350は、複数の電子放出部300から電子をそれぞれ放出させる駆動電圧がそれぞれ印加される。第3電極部350は、電子回路部220と電気的に接続される。 The third electrode portion 350 is formed on the surface of the substrate 210 opposite to the surface on which the plurality of hole portions 214 are formed, corresponding to each of the plurality of electron emission portions 300. The third electrode unit 350 is applied with a driving voltage for emitting electrons from the plurality of electron emission units 300. The third electrode unit 350 is electrically connected to the electronic circuit unit 220.
 電子回路部220は、基板210の他方の面に形成され、複数の電子放出部300から電子を放出させる駆動電圧を、複数の電子放出部300のそれぞれに対して個別に供給する。電子回路部220は、半導体基板に形成され、当該半導体基板の一方の面は、基板210と張り合わされてよい。 The electronic circuit unit 220 is formed on the other surface of the substrate 210 and individually supplies a driving voltage for emitting electrons from the plurality of electron emission units 300 to each of the plurality of electron emission units 300. The electronic circuit unit 220 may be formed on a semiconductor substrate, and one surface of the semiconductor substrate may be attached to the substrate 210.
 ここで電子回路部220は、基板210に形成される第3電極部350に対応する複数の電極部222を有し、当該電極部222が対応する第3電極部350と電気的に接続されつつ基板210と張り合わされ、当該電極部222を介して駆動電圧を供給する。電極部222は、例えば、100μmピッチ程度で基板210に形成される第3電極部350に対応させるべく、当該第3電極部350と同程度のピッチで形成される。 Here, the electronic circuit unit 220 includes a plurality of electrode units 222 corresponding to the third electrode unit 350 formed on the substrate 210, and the electrode unit 222 is electrically connected to the corresponding third electrode unit 350. A driving voltage is supplied to the substrate 210 through the electrode portion 222. For example, the electrode portions 222 are formed at the same pitch as the third electrode portions 350 so as to correspond to the third electrode portions 350 formed on the substrate 210 at a pitch of about 100 μm.
 電子回路部220は、外部に備わる電極等と電気的に接続され、駆動電圧および電源電圧等が印加される複数の接続部224を有してよい。当該接続部224は、ワイヤボンディング等によって外部の電極と接続されてよい。 The electronic circuit unit 220 may include a plurality of connection units 224 that are electrically connected to external electrodes and the like and to which a drive voltage, a power supply voltage, and the like are applied. The connection portion 224 may be connected to an external electrode by wire bonding or the like.
 電子回路部220は、複数の電子放出部300のそれぞれの配置に応じて、異なるオフセットバイアスを更に印加してよい。複数の電子放出部300は、それぞれ個別に駆動電圧を印加されて電子をそれぞれ放出し、対応する複数の電子ビーム発生源212は、複数の電子ビームを発生させる。複数の電子ビーム発生源212は、発生させた複数の電子ビームを後段の電子レンズ240によって結像させて、半導体ウェハ10に描画パターンを照射させる。 The electronic circuit unit 220 may further apply different offset biases depending on the arrangement of the plurality of electron emission units 300. The plurality of electron emission units 300 are individually applied with a driving voltage to emit electrons, and the corresponding plurality of electron beam generation sources 212 generate a plurality of electron beams. The plurality of electron beam generation sources 212 causes the generated plurality of electron beams to be imaged by the subsequent electron lens 240 to irradiate the semiconductor wafer 10 with a drawing pattern.
 ここで、電子レンズ240等の光学系は、レンズの中央近傍を通る電子ビームと、レンズの外縁近傍を通る電子ビームとで僅かに焦点位置に差を与え、複数の電子ビームによる描画像にボケやゆがみ等を生じさせる場合がある。例えば、電子レンズ240は、レンズの外縁近傍を通る電子ビームに対して、レンズの中央近傍を通る電子ビームに比べて焦点位置を短くさせる場合がある。 Here, the optical system such as the electron lens 240 gives a slight difference in focal position between the electron beam passing near the center of the lens and the electron beam passing near the outer edge of the lens, and blurs the drawn image by a plurality of electron beams. May cause distortion and the like. For example, the electron lens 240 may shorten the focal position with respect to an electron beam passing near the outer edge of the lens as compared with an electron beam passing near the center of the lens.
 そこで、電子回路部220は、電子レンズ240の中央近傍を通る電子ビームを発生させる電子ビーム発生源212に比べて、電子レンズ240の外縁近傍を通る電子ビームを発生させる電子ビーム発生源212に対して、高いオフセット電圧を供給する。これによって、電子回路部220は、電子レンズ240の外縁近傍を通る電子ビームの出力速度を増加させて焦点距離を長くして発生させ、電子レンズ240によって短くなる焦点位置と相殺させて補正することができる。 Therefore, the electronic circuit unit 220 has an electron beam generation source 212 that generates an electron beam that passes through the vicinity of the outer edge of the electron lens 240 as compared with an electron beam generation source 212 that generates an electron beam that passes through the vicinity of the center of the electron lens 240. Supply a high offset voltage. Accordingly, the electronic circuit unit 220 increases the output speed of the electron beam passing through the vicinity of the outer edge of the electronic lens 240 to increase the focal length, and cancels the focal position shortened by the electronic lens 240 for correction. Can do.
 ここで、複数の電子放出部300は、それぞれの配置に応じて複数のブロックに分配され、電子回路部220は、当該ブロック毎にオフセットバイアスを印加してよい。例えば、複数の電子放出部300のうち、基板210の一方の面上において中央近辺に配置され、電子レンズ240の中央近傍を通る電子ビームとなる電子を放出する複数の電子放出部300は、同一のブロックに分配される。また、その他の電子放出部300は、中央のブロックを中心に、略同心円状に1以上のブロックに分配されてよい。 Here, the plurality of electron emission units 300 may be distributed to a plurality of blocks according to their arrangement, and the electronic circuit unit 220 may apply an offset bias for each block. For example, among the plurality of electron emission units 300, the plurality of electron emission units 300 that are arranged in the vicinity of the center on one surface of the substrate 210 and emit an electron beam that passes through the vicinity of the center of the electron lens 240 are the same. Distributed to the blocks. Further, the other electron emission units 300 may be distributed to one or more blocks in a substantially concentric manner around the central block.
 このように、複数の電子放出部300は、電子レンズ240の中央近傍を通る電子ビームを出力させる電子放出部300を中心ブロックとして、電子レンズ240の外縁方向に同心円状に1以上に分割された環状領域に対応する電子放出部300を、他のブロックとして分配される。電子回路部220は、当該ブロック毎に異なるオフセットバイアスを印加することで、電子レンズ240の中央近傍を通る電子ビームを中心に、同心円状に分割された領域毎に電子ビームの焦点位置を調節することができ、効率的に描画パターンの結像を補正することができる。 As described above, the plurality of electron emission units 300 are divided into one or more concentric circles in the outer edge direction of the electron lens 240 with the electron emission unit 300 that outputs an electron beam passing near the center of the electron lens 240 as a central block. The electron emission unit 300 corresponding to the annular region is distributed as another block. The electronic circuit unit 220 adjusts the focal position of the electron beam for each of the regions divided concentrically around the electron beam passing near the center of the electron lens 240 by applying a different offset bias for each block. It is possible to correct the image formation of the drawing pattern efficiently.
 電子回路部220は、第1電極部および第2電極部に、数十kVの負電圧を印加する。一例として、電子回路部220は、同心円の中央に分配された電子放出部300に対応する第2電極部に-20kVを、対応する第1電極部に-20kV+150Vを印加する。 The electronic circuit unit 220 applies a negative voltage of several tens of kV to the first electrode unit and the second electrode unit. As an example, the electronic circuit unit 220 applies −20 kV to the second electrode unit corresponding to the electron emission unit 300 distributed in the center of the concentric circle, and −20 kV + 150 V to the corresponding first electrode unit.
 この場合、電子ビーム発生源212は、150Vの電位差によって生じる電界を電子放出部300から放出する電子に印加して電子ビームを発生させ、発生した電子ビームを加速電極230との略20kVの電位差で加速させる。また、電子回路部220は、中央のブロックから外縁に向けてnブロック異なる毎に、対応する第2電極部に-20kV+nVを、対応する第1電極部に-20kV+150V+nVを印加する。このように、電子回路部220は、ブロックが異なる毎に駆動電圧を1V程度変化させて、電子ビームの加速電界をブロック毎に微調整してよい。 In this case, the electron beam generation source 212 generates an electron beam by applying an electric field generated by a potential difference of 150 V to electrons emitted from the electron emission unit 300, and the generated electron beam is generated with a potential difference of about 20 kV from the acceleration electrode 230. Accelerate. The electronic circuit unit 220 applies −20 kV + nV to the corresponding second electrode unit and −20 kV + 150 V + nV to the corresponding first electrode unit every n blocks different from the central block toward the outer edge. As described above, the electronic circuit unit 220 may finely adjust the acceleration electric field of the electron beam for each block by changing the driving voltage by about 1 V every time the block is different.
 以上の本実施例に係る電子ビーム発生装置200は、複数の電子ビーム発生源212を有し、当該複数の電子ビーム発生源212をそれぞれ個別に駆動して複数の電子ビームを出力させることができる。これによって、電子ビーム発生装置200を備える電子ビーム照射装置100は、複数の電子ビームによって予め定められた描画パターンを対象物に照射することができる。 The electron beam generating apparatus 200 according to this embodiment has a plurality of electron beam generation sources 212 and can individually drive the plurality of electron beam generation sources 212 to output a plurality of electron beams. . As a result, the electron beam irradiation apparatus 100 including the electron beam generation apparatus 200 can irradiate the object with a predetermined drawing pattern using a plurality of electron beams.
 ここで、電子ビーム発生源212は、半導体基板に形成された複数の穴部214にそれぞれ形成される。したがって、複数の電子ビーム発生源212は、半導体製造プロセスによって基板210に一体となって形成することができる。即ち例えば、電子ビーム発生源212は、基板210の1cm×1cmの面積に、100×100個のマトリクス状に配列されて形成される。このように、電子ビーム発生源212は、100μm程度のピッチのマトリクス状に形成することで、電子レンズ240によって1μm以下程度のピッチの描画パターンを対象物に照射することができる。 Here, the electron beam generation source 212 is formed in each of a plurality of holes 214 formed in the semiconductor substrate. Therefore, the plurality of electron beam generation sources 212 can be formed integrally with the substrate 210 by a semiconductor manufacturing process. That is, for example, the electron beam generation sources 212 are formed in an area of 1 cm × 1 cm of the substrate 210 and arranged in a matrix of 100 × 100. As described above, the electron beam generation source 212 is formed in a matrix shape with a pitch of about 100 μm, so that the object can be irradiated with a drawing pattern with a pitch of about 1 μm or less by the electron lens 240.
 このように、電子ビーム発生装置200は、複数の電極部と一体に形成され、小面積、かつ、高密度に形成させた複数の電子ビーム発生源212を備えることができる。したがって、電子ビーム照射装置100は、装置の大きさを小型にしつつ、10000程度の電子ビームを照射することができる。 As described above, the electron beam generating apparatus 200 can include a plurality of electron beam generating sources 212 formed integrally with a plurality of electrode portions and formed with a small area and a high density. Therefore, the electron beam irradiation apparatus 100 can irradiate about 10,000 electron beams while reducing the size of the apparatus.
 以上の本実施例において、電子ビーム発生装置200および電子ビーム照射装置100は、電子ビーム露光装置1000に用いられる例を説明した。これに代えて、電子ビーム発生装置200および電子ビーム照射装置100は、電子ビームを用いる装置に備わってよく、電子顕微鏡、電子線マイクロアナライザ、ブラウン管、送信管、撮像管、真空管、加工装置、加熱装置、または滅菌装置等に用いられてもよい。 In the above embodiment, the example in which the electron beam generator 200 and the electron beam irradiation apparatus 100 are used in the electron beam exposure apparatus 1000 has been described. Instead, the electron beam generating apparatus 200 and the electron beam irradiation apparatus 100 may be provided in an apparatus using an electron beam, such as an electron microscope, an electron beam microanalyzer, a cathode ray tube, a transmission tube, an imaging tube, a vacuum tube, a processing device, a heating device. You may use for an apparatus or a sterilizer.
 図4は、本実施形態に係る電子ビーム露光装置1000の変形例を半導体ウェハ10と共に示す。本変形例の電子ビーム露光装置1000において、図1に示された本実施形態に係る電子ビーム露光装置1000の動作と略同一のものには同一の符号を付け、説明を省略する。電子ビーム露光装置1000は、複数の電子ビームを照射する電子ビーム照射装置100を複数有し、複数の電子ビームを照射して、描画パターン情報に応じた描画パターンを対象物である半導体ウェハ10に描画する。 FIG. 4 shows a modification of the electron beam exposure apparatus 1000 according to the present embodiment together with the semiconductor wafer 10. In the electron beam exposure apparatus 1000 of this modification, the same reference numerals are given to the same operations as those of the electron beam exposure apparatus 1000 according to the present embodiment shown in FIG. The electron beam exposure apparatus 1000 includes a plurality of electron beam irradiation apparatuses 100 that irradiate a plurality of electron beams. The electron beam exposure apparatus 1000 irradiates a plurality of electron beams and applies a drawing pattern corresponding to the drawing pattern information to the semiconductor wafer 10 that is an object. draw.
 電子ビーム照射装置100は、電子ビーム露光装置1000に2以上備わる。図中において、電子ビーム照射装置100は、水平方向の断面積が半導体ウェハ10の表面積よりも小さく形成され、電子ビーム露光装置1000に複数備わる例を示す。複数の電子ビーム照射装置100は、半導体ウェハ10の表面にそれぞれ複数の電子ビームを照射して予め定められた描画パターンを描画する。複数の電子ビーム照射装置100は、それぞれの描画を並行して実行してよい。電子ビーム照射装置100の詳細は既に図2で説明した。 The electron beam irradiation apparatus 100 includes two or more electron beam exposure apparatuses 1000. In the drawing, an electron beam irradiation apparatus 100 shows an example in which a horizontal sectional area is formed smaller than the surface area of the semiconductor wafer 10 and a plurality of electron beam exposure apparatuses 1000 are provided. The plurality of electron beam irradiation apparatuses 100 draw a predetermined drawing pattern by irradiating the surface of the semiconductor wafer 10 with a plurality of electron beams, respectively. The plurality of electron beam irradiation apparatuses 100 may execute each drawing in parallel. Details of the electron beam irradiation apparatus 100 have already been described with reference to FIG.
 ステージ部110は、載置した半導体ウェハ10を水平方向に移動させ、複数の電子ビーム照射装置100によって半導体ウェハ10の一方の面に予め定められた微細パターンを予め定められた位置に描画させる。記憶部120は、複数の電子ビーム照射装置100が描画する描画パターン情報を記憶する。制御部130は、複数の電子ビーム照射装置100にそれぞれ接続され、記憶部120に記憶された描画パターン情報に応じて、複数の電子ビーム照射装置のそれぞれに複数の電子ビームを出力させる制御信号を送信する。 The stage unit 110 moves the mounted semiconductor wafer 10 in the horizontal direction, and draws a predetermined fine pattern on one surface of the semiconductor wafer 10 at a predetermined position by the plurality of electron beam irradiation apparatuses 100. The storage unit 120 stores drawing pattern information drawn by the plurality of electron beam irradiation apparatuses 100. The control unit 130 is connected to each of the plurality of electron beam irradiation apparatuses 100, and receives a control signal for causing each of the plurality of electron beam irradiation apparatuses to output a plurality of electron beams according to the drawing pattern information stored in the storage unit 120. Send.
 このように、複数の電子ビーム発生源212が基板210に一体となって形成される電子ビーム発生装置200を用いることで、電子ビーム照射装置100を小型化することができ、電子ビーム露光装置1000は、複数の電子ビーム照射装置100を搭載することができる。2以上の電子ビーム照射装置100を備える電子ビーム露光装置1000は、半導体ウェハ10に、2以上の描画パターンを並行して照射することができ、搭載する電子ビーム照射装置100の数に応じてスループットを向上させることができる。 As described above, by using the electron beam generating apparatus 200 in which the plurality of electron beam generating sources 212 are formed integrally with the substrate 210, the electron beam irradiation apparatus 100 can be downsized, and the electron beam exposure apparatus 1000 can be downsized. A plurality of electron beam irradiation apparatuses 100 can be mounted. An electron beam exposure apparatus 1000 including two or more electron beam irradiation apparatuses 100 can irradiate the semiconductor wafer 10 with two or more drawing patterns in parallel, and has a throughput according to the number of electron beam irradiation apparatuses 100 to be mounted. Can be improved.
 図5は、本実施形態に係る電子ビーム発生装置200を形成する製造フローの一例を示す。また、図6から図32は、本実施形態に係る電子ビーム発生装置200が形成される過程における基板210の断面を示す。ここで、本実施例は、基板210をシリコン基板として説明する。 FIG. 5 shows an example of a manufacturing flow for forming the electron beam generator 200 according to the present embodiment. 6 to 32 show cross sections of the substrate 210 in the process of forming the electron beam generator 200 according to the present embodiment. Here, in this embodiment, the substrate 210 will be described as a silicon substrate.
 まず、基板210に複数の穴部214を形成する(S400)。穴部214は、フォトリソグラフィによって形成される。図6は、基板210にレジスト400が形成された段階の断面構成を示す。基板210は、形成する穴部214の形状に応じて、レジスト400が形成される。レジスト400は、感光性のレジストでよく、露光されることで溶解または固化して、フォトマスク等によって予め定められた領域のレジスト400が除去される。 First, a plurality of holes 214 are formed in the substrate 210 (S400). The hole 214 is formed by photolithography. FIG. 6 shows a cross-sectional configuration at a stage where the resist 400 is formed on the substrate 210. A resist 400 is formed on the substrate 210 in accordance with the shape of the hole 214 to be formed. The resist 400 may be a photosensitive resist, and is dissolved or solidified by exposure, and the resist 400 in a predetermined region is removed by a photomask or the like.
 次に、基板210は、レジスト400が除去された領域がエッチングされる。基板210は、ドライエッチングでエッチングされてよく、一例として、反応性イオンエッチングでエッチングされる。図7は、本実施形態に係るレジスト400の開口部から基板210がエッチングされた段階の断面構成を示す。 Next, the substrate 210 is etched in the region where the resist 400 is removed. The substrate 210 may be etched by dry etching. For example, the substrate 210 is etched by reactive ion etching. FIG. 7 shows a cross-sectional configuration when the substrate 210 is etched from the opening of the resist 400 according to the present embodiment.
 このようなドライエッチングのエッチングレートは、レジストの開口部の面積に応じて変化し、例えば、当該開口部の面積が大きくなるにつれてエッチングレートも大きくなる。したがって、図中の例のように、基板210は、レジスト400の開口部の面積が大きい領域を、開口部の面積が小さい領域に比べて、より深くエッチングされる。 The etching rate of such dry etching changes according to the area of the opening of the resist. For example, the etching rate increases as the area of the opening increases. Therefore, as in the example in the drawing, the substrate 210 is etched deeper in the region where the opening area of the resist 400 is large than in the region where the opening area is small.
 次に、基板210は、エッチングによって形成された突起部を更にエッチングして除去され、穴部214が形成される。ここで、基板210は、レジスト400も除去される。図8は、本実施形態に係る基板210に穴部214が形成された段階の断面構成を示す。図中の例のように、穴部214は、底面402が凹部の形状を有して形成される。 Next, the substrate 210 is further etched by removing the protrusions formed by etching, so that a hole 214 is formed. Here, the resist 400 is also removed from the substrate 210. FIG. 8 shows a cross-sectional configuration at a stage where the hole 214 is formed in the substrate 210 according to the present embodiment. As in the example in the figure, the hole 214 is formed with the bottom surface 402 having a concave shape.
 このように、基板210は、レジスト400の開口面積に応じてエッチングレートが定まるので、形成する穴部214の中心から同心円状にレジスト400の複数の開口部を形成し、当該複数の開口部の面積を中心から順に小さくすることによって、穴部214の底面を凹部形状に形成することができる。基板210は、レジスト400の開口面積を調節することで、穴部214の底面を球面状、または放物面状に形成することもできる。 As described above, since the etching rate of the substrate 210 is determined in accordance with the opening area of the resist 400, a plurality of openings of the resist 400 are formed concentrically from the center of the hole 214 to be formed. By decreasing the area in order from the center, the bottom surface of the hole 214 can be formed into a concave shape. The substrate 210 can be formed in a spherical shape or a parabolic shape by adjusting the opening area of the resist 400.
 次に、複数の穴部214のそれぞれの底面402に、電子を放出する複数の電子放出部300を形成する(S410)。まず、基板210は、穴部214が形成された一方の面に、CVD(Chemical Vapor Deposition:化学気相成長)法等によって、ポリシリコン層216が成膜される。図9は、本実施形態に係る穴部214の底面402に、ポリシリコン層216が形成された段階の断面構成を示す。 Next, a plurality of electron emission portions 300 that emit electrons are formed on the bottom surfaces 402 of the plurality of hole portions 214 (S410). First, in the substrate 210, a polysilicon layer 216 is formed on one surface where the hole 214 is formed by a CVD (Chemical Vapor Deposition) method or the like. FIG. 9 shows a cross-sectional configuration at the stage where the polysilicon layer 216 is formed on the bottom surface 402 of the hole 214 according to the present embodiment.
 次に、基板210は、ポリシリコン層216が形成された面に第1絶縁膜218が形成される。一例として、第1絶縁膜218は、CVD法等によって成膜されるSiN膜でよい。図10は、本実施形態に係る基板210のポリシリコン層216が形成された面に、第1絶縁膜218が形成された段階の断面構成を示す。 Next, a first insulating film 218 is formed on the surface of the substrate 210 on which the polysilicon layer 216 is formed. As an example, the first insulating film 218 may be a SiN film formed by a CVD method or the like. FIG. 10 shows a cross-sectional configuration at the stage where the first insulating film 218 is formed on the surface of the substrate 210 according to the present embodiment on which the polysilicon layer 216 is formed.
 次に、基板210は、第1絶縁膜218が形成された面に、穴部214以外の領域を覆うレジスト400が形成される。一例として、レジスト400は、フィルムレジストをパターニングすることで形成されてよい。図11は、本実施形態に係る基板210の第1絶縁膜218が形成された面に、レジスト400が形成された段階の断面構成を示す。 Next, on the substrate 210, a resist 400 that covers a region other than the hole 214 is formed on the surface on which the first insulating film 218 is formed. As an example, the resist 400 may be formed by patterning a film resist. FIG. 11 shows a cross-sectional configuration at the stage where a resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the first insulating film 218 is formed.
 次に、穴部214の底面402に成膜された第1絶縁膜218は、反応性イオンエッチング等のドライエッチングで除去される。当該第1絶縁膜218が除去された後に、レジスト400は除去される。図12は、本実施形態に係る穴部214の底面402に成膜された第1絶縁膜218が除去された段階の断面構成を示す。このような過程を経て、基板210は、複数の穴部214が形成された一方の面を第1絶縁膜218で覆い、複数の穴部214の底面402に形成されたポリシリコン層216を露出させる。 Next, the first insulating film 218 formed on the bottom surface 402 of the hole 214 is removed by dry etching such as reactive ion etching. After the first insulating film 218 is removed, the resist 400 is removed. FIG. 12 shows a cross-sectional configuration at a stage where the first insulating film 218 formed on the bottom surface 402 of the hole 214 according to this embodiment is removed. Through such a process, the substrate 210 covers one surface on which the plurality of holes 214 are formed with the first insulating film 218 and exposes the polysilicon layer 216 formed on the bottom surface 402 of the plurality of holes 214. Let
 次に、露出されたポリシリコン層216は、フッ化水素(HF)水溶液中において陽極活性される。そして、当該ポリシリコン層216は、RTO(Rapid-Thermal-Oxidation)法による酸化工程、HWA(High-Pressure Water vapor Annealing)法によるアニール工程、およびSCRD(Super Critical Rinse and Dry)法による乾燥工程を経て、欠陥の少ないナノ結晶シリコンが形成される。 Next, the exposed polysilicon layer 216 is anodized in a hydrogen fluoride (HF) aqueous solution. Then, the polysilicon layer 216 is oxidized by an RTO (Rapid-Thermal-Oxidation) method, an annealing step by an HWA (High-Pressure Water vapor) method, and an SCRD (Super Critical Rinse and Dry) method. As a result, nanocrystalline silicon with few defects is formed.
 このように、穴部214の底面402は、ナノ結晶シリコンを含む電子放出部300が形成される。図13は、本実施形態に係る穴部214の底面402に電子放出部300が形成された段階の断面構成を示す。 As described above, the bottom surface 402 of the hole 214 is formed with the electron emission portion 300 containing nanocrystalline silicon. FIG. 13 shows a cross-sectional configuration at a stage where the electron emission portion 300 is formed on the bottom surface 402 of the hole 214 according to the present embodiment.
 次に、第2電極部320を形成する(S420)。まず、基板210は、穴部214を覆うレジスト400が形成される。レジスト400は、フィルムレジストでよく、第1絶縁膜218の基板210とは反対側の一方の面における接続部322を形成する位置に、パターニング処理で開口が形成される。図14は、本実施形態に係る電子放出部300が形成された基板210に、レジスト400が形成された段階の断面構成を示す。 Next, the second electrode part 320 is formed (S420). First, a resist 400 that covers the hole 214 is formed on the substrate 210. The resist 400 may be a film resist, and an opening is formed by a patterning process at a position where the connection portion 322 is formed on one surface of the first insulating film 218 opposite to the substrate 210. FIG. 14 shows a cross-sectional configuration at a stage where a resist 400 is formed on a substrate 210 on which an electron emission unit 300 according to the present embodiment is formed.
 次に、第1絶縁膜218の一方の面に、接続部322となる金属を成膜し、リフトオフによって接続部322を形成する領域以外の金属をレジスト400ごと除去する。ここで、成膜する金属は、クロムおよび金を含んでよく、蒸着によってクロム、金の順に成膜されてよい。一例として、金の膜厚は、300nm程度でよい。図15は、本実施形態に係る第1絶縁膜218の基板210とは反対側の一方の面に、接続部322が形成された段階の断面構成を示す。 Next, a metal to be the connection portion 322 is formed on one surface of the first insulating film 218, and the metal other than the region where the connection portion 322 is formed is removed together with the resist 400 by lift-off. Here, the metal to be formed may include chromium and gold, and may be formed in the order of chromium and gold by vapor deposition. As an example, the film thickness of gold may be about 300 nm. FIG. 15 shows a cross-sectional configuration at a stage where the connection portion 322 is formed on one surface of the first insulating film 218 according to the present embodiment on the side opposite to the substrate 210.
 次に、基板210は、接続部322が形成された面に金属が成膜され、第2電極部320が形成される。ここで、成膜する金属は、チタンおよび金を含んでよく、蒸着によってチタン、金の順に成膜されてよい。一例として、チタンの膜厚は1nm、金の膜厚は9nm程度でよい。図16は、本実施形態に係る基板210の電子放出部300が形成された面に、第2電極部320が形成された段階の断面構成を示す。 Next, in the substrate 210, a metal is formed on the surface on which the connection part 322 is formed, and the second electrode part 320 is formed. Here, the metal to be formed may include titanium and gold, and may be formed in the order of titanium and gold by vapor deposition. As an example, the thickness of titanium may be about 1 nm, and the thickness of gold may be about 9 nm. FIG. 16 shows a cross-sectional configuration at a stage where the second electrode part 320 is formed on the surface of the substrate 210 according to the present embodiment on which the electron emission part 300 is formed.
 次に、第1電極部310を形成する(S430)。まず、基板210は、第2電極部320が形成された面に、高分子層410が形成される。高分子層410は、感光性のポリイミドでよい。高分子層410は、基板210とは反対側の一方の面を、CMP(Chemical Mechanical Polishing)法等で平坦に加工される。図17は、本実施形態に係る基板210の第2電極部320が形成された面に、高分子層410が形成された段階の断面構成を示す。 Next, the first electrode part 310 is formed (S430). First, the substrate 210 has the polymer layer 410 formed on the surface on which the second electrode unit 320 is formed. The polymer layer 410 may be photosensitive polyimide. In the polymer layer 410, one surface opposite to the substrate 210 is processed flat by a CMP (Chemical Mechanical Polishing) method or the like. FIG. 17 shows a cross-sectional configuration at a stage where the polymer layer 410 is formed on the surface of the substrate 210 where the second electrode part 320 is formed according to the present embodiment.
 次に、高分子層410に光を照射してパターニングして開口部412を形成し、開口部412から第2電極部320の一部をエッチングして除去する。これによって、第2電極部320は、電子放出部300毎に電気的に分離される。これに代えて、第2電極部320は、同一のオフセットバイアスが印加されるブロックに対応する複数の第2電極部320毎に、電気的に分離されてよい。図18は、本実施形態に係る第2電極部320の一部がエッチングされて、当該第2電極部320が電気的に分離された段階の断面構成を示す。 Next, the polymer layer 410 is irradiated with light and patterned to form an opening 412, and a part of the second electrode part 320 is etched away from the opening 412. Accordingly, the second electrode unit 320 is electrically separated for each electron emission unit 300. Instead, the second electrode unit 320 may be electrically separated for each of the plurality of second electrode units 320 corresponding to the block to which the same offset bias is applied. FIG. 18 illustrates a cross-sectional configuration at a stage where a part of the second electrode unit 320 according to the present embodiment is etched and the second electrode unit 320 is electrically separated.
 次に、基板210は、高分子層410が形成された面に第2絶縁膜330が形成される。一例として、第2絶縁膜330は、CVD法等によって成膜される酸化シリコン膜でよい。図19は、本実施形態に係る基板210の高分子層410が形成された面に、第2絶縁膜330が形成された段階の断面構成を示す。 Next, the second insulating film 330 is formed on the surface of the substrate 210 on which the polymer layer 410 is formed. As an example, the second insulating film 330 may be a silicon oxide film formed by a CVD method or the like. FIG. 19 shows a cross-sectional configuration at a stage where the second insulating film 330 is formed on the surface of the substrate 210 according to the present embodiment on which the polymer layer 410 is formed.
 次に、第2絶縁膜330をCMP法等で研磨し、高分子層410を露出させる。この段階における高分子層410の厚さが、第1電極部310と第2電極部320との電極間隔となる。図20は、本実施形態に係る第2絶縁膜330を研磨し、高分子層410を露出させた段階の断面構成を示す。 Next, the second insulating film 330 is polished by a CMP method or the like to expose the polymer layer 410. The thickness of the polymer layer 410 at this stage is the electrode interval between the first electrode part 310 and the second electrode part 320. FIG. 20 shows a cross-sectional configuration at a stage where the second insulating film 330 according to the present embodiment is polished and the polymer layer 410 is exposed.
 次に、基板210の高分子層410が露出された面に、金属膜420を形成する。金属膜420は、第1電極部310の一部を形成する。一例として、金属膜420は、ニッケルを含み、スパッタ法等で形成されてよい。図21は、本実施形態に係る基板210の高分子層410が露出された面に、金属膜420が形成された段階の断面構成を示す。 Next, a metal film 420 is formed on the surface of the substrate 210 where the polymer layer 410 is exposed. The metal film 420 forms part of the first electrode unit 310. As an example, the metal film 420 contains nickel and may be formed by a sputtering method or the like. FIG. 21 shows a cross-sectional configuration of a stage where a metal film 420 is formed on the surface of the substrate 210 according to the present embodiment where the polymer layer 410 is exposed.
 次に、基板210の金属膜420が形成された面に、レジスト400が形成される。レジスト400は、後に形成される第1電極部310を電気的に分離する領域と、電子ビームを出力させる開口部312が形成される領域とに、それぞれパターニングされて形成される。 Next, a resist 400 is formed on the surface of the substrate 210 on which the metal film 420 is formed. The resist 400 is formed by patterning into a region where the first electrode portion 310 to be formed later is electrically separated and a region where an opening 312 for outputting an electron beam is formed.
 ここで、開口部312は、穴部214および/または電子放出部300の中央近辺に形成されてよい。また、第1電極部310を電気的に分離する領域は、第2絶縁膜330の中央近辺に形成されてよい。図22は、本実施形態に係る基板210の金属膜420が形成された面に、レジスト400が形成された段階の断面構成を示す。 Here, the opening 312 may be formed near the center of the hole 214 and / or the electron emission unit 300. In addition, the region that electrically isolates the first electrode unit 310 may be formed near the center of the second insulating film 330. FIG. 22 shows a cross-sectional configuration at the stage where the resist 400 is formed on the surface of the substrate 210 according to the present embodiment on which the metal film 420 is formed.
 次に、基板210の金属膜420が形成された面に、金属膜420と略同一の材料を更に成膜する。一例として、ニッケルを更に成膜して、金属膜420を形成する。ここで、金属膜420は、レジスト400を覆う厚さで形成されてよい。本段階において、金属膜420は、めっきによって形成されてよい。図23は、本実施形態に係る基板210の金属膜420が形成された面に、更に金属膜420が形成された段階の断面構成を示す。 Next, a material substantially the same as that of the metal film 420 is further formed on the surface of the substrate 210 on which the metal film 420 is formed. As an example, nickel is further formed to form the metal film 420. Here, the metal film 420 may be formed to a thickness that covers the resist 400. In this stage, the metal film 420 may be formed by plating. FIG. 23 shows a cross-sectional configuration at a stage where a metal film 420 is further formed on the surface of the substrate 210 according to the present embodiment on which the metal film 420 is formed.
 次に、基板210の金属膜420をCMP法等で研磨し、レジスト400を露出させる。次に、レジストを除去し、金属膜420をエッチングする。当該エッチングは、レジスト400が形成された領域の金属膜420を除去する。これによって、基板210は、開口部312を有する第1電極部310が形成される。 Next, the metal film 420 of the substrate 210 is polished by a CMP method or the like, and the resist 400 is exposed. Next, the resist is removed and the metal film 420 is etched. The etching removes the metal film 420 in the region where the resist 400 is formed. As a result, the first electrode part 310 having the opening 312 is formed on the substrate 210.
 ここで、第1電極部310は、電子放出部300毎に電気的に分離されて形成される。これに代えて、第1電極部310は、同一のオフセットバイアスが印加されるブロックに対応する複数の第1電極部310毎に、電気的に分離されてよい。図24は、本実施形態に係る基板210の電子放出部300が形成された面に、開口部312を有する第1電極部310が形成された段階の断面構成を示す。 Here, the first electrode part 310 is formed by being electrically separated for each electron emission part 300. Alternatively, the first electrode unit 310 may be electrically separated for each of the plurality of first electrode units 310 corresponding to the block to which the same offset bias is applied. FIG. 24 shows a cross-sectional configuration at a stage where the first electrode part 310 having the opening 312 is formed on the surface of the substrate 210 where the electron emission part 300 is formed according to the present embodiment.
 次に、基板210における複数の第1電極部310側に保持用基板440を接着する(S440)。基板210は、第1電極部310が形成された面に、接着層430を用いて保持用基板440を接着する。接着層430は、接着剤でよい。ここで、保持用基板440は、分離層432を介して接着される。分離層432は、分離液によって溶融する材料で形成され、当該分離液を用いて保持用基板440を分離させる。分離層432は、過酸化水素を含む分離液によって溶融するゲルマニウム等で形成されてよい。 Next, the holding substrate 440 is bonded to the plurality of first electrode portions 310 side of the substrate 210 (S440). The substrate 210 is bonded to the holding substrate 440 with the adhesive layer 430 on the surface on which the first electrode portion 310 is formed. The adhesive layer 430 may be an adhesive. Here, the holding substrate 440 is bonded via the separation layer 432. The separation layer 432 is formed of a material that is melted by the separation liquid, and the holding substrate 440 is separated using the separation liquid. The separation layer 432 may be formed of germanium or the like that is melted by a separation liquid containing hydrogen peroxide.
 保持用基板440は、基板210の第1電極部310が形成された面と反対側の裏面を加工する場合に、作業者に基板210をハンドリングし易くさせる板状の基板でよい。即ち、基板210は、保持用基板440側から保持される。例えば、保持用基板440は、ガラスまたはシリコン等で形成される。保持用基板440は、複数の溝部442を有してよい。複数の溝部442は、分離液等を用いて保持用基板440を分離する場合に、当該分離液を接着面に浸透させる機能を有する。図25は、本実施形態に係る基板210の電子放出部300が形成された面に、保持用基板440が接着された段階の断面構成を示す。 The holding substrate 440 may be a plate-like substrate that makes it easy for an operator to handle the substrate 210 when processing the back surface of the substrate 210 opposite to the surface on which the first electrode portion 310 is formed. That is, the substrate 210 is held from the holding substrate 440 side. For example, the holding substrate 440 is formed of glass, silicon, or the like. The holding substrate 440 may have a plurality of groove portions 442. The plurality of groove portions 442 have a function of penetrating the separation liquid into the bonding surface when the holding substrate 440 is separated using a separation liquid or the like. FIG. 25 shows a cross-sectional configuration at a stage where the holding substrate 440 is bonded to the surface of the substrate 210 according to the present embodiment on which the electron emission portion 300 is formed.
 次に、アイソレーション部340を形成する(S450)。アイソレーション部340は、基板210における複数の第1電極部310とは反対側から複数の電子放出部300の間を切削して絶縁物を充填して形成される。まず、基板210の裏面に、レジスト400を形成する。図26は、本実施形態に係る基板210の第1電極部310が形成された面と反対側の裏面に、レジスト400が形成された段階の断面構成を示す。 Next, the isolation part 340 is formed (S450). The isolation part 340 is formed by cutting between the plurality of electron emission parts 300 from the side opposite to the plurality of first electrode parts 310 in the substrate 210 and filling with an insulator. First, a resist 400 is formed on the back surface of the substrate 210. FIG. 26 shows a cross-sectional configuration at a stage where the resist 400 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed.
 次に、基板210は、形成されたレジスト400の開口部から反応性イオンエッチング等でエッチングされる。当該エッチングは、第2絶縁膜330をエッチングストップ層としてエッチングしてよい。また、当該エッチングによって溝部450が形成され、当該溝部450によって、複数の電子放出部300のそれぞれは分離される。レジスト400は、エッチングを実行した後に、除去される。図27は、本実施形態に係る基板210に形成されたレジスト400の開口部から、基板210がエッチングされた段階の断面構成を示す。 Next, the substrate 210 is etched by reactive ion etching or the like from the opening of the formed resist 400. The etching may be performed using the second insulating film 330 as an etching stop layer. In addition, a groove portion 450 is formed by the etching, and the plurality of electron emission portions 300 are separated by the groove portion 450. The resist 400 is removed after performing the etching. FIG. 27 shows a cross-sectional configuration at a stage where the substrate 210 is etched from the opening of the resist 400 formed in the substrate 210 according to the present embodiment.
 次に、溝部450は、絶縁物が充填され、アイソレーション部340が形成される。ここで、絶縁物は、ポリマー等でよい。一例として、アイソレーション部340は、基板210の裏面側から見て、XY方向にそれぞれ略100μmピッチの格子状に形成され、電子放出部300を電気的に絶縁する。図28は、本実施形態に係る基板210に、アイソレーション部340が形成された段階の断面構成を示す。 Next, the groove portion 450 is filled with an insulating material, and an isolation portion 340 is formed. Here, the insulator may be a polymer or the like. As an example, the isolation part 340 is formed in a lattice shape with a pitch of approximately 100 μm in the XY direction when viewed from the back side of the substrate 210, and electrically insulates the electron emission part 300. FIG. 28 shows a cross-sectional configuration at a stage where the isolation part 340 is formed on the substrate 210 according to the present embodiment.
 次に、第3電極部350を形成する(S460)。第3電極部350は、基板210の裏面にレジストを形成し、金属膜を成膜してからリフトオフによって形成される。ここで、成膜する金属は、クロムおよび金を含んでよく、蒸着によってクロム、金の順に成膜されてよい。一例として、金の膜厚は、300nm程度でよい。図29は、本実施形態に係る基板210の第1電極部310が形成された面と反対側の裏面に、第3電極部350が形成された段階の断面構成を示す。 Next, the third electrode part 350 is formed (S460). The third electrode unit 350 is formed by lift-off after forming a resist on the back surface of the substrate 210 and forming a metal film. Here, the metal to be formed may include chromium and gold, and may be formed in the order of chromium and gold by vapor deposition. As an example, the film thickness of gold may be about 300 nm. FIG. 29 shows a cross-sectional configuration at a stage where the third electrode portion 350 is formed on the back surface opposite to the surface on which the first electrode portion 310 of the substrate 210 according to the present embodiment is formed.
 次に、基板210から保持用基板440を取り外す(S470)。まず、基板210は、裏面側に電子回路部220が張り合わされる。ここで、基板210は、電子回路部220の電極部222と対応する第3電極部350とが電気的に接続されて張り合わされる。一例として、電極部222は、アルミニウム、クロム、金、およびインジウムを含み、アルミニウムの電極パッド上に、クロム、金、インジウムの順に蒸着されて形成される。 Next, the holding substrate 440 is removed from the substrate 210 (S470). First, the electronic circuit part 220 is bonded to the back side of the substrate 210. Here, the substrate 210 is bonded by electrically connecting the electrode part 222 of the electronic circuit part 220 and the corresponding third electrode part 350. As an example, the electrode part 222 includes aluminum, chromium, gold, and indium, and is formed by vapor-depositing chromium, gold, and indium in this order on an aluminum electrode pad.
 これによって、第3電極部350と電極部222とが物理的に接続されて、界面の層が金-インジウム-金となる。この状態で、インジウムの融点以上の温度を数分から数十分程度加熱することで、金およびインジウムは合金化し、第3電極部350および電極部222は接合する。一例として、当該加熱温度は、200℃程度である。図30は、本実施形態に係る基板210と電子回路部220とが張り合わされた段階の断面構成を示す。 Thereby, the third electrode portion 350 and the electrode portion 222 are physically connected, and the interface layer becomes gold-indium-gold. In this state, by heating the temperature equal to or higher than the melting point of indium for several minutes to several tens of minutes, gold and indium are alloyed, and the third electrode portion 350 and the electrode portion 222 are joined. As an example, the heating temperature is about 200 ° C. FIG. 30 shows a cross-sectional configuration at a stage where the substrate 210 and the electronic circuit unit 220 according to the present embodiment are bonded together.
 次に、分離層432を分離液で溶融して、保持用基板440を取り外す。ここで、接着層430も除去する。図31は、本実施形態に係る基板210から保持用基板440を取り外した段階の断面構成を示す。 Next, the separation layer 432 is melted with the separation liquid, and the holding substrate 440 is removed. Here, the adhesive layer 430 is also removed. FIG. 31 shows a cross-sectional configuration at a stage where the holding substrate 440 is removed from the substrate 210 according to the present embodiment.
 次に、高分子層410を除去した後に、電極間を配線する(S480)。高分子層410は、酸素プラズマ等で除去してよい。これに代えて、オゾンを混入させた酢酸で除去してもよい。このような過程を経て、電子ビーム発生源212が形成される。 Next, after the polymer layer 410 is removed, the electrodes are wired (S480). The polymer layer 410 may be removed by oxygen plasma or the like. Instead of this, acetic acid mixed with ozone may be removed. Through such a process, the electron beam generation source 212 is formed.
 次に、第1電極部310の接続部、第2電極部320の接続部322、および電子回路部220の接続部224は、電圧供給部202の電極部204にそれぞれ配線される。当該配線は、ワイヤボンディング等でよい。ワイヤボンディングで配線される場合、それぞれの接続部および電極部は、メッキ等でボンディングパッドが更に形成されてよい。以上の製造フローによって、電子ビーム発生装置200は形成される。図32は、本実施形態に係る電子ビーム発生装置200が形成された段階の断面構成を示す。 Next, the connection part of the first electrode part 310, the connection part 322 of the second electrode part 320, and the connection part 224 of the electronic circuit part 220 are wired to the electrode part 204 of the voltage supply part 202, respectively. The wiring may be wire bonding or the like. When wiring is performed by wire bonding, bonding pads may be further formed by plating or the like for the respective connection portions and electrode portions. The electron beam generator 200 is formed by the above manufacturing flow. FIG. 32 shows a cross-sectional configuration at a stage where the electron beam generator 200 according to the present embodiment is formed.
 以上、本発明を実施の形態を用いて説明したが、本発明の技術的範囲は上記実施の形態に記載の範囲には限定されない。上記実施の形態に、多様な変更または改良を加えることが可能であることが当業者に明らかである。その様な変更または改良を加えた形態も本発明の技術的範囲に含まれ得ることが、請求の範囲の記載から明らかである。 As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.
 請求の範囲、明細書、および図面中において示した装置、システム、プログラム、および方法における動作、手順、ステップ、および段階等の各処理の実行順序は、特段「より前に」、「先立って」等と明示しておらず、また、前の処理の出力を後の処理で用いるのでない限り、任意の順序で実現しうることに留意すべきである。請求の範囲、明細書、および図面中の動作フローに関して、便宜上「まず、」、「次に、」等を用いて説明したとしても、この順で実施することが必須であることを意味するものではない。 The execution order of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior”. It should be noted that they can be implemented in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for the sake of convenience, it means that it is essential to carry out in this order. is not.
10 半導体ウェハ、100 電子ビーム照射装置、110 ステージ部、120 記憶部、130 制御部、140 通信部、150 計算機部、200 電子ビーム発生装置、202 電圧供給部、204 電極部、210 基板、212 電子ビーム発生源、214 穴部、216 ポリシリコン層、218 第1絶縁膜、220 電子回路部、222 電極部、224 接続部、230 加速電極、240 電子レンズ、242 コイル部、244 レンズ部、246 減速部、300 電子放出部、310 第1電極部、312 開口部、320 第2電極部、322 接続部、330 第2絶縁膜、340 アイソレーション部、350 第3電極部、400 レジスト、402 底面、410 高分子層、412 開口部、420 金属膜、430 接着層、432 分離層、440 保持用基板、442 溝部、450 溝部、1000 電子ビーム露光装置 10 semiconductor wafer, 100 electron beam irradiation device, 110 stage unit, 120 storage unit, 130 control unit, 140 communication unit, 150 computer unit, 200 electron beam generator, 202 voltage supply unit, 204 electrode unit, 210 substrate, 212 electron Beam source, 214 hole, 216 polysilicon layer, 218 first insulating film, 220 electronic circuit, 222 electrode, 224 connection, 230 acceleration electrode, 240 electron lens, 242 coil part, 244 lens part, 246 deceleration Part, 300 electron emission part, 310 first electrode part, 312 opening part, 320 second electrode part, 322 connection part, 330 second insulating film, 340 isolation part, 350 third electrode part, 400 resist, 402 bottom surface, 410 polymer layer, 412 opening, 4 0 metallic film, 430 an adhesive layer, 432 a separation layer, 440 holding the substrate, 442 groove, 450 grooves, 1000 an electron beam exposure apparatus

Claims (32)

  1.  複数の穴部が設けられた基板と、
     前記複数の穴部のそれぞれの底面に設けられ、電子を放出する複数の電子放出部と、
     前記複数の電子放出部のそれぞれに対応して設けられ、対応する電子放出部が放出した電子を加速して前記電子放出部が設けられた穴部から電子ビームとして出力する複数の第1電極部と、
     を備える電子ビーム発生装置。
    A substrate provided with a plurality of holes,
    A plurality of electron emitting portions that are provided on the bottom surfaces of the plurality of hole portions and emit electrons;
    A plurality of first electrode portions provided corresponding to each of the plurality of electron emission portions, and accelerating electrons emitted from the corresponding electron emission portions and outputting the electrons as holes from the holes provided with the electron emission portions. When,
    An electron beam generator.
  2.  前記複数の穴部は、前記基板の一方の面にマトリクス状に形成される請求項1に記載の電子ビーム発生装置。 The electron beam generator according to claim 1, wherein the plurality of holes are formed in a matrix on one surface of the substrate.
  3.  前記複数の第1電極部のそれぞれは、開口部を有し、前記基板の前記複数の穴部が設けられる一方の面に板状に形成され、対応する前記穴部との電位差によって前記開口部から前記電子ビームを集束させて出力させる請求項1に記載の電子ビーム発生装置。 Each of the plurality of first electrode portions has an opening, is formed in a plate shape on one surface of the substrate where the plurality of holes are provided, and the openings are formed by a potential difference with the corresponding hole. The electron beam generating apparatus according to claim 1, wherein the electron beam is focused and output.
  4.  前記複数の穴部のそれぞれは、前記底面および側壁を覆う導電性物質で形成された第2電極部を有する請求項1に記載の電子ビーム発生装置。 2. The electron beam generator according to claim 1, wherein each of the plurality of hole portions includes a second electrode portion formed of a conductive material covering the bottom surface and the side wall.
  5.  前記基板の他方の面に形成され、前記複数の電子放出部から電子を放出させる駆動電圧を、前記複数の電子放出部のそれぞれに対して個別に供給する電子回路部を更に備える請求項1に記載の電子ビーム発生装置。 2. The electronic circuit unit according to claim 1, further comprising an electronic circuit unit that is formed on the other surface of the substrate and individually supplies a driving voltage for emitting electrons from the plurality of electron emission units to each of the plurality of electron emission units. The electron beam generator as described.
  6.  前記電子回路部は、前記複数の電子放出部のそれぞれの配置に応じて、異なるオフセットバイアスを更に印加する請求項5に記載の電子ビーム発生装置。 6. The electron beam generator according to claim 5, wherein the electronic circuit unit further applies different offset biases according to the arrangement of the plurality of electron emission units.
  7.  前記複数の電子放出部は、それぞれの配置に応じて複数のブロックに分配され、
     前記電子回路部は、ブロック毎にオフセットバイアスを印加する請求項6に記載の電子ビーム発生装置。
    The plurality of electron emission portions are distributed to a plurality of blocks according to each arrangement,
    The electron beam generating apparatus according to claim 6, wherein the electronic circuit unit applies an offset bias for each block.
  8.  前記電子回路部は、半導体基板に形成され、当該半導体基板の一方の面は、前記基板と張り合わされる請求項5に記載の電子ビーム発生装置。 6. The electron beam generator according to claim 5, wherein the electronic circuit unit is formed on a semiconductor substrate, and one surface of the semiconductor substrate is bonded to the substrate.
  9.  前記複数の穴部のそれぞれの前記底面は、凹面状に形成される請求項1に記載の電子ビーム発生装置。 The electron beam generator according to claim 1, wherein the bottom surface of each of the plurality of holes is formed in a concave shape.
  10.  前記複数の穴部のそれぞれの前記底面は、球面状または放物面状に形成される請求項9に記載の電子ビーム発生装置。 10. The electron beam generator according to claim 9, wherein the bottom surface of each of the plurality of hole portions is formed in a spherical shape or a parabolic shape.
  11.  前記凹面状の前記底面の中心点により近い部分から放出される電子の層流を、前記中心点により近い位置に集中させて負の収差を発生させることを特徴とする請求項9に記載の電子ビーム発生装置。 The electron according to claim 9, wherein a negative aberration is generated by concentrating a laminar flow of electrons emitted from a portion closer to the center point of the concave bottom surface to a position closer to the center point. Beam generator.
  12.  前記底面の形状は、前記複数の電子放出部の電子を放出する方向と、当該方向の電子のトンネル確率との乗算がより大きくなる前記方向を、対応する第1電極部の開口部に向ける請求項9に記載の電子ビーム発生装置。 The shape of the bottom surface is such that the direction in which the multiplication of the electron emission probability of the plurality of electron emission portions and the tunnel probability of the electrons in the direction becomes larger is directed to the opening of the corresponding first electrode portion. Item 10. The electron beam generator according to Item 9.
  13.  前記複数の電子放出部は、ナノ結晶を有する請求項1に記載の電子ビーム発生装置。 2. The electron beam generator according to claim 1, wherein the plurality of electron emission portions include nanocrystals.
  14.  前記複数の電子放出部は、放出する電子をトンネリングさせる絶縁膜を有する請求項1に記載の電子ビーム発生装置。 2. The electron beam generator according to claim 1, wherein the plurality of electron emission portions have an insulating film for tunneling emitted electrons.
  15.  請求項1に記載の電子ビーム発生装置と、
     前記電子ビーム発生装置から出力される複数の電子ビームによる描画パターンを縮小して対象物に照射する電子レンズと、
     を備える電子ビーム照射装置。
    The electron beam generator according to claim 1,
    An electron lens for irradiating an object by reducing a drawing pattern by a plurality of electron beams output from the electron beam generator;
    An electron beam irradiation apparatus comprising:
  16.  複数の電子ビームを出力する電子ビーム照射装置であって、
     複数の電子放出部を有し、前記複数の電子放出部のそれぞれから放出される電子を加速して集束させ、複数の電子ビームとして出力する面電子ビーム源と、
     前記面電子ビーム源から出力される前記複数の電子ビームによる描画パターンを予め定められた倍率で対象物に照射する電子レンズと、
     を備える電子ビーム照射装置。
    An electron beam irradiation apparatus that outputs a plurality of electron beams,
    A surface electron beam source having a plurality of electron emission portions, accelerating and focusing electrons emitted from each of the plurality of electron emission portions, and outputting the electrons as a plurality of electron beams;
    An electron lens that irradiates an object with a drawing pattern by the plurality of electron beams output from the surface electron beam source at a predetermined magnification;
    An electron beam irradiation apparatus comprising:
  17.  前記複数の電子放出部は、マトリクス状に配列され、駆動電圧に応じて電子をそれぞれ放出する請求項16に記載の電子ビーム照射装置。 The electron beam irradiation apparatus according to claim 16, wherein the plurality of electron emission portions are arranged in a matrix and emit electrons according to a driving voltage.
  18.  前記複数の電子放出部のそれぞれは、ナノ結晶を含む請求項16に記載の電子ビーム照射装置。 The electron beam irradiation apparatus according to claim 16, wherein each of the plurality of electron emission portions includes a nanocrystal.
  19.  前記複数の電子放出部のそれぞれは、放出される電子をトンネリングする絶縁膜を含む請求項16に記載の電子ビーム照射装置。 The electron beam irradiation apparatus according to claim 16, wherein each of the plurality of electron emission portions includes an insulating film that tunnels emitted electrons.
  20.  前記面電子ビーム源に接続され、前記複数の電子放出部から電子を放出させる駆動電圧を前記複数の電子放出部のそれぞれに対して個別に供給する電子回路部を更に備える請求項16に記載の電子ビーム照射装置。 The electronic circuit unit according to claim 16, further comprising an electronic circuit unit connected to the surface electron beam source and individually supplying a driving voltage for emitting electrons from the plurality of electron emission units to each of the plurality of electron emission units. Electron beam irradiation device.
  21.  前記電子回路部は、前記駆動電圧に加えて、前記複数の電子放出部のそれぞれに、それぞれの配置に対応したオフセットバイアスを印加する請求項20に記載の電子ビーム照射装置。 21. The electron beam irradiation apparatus according to claim 20, wherein the electronic circuit unit applies an offset bias corresponding to each arrangement to each of the plurality of electron emission units in addition to the driving voltage.
  22.  前記複数の電子放出部は、それぞれの配置に応じて複数のブロックに分配され、
     前記電子回路部は、ブロック毎にオフセットバイアスを印加する請求項21に記載の電子ビーム照射装置。
    The plurality of electron emission portions are distributed to a plurality of blocks according to each arrangement,
    The electron beam irradiation apparatus according to claim 21, wherein the electronic circuit unit applies an offset bias for each block.
  23.  前記電子回路部は、半導体基板に形成される請求項20に記載の電子ビーム照射装置。 21. The electron beam irradiation apparatus according to claim 20, wherein the electronic circuit unit is formed on a semiconductor substrate.
  24.  前記電子レンズは、前記面電子ビーム源から出力される前記複数の電子ビームの描画パターンを予め定められた縮尺に縮小して、前記対象物に照射する請求項16に記載の電子ビーム照射装置。 The electron beam irradiation apparatus according to claim 16, wherein the electron lens reduces the drawing pattern of the plurality of electron beams output from the surface electron beam source to a predetermined scale and irradiates the object.
  25.  前記面電子ビーム源は、前記面電子ビーム源の一方の面に前記複数の電子放出部のそれぞれに対応してそれぞれ設けられ、対応する電子放出部が出力する電子をそれぞれ集束させて、複数の電子ビームとして出力させる複数の電極部を有する請求項16に記載の電子ビーム照射装置。 The surface electron beam source is provided on one surface of the surface electron beam source so as to correspond to each of the plurality of electron emission portions, and each of the electrons emitted from the corresponding electron emission portions is focused, The electron beam irradiation apparatus according to claim 16, further comprising a plurality of electrode portions that are output as electron beams.
  26.  前記面電子ビーム源と、前記複数の電極部とは、一体に形成される請求項25に記載の電子ビーム照射装置。 26. The electron beam irradiation apparatus according to claim 25, wherein the surface electron beam source and the plurality of electrode portions are integrally formed.
  27.  請求項16に記載の電子ビーム照射装置を複数備えるマルチ電子ビーム照射装置。 A multi-electron beam irradiation apparatus comprising a plurality of electron beam irradiation apparatuses according to claim 16.
  28.  1以上の請求項15に記載の電子ビーム照射装置と、
     前記対象物を載置するステージ部と、
     前記複数の電子ビームが描画する描画パターン情報を記憶する記憶部と、
     前記記憶部に記憶された描画パターン情報に応じて、前記電子ビーム照射装置に複数の電子ビームを出力させる制御信号を送信する制御部と、
     を備える電子ビーム露光装置。
    One or more electron beam irradiation devices according to claim 15;
    A stage unit for placing the object;
    A storage unit for storing drawing pattern information drawn by the plurality of electron beams;
    A control unit that transmits a control signal that causes the electron beam irradiation device to output a plurality of electron beams according to the drawing pattern information stored in the storage unit;
    An electron beam exposure apparatus comprising:
  29.  1以上の請求項16に記載の電子ビーム照射装置と、
     前記1以上の電子ビームが描画する描画パターン情報を記憶する記憶部と、
     前記記憶部に記憶された描画パターン情報に応じて、前記電子ビーム照射装置に複数の電子ビームを出力させる制御信号を送信する制御部と、
     前記対象物を載置するステージ部と、
     を備え、
     前記複数の電子ビームを照射して、前記描画パターン情報に応じた描画パターンを前記対象物に描画する電子ビーム露光装置。
    One or more electron beam irradiation devices according to claim 16;
    A storage unit for storing drawing pattern information drawn by the one or more electron beams;
    A control unit that transmits a control signal that causes the electron beam irradiation device to output a plurality of electron beams according to the drawing pattern information stored in the storage unit;
    A stage unit for placing the object;
    With
    An electron beam exposure apparatus that irradiates the plurality of electron beams and draws a drawing pattern corresponding to the drawing pattern information on the object.
  30.  基板に設けられた複数の電子放出部のそれぞれから放出される電子を加速して集束させ、複数の電子ビームとして出力する面電子ビーム出力段階と、
     前記複数の電子ビームによる描画パターンを予め定められた倍率で対象物に照射する電子ビーム照射段階と、
     を備える電子ビーム照射方法。
    A surface electron beam output stage for accelerating and focusing electrons emitted from each of a plurality of electron emission portions provided on the substrate and outputting the electrons as a plurality of electron beams;
    An electron beam irradiation step of irradiating an object with a drawing pattern by the plurality of electron beams at a predetermined magnification;
    An electron beam irradiation method comprising:
  31.  電子ビーム発生装置の製造方法であって、
     基板に複数の穴部を形成する穴部形成段階と、
     前記複数の穴部のそれぞれの底面に、電子を放出する複数の電子放出部を形成する電子放出部形成段階と、
     前記複数の電子放出部のそれぞれに対応して、対応する電子放出部が放出した電子を加速して前記電子放出部が設けられた前記穴部から電子ビームとして出力する複数の第1電極部を形成する第1電極部形成段階と、
     を備える製造方法。
    A method for manufacturing an electron beam generator, comprising:
    A hole forming step for forming a plurality of holes in the substrate;
    An electron emission portion forming step of forming a plurality of electron emission portions for emitting electrons on the bottom surface of each of the plurality of hole portions;
    Corresponding to each of the plurality of electron emission portions, a plurality of first electrode portions for accelerating electrons emitted from the corresponding electron emission portions and outputting them as electron beams from the hole portions provided with the electron emission portions are provided. Forming a first electrode portion to be formed;
    A manufacturing method comprising:
  32.  前記基板における前記複数の第1電極側に保持用基板を接着する接着段階と、
     前記基板を前記保持用基板側から保持する保持段階と、
     前記基板における前記複数の第1電極とは反対側から前記複数の電子放出部の間を切削して絶縁物を充填するアイソレーション段階と、
     前記基板から前記保持用基板を取り外す取り外し段階と、
     を更に備える請求項31に記載の製造方法。
    Bonding step of bonding a holding substrate to the plurality of first electrodes on the substrate;
    Holding the substrate from the holding substrate side;
    An isolation step of filling an insulator by cutting between the plurality of electron emission portions from the opposite side of the plurality of first electrodes on the substrate;
    Removing the holding substrate from the substrate; and
    The manufacturing method according to claim 31, further comprising:
PCT/JP2013/000722 2012-02-10 2013-02-08 Electron beam generating appartus, electron beam irradaition apparatus, multi-electron beam irradiation apparatus, electron beam exposure apparatus, electron beam irradiation method, and manufacture method WO2013118517A1 (en)

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