WO2013092127A3 - Schaltungsträger mit einem leitpfad und einer elektrischen schirmung und verfahren zu dessen herstellung - Google Patents

Schaltungsträger mit einem leitpfad und einer elektrischen schirmung und verfahren zu dessen herstellung Download PDF

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Publication number
WO2013092127A3
WO2013092127A3 PCT/EP2012/073692 EP2012073692W WO2013092127A3 WO 2013092127 A3 WO2013092127 A3 WO 2013092127A3 EP 2012073692 W EP2012073692 W EP 2012073692W WO 2013092127 A3 WO2013092127 A3 WO 2013092127A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit carrier
conducting path
electric shield
producing
shield
Prior art date
Application number
PCT/EP2012/073692
Other languages
English (en)
French (fr)
Other versions
WO2013092127A2 (de
Inventor
Florian Poprawa
Markus Schieber
Christina Schindler
Jörg ZAPF
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to US14/367,894 priority Critical patent/US9999120B2/en
Publication of WO2013092127A2 publication Critical patent/WO2013092127A2/de
Publication of WO2013092127A3 publication Critical patent/WO2013092127A3/de

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • H05K1/0225Single or multiple openings in a shielding, ground or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0243Printed circuits associated with mounted high frequency components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0715Shielding provided by an outer layer of PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09336Signal conductors in same plane as power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469Circuit made after mounting or encapsulation of the components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

Die Erfindung betrifft einen Schaltungsträger (11) mit einer Digitalschaltung, die mindestens zwei Bauelemente (12, 14) enthält, die elektrisch miteinander verbunden (19, 21, 20) sind. Zusätzlich ist eine elektrische Schirmung (24) vorgesehen. Erfindungsgemäß ist vorgesehen, dass die elektrische Schirmung (24) sowie ein Leitpfad (21) zur elektrischen Verbindung der Bauelemente (12, 14) durch einen einzigen Schichtverbund (18) realisiert sind. Insbesondere sind die elektrische Schirmung (24) und der Leitpfad (21) durch dieselbe elektrisch leitfähige Lage ausgebildet, wobei eine Freistellung (25) für eine komplette elektrische Isolation des Leitpfades (21) gegenüber der Schirmung (24) sorgt. Gegenstand der Erfindung ist außerdem ein Verfahren zur Herstellung eines solchen Schaltungsträgers.
PCT/EP2012/073692 2011-12-21 2012-11-27 Schaltungsträger mit einem leitpfad und einer elektrischen schirmung und verfahren zu dessen herstellung WO2013092127A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/367,894 US9999120B2 (en) 2011-12-21 2012-11-27 Circuit carrier having a conducting path and an electric shield

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102011089415A DE102011089415A1 (de) 2011-12-21 2011-12-21 Schaltungsträger mit einem Leitpfad und einer elektrischen Schirmung und Verfahren zu dessen Herstellung
DE102011089415.2 2011-12-21

Publications (2)

Publication Number Publication Date
WO2013092127A2 WO2013092127A2 (de) 2013-06-27
WO2013092127A3 true WO2013092127A3 (de) 2013-09-26

Family

ID=47458867

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2012/073692 WO2013092127A2 (de) 2011-12-21 2012-11-27 Schaltungsträger mit einem leitpfad und einer elektrischen schirmung und verfahren zu dessen herstellung

Country Status (3)

Country Link
US (1) US9999120B2 (de)
DE (1) DE102011089415A1 (de)
WO (1) WO2013092127A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106257652B (zh) * 2015-06-16 2020-03-27 台达电子企业管理(上海)有限公司 封装模块及封装方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6285559B1 (en) * 1998-05-26 2001-09-04 Nec Corporation Multichip module
US20070057366A1 (en) * 2005-09-14 2007-03-15 Masashi Katsumata Semiconductor IC-embedded module
WO2010106599A1 (ja) * 2009-03-19 2010-09-23 パナソニック株式会社 回路モジュール及び電子機器
WO2011125354A1 (ja) * 2010-04-06 2011-10-13 日本電気株式会社 機能素子内蔵基板
US20110266041A1 (en) * 2002-01-31 2011-11-03 Tuominen Risto Method for embedding a component in a base

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4678699A (en) * 1982-10-25 1987-07-07 Allied Corporation Stampable polymeric composite containing an EMI/RFI shielding layer
DE9214898U1 (de) * 1991-11-07 1992-12-17 Siemens Ag, 8000 Muenchen, De
DE29505327U1 (de) * 1995-03-29 1995-08-03 Siemens Ag Abschirmung für Logik- und Hochfrequenzschaltkreise
DE10125746C1 (de) * 2001-05-21 2003-02-06 Siemens Ag Verfahren zur Abschirmung einer auf einer Leiterplatte realisierten elektrischen Schaltung und eine entsprechende Kombination einer Leiterplatte mit einer Abschirmung
DE102006061248B3 (de) 2006-12-22 2008-05-08 Siemens Ag Leiterplatte mit einem Hochfrequenzbauelement
DE102007028799A1 (de) * 2007-06-19 2008-12-24 Technische Universität Ilmenau Impedanzkontrolliertes koplanares Wellenleitersystem zur dreidimensionalen Verteilung von Signalen hoher Bandbreite
US8822844B1 (en) * 2010-09-27 2014-09-02 Rockwell Collins, Inc. Shielding and potting for electrical circuits

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6285559B1 (en) * 1998-05-26 2001-09-04 Nec Corporation Multichip module
US20110266041A1 (en) * 2002-01-31 2011-11-03 Tuominen Risto Method for embedding a component in a base
US20070057366A1 (en) * 2005-09-14 2007-03-15 Masashi Katsumata Semiconductor IC-embedded module
WO2010106599A1 (ja) * 2009-03-19 2010-09-23 パナソニック株式会社 回路モジュール及び電子機器
EP2410561A1 (de) * 2009-03-19 2012-01-25 Panasonic Corporation Schaltungsmodul und elektronische anordnung
WO2011125354A1 (ja) * 2010-04-06 2011-10-13 日本電気株式会社 機能素子内蔵基板

Also Published As

Publication number Publication date
DE102011089415A1 (de) 2013-06-27
WO2013092127A2 (de) 2013-06-27
US9999120B2 (en) 2018-06-12
US20150016073A1 (en) 2015-01-15

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