WO2013082638A3 - Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens - Google Patents
Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens Download PDFInfo
- Publication number
- WO2013082638A3 WO2013082638A3 PCT/AT2012/000303 AT2012000303W WO2013082638A3 WO 2013082638 A3 WO2013082638 A3 WO 2013082638A3 AT 2012000303 W AT2012000303 W AT 2012000303W WO 2013082638 A3 WO2013082638 A3 WO 2013082638A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- subregion
- removal
- preventing
- production
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09127—PCB or component having an integral separable or breakable part
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0264—Peeling insulating layer, e.g. foil, or separating mask
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Laser Beam Processing (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Bei einem Verfahren zum Herstellen einer Leiterplatte unter Entfernung eines Teilbereichs derselben, wobei wenigstens zwei Schichten bzw. Lagen der Leiterplatte (1) miteinander verbunden werden und eine Verbindung des zu entfernenden Teilbereichs (6) mit einer benachbart liegenden Lage der Leiterplatte durch Vorsehen einer Schicht (7) aus einem ein Anhaften bzw. Verkleben verhindernden Material verhindert wird und Randbereiche (8) des zu entfernenden Teilbereichs (6) von daran angrenzenden Bereichen der Leiterplatte (1) getrennt werden, ist vorgesehen, dass in bzw. an der Schicht (7) aus dem ein Anhaften bzw. Verkleben verhindernden Material in einem Teilbereich eine Rissbildung und/oder eine Ablösung von dem zu entfernenden Teilbereich (6) der Leiterplatte (1) induziert wird und nachfolgend der zu entfernende Teilbereich (6) entfernt wird, wodurch einfach und in zuverlässiger und gegebenenfalls automatisierter Weise ein zu entfernender Teilbereich (6) von einer Leiterplatte (1) entfernt werden kann. Darüber hinaus wird eine Verwendung eines derartigen Verfahrens zur Herstellung einer mehrlagigen Leiterplatte (1) und insbesondere zur Erzeugung von Hohlräumen in einer derartigen Leiterplatte (1) vorgeschlagen.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201280067314.2A CN104054402A (zh) | 2011-12-05 | 2012-12-03 | 用于制造电路板的方法(其涉及移除该电路板的子区域)和该方法的应用 |
JP2014543721A JP2015502662A (ja) | 2011-12-05 | 2012-12-03 | プリント回路基板の部分領域を取り出してプリント回路基板を製造する方法ならびにそのような種類の方法の使用 |
EP12816428.2A EP2789215A2 (de) | 2011-12-05 | 2012-12-03 | Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens |
US14/363,223 US20140373350A1 (en) | 2011-12-05 | 2012-12-03 | Method for the Production of a Circuit Board Involving the Removal of a Subregion thereof, and Use of such a Method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ATGM657/2011U AT13229U1 (de) | 2011-12-05 | 2011-12-05 | Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens |
ATGM657/2011 | 2011-12-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2013082638A2 WO2013082638A2 (de) | 2013-06-13 |
WO2013082638A3 true WO2013082638A3 (de) | 2013-11-07 |
Family
ID=48575001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/AT2012/000303 WO2013082638A2 (de) | 2011-12-05 | 2012-12-03 | Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens |
Country Status (6)
Country | Link |
---|---|
US (1) | US20140373350A1 (de) |
EP (1) | EP2789215A2 (de) |
JP (1) | JP2015502662A (de) |
CN (1) | CN104054402A (de) |
AT (1) | AT13229U1 (de) |
WO (1) | WO2013082638A2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT13231U1 (de) | 2011-12-05 | 2013-08-15 | Austria Tech & System Tech | Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens |
CN104735924B (zh) * | 2015-03-31 | 2018-01-12 | 广州美维电子有限公司 | 用于多层阶梯状软硬结合板的开盖工艺 |
CN107872925A (zh) * | 2016-09-27 | 2018-04-03 | 奥特斯奥地利科技与系统技术有限公司 | 将部件嵌入导电箔上的芯中 |
CN108271313B (zh) * | 2016-12-30 | 2021-03-16 | 奥特斯(中国)有限公司 | 用于部件承载件的具有纳米和/或微米结构的片材 |
CN110691479B (zh) * | 2019-10-11 | 2021-05-04 | 博敏电子股份有限公司 | 一种解决电磁屏蔽型刚挠结合板大批量生产的制作方法 |
CN114554725B (zh) * | 2022-04-25 | 2022-07-05 | 绵阳新能智造科技有限公司 | 一种复合pcb板的粘贴装置及方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4003344C1 (de) * | 1990-02-05 | 1991-06-13 | Fa. Carl Freudenberg, 6940 Weinheim, De | |
US5645673A (en) * | 1995-06-02 | 1997-07-08 | International Business Machines Corporation | Lamination process for producing non-planar substrates |
US20100059262A1 (en) * | 2007-02-16 | 2010-03-11 | Gerald Weidinger | Method for removing a part of a planar material layer and multilayer structure |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61183998A (ja) * | 1985-02-12 | 1986-08-16 | 住友電気工業株式会社 | フレキシブル印刷配線基板の製造方法 |
US5201268A (en) * | 1990-12-25 | 1993-04-13 | Matsushita Electric Industrial Co., Ltd. | Intaglio printing process and its application |
US5176771A (en) * | 1991-12-23 | 1993-01-05 | Hughes Aircraft Company | Multilayer ceramic tape substrate having cavities formed in the upper layer thereof and method of fabricating the same by printing and delamination |
JP3547327B2 (ja) * | 1998-11-02 | 2004-07-28 | 松下電器産業株式会社 | セラミック多層基板の製造方法 |
JP3820415B2 (ja) * | 2002-03-07 | 2006-09-13 | 株式会社デンソー | プリント基板の製造方法及びプリント基板の構造 |
US7326857B2 (en) * | 2004-11-18 | 2008-02-05 | International Business Machines Corporation | Method and structure for creating printed circuit boards with stepped thickness |
AT11663U1 (de) | 2007-02-16 | 2011-02-15 | Austria Tech & System Tech | Haftverhinderungsmaterial, verfahren zum entfernen eines teilbereichs einer flächigen materialschicht sowie mehrlagige struktur und verwendung hiefür |
-
2011
- 2011-12-05 AT ATGM657/2011U patent/AT13229U1/de not_active IP Right Cessation
-
2012
- 2012-12-03 EP EP12816428.2A patent/EP2789215A2/de not_active Withdrawn
- 2012-12-03 CN CN201280067314.2A patent/CN104054402A/zh active Pending
- 2012-12-03 US US14/363,223 patent/US20140373350A1/en not_active Abandoned
- 2012-12-03 WO PCT/AT2012/000303 patent/WO2013082638A2/de active Application Filing
- 2012-12-03 JP JP2014543721A patent/JP2015502662A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4003344C1 (de) * | 1990-02-05 | 1991-06-13 | Fa. Carl Freudenberg, 6940 Weinheim, De | |
US5645673A (en) * | 1995-06-02 | 1997-07-08 | International Business Machines Corporation | Lamination process for producing non-planar substrates |
US20100059262A1 (en) * | 2007-02-16 | 2010-03-11 | Gerald Weidinger | Method for removing a part of a planar material layer and multilayer structure |
Also Published As
Publication number | Publication date |
---|---|
US20140373350A1 (en) | 2014-12-25 |
WO2013082638A2 (de) | 2013-06-13 |
AT13229U1 (de) | 2013-08-15 |
JP2015502662A (ja) | 2015-01-22 |
EP2789215A2 (de) | 2014-10-15 |
CN104054402A (zh) | 2014-09-17 |
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