WO2013021884A1 - Method for producing liquid crystal panel, and liquid crystal panel - Google Patents

Method for producing liquid crystal panel, and liquid crystal panel Download PDF

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Publication number
WO2013021884A1
WO2013021884A1 PCT/JP2012/069552 JP2012069552W WO2013021884A1 WO 2013021884 A1 WO2013021884 A1 WO 2013021884A1 JP 2012069552 W JP2012069552 W JP 2012069552W WO 2013021884 A1 WO2013021884 A1 WO 2013021884A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
insulating layer
crystal panel
array substrate
colored
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PCT/JP2012/069552
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French (fr)
Japanese (ja)
Inventor
達朗 黒田
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シャープ株式会社
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Publication of WO2013021884A1 publication Critical patent/WO2013021884A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136231Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process

Definitions

  • the present invention relates to a method for manufacturing a liquid crystal panel and a liquid crystal panel.
  • the liquid crystal display device includes a liquid crystal panel in which liquid crystal is sealed between a pair of translucent substrates, and a backlight device arranged on the back side of the panel.
  • the light emitted from the light source of the backlight device is irradiated from the back side of the liquid crystal panel, whereby the image displayed on the liquid crystal panel becomes visible.
  • the liquid crystal panel is composed of a pair of translucent substrates, that is, an array substrate on which thin film transistors (TFTs) are formed, and a color filter substrate including a color filter layer.
  • TFTs thin film transistors
  • the array substrate and the color filter substrate are respectively formed on separate substrates, and are bonded to each other after the liquid crystal material is dropped. In this way, the liquid crystal panel is manufactured.
  • Patent Document 1 a structure in which an interlayer insulating film in an array substrate is colored and used as a color filter layer has been proposed (for example, Patent Document 1).
  • FIG. 11 shows a configuration of a conventional liquid crystal panel 1000 having a structure in which an interlayer insulating film on an array substrate is colored and used as a color filter layer.
  • FIG. 11 is a cross-sectional view schematically showing a configuration of a conventional liquid crystal panel 1000.
  • a conventional liquid crystal panel 1000 includes an array substrate 110 on which a thin film transistor (TFT) 300 is formed, and a counter substrate 200 facing the array substrate 110.
  • a liquid crystal layer 400 made of a liquid crystal material including liquid crystal molecules 420 is disposed between the array substrate 110 and the counter substrate 200.
  • a TFT 300 is formed for each pixel.
  • the gate wiring 320 is formed on the array substrate 110, and the gate insulating film 330 is formed on the array substrate 110 so as to cover the gate wiring 320.
  • a semiconductor layer 360 is formed on the gate wiring (gate electrode) 320 with a gate insulating film 330 interposed therebetween.
  • a source wiring 340 s and a drain wiring 340 d are connected to the semiconductor layer 360.
  • an insulating film 350 is formed on the array substrate 110 so as to cover the source wiring 340s and the drain wiring 340d.
  • a colored insulating layer 150 is formed on the array substrate 110. Specifically, a red insulating layer 150R, a blue insulating layer 150B, and a green insulating layer 150G (not shown) are formed on the insulating layer 350.
  • a pixel electrode (transparent electrode) 120 is formed on the colored insulating layer 150 (for example, 150R, 150B). A part of the pixel electrode 120 is connected to the drain wiring 340 d of the TFT 300.
  • a pixel electrode (transparent electrode) 220 is formed on the liquid crystal layer 400 side of the counter substrate 200.
  • a light shielding layer (black matrix) 240 is formed on the liquid crystal layer 400 side of the pixel electrode 220.
  • the light shielding layer 240 provided on the counter substrate 200 separates adjacent pixels.
  • FIG. 12 shows a configuration of another conventional liquid crystal panel 2000 having a structure in which an interlayer insulating film in an array substrate is colored and used as a color filter layer.
  • FIG. 12 is a cross-sectional view schematically showing a configuration of a conventional liquid crystal panel 2000. As shown in FIG.
  • a conventional liquid crystal panel 2000 includes an array substrate 500 on which a thin film transistor (TFT) is formed, and a counter substrate (not shown) facing the array substrate 500.
  • a liquid crystal layer (not shown) composed of a liquid crystal material containing liquid crystal molecules is disposed between the array substrate 500 and the counter substrate.
  • TFTs are formed on the array substrate 500 for each pixel.
  • a gate wiring 510 is formed on the array substrate 500, and a gate insulating film 520 is formed on the array substrate 500 so as to cover the gate wiring 510.
  • a semiconductor layer 530 is formed on the gate wiring (gate electrode) 510 with a gate insulating film 520 interposed therebetween.
  • a source wiring 540 and a drain wiring 550 are connected to the semiconductor layer 530.
  • a passivation film 580 is formed on the array substrate 500 so as to cover the source wiring 540 and the drain wiring 550.
  • an insulating layer 630 in which the interlayer insulating film is colored red, blue or green is formed on the passivation film 580.
  • a light shielding layer (black matrix) 650 is formed on the passivation film 580.
  • the light shielding layer 650 is made of a black matrix material in which a pigment (black) is mixed in an interlayer insulating film.
  • An overcoat layer 640 is formed on the array substrate 500 so as to cover the insulating layer 630 and the light shielding layer 650.
  • a pixel electrode (transparent electrode) 660 is formed on the overcoat layer 640. A part of the pixel electrode 660 is connected to the drain wiring 550 of the TFT.
  • the light shielding layer 650 provided on the array substrate 500 separates adjacent pixels.
  • the conventional liquid crystal panels 1000 and 2000 shown in FIGS. 11 and 12 described above have a structure in which an interlayer insulating film on the array substrate is colored and used as a color filter layer. For this reason, it is possible to avoid the above-mentioned problems that occur when the array substrate and the color filter substrate are formed on separate substrates and the liquid crystal material is dropped and then bonded together to manufacture a liquid crystal panel.
  • the light shielding layer 240 is formed on the counter substrate 200 side. For this reason, a gap exists between the light shielding layer 240 provided on the counter substrate 200 side and the colored insulating layer 150 as the color filter layer on the array substrate 110. Accordingly, color mixture occurs when light leaks from the side of the light shielding layer 240.
  • a light shielding layer 650 is provided on the array substrate 500 side.
  • the overcoat layer 640 is formed, and the pixel electrode 660 is formed.
  • the number of photolithography processes is increased, and therefore, the manufacturing cost of the liquid crystal panel 2000 is increased.
  • the present invention has been made in view of such a point, and its main object is to simply provide a liquid crystal panel capable of reducing the occurrence of color mixing due to light leakage.
  • the present invention provides a method for manufacturing a liquid crystal panel including the following steps. That is, the method for manufacturing a liquid crystal panel according to the present invention includes a step (a) of preparing an array substrate on which a thin film transistor is formed, a red insulating layer made of a red coloring material on the array substrate, and a blue coloring.
  • the step (f) is performed by wet etching using the black resin material as a mask.
  • the array substrate is formed with a wiring layer including gate wirings and auxiliary capacitance wirings extending in the row direction, and source wirings extending in the column direction.
  • a metal layer made of a metal material constituting the wiring layer is disposed below the opening where the transparent electrode layer is exposed.
  • the photolithography is performed so that a convex portion defining a rib is formed in a portion corresponding to the pixel region in the black resin material.
  • a rib made of the black resin material is formed on the transparent electrode layer by the half ashing.
  • the liquid crystal panel according to the present invention includes an array substrate on which a thin film transistor is formed, a red insulating layer formed on the array substrate and made of a red coloring material, a blue insulating layer made of a blue coloring material, A colored insulating layer including a green insulating layer made of a green coloring material, a pixel electrode formed on the colored insulating layer, and a black matrix formed on the pixel electrode so as to cover the thin film transistor
  • the pixel electrode is separated at a position that divides the pixel region on the array substrate, and a part of the colored insulating layer exposed in the part where the pixel electrode is separated is removed,
  • the array substrate is formed with a wiring layer including gate wirings and auxiliary capacitance wirings extending in the row direction and source wirings extending in the column direction. Below the part of the edge layer has been removed region, the metal layer made of a metal material constituting the wiring layer is disposed.
  • Another liquid crystal panel includes an array substrate on which a thin film transistor is formed, a red insulating layer formed on the array substrate and made of a red coloring material, and a blue insulating layer made of a blue coloring material.
  • a rib made of the same material as that of the black matrix is formed on the surface of the portion corresponding to the pixel region in the pixel electrode.
  • a black resin material having photosensitivity is deposited on the transparent electrode layer, and then the transparent electrode is formed using a photolithography process.
  • An opening exposing the layer is formed in the black resin material.
  • halftone exposure is performed on a portion corresponding to the pixel region in the black resin material, and a portion corresponding to the light shielding portion in the black resin material is left.
  • a black matrix is formed from the black resin material. Therefore, it is possible to simply provide a liquid crystal panel that can reduce the occurrence of color mixing due to light leakage.
  • (A) And (b) has shown typically the structure of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a cross-sectional view schematically showing a configuration of a channel portion in the liquid crystal panel 100 according to the embodiment of the present invention.
  • (B) is sectional drawing which shows typically the structure of the auxiliary capacity
  • Cs is a top view which shows typically the structure of the liquid crystal panel 100 which concerns on embodiment of this invention.
  • (A) And (b) has shown typically the cross-sectional structure for demonstrating the effect of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a cross-sectional view schematically showing a configuration of a liquid crystal panel 1100 of a comparative example in which a light shielding layer 240 is formed on the counter substrate 200 side.
  • (B) is sectional drawing which shows typically the structure of the liquid crystal panel 100 which concerns on embodiment of this invention by which the black matrix 24 was formed on the color filter (coloring insulating layer 15).
  • (A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100.
  • A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • B) is process sectional drawing of the auxiliary
  • (A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • (B) is process sectional drawing of the auxiliary
  • FIG. (A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100.
  • A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • B) is process sectional drawing of the auxiliary
  • (A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention.
  • (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100.
  • (B) is process sectional drawing of the capacitor part for demonstrating the manufacturing method of the liquid crystal panel 100.
  • FIG. FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100.
  • (A) is sectional drawing of the channel part which shows the structure of the liquid crystal panel 100 which concerns on the 2nd Embodiment of this invention.
  • (B) is a top view which shows the structure of the liquid crystal panel 100 which concerns on the 2nd Embodiment of this invention.
  • (A) And (b) is process sectional drawing of the channel part which shows the 1st modification of the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. It is sectional drawing which shows the structure of the conventional liquid crystal panel 1000 typically. It is sectional drawing which shows the structure of the conventional liquid crystal panel 2000 typically.
  • FIG. 1 schematically shows a configuration of a liquid crystal panel 100 according to an embodiment of the present invention.
  • FIG. 1A is a cross-sectional view schematically showing a configuration of a channel portion in a thin film transistor (TFT) 30 of a liquid crystal panel 100 according to an embodiment of the present invention.
  • FIG. 1B is a cross-sectional view schematically showing the configuration of the auxiliary capacitance (Cs) portion in the liquid crystal panel 100 of the present embodiment.
  • FIG. 1C is a plan view schematically showing the configuration of the pixel region in the liquid crystal panel 100 of the present embodiment.
  • 1A and 1B are cross-sectional views showing the thin film transistor (TFT) 30 and the auxiliary capacitor (Cs) for easy understanding, and the plan view shown in FIG. 1C. And does not necessarily correspond.
  • FIGS. 1A and 1B are schematic cross-sectional views in which cross sections of different color pixel regions adjacent to each other appear, and are cross-sectional views along the row direction or the column direction. It does not represent.
  • the liquid crystal panel 100 of the present embodiment has a structure in which an interlayer insulating film in the array substrate 10 is colored and used as a color filter layer.
  • the liquid crystal panel 100 of this embodiment includes an array substrate 10 on which a thin film transistor (TFT) 30 is formed, and a counter substrate (not shown) facing the array substrate 10.
  • a liquid crystal layer (not shown) is disposed between the counter substrate.
  • the liquid crystal panel of the present embodiment is a so-called active matrix type (TFT type) liquid crystal panel.
  • a sealing material (not shown) for sealing the liquid crystal layer is formed on the periphery of the array substrate 10 and the counter substrate.
  • the liquid crystal layer is made of a liquid crystal material containing liquid crystal molecules, and the liquid crystal material changes its optical characteristics by manipulating the alignment of the liquid crystal molecules in accordance with the application of an electric field between the array substrate 10 and the counter substrate. .
  • the array substrate 10 is composed of a translucent substrate (glass substrate). Further, as shown in FIGS. 1A and 1C, the array substrate 10 is provided with a TFT 30 for each pixel. In addition, as shown in FIG. 1C, the array substrate 10 is formed with gate wiring 32 extending in the row direction and auxiliary capacitance wiring (Cs wiring) extending in parallel therewith. A source wiring 34 extending in the column direction is formed on the array substrate 10. Since the row direction and the column direction are for convenience, the relationship may be reversed in addition to the case where the row direction means the horizontal direction and the column direction means the vertical direction.
  • a gate wiring 32 is formed on the array substrate 10, and a gate insulating film 33 is formed on the array substrate 10 so as to cover the gate wiring 32.
  • a semiconductor layer 36 is formed on the gate wiring (gate electrode) 32 via a gate insulating film 33.
  • the semiconductor layer 36 includes a wiring 34 s extending from the source wiring 34 arranged in the row direction to the source electrode (for convenience, the wiring 34 s is also referred to as a source wiring), and a drain electrode extending from the drain electrode facing the source electrode.
  • the wiring 34d is connected.
  • the TFT 30 is constructed by the gate wiring (gate electrode) 32, the gate insulating film 33, the semiconductor layer 36, the source wirings 34 and 34s, and the drain wiring 34d.
  • an insulating film for example, a passivation film or a protective film
  • a passivation film or a protective film is formed on the array substrate 10 (more precisely, on the gate insulating film 33) so as to cover the source wiring 34s and the drain wiring 34d.
  • the auxiliary capacitance (Cs) is formed on the array substrate 10.
  • the auxiliary capacitance (Cs) is formed by the Cs electrode, the insulating film 33, and the pixel electrode 12 that are located in a part of the auxiliary capacitance wiring (Cs wiring) 31.
  • the insulating film (dielectric layer) constituting the auxiliary capacitance (Cs) is located between the Cs electrode (31) and the pixel electrode 12, and the auxiliary capacitance (Cs) is the Cs wiring 31 and the pixel electrode. 12 is formed at the intersection with 12.
  • the auxiliary capacitor (Cs) has a role of supplying charges to the liquid crystal layer and maintaining the luminance of the pixel in a period in which the gate signal is OFF.
  • an insulating film 33 is formed on the array substrate 10 so as to cover the Cs wiring 31, and the source is formed so as to get over the Cs wiring 31.
  • the wiring 34 extends.
  • a colored insulating layer 15 is formed on the array substrate 10. Specifically, on the array substrate 10, a first colored insulating layer 15 (for example, a red insulating layer 15R) made of a first colored material (for example, a red colored material) and a second colored material (for example, a red colored material) , A blue colored material), a second colored insulating layer 15 (for example, a blue colored insulating layer 15B), and a third colored insulating layer 15 (for example, a green colored material) (for example, green colored material).
  • the colored insulating layer 15 of each color is formed on the insulating film 35.
  • a first colored insulating layer 15 for example, a red insulating layer 15R
  • a red colored material for example, a red colored material
  • a second colored material for example, a red colored material
  • a blue colored insulating layer 15B for example, a blue colored insulating layer 15B
  • a third colored insulating layer 15 for example, a
  • the colored insulating layer 15 (15R, 15B, 15G) of each color functions as a color filter layer.
  • the colored insulating layers 15 (15R, 15B, 15G) for each color are made of a light-transmitting resin containing a pigment for each color.
  • a photoresist material such as a photosensitive acrylic resin (
  • the product name is JSR (trade name JAS).
  • the color insulating layer (15R, 15B, 15G) that functions as a color filter layer is formed on the array substrate 10, and therefore the color filter layer is not disposed on the counter substrate side.
  • polarizing plates (not shown) are attached to the outer surfaces of the array substrate and the counter substrate, respectively.
  • a pixel electrode (transparent electrode) 12 is formed on the colored insulating layer 15 (for example, 15R, 15B).
  • the pixel electrode 12 is made of, for example, ITO (Indium Tim Oxide) and has a vertically long rectangular shape.
  • a part of the pixel electrode 12 is connected to the drain wiring 34d of the TFT 30, as shown in FIG.
  • an opening 25 a that defines the outline of the pixel electrode 12 is formed in the transparent electrode layer (ITO layer) constituting the pixel electrode 12.
  • an opening 25 b for connecting the pixel electrode 12 and the source wiring 34 is formed on the Cs wiring 31.
  • An alignment film (not shown) that determines the alignment direction of the liquid crystal molecules in the liquid crystal layer is formed on the pixel electrode 12.
  • a black matrix (light shielding layer or light shielding portion) 24 for separating adjacent pixels is formed on the pixel electrode 12.
  • the black matrix 24 is made of a black resin material in which a pigment is mixed into a resin.
  • the black matrix 24 is formed so as to distinguish the blue pixel (B) and the red pixel (R).
  • the black matrix 24 is formed in the opening 25b formed on the Cs wiring 31.
  • the colored insulating layer 15 of this embodiment has a role as an interlayer insulating film located between the pixel electrode 12 and the source wiring 34 (or 34s). More specifically, when only a relatively thin insulating film (passivation film) 35 exists between the pixel electrode 12 and the source wiring 34s, the pixel electrode is affected by the electric field generated around the source wiring 34. The voltage of 12 rises, and this may cause a problem that the alignment state of the liquid crystal molecules changes at an unintended timing. As in the configuration of the present embodiment, by providing a colored insulating layer (interlayer insulating film) 15 thicker than the insulating film 35 between the pixel electrode 12 and the source wiring 34, the source wiring 34 is surrounded. The influence of the generated electric field can be reduced. As a result, it is possible to prevent a problem that the alignment state of the liquid crystal molecules changes at an unintended timing.
  • the thickness of the transparent substrate (glass substrate) constituting the main body of the array substrate 10 and the counter substrate of the present embodiment is, for example, 0.5 to 1 mm.
  • the array substrate 10 and the counter substrate may be in the form of a mother glass (large substrate) capable of obtaining multiple liquid crystal panels, or may be a substrate having the size of one liquid crystal panel.
  • the semiconductor layer 36 constituting the TFT 30 is a silicon layer made of silicon (for example, amorphous silicon), but a semiconductor layer made of another semiconductor material can be used.
  • the semiconductor layer 36 may be an oxide semiconductor layer made of an oxide semiconductor material.
  • the wiring layers such as the gate wiring 32, the source wiring 34, and the drain wiring 34d are composed of a conductive layer such as a metal layer.
  • the gate wiring 32 is composed of a metal layer such as aluminum or copper, but a multilayer film may be used.
  • Each of the gate wiring 32, the source wiring 34, and the drain wiring 34d may be formed of the same conductive layer, or may be made of different conductive layers.
  • the gate insulating film 33 is made of, for example, silicon nitride.
  • the insulating film (passivation film) 35 is made of, for example, nitride (silicon nitride or the like). The thicknesses and materials of the various layers are appropriately selected according to the manufacturing apparatus and manufacturing process, and are not particularly limited.
  • a black matrix (light shielding layer) 24 is formed on the colored insulating layer (interlayer insulating film) 15 on the array substrate 10. That is, the liquid crystal panel 100 according to the present embodiment can prevent color mixing of adjacent different colors on the colored insulating layer 15 functioning as a color filter, thereby enabling color development without bleeding. Therefore, in the configuration of the liquid crystal panel 100 of the present embodiment, the black matrix 24 formed on the colored insulating layer 15 in the array substrate 10 can be effectively shielded from light, and as a result, the color reproducibility is improved. be able to.
  • FIG. 2 schematically shows a cross-sectional configuration for explaining the effect of the liquid crystal panel 100 according to an embodiment of the present invention.
  • FIG. 2A is a cross-sectional view schematically showing a configuration of a liquid crystal panel 1100 of a comparative example in which a black matrix 240 is formed on the counter substrate 200 side.
  • FIG. 2B is a cross-sectional view schematically showing the configuration of the liquid crystal panel 100 of the present embodiment in which the black matrix 24 is formed on the color filter (colored insulating layer 15).
  • the light 60A that has passed through the green insulating layer 150G facing the line of sight 65 on the viewer side is provided on the counter substrate 200 side.
  • the black matrix 240 is shielded from light.
  • part of the light 60A that has passed through the green insulating layer 150G leaks from the side of the black matrix 240. (See arrow 62).
  • the light 60B that has passed through the green insulating layer 15G facing the line of sight 65 on the viewer side is a color filter.
  • the light is shielded by the black matrix 24 on the (colored insulating layer 15).
  • the black matrix 24 can effectively prevent color mixing, color development without blurring is possible, and color reproducibility can be improved.
  • the black matrix 24 is formed on the colored insulating layer 15 (15R, 15B, 15G) in the array substrate 10.
  • FIGS. 3 to 8 are process diagrams for explaining a method of manufacturing the liquid crystal panel 100 according to an embodiment of the present invention.
  • FIG. 3A to FIG. 8A are process cross-sectional views of a channel portion for explaining a method of manufacturing the liquid crystal panel 100 of the present embodiment.
  • FIGS. 3B to 8B are process cross-sectional views of the auxiliary capacitor (Cs) portion for explaining the method for manufacturing the liquid crystal panel 100 of the present embodiment.
  • FIGS. 3, 6, and 8 (c) are process plan views for explaining a method for manufacturing the liquid crystal panel 100 according to the present embodiment.
  • an array substrate 10 on which a colored insulating layer 15 (a red insulating layer 15R, a blue insulating layer 15B, and a green insulating layer 15G) is formed is prepared.
  • a substrate on which the TFT 30 having the above-described configuration is formed is used as the array substrate (glass substrate) 10 prepared here.
  • the red insulating layer 15R, the blue insulating layer 15B, and the green insulating layer 15G are each formed by a known photolithography process, and specifically, formed by repeating a coating process, an exposure process, a development process, and the like.
  • an opening 23a that separates the insulating layers of the respective colors in the colored insulating layer 15 is formed.
  • the opening 23a is formed so as to expose a part of the drain wiring 34d.
  • an opening 23b exposing the source electrode 34 is formed in the auxiliary capacitance portion of the present embodiment.
  • an ITO (Indium Time Oxide) layer 12 is deposited as a transparent electrode material on the entire surface of the array substrate 10 by sputtering, for example. Thereby, the ITO layer 12 and the source electrode 34 are electrically connected.
  • ITO Indium Time Oxide
  • a photoresist material such as a resin containing a black pigment, such as a photosensitive acrylic resin (for example, The product name JAS manufactured by JSR) is applied.
  • the black resin layer 24 has a thickness of about 1 ⁇ m to 3 ⁇ m, for example.
  • the black resin layer (photoresist material) 24 is exposed using a photomask that opens a predetermined region to be a part to be separated from the pixel electrode.
  • halftone exposure is performed on the black resin layer 24 in the pixel region so that the thickness of the black resin layer 24 in the pixel region after development is about half of the thickness of the black resin layer 24 in the light shielding region. Apply.
  • openings 24h1 and 24h2 exposing the ITO layer 12 are formed at predetermined positions, and the thickness of the black resin layer 24 in the pixel region is about half. become.
  • the thickness of the black resin layer 24 in the pixel region is about half, but the present invention is not limited thereto, and the processing may be performed so that the thickness of the black resin layer 24 in the pixel region remains.
  • the thickness of the photoresist material 24 in the light shielding region is the same as the thickness before development.
  • halftone exposure is exposure using a halftone mask (or gray tone mask).
  • the halftone mask is a mask having a semi-transmissive portion in which the exposure amount is partially controlled in the photomask of the photolithography process, and a layer having an intermediate film thickness is formed using the halftone mask. It becomes possible.
  • the semi-transmissive portion of the halftone mask can be constructed by a film having an arbitrary transmittance, a slit, or the like.
  • wet etching is performed using the remaining black resin layer 24 as a mask. Thereby, the ITO layer 12 exposed to the openings 24h1 and 24h2 is removed, and the opening 24p1 exposing the colored insulating layer 15 and the opening 24p2 exposing the source wiring 34 and the gate insulating film 33 are formed. In this way, a separation portion of the pixel electrode 12 is formed.
  • a black matrix (light shielding layer) 24 is formed in a predetermined region.
  • etching is performed by ashing a layer (resin layer) made of a resin material, for example, by plasma treatment or the like.
  • the photoresist material is removed by plasma treatment or the like.
  • half ashing means ashing at a predetermined thickness (for example, half the thickness before etching) without etching the entire resin layer. I do not care.
  • the manufacturing method of the present embodiment it is possible to manufacture the liquid crystal panel 100 capable of coloring without bleeding and having high color reproducibility. Further, as explained in the steps of FIGS. 6 and 7, the ITO layer 12 can be patterned by the wet etching process using the photoresist material (black matrix) 24 as a mask, so that the process can be simplified and the cost can be reduced. It becomes.
  • the number of photolithography processes increases, leading to an increase in manufacturing cost.
  • the photolithography process is compared with that. Since the number of times can be reduced, a reduction in manufacturing cost (simplification of process and cost reduction) can be realized.
  • the first colored insulating layer 15 is the red insulating layer 15R
  • the second colored insulating layer 15 is the blue insulating layer 15B
  • the third colored insulating layer 15 is the green insulating layer 15G.
  • the first colored insulating layer 15 may be the green insulating layer 15G or the blue insulating layer 15B.
  • the third colored insulating layer 15 may be the red insulating layer 15R or the blue insulating layer 15B instead of the green insulating layer 15G.
  • the second colored insulating layer 15 may be replaced with the red insulating layer 15R or the green insulating layer 15G instead of the blue insulating layer 15B.
  • FIG. 9A is a cross-sectional view of the channel portion showing the configuration of the liquid crystal panel 100 according to the second embodiment.
  • FIG. 9B is a plan view showing the configuration of the liquid crystal panel 100 according to the second embodiment.
  • a metal layer (34st) made of a metal material constituting the wiring layer (34, 32 or 31) is disposed below the opening 24 r.
  • a metal layer (source metal layer) 34 st constituted by the source wiring 34 is provided below the opening 24 r.
  • the opening 24r is formed in a form in which a part of the colored insulating layer 15 is removed by the etching process (half ashing process) shown in FIG. 8A.
  • etching process half ashing process
  • the metal layer 34st is positioned below the opening 24r. By doing so, the portion can be shielded from light. Therefore, it is possible to obtain an effect that a color change region does not enter the eyes of the viewer.
  • the light shielding metal layer 34st is formed from the electrode material constituting the source wiring 34.
  • the gate wiring 32 (or Cs wiring 31) corresponds to the position of the opening 24r and the process conditions.
  • a light shielding metal layer may be provided below the opening 24r from the electrode material that constitutes the above.
  • FIGS. 10 (a) and (b) are process cross-sectional views of a channel portion illustrating a method for manufacturing the liquid crystal panel 100 according to the third embodiment.
  • the configuration of this embodiment is characterized in that ribs (24B) made of the same material as that of the black matrix 24 are formed on the surface of the portion corresponding to the pixel region in the pixel electrode 12.
  • the rib 24B in this example has a pattern of vertical alignment ribs that defines the vertical alignment of liquid crystal molecules (see “420” in FIG. 11).
  • the process shown in FIG. 10A corresponds to the process shown in FIG.
  • the photolithography process is performed so that the convex portions 24A that define the ribs are formed in the portions of the black resin material 24 corresponding to the pixel regions.
  • the convex portion 24A has a substantially hemispherical pattern in the pixel region so that the rib 24B remains as a result of performing the half ashing in FIG.
  • the ribs 24B can be formed on the transparent electrode 12 simultaneously with the formation of the black matrix 24. This simplifies the process and reduces costs.
  • the color filter layer (color filter layer on the array substrate 10) composed of the three primary colors of the red insulating layer (15R), the blue insulating layer (15B), and the green insulating layer (15G) is shown. It is also possible to apply the technique of the present embodiment to a color filter layer composed of four primary colors with a yellow insulating layer (15Y) added thereto.
  • the rib 24 is formed.
  • excellent viewing characteristics are obtained without the rib. It is possible to achieve.
  • the light irradiation step for defining the alignment direction is performed by light irradiation, so that it is a non-contact process, unlike the rubbing method. This has the advantage that the occurrence of the above does not occur.

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Abstract

To provide a liquid crystal panel by simple processes, in said liquid crystal panel occurrence of color mixing caused by light leakage able to be reduced. A method for producing a liquid crystal panel, which carries out the following steps. After forming a color insulating layer (15) on an array substrate (10) that is provided with a thin film transistor (30), a transparent electrode layer (12) is formed on the color insulating layer (15). Then, after depositing a photosensitive black resin material (24) on the transparent electrode layer (12), an opening through which the transparent electrode layer (12) is exposed is formed in the black resin material (24) by means of photolithography, and a portion of the black resin material (24) corresponding to the pixel region is subjected to half-tone exposure, while leaving a portion of the black resin material (24) corresponding to the light-shielding portion intact. Next, after removing the transparent electrode layer (12) exposed from the opening, the portion of the black resin material (24) having been subjected to the half-tone exposure is removed by subjecting the black resin material (24) to half ashing, thereby forming a black matrix (24) from the black resin material (24).

Description

液晶パネルの製造方法および液晶パネルLiquid crystal panel manufacturing method and liquid crystal panel
 本発明は、液晶パネルの製造方法および液晶パネルに関する。
 なお、本出願は2011年8月9日に出願された日本国特許出願2011-173883号に基づく優先権を主張しており、その出願の全内容は本明細書中に参照として組み入れられている。
The present invention relates to a method for manufacturing a liquid crystal panel and a liquid crystal panel.
This application claims priority based on Japanese Patent Application No. 2011-173883 filed on Aug. 9, 2011, the entire contents of which are incorporated herein by reference. .
 液晶表示装置は、一対の透光性基板の間に液晶が封止されてなる液晶パネルと、該パネルの背面側に配置されたバックライト装置とを備えている。液晶表示装置では、バックライト装置の光源から出射された光が液晶パネルの背面側から照射されることによって液晶パネルに表示された画像が視認可能となる。 The liquid crystal display device includes a liquid crystal panel in which liquid crystal is sealed between a pair of translucent substrates, and a backlight device arranged on the back side of the panel. In the liquid crystal display device, the light emitted from the light source of the backlight device is irradiated from the back side of the liquid crystal panel, whereby the image displayed on the liquid crystal panel becomes visible.
 液晶パネルは、一対の透光性基板、すなわち、薄膜トランジスタ(TFT)が形成されたアレイ基板と、カラーフィルタ層を含むカラーフィルタ基板とから構成されている。アレイ基板およびカラーフィルタ基板はそれぞれ別々の基板に形成され、そして、液晶材料を滴下した後に互いに貼り合わせられる。このようにして液晶パネルは製造されている。 The liquid crystal panel is composed of a pair of translucent substrates, that is, an array substrate on which thin film transistors (TFTs) are formed, and a color filter substrate including a color filter layer. The array substrate and the color filter substrate are respectively formed on separate substrates, and are bonded to each other after the liquid crystal material is dropped. In this way, the liquid crystal panel is manufactured.
 しかしながら、従来の液晶パネルでは、貼り合わせの精度が悪い場合に、画素部分の配線の一部がはみ出し、設計当初の光透過率を達成することができなくなる等の問題が生じることがあった。このような問題を解決するために、アレイ基板における層間絶縁膜に着色を施し、それをカラーフィルタ層として利用する構造が提案されている(例えば、特許文献1)。 However, in the conventional liquid crystal panel, when the bonding accuracy is poor, there is a problem that a part of the wiring of the pixel portion protrudes and the initial light transmittance cannot be achieved. In order to solve such a problem, a structure in which an interlayer insulating film in an array substrate is colored and used as a color filter layer has been proposed (for example, Patent Document 1).
 図11は、アレイ基板における層間絶縁膜に着色を施し、それをカラーフィルタ層として利用する構造を有する従来の液晶パネル1000の構成を示している。図11は、従来の液晶パネル1000の構成を模式的に示す断面図である。 FIG. 11 shows a configuration of a conventional liquid crystal panel 1000 having a structure in which an interlayer insulating film on an array substrate is colored and used as a color filter layer. FIG. 11 is a cross-sectional view schematically showing a configuration of a conventional liquid crystal panel 1000.
 図11に示すように、従来の液晶パネル1000は、薄膜トランジスタ(TFT)300が形成されたアレイ基板110と、アレイ基板110に対向する対向基板200とを備えている。アレイ基板110と対向基板200との間には、液晶分子420を含む液晶材料から構成される液晶層400が配置されている。 As shown in FIG. 11, a conventional liquid crystal panel 1000 includes an array substrate 110 on which a thin film transistor (TFT) 300 is formed, and a counter substrate 200 facing the array substrate 110. A liquid crystal layer 400 made of a liquid crystal material including liquid crystal molecules 420 is disposed between the array substrate 110 and the counter substrate 200.
 アレイ基板110には、画素ごとにTFT300が形成されている。具体的には、アレイ基板110の上には、ゲート配線320が形成されており、そして、ゲート配線320を覆うようにアレイ基板110の上にゲート絶縁膜330が形成されている。ゲート配線(ゲート電極)320の上には、ゲート絶縁膜330を介して半導体層360が形成されている。半導体層360には、ソース配線340sおよびドレイン配線340dが接続されている。この例では、ソース配線340sおよびドレイン配線340dを覆うように、アレイ基板110に絶縁膜350が形成されている。 In the array substrate 110, a TFT 300 is formed for each pixel. Specifically, the gate wiring 320 is formed on the array substrate 110, and the gate insulating film 330 is formed on the array substrate 110 so as to cover the gate wiring 320. A semiconductor layer 360 is formed on the gate wiring (gate electrode) 320 with a gate insulating film 330 interposed therebetween. A source wiring 340 s and a drain wiring 340 d are connected to the semiconductor layer 360. In this example, an insulating film 350 is formed on the array substrate 110 so as to cover the source wiring 340s and the drain wiring 340d.
 アレイ基板110の上に、着色された絶縁層150が形成されている。具体的には、絶縁層350の上には、赤色絶縁層150Rと青色絶縁層150Bと緑色絶縁層150G(不図示)とが形成されている。着色絶縁層150(例えば、150R、150B)の上には、画素電極(透明電極)120が形成されている。画素電極120の一部は、TFT300のドレイン配線340dに接続されている。 A colored insulating layer 150 is formed on the array substrate 110. Specifically, a red insulating layer 150R, a blue insulating layer 150B, and a green insulating layer 150G (not shown) are formed on the insulating layer 350. A pixel electrode (transparent electrode) 120 is formed on the colored insulating layer 150 (for example, 150R, 150B). A part of the pixel electrode 120 is connected to the drain wiring 340 d of the TFT 300.
 対向基板200のうちの液晶層400側には、画素電極(透明電極)220が形成されている。画素電極220のうちの液晶層400側には、遮光層(ブラックマトリクス)240が形成されている。このように、対向基板200に設けられた遮光層240が、隣り合う画素同士を区分けしている。 A pixel electrode (transparent electrode) 220 is formed on the liquid crystal layer 400 side of the counter substrate 200. A light shielding layer (black matrix) 240 is formed on the liquid crystal layer 400 side of the pixel electrode 220. Thus, the light shielding layer 240 provided on the counter substrate 200 separates adjacent pixels.
 また、図12は、アレイ基板における層間絶縁膜に着色を施し、それをカラーフィルタ層として利用する構造を有する従来の別の液晶パネル2000の構成を示している。図12は、従来の液晶パネル2000の構成を模式的に示す断面図である。 FIG. 12 shows a configuration of another conventional liquid crystal panel 2000 having a structure in which an interlayer insulating film in an array substrate is colored and used as a color filter layer. FIG. 12 is a cross-sectional view schematically showing a configuration of a conventional liquid crystal panel 2000. As shown in FIG.
 図12に示すように、従来の液晶パネル2000は、薄膜トランジスタ(TFT)が形成されたアレイ基板500と、アレイ基板500に対向する対向基板(不図示)とを備えている。アレイ基板500と対向基板との間には、液晶分子を含む液晶材料から構成される液晶層(不図示)が配置されている。 As shown in FIG. 12, a conventional liquid crystal panel 2000 includes an array substrate 500 on which a thin film transistor (TFT) is formed, and a counter substrate (not shown) facing the array substrate 500. A liquid crystal layer (not shown) composed of a liquid crystal material containing liquid crystal molecules is disposed between the array substrate 500 and the counter substrate.
 図12に示すように、アレイ基板500には、画素ごとにTFTが形成されている。具体的には、アレイ基板500の上には、ゲート配線510が形成されており、そして、ゲート配線510を覆うようにアレイ基板500の上にゲート絶縁膜520が形成されている。ゲート配線(ゲート電極)510の上には、ゲート絶縁膜520を介して半導体層530が形成されている。半導体層530には、ソース配線540およびドレイン配線550が接続されている。ソース配線540およびドレイン配線550を覆うように、アレイ基板500上にパッシベーション膜580が形成されている。 As shown in FIG. 12, TFTs are formed on the array substrate 500 for each pixel. Specifically, a gate wiring 510 is formed on the array substrate 500, and a gate insulating film 520 is formed on the array substrate 500 so as to cover the gate wiring 510. A semiconductor layer 530 is formed on the gate wiring (gate electrode) 510 with a gate insulating film 520 interposed therebetween. A source wiring 540 and a drain wiring 550 are connected to the semiconductor layer 530. A passivation film 580 is formed on the array substrate 500 so as to cover the source wiring 540 and the drain wiring 550.
 パッシベーション膜580の上に、層間絶縁膜が赤色、青色又は緑色に着色された絶縁層630が形成されている。また、パッシベーション膜580の上に、遮光層(ブラックマトリクス)650が形成されている。遮光層650は、層間絶縁膜に顔料(黒色)が混入されたブラックマトリクス材料から構成されている。 On the passivation film 580, an insulating layer 630 in which the interlayer insulating film is colored red, blue or green is formed. A light shielding layer (black matrix) 650 is formed on the passivation film 580. The light shielding layer 650 is made of a black matrix material in which a pigment (black) is mixed in an interlayer insulating film.
 アレイ基板500の上に、絶縁層630および遮光層650を覆うように、オーバーコート層640が形成されている。オーバーコート層640の上に、画素電極(透明電極)660が形成されている。画素電極660の一部は、TFTのドレイン配線550に接続されている。このように、アレイ基板500上に設けられた遮光層650が、隣り合う画素同士を区分けしている。 An overcoat layer 640 is formed on the array substrate 500 so as to cover the insulating layer 630 and the light shielding layer 650. A pixel electrode (transparent electrode) 660 is formed on the overcoat layer 640. A part of the pixel electrode 660 is connected to the drain wiring 550 of the TFT. Thus, the light shielding layer 650 provided on the array substrate 500 separates adjacent pixels.
 以上説明した図11および図12に示した従来の液晶パネル1000および2000は、アレイ基板における層間絶縁膜に着色を施し、それをカラーフィルタ層として利用する構造を有する。このため、アレイ基板およびカラーフィルタ基板がそれぞれ別々の基板に形成され、液晶材料を滴下した後に互いに貼り合わせて液晶パネルを製造する場合に生じる上述の問題を回避することができる。 The conventional liquid crystal panels 1000 and 2000 shown in FIGS. 11 and 12 described above have a structure in which an interlayer insulating film on the array substrate is colored and used as a color filter layer. For this reason, it is possible to avoid the above-mentioned problems that occur when the array substrate and the color filter substrate are formed on separate substrates and the liquid crystal material is dropped and then bonded together to manufacture a liquid crystal panel.
特開2010-156960号公報JP 2010-156960 A
 しかしながら、図11に示した従来の液晶パネル1000では、対向基板200側に遮光層240が形成されている。このため、対向基板200側に設けられた遮光層240とアレイ基板110上のカラーフィルタ層としての着色絶縁層150との間にギャップが存在する。したがって、遮光層240の横から光が漏れ出すことにより、混色が発生する。これに対し、幅としてある程度のマージンを持たせた遮光層240を配置する等の対策を取ることもできるが、その場合、開口率を上げることが困難になるなどの制約を受けることになる。 However, in the conventional liquid crystal panel 1000 shown in FIG. 11, the light shielding layer 240 is formed on the counter substrate 200 side. For this reason, a gap exists between the light shielding layer 240 provided on the counter substrate 200 side and the colored insulating layer 150 as the color filter layer on the array substrate 110. Accordingly, color mixture occurs when light leaks from the side of the light shielding layer 240. On the other hand, it is possible to take measures such as arranging the light shielding layer 240 having a certain margin as a width, but in that case, there are restrictions such as difficulty in increasing the aperture ratio.
 一方、図12に示した従来の液晶パネル2000では、アレイ基板500側に遮光層650が設けられている。このため、図11に示した従来の液晶パネル1000における上述した光の漏れ出しによる混色の発生という問題は生じにくい。しかしながら、図12に示した従来の液晶パネル2000では、遮光層650を形成した後、オーバーコート層640を形成し、そして、画素電極660を形成する。このように、フォトリソグラフィ工程の回数が多くなり、それゆえに、液晶パネル2000の製造コストの増加につながる。 On the other hand, in the conventional liquid crystal panel 2000 shown in FIG. 12, a light shielding layer 650 is provided on the array substrate 500 side. For this reason, in the conventional liquid crystal panel 1000 shown in FIG. However, in the conventional liquid crystal panel 2000 shown in FIG. 12, after forming the light shielding layer 650, the overcoat layer 640 is formed, and the pixel electrode 660 is formed. As described above, the number of photolithography processes is increased, and therefore, the manufacturing cost of the liquid crystal panel 2000 is increased.
 本発明はかかる点に鑑みてなされたものであり、その主な目的は、光の漏れ出しによる混色の発生を低減できる液晶パネルを簡便に提供することにある。 The present invention has been made in view of such a point, and its main object is to simply provide a liquid crystal panel capable of reducing the occurrence of color mixing due to light leakage.
 上記目的を実現するべく、本発明により、以下の工程を含む液晶パネルの製造方法が提供される。即ち、本発明に係る液晶パネルの製造方法は、薄膜トランジスタが形成されたアレイ基板を用意する工程(a)と、前記アレイ基板の上に、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む、感光性を有する着色絶縁層を形成する工程(b)と、前記着色絶縁層の上に、透明電極層を形成する工程(c)と、前記透明電極層の上に、感光性を有する黒色樹脂材料を堆積する工程(d)と、フォトリソグラフィ工程を用いて、前記透明電極層を露出する開口部を前記黒色樹脂材料に形成し、かつ、前記黒色樹脂材料における画素領域に対応する部分に対してハーフトーン露光を行うとともに、前記黒色樹脂材料における遮光部分に対応する部分は残存させる工程(e)と、前記開口部に露出している前記透明電極層を除去する工程(f)と、前記黒色樹脂材料をハーフアッシングすることによって前記黒色樹脂材料における前記ハーフトーン露光を行った部分を除去し、それにより、前記黒色樹脂材料からブラックマトリクスを形成する工程(g)とを含む。 In order to achieve the above object, the present invention provides a method for manufacturing a liquid crystal panel including the following steps. That is, the method for manufacturing a liquid crystal panel according to the present invention includes a step (a) of preparing an array substrate on which a thin film transistor is formed, a red insulating layer made of a red coloring material on the array substrate, and a blue coloring. A step (b) of forming a colored insulating layer having photosensitivity including a blue insulating layer made of a material and a green insulating layer made of a green coloring material, and a transparent electrode on the colored insulating layer; Forming a layer (c), depositing a photosensitive black resin material on the transparent electrode layer (d), and an opening for exposing the transparent electrode layer using a photolithography process Is formed on the black resin material, and halftone exposure is performed on a portion corresponding to the pixel region in the black resin material, and a portion corresponding to the light shielding portion in the black resin material is left. A step (e), a step (f) of removing the transparent electrode layer exposed in the opening, and a portion of the black resin material subjected to the halftone exposure by half ashing the black resin material And thereby forming a black matrix from the black resin material (g).
 ここで開示される製造方法の好適な一態様では、前記工程(f)は、前記黒色樹脂材料をマスクとして用いたウェットエッチングによって実行される。 In a preferred aspect of the manufacturing method disclosed herein, the step (f) is performed by wet etching using the black resin material as a mask.
 ここで開示される製造方法の好適な一態様では、前記アレイ基板には、行方向に延びるゲート配線および補助容量配線と、列方向に延びるソース配線とを含む配線層が形成されており、前記工程(e)において、前記透明電極層を露出する前記開口部が位置する下方において、前記配線層を構成する金属材料からなる金属層が配置されている。 In a preferred aspect of the manufacturing method disclosed herein, the array substrate is formed with a wiring layer including gate wirings and auxiliary capacitance wirings extending in the row direction, and source wirings extending in the column direction. In the step (e), a metal layer made of a metal material constituting the wiring layer is disposed below the opening where the transparent electrode layer is exposed.
 ここで開示される製造方法の好適な一態様では、前記工程(e)において、前記黒色樹脂材料における画素領域に対応する部分に、リブを規定する凸部が形成されるように、前記フォトリソグラフィ工程を実行し、前記工程(g)において、前記ハーフアッシングによって、前記透明電極層の上に、前記黒色樹脂材料からなるリブを形成する。 In a preferred aspect of the manufacturing method disclosed herein, in the step (e), the photolithography is performed so that a convex portion defining a rib is formed in a portion corresponding to the pixel region in the black resin material. In the step (g), a rib made of the black resin material is formed on the transparent electrode layer by the half ashing.
 本発明に係る液晶パネルは、薄膜トランジスタが形成されたアレイ基板と、前記アレイ基板の上に形成され、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む着色絶縁層と、前記着色絶縁層の上に形成された画素電極と、前記画素電極の上に、前記薄膜トランジスタを覆うように形成されたブラックマトリクスとを備え、前記画素電極は、前記アレイ基板における画素領域を区分けする位置において切り離されており、前記画素電極が切り離された部分に露出する前記着色絶縁層の一部が除去されており、前記アレイ基板には、行方向に延びるゲート配線および補助容量配線と、列方向に延びるソース配線とを含む配線層が形成されており、前記着色絶縁層の一部が除去された領域の下方には、前記配線層を構成する金属材料からなる金属層が配置されている。 The liquid crystal panel according to the present invention includes an array substrate on which a thin film transistor is formed, a red insulating layer formed on the array substrate and made of a red coloring material, a blue insulating layer made of a blue coloring material, A colored insulating layer including a green insulating layer made of a green coloring material, a pixel electrode formed on the colored insulating layer, and a black matrix formed on the pixel electrode so as to cover the thin film transistor The pixel electrode is separated at a position that divides the pixel region on the array substrate, and a part of the colored insulating layer exposed in the part where the pixel electrode is separated is removed, The array substrate is formed with a wiring layer including gate wirings and auxiliary capacitance wirings extending in the row direction and source wirings extending in the column direction. Below the part of the edge layer has been removed region, the metal layer made of a metal material constituting the wiring layer is disposed.
 本発明に係る他の液晶パネルは、薄膜トランジスタが形成されたアレイ基板と、前記アレイ基板の上に形成され、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む着色絶縁層と、前記着色絶縁層の上に形成された画素電極と、前記画素電極の上に、前記薄膜トランジスタを覆うように形成されたブラックマトリクスとを備え、前記画素電極における画素領域に対応する部分の表面には、前記ブラックマトリクスと同じ材料からなるリブが形成されている。 Another liquid crystal panel according to the present invention includes an array substrate on which a thin film transistor is formed, a red insulating layer formed on the array substrate and made of a red coloring material, and a blue insulating layer made of a blue coloring material. A colored insulating layer including a green insulating layer made of a green coloring material, a pixel electrode formed on the colored insulating layer, and a thin film transistor formed on the pixel electrode so as to cover the thin film transistor A rib made of the same material as that of the black matrix is formed on the surface of the portion corresponding to the pixel region in the pixel electrode.
 本発明によると、着色絶縁層の上に透明電極層を形成した後、前記透明電極層の上に、感光性を有する黒色樹脂材料を堆積し、次いで、フォトリソグラフィ工程を用いて、前記透明電極層を露出する開口部を前記黒色樹脂材料に形成する。また、当該フォトリソグラフィ工程において、黒色樹脂材料における画素領域に対応する部分に対してハーフトーン露光を行うとともに、前記黒色樹脂材料における遮光部分に対応する部分は残存させる工程を行う。次に、前記開口部に露出している前記透明電極層を除去した後、前記黒色樹脂材料をハーフアッシングすることによって前記黒色樹脂材料における前記ハーフトーン露光を行った部分を除去し、それにより、前記黒色樹脂材料からブラックマトリクスを形成する。したがって、光の漏れ出しによる混色の発生を低減できる液晶パネルを簡便に提供することができる。 According to the present invention, after forming a transparent electrode layer on the colored insulating layer, a black resin material having photosensitivity is deposited on the transparent electrode layer, and then the transparent electrode is formed using a photolithography process. An opening exposing the layer is formed in the black resin material. Further, in the photolithography process, halftone exposure is performed on a portion corresponding to the pixel region in the black resin material, and a portion corresponding to the light shielding portion in the black resin material is left. Next, after removing the transparent electrode layer exposed in the opening, by removing the portion of the black resin material that has been subjected to the halftone exposure by half ashing, thereby, A black matrix is formed from the black resin material. Therefore, it is possible to simply provide a liquid crystal panel that can reduce the occurrence of color mixing due to light leakage.
(a)および(b)は、本発明の一実施形態に係る液晶パネル100の構成を模式的に示している。具体的には、(a)は、本発明の実施形態に係る液晶パネル100におけるチャネル部分の構成を模式的に示す断面図である。(b)は、本発明の実施形態に係る液晶パネル100における補助容量(Cs)部分の構成を模式的に示す断面図である。(c)は、本発明の実施形態に係る液晶パネル100の構成を模式的に示す平面図である。(A) And (b) has shown typically the structure of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a cross-sectional view schematically showing a configuration of a channel portion in the liquid crystal panel 100 according to the embodiment of the present invention. (B) is sectional drawing which shows typically the structure of the auxiliary capacity | capacitance (Cs) part in the liquid crystal panel 100 which concerns on embodiment of this invention. (C) is a top view which shows typically the structure of the liquid crystal panel 100 which concerns on embodiment of this invention. (a)および(b)は、本発明の一実施形態に係る液晶パネル100の効果を説明するための断面構成を模式的に示している。具体的には、(a)は、対向基板200側に遮光層240が形成された比較例の液晶パネル1100の構成を模式的に示す断面図である。(b)は、カラーフィルタ(着色絶縁層15)上にブラックマトリクス24が形成された本発明の実施形態に係る液晶パネル100の構成を模式的に示す断面図である。(A) And (b) has shown typically the cross-sectional structure for demonstrating the effect of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a cross-sectional view schematically showing a configuration of a liquid crystal panel 1100 of a comparative example in which a light shielding layer 240 is formed on the counter substrate 200 side. (B) is sectional drawing which shows typically the structure of the liquid crystal panel 100 which concerns on embodiment of this invention by which the black matrix 24 was formed on the color filter (coloring insulating layer 15). (a)~(c)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。(c)は、液晶パネル100の製造方法を説明するための工程平面図である。(A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the auxiliary | assistant capacity | capacitance (Cs) part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100. (a)および(b)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。(A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the auxiliary | assistant capacity | capacitance (Cs) part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. (a)および(b)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。(A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the auxiliary | assistant capacity | capacitance (Cs) part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. (a)~(c)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。(c)は、液晶パネル100の製造方法を説明するための工程平面図である。(A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the auxiliary | assistant capacity | capacitance (Cs) part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100. (a)および(b)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。(A) And (b) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the auxiliary | assistant capacity | capacitance (Cs) part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. (a)~(c)は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的に、(a)は、液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。(b)は、液晶パネル100の製造方法を説明するためのキャパシタ部分の工程断面図である。(c)は、液晶パネル100の製造方法を説明するための工程平面図である。(A)-(c) is process drawing for demonstrating the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. Specifically, (a) is a process cross-sectional view of a channel portion for explaining a method for manufacturing the liquid crystal panel 100. (B) is process sectional drawing of the capacitor part for demonstrating the manufacturing method of the liquid crystal panel 100. FIG. FIG. 6C is a process plan view for explaining the method for manufacturing the liquid crystal panel 100. (a)は、本発明の第2の実施形態に係る液晶パネル100の構成を示すチャネル部分の断面図である。(b)は、本発明の第2の実施形態に係る液晶パネル100の構成を示す平面図である。(A) is sectional drawing of the channel part which shows the structure of the liquid crystal panel 100 which concerns on the 2nd Embodiment of this invention. (B) is a top view which shows the structure of the liquid crystal panel 100 which concerns on the 2nd Embodiment of this invention. (a)および(b)は、本発明の一実施形態に係る液晶パネル100の製造方法の第1の改変例を示すチャネル部分の工程断面図である。(A) And (b) is process sectional drawing of the channel part which shows the 1st modification of the manufacturing method of the liquid crystal panel 100 which concerns on one Embodiment of this invention. 従来の液晶パネル1000の構成を模式的に示す断面図である。It is sectional drawing which shows the structure of the conventional liquid crystal panel 1000 typically. 従来の液晶パネル2000の構成を模式的に示す断面図である。It is sectional drawing which shows the structure of the conventional liquid crystal panel 2000 typically.
 図面を参照しながら、本発明の好適ないくつかの実施形態を説明する。なお、本明細書において特に言及している事項以外の事柄であって本発明の実施に必要な事柄(例えば、液晶パネルの構成や構築方法)は、当該分野における従来技術に基づく当業者の設計事項として把握され得る。本発明は、本明細書に開示されている内容と当該分野における技術常識とに基づいて実施することができる。 Several preferred embodiments of the present invention will be described with reference to the drawings. Note that matters other than those specifically mentioned in the present specification and necessary for the implementation of the present invention (for example, the configuration and construction method of the liquid crystal panel) are designed by those skilled in the art based on the prior art in the field. It can be grasped as a matter. The present invention can be carried out based on the contents disclosed in the present specification and common general technical knowledge in the field.
 以下、図1から図8を参照しながら、本発明の好ましい一実施形態について説明する。図1は、本発明の実施形態に係る液晶パネル100の構成を模式的に示している。 Hereinafter, a preferred embodiment of the present invention will be described with reference to FIGS. FIG. 1 schematically shows a configuration of a liquid crystal panel 100 according to an embodiment of the present invention.
 具体的には、図1(a)は、本発明の一実施形態に係る液晶パネル100の薄膜トランジスタ(TFT)30におけるチャネル部分の構成を模式的に示す断面図である。図1(b)は、本実施形態の液晶パネル100における補助容量(Cs)部分の構成を模式的に示す断面図である。また、図1(c)は、本実施形態の液晶パネル100における画素領域の構成を模式的に示す平面図である。なお、図1(a)および図1(b)は、薄膜トランジスタ(TFT)30および補助容量(Cs)部分を理解しやすいように示した断面図であり、図1(c)に示した平面図と必ずしも対応するものではない。具体的には、図1(a)および図1(b)は、互いに隣接する異なる色の画素領域の断面が現れるような模式的な断面図であり、行方向または列方向に沿った断面図を表しているものではない。 Specifically, FIG. 1A is a cross-sectional view schematically showing a configuration of a channel portion in a thin film transistor (TFT) 30 of a liquid crystal panel 100 according to an embodiment of the present invention. FIG. 1B is a cross-sectional view schematically showing the configuration of the auxiliary capacitance (Cs) portion in the liquid crystal panel 100 of the present embodiment. FIG. 1C is a plan view schematically showing the configuration of the pixel region in the liquid crystal panel 100 of the present embodiment. 1A and 1B are cross-sectional views showing the thin film transistor (TFT) 30 and the auxiliary capacitor (Cs) for easy understanding, and the plan view shown in FIG. 1C. And does not necessarily correspond. Specifically, FIGS. 1A and 1B are schematic cross-sectional views in which cross sections of different color pixel regions adjacent to each other appear, and are cross-sectional views along the row direction or the column direction. It does not represent.
 なお、以下の図面において、同じ作用を奏する部材、部位には同じ符号を付し、重複する説明は省略又は簡略化することがある。また、各図における寸法関係(長さ、幅、厚さ等)は、必ずしも実際の寸法関係を正確に反映するものではない。また、図中のハッチングは、構成要素の把握のし易さを主な目的として付しており、必ずしも材料の要素を表現するものではない。さらに、以下の説明において、「前面」又は「表側」とは液晶パネル100における観視者(視聴者)に面する側をいい、「背面」又は「裏側」とは液晶パネル100おける観視者に面しない側をいうこととする。 In addition, in the following drawings, the same code | symbol is attached | subjected to the member and site | part which show the same effect | action, and the overlapping description may be abbreviate | omitted or simplified. In addition, the dimensional relationship (length, width, thickness, etc.) in each drawing does not necessarily accurately reflect the actual dimensional relationship. In addition, hatching in the drawing is given mainly for the purpose of easy understanding of the constituent elements, and does not necessarily represent the elements of the material. Furthermore, in the following description, “front” or “front side” refers to the side facing the viewer (viewer) in the liquid crystal panel 100, and “back” or “back side” refers to the viewer in the liquid crystal panel 100. The side that does not face is said.
 図1(a)などに示すように、本実施形態の液晶パネル100は、アレイ基板10における層間絶縁膜に着色を施し、それをカラーフィルタ層として利用する構造を有する。具体的には、本実施形態の液晶パネル100は、薄膜トランジスタ(TFT)30が形成されたアレイ基板10と、アレイ基板10に対向する対向基板(不図示)とを備えており、アレイ基板10と対向基板との間には液晶層(不図示)が配置されている。本実施形態の液晶パネルは、所謂アクティブマトリクス方式(TFT型)の液晶パネルである。 As shown in FIG. 1A and the like, the liquid crystal panel 100 of the present embodiment has a structure in which an interlayer insulating film in the array substrate 10 is colored and used as a color filter layer. Specifically, the liquid crystal panel 100 of this embodiment includes an array substrate 10 on which a thin film transistor (TFT) 30 is formed, and a counter substrate (not shown) facing the array substrate 10. A liquid crystal layer (not shown) is disposed between the counter substrate. The liquid crystal panel of the present embodiment is a so-called active matrix type (TFT type) liquid crystal panel.
 なお、アレイ基板10および対向基板の周縁部には、液晶層を封止するためのシール材(不図示)が形成されている。また、液晶層は、液晶分子を含む液晶材料から構成されており、かかる液晶材料は、アレイ基板10と対向基板との間の電界印加に伴って液晶分子の配向が操作され光学特性が変化する。 Note that a sealing material (not shown) for sealing the liquid crystal layer is formed on the periphery of the array substrate 10 and the counter substrate. The liquid crystal layer is made of a liquid crystal material containing liquid crystal molecules, and the liquid crystal material changes its optical characteristics by manipulating the alignment of the liquid crystal molecules in accordance with the application of an electric field between the array substrate 10 and the counter substrate. .
 図1(a)および(b)に示すように、アレイ基板10は、透光性基板(ガラス基板)から構成されている。また、図1(a)および(c)に示すように、アレイ基板10には、画素ごとにTFT30が形成されている。加えて、図1(c)に示すように、アレイ基板10には、行方向に延びるゲート配線32と、それに並行して延びる補助容量配線(Cs配線)とが形成されている。また、アレイ基板10には、列方向に延びるソース配線34が形成されている。なお、行方向・列方向は、便宜上のものであるので、行方向が横方向、列方向が縦方向を意味する場合の他、その関係を逆にしても構わない。 As shown in FIGS. 1A and 1B, the array substrate 10 is composed of a translucent substrate (glass substrate). Further, as shown in FIGS. 1A and 1C, the array substrate 10 is provided with a TFT 30 for each pixel. In addition, as shown in FIG. 1C, the array substrate 10 is formed with gate wiring 32 extending in the row direction and auxiliary capacitance wiring (Cs wiring) extending in parallel therewith. A source wiring 34 extending in the column direction is formed on the array substrate 10. Since the row direction and the column direction are for convenience, the relationship may be reversed in addition to the case where the row direction means the horizontal direction and the column direction means the vertical direction.
 さらに詳細に述べると、アレイ基板10の上には、ゲート配線32が形成されており、そして、ゲート配線32を覆うようにアレイ基板10の上にゲート絶縁膜33が形成されている。ゲート配線(ゲート電極)32の上には、ゲート絶縁膜33を介して半導体層36が形成されている。半導体層36には、行方向に配列されたソース配線34から延びたソース電極に至る配線34s(便宜上、配線34sもソース配線と称する)、および、ソース電極に対向するドレイン電極から延びたドレイン電極配線34dが接続されている。ゲート配線(ゲート電極)32、ゲート絶縁膜33、半導体層36、ソース配線34、34sおよびドレイン配線34dによって、TFT30が構築されている。この例では、ソース配線34sおよびドレイン配線34dを覆うように、アレイ基板10(より正確には、ゲート絶縁膜33上)に絶縁膜(例えば、パッシベーション膜、または保護膜)35が形成されている。 More specifically, a gate wiring 32 is formed on the array substrate 10, and a gate insulating film 33 is formed on the array substrate 10 so as to cover the gate wiring 32. A semiconductor layer 36 is formed on the gate wiring (gate electrode) 32 via a gate insulating film 33. The semiconductor layer 36 includes a wiring 34 s extending from the source wiring 34 arranged in the row direction to the source electrode (for convenience, the wiring 34 s is also referred to as a source wiring), and a drain electrode extending from the drain electrode facing the source electrode. The wiring 34d is connected. The TFT 30 is constructed by the gate wiring (gate electrode) 32, the gate insulating film 33, the semiconductor layer 36, the source wirings 34 and 34s, and the drain wiring 34d. In this example, an insulating film (for example, a passivation film or a protective film) 35 is formed on the array substrate 10 (more precisely, on the gate insulating film 33) so as to cover the source wiring 34s and the drain wiring 34d. .
 また、図1(b)および(c)に示すように、本実施形態の構成では、アレイ基板10に補助容量(Cs)が形成されるように構成されている。ここで、補助容量(Cs)は、補助容量配線(Cs配線)31の一部に位置するCs電極、絶縁膜33、画素電極12によって形成されている。補助容量(Cs)を構成する絶縁膜(誘電体層)は、Cs電極(31)と画素電極12との間に位置しており、そして、補助容量(Cs)は、Cs配線31と画素電極12との交差部において形成されている。また、補助容量(Cs)は、ゲート信号がOFFの期間において液晶層に電荷を供給し、画素の輝度を保持するという役割を有するものである。本実施形態の液晶パネル100の補助容量(Cs)部分では、Cs配線31を覆うように、アレイ基板10の上に絶縁膜33が形成されており、また、Cs配線31を乗り越えるように、ソース配線34が延びている。 Further, as shown in FIGS. 1B and 1C, in the configuration of the present embodiment, the auxiliary capacitance (Cs) is formed on the array substrate 10. Here, the auxiliary capacitance (Cs) is formed by the Cs electrode, the insulating film 33, and the pixel electrode 12 that are located in a part of the auxiliary capacitance wiring (Cs wiring) 31. The insulating film (dielectric layer) constituting the auxiliary capacitance (Cs) is located between the Cs electrode (31) and the pixel electrode 12, and the auxiliary capacitance (Cs) is the Cs wiring 31 and the pixel electrode. 12 is formed at the intersection with 12. Further, the auxiliary capacitor (Cs) has a role of supplying charges to the liquid crystal layer and maintaining the luminance of the pixel in a period in which the gate signal is OFF. In the auxiliary capacitance (Cs) portion of the liquid crystal panel 100 of the present embodiment, an insulating film 33 is formed on the array substrate 10 so as to cover the Cs wiring 31, and the source is formed so as to get over the Cs wiring 31. The wiring 34 extends.
 本実施形態の構成では、アレイ基板10の上に、着色された絶縁層15が形成されている。具体的には、アレイ基板10の上には、第1着色材料(例えば、赤色着色材料)から構成された第1着色絶縁層15(例えば、赤色絶縁層15R)と、第2着色材料(例えば、青色着色材料)から構成された第2着色絶縁層15(例えば、青色絶縁層15B)と、第3着色材料(例えば、緑色着色材料)から構成された第3着色絶縁層15(例えば、緑色絶縁層15Gとが形成されている。図1に示した例では、絶縁膜35の上に、各色の着色絶縁層15が形成されている。 In the configuration of this embodiment, a colored insulating layer 15 is formed on the array substrate 10. Specifically, on the array substrate 10, a first colored insulating layer 15 (for example, a red insulating layer 15R) made of a first colored material (for example, a red colored material) and a second colored material (for example, a red colored material) , A blue colored material), a second colored insulating layer 15 (for example, a blue colored insulating layer 15B), and a third colored insulating layer 15 (for example, a green colored material) (for example, green colored material). 1, the colored insulating layer 15 of each color is formed on the insulating film 35. In the example shown in FIG.
 各色の着色絶縁層15(15R、15B、15G)は、カラーフィルタ層として機能する。具体的には、各色の着色絶縁層15(15R、15B、15G)は、各色の顔料を含有する透光性樹脂から構成されており、例えば、感光性のアクリル樹脂のようなフォトレジスト材料(一例を挙げると、JSR社製の商品名JAS)から構成されている。本実施形態の構成では、アレイ基板10上に、カラーフィルタ層として機能する着色絶縁層(15R、15B、15G)が形成されているので、対向基板の側にはカラーフィルタ層は配置されていない。なお、アレイ基板および対向基板の外面には、それぞれ偏光板(不図示)が貼り付けられることになる。 The colored insulating layer 15 (15R, 15B, 15G) of each color functions as a color filter layer. Specifically, the colored insulating layers 15 (15R, 15B, 15G) for each color are made of a light-transmitting resin containing a pigment for each color. For example, a photoresist material such as a photosensitive acrylic resin ( For example, the product name is JSR (trade name JAS). In the configuration of the present embodiment, the color insulating layer (15R, 15B, 15G) that functions as a color filter layer is formed on the array substrate 10, and therefore the color filter layer is not disposed on the counter substrate side. . Note that polarizing plates (not shown) are attached to the outer surfaces of the array substrate and the counter substrate, respectively.
 本実施形態の構成において、着色絶縁層15(例えば、15R、15B)の上には、画素電極(透明電極)12が形成されている。画素電極12は、例えば、ITO(Indium Tim Oxide)からなり、縦長の矩形形を有している。画素電極12の一部は、図1(a)に示すように、TFT30のドレイン配線34dに接続されている。また、画素電極12を構成する透明電極層(ITO層)には、画素電極12の輪郭を規定する開口部25aが形成されている。さらに、図1(b)に示すように、Cs配線31の上において、画素電極12とソース配線34とを接続するための開口部25bが形成されている。なお、画素電極12の上には、液晶層における液晶分子の配向方向を決定する配向膜(不図示)が形成されている。 In the configuration of the present embodiment, a pixel electrode (transparent electrode) 12 is formed on the colored insulating layer 15 (for example, 15R, 15B). The pixel electrode 12 is made of, for example, ITO (Indium Tim Oxide) and has a vertically long rectangular shape. A part of the pixel electrode 12 is connected to the drain wiring 34d of the TFT 30, as shown in FIG. In addition, an opening 25 a that defines the outline of the pixel electrode 12 is formed in the transparent electrode layer (ITO layer) constituting the pixel electrode 12. Further, as shown in FIG. 1B, an opening 25 b for connecting the pixel electrode 12 and the source wiring 34 is formed on the Cs wiring 31. An alignment film (not shown) that determines the alignment direction of the liquid crystal molecules in the liquid crystal layer is formed on the pixel electrode 12.
 本実施形態の構成において、画素電極12の上には、隣り合う画素同士を区分けするブラックマトリクス(遮光層または遮光部)24が形成されている。ブラックマトリクス24は、樹脂に顔料を混入した黒色樹脂材料から構成されている。図1(a)に示した例では、青色画素(B)と赤色画素(R)とを区分けするように、ブラックマトリクス24が形成されている。また、図1(c)に示した例では、Cs配線31上に形成された開口部25b内においてブラックマトリクス24が形成されている。 In the configuration of the present embodiment, a black matrix (light shielding layer or light shielding portion) 24 for separating adjacent pixels is formed on the pixel electrode 12. The black matrix 24 is made of a black resin material in which a pigment is mixed into a resin. In the example shown in FIG. 1A, the black matrix 24 is formed so as to distinguish the blue pixel (B) and the red pixel (R). In the example shown in FIG. 1C, the black matrix 24 is formed in the opening 25b formed on the Cs wiring 31.
 なお、本実施形態の着色絶縁層15は、画素電極12とソース配線34(または34s)との間に位置する層間絶縁膜としての役割を有する。さらに説明すると、画素電極12とソース配線34sとの間に比較的薄い絶縁膜(パッシベーション膜)35だけが存在する場合には、ソース配線34の周囲で発生する電界の影響を受けて、画素電極12の電圧が上昇し、これによって、意図しないタイミングで液晶分子の配向状態が変化してしまう不具合が生じる可能性がある。本実施形態の構成のように、画素電極12とソース配線34との間に、絶縁膜35よりも厚さの厚い着色絶縁層(層間絶縁膜)15を設けることにより、ソース配線34の周囲で発生する電界の影響を軽減することができる。その結果、意図しないタイミングで液晶分子の配向状態が変化してしまう不具合を防止することができる。 Note that the colored insulating layer 15 of this embodiment has a role as an interlayer insulating film located between the pixel electrode 12 and the source wiring 34 (or 34s). More specifically, when only a relatively thin insulating film (passivation film) 35 exists between the pixel electrode 12 and the source wiring 34s, the pixel electrode is affected by the electric field generated around the source wiring 34. The voltage of 12 rises, and this may cause a problem that the alignment state of the liquid crystal molecules changes at an unintended timing. As in the configuration of the present embodiment, by providing a colored insulating layer (interlayer insulating film) 15 thicker than the insulating film 35 between the pixel electrode 12 and the source wiring 34, the source wiring 34 is surrounded. The influence of the generated electric field can be reduced. As a result, it is possible to prevent a problem that the alignment state of the liquid crystal molecules changes at an unintended timing.
 本実施形態のアレイ基板10および対向基板の本体部を構成する透光性基板(ガラス基板)の厚さは、例えば、0.5~1mmである。アレイ基板10および対向基板は製造段階においては、液晶パネルを多面取り可能なマザーガラス(大型基板)の形態であってもよし、液晶パネル1枚の寸法の基板であってもよい。TFT30を構成する半導体層36は、シリコン(例えば、アモルファスシリコン)からなるシリコン層であるが、他の半導体材料からなる半導体層を用いることが可能である。例えば、半導体層36は、酸化物半導体材料から構成した酸化物半導体層であってもよい。 The thickness of the transparent substrate (glass substrate) constituting the main body of the array substrate 10 and the counter substrate of the present embodiment is, for example, 0.5 to 1 mm. In the manufacturing stage, the array substrate 10 and the counter substrate may be in the form of a mother glass (large substrate) capable of obtaining multiple liquid crystal panels, or may be a substrate having the size of one liquid crystal panel. The semiconductor layer 36 constituting the TFT 30 is a silicon layer made of silicon (for example, amorphous silicon), but a semiconductor layer made of another semiconductor material can be used. For example, the semiconductor layer 36 may be an oxide semiconductor layer made of an oxide semiconductor material.
 また、ゲート配線32、ソース配線34およびドレイン配線34dなどの配線層は、金属層のような導電層から構成されている。例えばゲート配線32は、アルミニウム、銅のような金属層から構成されているが、多層膜のものを使用することも可能である。ゲート配線32、ソース配線34およびドレイン配線34dのそれぞれは、同じ導電層から構成してもよいし、異なる導電層のものを使用することも可能である。ゲート絶縁膜33は、例えば、窒化シリコンから構成されている。また、絶縁膜(パッシベーション膜)35は、例えば、窒化物(窒化シリコンなど)から構成されている。なお、各種の層の厚さおよび材料などは、製造装置・製造プロセスにあわせて適宜好適なものが採用され、特に限定されるものではない。 Further, the wiring layers such as the gate wiring 32, the source wiring 34, and the drain wiring 34d are composed of a conductive layer such as a metal layer. For example, the gate wiring 32 is composed of a metal layer such as aluminum or copper, but a multilayer film may be used. Each of the gate wiring 32, the source wiring 34, and the drain wiring 34d may be formed of the same conductive layer, or may be made of different conductive layers. The gate insulating film 33 is made of, for example, silicon nitride. The insulating film (passivation film) 35 is made of, for example, nitride (silicon nitride or the like). The thicknesses and materials of the various layers are appropriately selected according to the manufacturing apparatus and manufacturing process, and are not particularly limited.
 本実施形態の液晶パネル100の構成では、アレイ基板10上の着色絶縁層(層間絶縁膜)15の上にブラックマトリクス(遮光層)24が形成されている。すなわち、本実施形態の液晶パネル100は、カラーフィルタとして機能する着色絶縁層15上で、隣接する異なる色の混色を防止することができるので、滲みのない発色が可能となる。したがって、本実施形態の液晶パネル100の構成では、アレイ基板10における着色絶縁層15の上に形成されたブラックマトリクス24により、効果的に遮光することができ、その結果、色再現性を向上させることができる。 In the configuration of the liquid crystal panel 100 of the present embodiment, a black matrix (light shielding layer) 24 is formed on the colored insulating layer (interlayer insulating film) 15 on the array substrate 10. That is, the liquid crystal panel 100 according to the present embodiment can prevent color mixing of adjacent different colors on the colored insulating layer 15 functioning as a color filter, thereby enabling color development without bleeding. Therefore, in the configuration of the liquid crystal panel 100 of the present embodiment, the black matrix 24 formed on the colored insulating layer 15 in the array substrate 10 can be effectively shielded from light, and as a result, the color reproducibility is improved. be able to.
 具体的に、図2は、本発明の一実施形態に係る液晶パネル100の効果を説明するための断面構成を模式的に示している。図2(a)は、対向基板200側にブラックマトリクス240が形成された比較例の液晶パネル1100の構成を模式的に示す断面図である。図2(b)は、カラーフィルタ(着色絶縁層15)上にブラックマトリクス24が形成された本実施形態の液晶パネル100の構成を模式的に示す断面図である。 Specifically, FIG. 2 schematically shows a cross-sectional configuration for explaining the effect of the liquid crystal panel 100 according to an embodiment of the present invention. FIG. 2A is a cross-sectional view schematically showing a configuration of a liquid crystal panel 1100 of a comparative example in which a black matrix 240 is formed on the counter substrate 200 side. FIG. 2B is a cross-sectional view schematically showing the configuration of the liquid crystal panel 100 of the present embodiment in which the black matrix 24 is formed on the color filter (colored insulating layer 15).
 図2(a)に示すように、比較例の液晶パネル1100の構成によると、例えば、観視者側の視線65に対向する緑色絶縁層150Gを通過した光60Aは、対向基板200側に設けられたブラックマトリクス240で遮光される。このように、ブラックマトリクス240とカラーフィルタ(着色絶縁層150)との間にギャップがあるため、例えば緑色絶縁層150Gを通過した光60Aの一部は、ブラックマトリクス240の横から漏れ出すことになる(矢印62参照)。 As shown in FIG. 2A, according to the configuration of the liquid crystal panel 1100 of the comparative example, for example, the light 60A that has passed through the green insulating layer 150G facing the line of sight 65 on the viewer side is provided on the counter substrate 200 side. The black matrix 240 is shielded from light. Thus, since there is a gap between the black matrix 240 and the color filter (colored insulating layer 150), for example, part of the light 60A that has passed through the green insulating layer 150G leaks from the side of the black matrix 240. (See arrow 62).
 一方、図2(b)に示すように、本実施形態に係る液晶パネル100の構成によると、例えば、観視者側の視線65に対向する緑色絶縁層15Gを通過した光60Bは、カラーフィルタ(着色絶縁層15)上のブラックマトリクス24で遮光される。このように、ブラックマトリクス24によって効果的に混色を防止することが可能となるため、滲みのない発色が可能となり、色再現性を向上させることができる。 On the other hand, as shown in FIG. 2B, according to the configuration of the liquid crystal panel 100 according to the present embodiment, for example, the light 60B that has passed through the green insulating layer 15G facing the line of sight 65 on the viewer side is a color filter. The light is shielded by the black matrix 24 on the (colored insulating layer 15). As described above, since the black matrix 24 can effectively prevent color mixing, color development without blurring is possible, and color reproducibility can be improved.
 次に、本実施形態におけるブラックマトリクス24を含むアレイ基板10または液晶パネル100の製造方法について説明する。本実施形態の構成では、アレイ基板10における着色絶縁層15(15R、15B、15G)の上にブラックマトリクス24が形成されている。 Next, a method for manufacturing the array substrate 10 or the liquid crystal panel 100 including the black matrix 24 in the present embodiment will be described. In the configuration of the present embodiment, the black matrix 24 is formed on the colored insulating layer 15 (15R, 15B, 15G) in the array substrate 10.
 アレイ基板10における着色絶縁層15の上にブラックマトリクス24を形成する場合、図3~図8に示すようにして実行される。図3~図8は、本発明の一実施形態に係る液晶パネル100の製造方法を説明するための工程図である。具体的には、図3~図8における(a)は、本実施形態の液晶パネル100の製造方法を説明するためのチャネル部分の工程断面図である。図3~図8における(b)は、本実施形態の液晶パネル100の製造方法を説明するための補助容量(Cs)部分の工程断面図である。図3、6、8における(c)は、本実施形態に係る液晶パネル100の製造方法を説明するための工程平面図である。 The formation of the black matrix 24 on the colored insulating layer 15 in the array substrate 10 is performed as shown in FIGS. 3 to 8 are process diagrams for explaining a method of manufacturing the liquid crystal panel 100 according to an embodiment of the present invention. Specifically, FIG. 3A to FIG. 8A are process cross-sectional views of a channel portion for explaining a method of manufacturing the liquid crystal panel 100 of the present embodiment. FIGS. 3B to 8B are process cross-sectional views of the auxiliary capacitor (Cs) portion for explaining the method for manufacturing the liquid crystal panel 100 of the present embodiment. FIGS. 3, 6, and 8 (c) are process plan views for explaining a method for manufacturing the liquid crystal panel 100 according to the present embodiment.
 まず、図3(a)~(c)に示すように、着色絶縁層15(赤色絶縁層15R、青色絶縁層15B、緑色絶縁層15G)が形成されたアレイ基板10を用意する。ここで用意されるアレイ基板(ガラス基板)10には、上述した構成を有するTFT30が形成されたものを使用する。なお、赤色絶縁層15R、青色絶縁層15Bおよび緑色絶縁層15Gはそれぞれ、公知のフォトリソグラフィ工程によって作製され、具体的には、塗布工程、露光工程、現像工程などを繰り返すことによって形成される。 First, as shown in FIGS. 3A to 3C, an array substrate 10 on which a colored insulating layer 15 (a red insulating layer 15R, a blue insulating layer 15B, and a green insulating layer 15G) is formed is prepared. As the array substrate (glass substrate) 10 prepared here, a substrate on which the TFT 30 having the above-described configuration is formed is used. The red insulating layer 15R, the blue insulating layer 15B, and the green insulating layer 15G are each formed by a known photolithography process, and specifically, formed by repeating a coating process, an exposure process, a development process, and the like.
 本実施形態の構成では、図3(a)に示すように、着色絶縁層15における各色の絶縁層を区分けする開口部23aが形成されている。開口部23aは、ドレイン配線34dの一部を露出するように形成されている。また、本実施形態の補助容量部分では、図3(b)に示すように、ソース電極34を露出させる開口部23bが形成されている。 In the configuration of the present embodiment, as shown in FIG. 3A, an opening 23a that separates the insulating layers of the respective colors in the colored insulating layer 15 is formed. The opening 23a is formed so as to expose a part of the drain wiring 34d. Further, as shown in FIG. 3B, an opening 23b exposing the source electrode 34 is formed in the auxiliary capacitance portion of the present embodiment.
 次に、図4(a)および(b)に示すように、例えばスパッタリングにより、アレイ基板10上の全面に、透明電極材料としてITO(Indium Tim Oxide)層12を堆積する。これにより、ITO層12とソース電極34とが導通する。 Next, as shown in FIGS. 4A and 4B, an ITO (Indium Time Oxide) layer 12 is deposited as a transparent electrode material on the entire surface of the array substrate 10 by sputtering, for example. Thereby, the ITO layer 12 and the source electrode 34 are electrically connected.
 次に、図5(a)および(b)に示すように、ITO層12の上に、黒色の顔料を含有する樹脂、例えば感光性のアクリル樹脂のようなフォトレジスト材料(一例を挙げると、JSR社製の商品名JAS)を塗布する。この黒色樹脂層24は、例えば、1μm~3μm程度の厚さを有する。 Next, as shown in FIGS. 5A and 5B, on the ITO layer 12, a photoresist material such as a resin containing a black pigment, such as a photosensitive acrylic resin (for example, The product name JAS manufactured by JSR) is applied. The black resin layer 24 has a thickness of about 1 μm to 3 μm, for example.
 次に、図6(a)~(c)に示すように、画素電極の切り離し部分となる所定の領域を開口するフォトマスクを用いて、黒色樹脂層(フォトレジスト材料)24を露光する。この際、現像後において画素領域における黒色樹脂層24の厚さが遮光領域における黒色樹脂層24の厚さの約半分となるように、画素領域における黒色樹脂層24に対してはハーフトーン露光を適用する。そして、露光された黒色樹脂層24を現像することにより、所定の位置にはITO層12を露出する開口部24h1および24h2が形成されると共に、画素領域における黒色樹脂層24の厚さが半分程度になる。ここでは、画素領域における黒色樹脂層24の厚さが半分程度になる例を挙げて説明したがそれに限定されず、画素領域における黒色樹脂層24の厚さが残存するように実行すればよい。なお、遮光領域におけるフォトレジスト材料24の厚さは現像前の厚さと同じである。 Next, as shown in FIGS. 6A to 6C, the black resin layer (photoresist material) 24 is exposed using a photomask that opens a predetermined region to be a part to be separated from the pixel electrode. At this time, halftone exposure is performed on the black resin layer 24 in the pixel region so that the thickness of the black resin layer 24 in the pixel region after development is about half of the thickness of the black resin layer 24 in the light shielding region. Apply. Then, by developing the exposed black resin layer 24, openings 24h1 and 24h2 exposing the ITO layer 12 are formed at predetermined positions, and the thickness of the black resin layer 24 in the pixel region is about half. become. Here, an example has been described in which the thickness of the black resin layer 24 in the pixel region is about half, but the present invention is not limited thereto, and the processing may be performed so that the thickness of the black resin layer 24 in the pixel region remains. The thickness of the photoresist material 24 in the light shielding region is the same as the thickness before development.
 なお、ハーフトーン露光は、ハーフトーンマスク(または、グレートーンマスク)を用いた露光である。ハーフトーンマスクは、フォトリソグラフィ工程のフォトマスクにおいて、露光量を部分的に制御した半透過部を持たせたマスクであり、ハーフトーンマスクを用いて、中間の膜厚を持った層を形成することが可能となる。ハーフトーンマスクの半透過部は、任意の透過率を持った膜、スリットなどによって構築することができる。 Note that halftone exposure is exposure using a halftone mask (or gray tone mask). The halftone mask is a mask having a semi-transmissive portion in which the exposure amount is partially controlled in the photomask of the photolithography process, and a layer having an intermediate film thickness is formed using the halftone mask. It becomes possible. The semi-transmissive portion of the halftone mask can be constructed by a film having an arbitrary transmittance, a slit, or the like.
 次に、図7(a)および(b)に示すように、残存している黒色樹脂層24をマスクとして用いて、ウェットエッチングを行う。これにより、開口部24h1および24h2に露出するITO層12が除去されて、着色絶縁層15を露出する開口部24p1およびソース配線34およびゲート絶縁膜33を露出する開口部24p2が形成される。このようにして、画素電極12の切り離し部分が形成される。 Next, as shown in FIGS. 7A and 7B, wet etching is performed using the remaining black resin layer 24 as a mask. Thereby, the ITO layer 12 exposed to the openings 24h1 and 24h2 is removed, and the opening 24p1 exposing the colored insulating layer 15 and the opening 24p2 exposing the source wiring 34 and the gate insulating film 33 are formed. In this way, a separation portion of the pixel electrode 12 is formed.
 次に、図8(a)~(c)に示すように、ハーフアッシング(ドライエッチング)を行うことにより、画素領域における画素電極12を露出させる。これにより、所定の領域にブラックマトリクス(遮光層)24が形成される。本実施形態のアッシングは、樹脂材料から構成された層(樹脂層)を例えばプラズマ処理などによって灰化することによってエッチングするものであり、典型的には、フォトレジスト材料をプラズマ処理などによって除去するプロセスをいう。または、ハーフアッシングとは、樹脂層を全てエッチングせずに、所定の厚さ(例えば、エッチング前の半分の厚さ)でアッシングをすることを意味するが、必ずしも半分の厚さにしなくても構わない。 Next, as shown in FIGS. 8A to 8C, the pixel electrode 12 in the pixel region is exposed by performing half ashing (dry etching). Thereby, a black matrix (light shielding layer) 24 is formed in a predetermined region. In the ashing of this embodiment, etching is performed by ashing a layer (resin layer) made of a resin material, for example, by plasma treatment or the like. Typically, the photoresist material is removed by plasma treatment or the like. A process. Alternatively, half ashing means ashing at a predetermined thickness (for example, half the thickness before etching) without etching the entire resin layer. I do not care.
 本実施形態の製造方法によると、上述したように、滲みのない発色が可能で且つ色再現性の高い液晶パネル100を製造することができる。さらに、図6および図7の工程で説明したように、フォトレジスト材料(ブラックマトリクス)24をマスクとして、ITO層12のパターニングをウェットエッチング工程で実現できるため、プロセスの簡素化およびコスト削減が可能となる。特に、図12に示した従来の液晶パネル2000では、フォトリソグラフィ工程の回数が多くなるがゆえに製造コストの増加につながるが、本実施形態の構成によれば、それと比較して、フォトリソグラフィ工程の回数を減らすことができるので、製造コストの低下(プロセスの簡素化およびコスト削減)を実現することができる。 According to the manufacturing method of the present embodiment, as described above, it is possible to manufacture the liquid crystal panel 100 capable of coloring without bleeding and having high color reproducibility. Further, as explained in the steps of FIGS. 6 and 7, the ITO layer 12 can be patterned by the wet etching process using the photoresist material (black matrix) 24 as a mask, so that the process can be simplified and the cost can be reduced. It becomes. In particular, in the conventional liquid crystal panel 2000 shown in FIG. 12, the number of photolithography processes increases, leading to an increase in manufacturing cost. However, according to the configuration of the present embodiment, the photolithography process is compared with that. Since the number of times can be reduced, a reduction in manufacturing cost (simplification of process and cost reduction) can be realized.
 なお、上述の実施形態では、第1着色絶縁層15を赤色絶縁層15Rとし、第2着色絶縁層15を青色絶縁層15Bとし、そして、第3着色絶縁層15を緑色絶縁層15Gとしたが、それに限定されるものではない。例えば、第1着色絶縁層15を緑色絶縁層15Gとしても構わないし、青色絶縁層15Bにしてもよい。さらに、第3着色絶縁層15を緑色絶縁層15Gでなく、赤色絶縁層15Rまたは青色絶縁層15Bにしても構わない。同様に、第2着色絶縁層15を青色絶縁層15Bに代えて、赤色絶縁層15Rまたは緑色絶縁層15Gにしてもよい。これらの変更・改変は後述する実施形態についても同様である。 In the above-described embodiment, the first colored insulating layer 15 is the red insulating layer 15R, the second colored insulating layer 15 is the blue insulating layer 15B, and the third colored insulating layer 15 is the green insulating layer 15G. It is not limited to that. For example, the first colored insulating layer 15 may be the green insulating layer 15G or the blue insulating layer 15B. Further, the third colored insulating layer 15 may be the red insulating layer 15R or the blue insulating layer 15B instead of the green insulating layer 15G. Similarly, the second colored insulating layer 15 may be replaced with the red insulating layer 15R or the green insulating layer 15G instead of the blue insulating layer 15B. These changes / modifications are the same for the embodiments described later.
<第2の実施形態>
 次に、図9(a)および(b)を参照しながら、本発明の第2の実施形態について説明する。図9(a)は、第2の実施形態に係る液晶パネル100の構成を示すチャネル部分の断面図である。図9(b)は、第2の実施形態に係る液晶パネル100の構成を示す平面図である。
<Second Embodiment>
Next, a second embodiment of the present invention will be described with reference to FIGS. 9 (a) and 9 (b). FIG. 9A is a cross-sectional view of the channel portion showing the configuration of the liquid crystal panel 100 according to the second embodiment. FIG. 9B is a plan view showing the configuration of the liquid crystal panel 100 according to the second embodiment.
 図9(a)および(b)に示すように、本実施形態に係る液晶パネル100においては、透明電極(ITO層)12の形状を規定する開口部(切り離し部分)24rが位置する下方において、配線層(34、32または31)を構成する金属材料からなる金属層(34st)が配置されている。図示した例では、ソース配線34から構成された金属層(ソースメタル層)34stが開口部24rの下方に設けられている。 As shown in FIGS. 9A and 9B, in the liquid crystal panel 100 according to the present embodiment, below the opening (separation part) 24r that defines the shape of the transparent electrode (ITO layer) 12 is located. A metal layer (34st) made of a metal material constituting the wiring layer (34, 32 or 31) is disposed. In the illustrated example, a metal layer (source metal layer) 34 st constituted by the source wiring 34 is provided below the opening 24 r.
 図9(a)に示すように、上述の図8(a)に示したエッチング工程(ハーフアッシング工程)により、着色絶縁層15の一部が除去された形で開口部24rが形成される場合がある。このような場合、着色絶縁層15の一部が除去されたことによって、着色絶縁層15に色味変化が生じることになるが、本実施形態では、開口部24rの下方に金属層34stが位置することにより、その部分の遮光を行うことができる。したがって、観視者の目に色味変化の領域が入ることがなくなるという効果を得ることができる。 As shown in FIG. 9A, the opening 24r is formed in a form in which a part of the colored insulating layer 15 is removed by the etching process (half ashing process) shown in FIG. 8A. There is. In such a case, a color change occurs in the colored insulating layer 15 by removing a part of the colored insulating layer 15, but in this embodiment, the metal layer 34st is positioned below the opening 24r. By doing so, the portion can be shielded from light. Therefore, it is possible to obtain an effect that a color change region does not enter the eyes of the viewer.
 なお、図示した例では、ソース配線34を構成する電極材料から、遮光用の金属層34stを形成したが、開口部24rの位置およびプロセス条件に対応して、ゲート配線32(またはCs配線31)を構成する電極材料から、遮光用の金属層を開口部24rの下方に設けても構わない。 In the illustrated example, the light shielding metal layer 34st is formed from the electrode material constituting the source wiring 34. However, the gate wiring 32 (or Cs wiring 31) corresponds to the position of the opening 24r and the process conditions. A light shielding metal layer may be provided below the opening 24r from the electrode material that constitutes the above.
<第3の実施形態>
 次に、図10(a)および(b)を参照しながら、本発明の第3の実施形態について説明する。図10(a)および(b)は、第3の実施形態に係る液晶パネル100の製造方法を示すチャネル部分の工程断面図である。
<Third Embodiment>
Next, a third embodiment of the present invention will be described with reference to FIGS. 10 (a) and (b). 10A and 10B are process cross-sectional views of a channel portion illustrating a method for manufacturing the liquid crystal panel 100 according to the third embodiment.
 本実施形態の構成では、画素電極12における画素領域に対応する部分の表面に、ブラックマトリクス24と同じ材料からなるリブ(24B)が形成されている点を特徴としている。この例のリブ24Bは、液晶分子(図11中の「420」参照)の垂直配向を規定する垂直配向リブのパターンを有している。 The configuration of this embodiment is characterized in that ribs (24B) made of the same material as that of the black matrix 24 are formed on the surface of the portion corresponding to the pixel region in the pixel electrode 12. The rib 24B in this example has a pattern of vertical alignment ribs that defines the vertical alignment of liquid crystal molecules (see “420” in FIG. 11).
 図10(a)に示す工程は、図7(a)に示した工程に対応する。ここで、図10(a)に示す工程では、黒色樹脂材料24における画素領域に対応する部分に、リブを規定する凸部24Aが形成されるように、フォトリソグラフィ工程を実行する。この凸部24Aは、次工程である図10(b)のハーフアッシングを行った結果においてリブ24Bが残存するように、画素領域における略半円球のパターンを有している。 The process shown in FIG. 10A corresponds to the process shown in FIG. Here, in the process shown in FIG. 10A, the photolithography process is performed so that the convex portions 24A that define the ribs are formed in the portions of the black resin material 24 corresponding to the pixel regions. The convex portion 24A has a substantially hemispherical pattern in the pixel region so that the rib 24B remains as a result of performing the half ashing in FIG.
 そして、図10(b)に示すように、上述した工程と同様に、ハーフアッシングを行うことにより、画素領域における画素電極12を露出させると共に、半円球形状のリブ24Bを残存させる。本実施形態における製造方法によると、ブラックマトリクス24を形成する工程において、ブラックマトリクス24の形成と同時に、透明電極12の上にリブ24Bを形成することができる。このため、プロセスの簡素化およびコスト削減が可能となる。 Then, as shown in FIG. 10 (b), by performing half ashing as in the above-described process, the pixel electrode 12 in the pixel region is exposed and the hemispherical rib 24B is left. According to the manufacturing method in the present embodiment, in the step of forming the black matrix 24, the ribs 24B can be formed on the transparent electrode 12 simultaneously with the formation of the black matrix 24. This simplifies the process and reduces costs.
 以上、本発明の具体例を、図面を参照しながら説明したが、これらは例示にすぎず、特許請求の範囲を限定するものではない。特許請求の範囲に記載の技術には、以上に例示した具体例を様々に変形、変更したものが含まれる。例えば、上記実施形態では、赤色絶縁層(15R)、青色絶縁層(15B)、緑色絶縁層(15G)の3原色からなるカラーフィルタ層(アレイ基板10上のカラーフィルタ層)を示したが、それに黄色絶縁層(15Y)を加えた4原色からなるカラーフィルタ層に本実施形態の技術を適用することも可能である。 As mentioned above, although the specific example of this invention was demonstrated referring drawings, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. For example, in the above embodiment, the color filter layer (color filter layer on the array substrate 10) composed of the three primary colors of the red insulating layer (15R), the blue insulating layer (15B), and the green insulating layer (15G) is shown. It is also possible to apply the technique of the present embodiment to a color filter layer composed of four primary colors with a yellow insulating layer (15Y) added thereto.
 また、図10に示した構成では、リブ24を形成したが、光配向法を用いた配向膜(光配向膜)を有する液晶パネルの場合、当該リブを設けない形態で、優れた視野特性を達成することが可能である。なお、光配向法を用いて液晶分子のプレチルト方向を規定する手法の場合、光照射によって配向方向を規定する光照射ステップを行うので、ラビング法と異なり、非接触プロセスであり、それゆえ、静電気の発生等が生じない利点を有している。 In the configuration shown in FIG. 10, the rib 24 is formed. However, in the case of a liquid crystal panel having an alignment film (photo-alignment film) using a photo-alignment method, excellent viewing characteristics are obtained without the rib. It is possible to achieve. Note that in the case of the method of defining the pretilt direction of the liquid crystal molecules using the photo-alignment method, the light irradiation step for defining the alignment direction is performed by light irradiation, so that it is a non-contact process, unlike the rubbing method. This has the advantage that the occurrence of the above does not occur.
 本発明によると、光の漏れ出しによる混色の発生を低減できる液晶パネルを簡便に提供することができる。 According to the present invention, it is possible to simply provide a liquid crystal panel that can reduce the occurrence of color mixing due to light leakage.
10   アレイ基板
12   画素電極(ITO)
15   着色絶縁層
15B 青色絶縁層
15G 緑色絶縁層
15R 赤色絶縁層
24   ブラックマトリクス(黒色樹脂層)
24A 凸部
24B リブ
31   Cs配線
32   ゲート配線
33   ゲート絶縁膜
34、34s  ソース配線
34d ドレイン配線
34st 金属層
35   絶縁膜
36   半導体層
100 液晶パネル
10 Array substrate 12 Pixel electrode (ITO)
15 Colored insulating layer 15B Blue insulating layer 15G Green insulating layer 15R Red insulating layer 24 Black matrix (black resin layer)
24A Projection 24B Rib 31 Cs wiring 32 Gate wiring 33 Gate insulating film 34, 34s Source wiring 34d Drain wiring 34st Metal layer 35 Insulating film 36 Semiconductor layer 100 Liquid crystal panel

Claims (6)

  1.  液晶パネルの製造方法であって、
     薄膜トランジスタが形成されたアレイ基板を用意する工程(a)と、
     前記アレイ基板の上に、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む、感光性を有する着色絶縁層を形成する工程(b)と、
     前記着色絶縁層の上に、透明電極層を形成する工程(c)と、
     前記透明電極層の上に、感光性を有する黒色樹脂材料を堆積する工程(d)と、
     フォトリソグラフィ工程を用いて、前記透明電極層を露出する開口部を前記黒色樹脂材料に形成し、かつ、前記黒色樹脂材料における画素領域に対応する部分に対してハーフトーン露光を行うとともに、前記黒色樹脂材料における遮光部分に対応する部分は残存させる工程(e)と、
     前記開口部に露出している前記透明電極層を除去する工程(f)と、
     前記黒色樹脂材料をハーフアッシングすることによって前記黒色樹脂材料における前記ハーフトーン露光を行った部分を除去し、それにより、前記黒色樹脂材料からブラックマトリクスを形成する工程(g)と
     を含む、液晶パネルの製造方法。
    A method of manufacturing a liquid crystal panel,
    Preparing an array substrate on which a thin film transistor is formed (a);
    A photosensitive coloring including a red insulating layer made of a red coloring material, a blue insulating layer made of a blue coloring material, and a green insulating layer made of a green coloring material on the array substrate. A step (b) of forming an insulating layer;
    A step (c) of forming a transparent electrode layer on the colored insulating layer;
    Depositing a photosensitive black resin material on the transparent electrode layer (d);
    An opening for exposing the transparent electrode layer is formed in the black resin material using a photolithography process, and halftone exposure is performed on a portion corresponding to a pixel region in the black resin material, and the black A step (e) of leaving a portion corresponding to the light-shielding portion in the resin material;
    Removing the transparent electrode layer exposed in the opening (f);
    A step (g) of removing a portion of the black resin material that has been subjected to the halftone exposure by half ashing the black resin material, thereby forming a black matrix from the black resin material. Manufacturing method.
  2.  前記工程(f)は、前記黒色樹脂材料をマスクとして用いたウェットエッチングによって実行される、請求項1に記載の液晶パネルの製造方法。 The method of manufacturing a liquid crystal panel according to claim 1, wherein the step (f) is performed by wet etching using the black resin material as a mask.
  3.  前記アレイ基板には、
           行方向に延びるゲート配線および補助容量配線と、
           列方向に延びるソース配線と
     を含む配線層が形成されており、
     前記工程(e)において、前記透明電極層を露出する前記開口部が位置する下方において、前記配線層を構成する金属材料からなる金属層が配置されている、請求項1または2に記載の液晶パネルの製造方法。
    In the array substrate,
    Gate wiring and auxiliary capacitance wiring extending in the row direction;
    A wiring layer including a source wiring extending in the column direction is formed,
    3. The liquid crystal according to claim 1, wherein in the step (e), a metal layer made of a metal material constituting the wiring layer is disposed below the opening where the transparent electrode layer is exposed. Panel manufacturing method.
  4.  前記工程(e)において、前記黒色樹脂材料における画素領域に対応する部分に、リブを規定する凸部が形成されるように、前記フォトリソグラフィ工程を実行し、
     前記工程(g)において、前記ハーフアッシングによって、前記透明電極層の上に、前記黒色樹脂材料からなるリブを形成する、請求項1から3のいずれか一項に記載の液晶パネルの製造方法。
    In the step (e), the photolithography step is performed so that convex portions defining ribs are formed in portions corresponding to the pixel regions in the black resin material,
    The manufacturing method of the liquid crystal panel as described in any one of Claim 1 to 3 which forms the rib which consists of the said black resin material on the said transparent electrode layer by the said half ashing in the said process (g).
  5.  薄膜トランジスタが形成されたアレイ基板と、
     前記アレイ基板の上に形成され、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む着色絶縁層と、
     前記着色絶縁層の上に形成された画素電極と、
     前記画素電極の上に、前記薄膜トランジスタを覆うように形成されたブラックマトリクスと
     を備え、
     前記画素電極は、前記アレイ基板における画素領域を区分けする位置において切り離されており、
     前記画素電極が切り離された部分に露出する前記着色絶縁層の一部が除去されており、
     前記アレイ基板には、
           行方向に延びるゲート配線および補助容量配線と、
           列方向に延びるソース配線と
     を含む配線層が形成されており、
     前記着色絶縁層の一部が除去された領域の下方には、前記配線層を構成する金属材料からなる金属層が配置されている、液晶パネル。
    An array substrate on which a thin film transistor is formed;
    A colored insulating layer formed on the array substrate and including a red insulating layer made of a red colored material, a blue insulating layer made of a blue colored material, and a green insulating layer made of a green colored material; ,
    A pixel electrode formed on the colored insulating layer;
    A black matrix formed on the pixel electrode so as to cover the thin film transistor;
    The pixel electrode is separated at a position that divides a pixel region in the array substrate,
    A part of the colored insulating layer exposed in the portion where the pixel electrode is separated is removed,
    In the array substrate,
    Gate wiring and auxiliary capacitance wiring extending in the row direction;
    A wiring layer including a source wiring extending in the column direction is formed,
    A liquid crystal panel, wherein a metal layer made of a metal material constituting the wiring layer is disposed below a region where a part of the colored insulating layer is removed.
  6.  薄膜トランジスタが形成されたアレイ基板と、
     前記アレイ基板の上に形成され、赤色着色材料から構成された赤色絶縁層と、青色着色材料から構成された青色絶縁層と、緑色着色材料から構成された緑色絶縁層とを含む着色絶縁層と、
     前記着色絶縁層の上に形成された画素電極と、
     前記画素電極の上に、前記薄膜トランジスタを覆うように形成されたブラックマトリクスと
     を備え、
     前記画素電極における画素領域に対応する部分の表面には、前記ブラックマトリクスと同じ材料からなるリブが形成されている、液晶パネル。
    An array substrate on which a thin film transistor is formed;
    A colored insulating layer formed on the array substrate and including a red insulating layer made of a red colored material, a blue insulating layer made of a blue colored material, and a green insulating layer made of a green colored material; ,
    A pixel electrode formed on the colored insulating layer;
    A black matrix formed on the pixel electrode so as to cover the thin film transistor;
    A liquid crystal panel, wherein a rib made of the same material as that of the black matrix is formed on a surface of a portion corresponding to a pixel region in the pixel electrode.
PCT/JP2012/069552 2011-08-09 2012-08-01 Method for producing liquid crystal panel, and liquid crystal panel WO2013021884A1 (en)

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JP2011173883 2011-08-09

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106444186A (en) * 2015-08-06 2017-02-22 三星显示有限公司 Display device
WO2017045350A1 (en) * 2015-09-17 2017-03-23 京东方科技集团股份有限公司 Display panel and display apparatus
CN114994975A (en) * 2022-08-03 2022-09-02 惠科股份有限公司 Array substrate, manufacturing method thereof and display panel

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JPH09311347A (en) * 1996-05-22 1997-12-02 Nec Corp Liquid crystal panel
JPH1073809A (en) * 1996-09-02 1998-03-17 Casio Comput Co Ltd Active matrix panel and production therefor
JP2007171623A (en) * 2005-12-22 2007-07-05 Dainippon Printing Co Ltd Manufacturing method of color filter

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JPH09311347A (en) * 1996-05-22 1997-12-02 Nec Corp Liquid crystal panel
JPH1073809A (en) * 1996-09-02 1998-03-17 Casio Comput Co Ltd Active matrix panel and production therefor
JP2007171623A (en) * 2005-12-22 2007-07-05 Dainippon Printing Co Ltd Manufacturing method of color filter

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106444186A (en) * 2015-08-06 2017-02-22 三星显示有限公司 Display device
WO2017045350A1 (en) * 2015-09-17 2017-03-23 京东方科技集团股份有限公司 Display panel and display apparatus
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CN114994975A (en) * 2022-08-03 2022-09-02 惠科股份有限公司 Array substrate, manufacturing method thereof and display panel

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