WO2013020569A1

WO2013020569A1 - Magnetoresistive memory with low critical current for magnetization switching

Info

Publication number: WO2013020569A1
Application number: PCT/EP2011/004016
Authority: WO
Inventors: Nikolay PERTSEV; Hermann Kohlstedt
Original assignee: Christian-Albrechts-Universität Zu Kiel
Priority date: 2011-08-10
Filing date: 2011-08-10
Publication date: 2013-02-14

Abstract

A magnetoresistive memory element comprising a magnetic tunnel junction or magnetic multilayer exhibiting giant magnetoresistance with a free magnetic layer made of a material that is prone to a spin reorientation transition driven by lattice strains and/or surface magnetocrystalline anisotropy allows a significant reduction of the threshold current density needed for magnetization switching in a spin-transfer torque MRAM. Strained free layers made of a ferromagnet with weak cubic magnetocrystalline anisotropy and a high magnetostriction and ultrathin free layers with an appropriate surface magnetocrystalline anisotropy and thickness lead to particularly strong effects.

Description

Magnetoresistive memory with low critical current for magnetization switching

FIELD OF THE INVENTION

The present invention relates to the field of magnetoresistive random access memories (MRAMs) and, in particular, to MRAMs employing spin-transfer torque for the magnetization switching.

BACKGROUND AND STATE OF THE ART

Magnetic random access memory with non-destructive readout based on the phenomenon of tunnelling magnetoresistance (TMR) or giant magnetoresistance (GMR) is a leading contender for the new generation of non- volatile memories, as described in S. Dceda et al, IEEE Trans. Electron Devices 54 (2007) 991. Unlike conventional memory chips, MRAMs do not store data as an electric charge or as a current flow, but rather in magnetic storage elements. An MRAM cell typically comprises two ferromagnetic layers (plates) separated by a thin insulating interlayer or nonmagnetic conductive spacer. One of the two layers has a fixed magnetization set to a predetermined direction, whereas the magnetization of the other "free" layer may be changed for encoding data. This configuration is sometimes known as a "spin valve". A MRAM memory device may be built from a (possibly large) grid of such cells.

A MRAM cell may be read out conveniently by employing the magnetoresistive effect, i.e. by measuring the electrical resistance across the cell. It is the writing of data onto the cell that currently poses the biggest challenges.

Writing data to the cell requires a magnetization switching in the "free" layer of the magnetic tunnel junction (MTJ) or the GMR multilayer. The switching may be accomplished by passing an electrical current past the memory cell, which will induce a magnetic field that will then be picked up by the writable layer. The use of magnetic fields induced by electric currents, however, has serious disadvantages, such as crosstalk between neighbouring cells during writing. Moreover, considerable amounts of energy are required to switch the magnetization. A more recent technique, conventionally called spin-transfer torque (STT) or spin-transfer switching MRAM, makes use of an electron flow with a preferential orientation of spins to rotate the magnetization in the addressed cell. Such a spin-polarized current injected into the free layer may induce the magnetization switching. However, the problem of a very high threshold current density J_c = 10⁷-10⁸ A/cm² needed for the magnetization switching in STT- MRAMs has not yet been solved.

The present inventors previously suggested to reorient the magnetization in the free layer by creating anisotropic in-plane lattice strains in this layer, cf. N. A. Pertsev, H. Kohlstedt, Appl. Phys. Lett. 95 (2009) 163503 and N. A. Pertsev, H. Kohlstedt, Nanotechnology 21 (2010) 475202. In a ferromagnetic film deposited on a piezoelectric substrate, such strains may be induced by an electric field applied to the substrate. Therefore, an electric-write non-volatile magnetic memory cell may be constructed by fabricating MTJ or GMR multilayers on an active substrate with a high piezoelectric response. However, this approach requires a separate substrate with electrodes connected to a voltage source for each data storage element, i.e., MTJ or GMR multilayer. Hence, it may not allow the development of high-density MRAMs suitable for industrial applications. Moreover, the piezoelectric substrate should be much thicker than the storage element in order to create sufficient strains in the free magnetic layer, with at least one other dimension comparable to the thickness. When the whole cell array is fabricated on the same piezoelectric substrate, the memory cells can then no longer be switched individually.

The in-plane magnetic anisotropy resulting from anisotropic in-plane strains and related mechanical stresses may be employed to create preferred magnetization directions in a free ferromagnetic layer as well. US 2010/0084724 Al teaches that such stress-induced magnetic anisotropy should be advantageous over the shape-induced anisotropy, since it allows the use of free layers with circular or nearly circular shape for MRAMs. The expected advantages are an improved thermal stability of the memory cells, a reduced influence of shape variations and defects, as well as smaller cell dimensions allowing higher element density. In the array of memory cells proposed in US '724 , the in-plane magnetic anisotropy of free magnetic layers results from the transmission of internal stresses from an underlying metal film patterned into elongated electrodes with an aspect ratio different from 1 :1. Evidently, this geometric effect does not reduce the critical current density necessary for magnetization switching. A rather complicated technique to reduce the switching current by means of a phase change material was proposed in US 2010/0032738 Al. In the memory cell design described in US'738, the magnetic tunnel junctions are appended by additional coupling layers inserted between the free magnetic layer and the second pinned layer. The coupling layer comprises a phase change material such as FeRh, which may be switchable from an antiferromagnetic (AFM) state to a ferromagnetic (FM) state. US'738 suggests that, owing to the exchange field created by such a coupling layer, the switching current may be reduced by one order of magnitude. Critically, however, US'738 assumes that the phase change can be induced by lattice strains transferred to the coupling layer from a piezoelectric actuator. But calculations show that the strain-induced transition from the initial AFM state to the FM state can hardly be realized in FeRh. Indeed, as has been shown by N. A. Pertsev, Phys. Rev. B 78 (2008) 212102, the largest transverse strains transmitted to the coupling layer are u_u = u₂₂ =u_±= d^E^ where E3 is the electric field along the normal to the interface between a thick piezoelectric actuator and a thin magnetic film. Since tensile biaxial strain u > 0 is needed for the AFM— >FM transition, the maximal electric field is limited by the coercive field E_c of lead zirconate titanate (PZT) or other suitable piezoelectric material. Hence the maximum strain equals "imax ⁼ ' and, using the material parameters d_3l~ 300 pm/V and E_c ~ 10 kV/cm typical of PZT ceramics, «^ - 0.03% . With the strain sensitivity dT^ ldu_L » 4500 K of the

AFM→FM transition estimated from the experimental data published by S. Maat et al, Phys. Rev. B 72 (2005) 214432, the maximum decrease of the transition temperature TAF is found to be only about 1 K. Such a shift is too small to change the magnetization state of the coupling layer significantly because the AFM→FM transition is rather broad.

Furthermore, even if much higher tensile piezoelectric strains were available, the cell design proposed in US'738 is not well suited for high-density MRAMs. For the sufficient transfer of strains into the coupling layer, the piezoelectric actuator attached to the cell should have a much larger volume than the MTJ, contrary to the configuration described in US'738, which hampers high-density data storage.

At first glance, it may seem that the critical switching current could be reduced significantly simply by combining the current-induced switching with the strain-induced in-plane magnetization rotations in memory cells fabricated on a piezoelectric substrate, as described above. However, calculations demonstrate that the resulting reduction in the critical current hardly exceeds a few percent. Thus, the long-standing problem of very high switching current in magnetic random access memory cells still calls for an efficient solution that allows for the fabrication of high-density MRAMs.

SUMMARY OF THE INVENTION

This objective is achieved by the magnetoresistive memory element according to claim 1, and the method for writing to a magnetoresistive memory element according to claim 23. The dependent claims relate to preferred embodiments.

A magnetoresistive memory element according to the present invention comprises a free magnetic layer with a material that has a lattice strain and/or a magnetocrystalline surface anisotropy, wherein said material is prone to a spin reorientation transition (SRT) due to said lattice strain and/or said surface anisotropy.

It is the insight of the inventors that a free magnetic layer prone to a spin reorientation transition may lead to a significant reduction of the critical current needed for the magnetization switching in the free layer. Hence, by injecting a current of spin-polarized electrons into a free magnetic layer which is prone to a spin reorientation transition, the magnetization may be switched more easily and with a lower critical current density than known from conventional magnetoresistive memory elements. The inventors found that a reduction of the critical current density by a factor of ten or more may be achieved compared to conventional MRAM technology.

Said spin reorientation transition may be driven by lattice strains or by a surface magnetic anisotropy, or by a combination of both factors. In particular, said spin reorientation transition may be a transition at which the magnetization easy axis changes orientation from some direction in the plane of said free magnetic layer to a direction out of its plane, in particular a direction orthogonal to said free magnetic layer. The current-induced magnetization switching may occur between two in-plane directions.

In the sense of the present invention, a free magnetic layer with a material that is prone to a spin reorientation transition may be a free magnetic layer whose material may undergo a spin reorientation transition or a free magnetic layer whose strain-thickness state may be in the vicinity of a critical state corresponding to said spin reorientation transition.

Preferably, said free magnetic layer exhibits a strain u such that \u - u *|

*| < 10% , preferably |w -u *|/|w *| < 5% , wherein u* denotes a critical strain at said spin reorientation transition. The critical strain u* may denote the strain state at which the spin reorientation transition between in-plane and out-of-plane orientations of the magnetization easy axis takes place.

The inventors found that a strain state that differs from the critical strain by no more than 10% leads to a very sizeable reduction of the critical current density, while the magnetization orientation nevertheless remains thermally stable. Preferably, said free magnetic layer is subjected to a strain u such that \u

*| is between 5% and 10%.

Said strain u may be an in-plane biaxial strain.

The inventors also found that a strain state that closely approaches the critical strain u* may not necessarily lead to a correspondingly lower current threshold. Rather, the current threshold density may saturate in the immediate vicinity of the critical strain u*. At the same time, a strain that closely approaches the critical strain u* may lead to diminishing potential barriers between different magnetization states of the memory cells, thereby affecting the thermal stability of the information storage. The inventors found that the thermal stability can preferably be preserved with a free magnetic layer of sufficient volume V exceeding a minimum volume V* which depends on the ratio \u - u *\/\u *| , i.e. on the proximity to the SRT. The minimum value of |w - w *|/|w *| ensuring the thermal stability of the information storage at a given volume V of the free magnetic layer is inversely proportional to Vso that it increases rapidly with decreasing volume of the free layer. For example, at V ~ 3000 rim³, which ensures data storage with a high density of about 500 Gbit per square inch (free layer area A ~ 1000 run² combined with a typical layer thickness / = 3 nm), the thermal stability may be preserved at

\u - u *\l\u *| > 3% , preferably at \u - u *\ l\u *\≥ 4% .

Alternatively or additionally to the strain-induced effect, a significant reduction of the critical current density may be achieved by using a free magnetic layer comprising a material having a size-driven spin reorientation transition. The free layer, in particular an unstrained free layer, may have a thickness t such that

*| < 10% , preferably \t -t*\ l\t *| < 5% wherein t* denotes a critical thickness corresponding to said spin reorientation transition.

The critical thickness t* may denote the thickness of the magnetic layer at which the spin reorientation transition between in-plane and out-of-plane orientations of the magnetization easy axis takes place.

Also in the case of a size-driven spin reorientation transition, there may be an issue of diminishing thermal stability in the immediate vicinity of the critical thickness t* of said spin reorientation transition. The inventors found that the thermal stability may preferably be preserved by using a free magnetic layer with sufficient area A exceeding a minimum area A* which depends on the ratio

- 1 *| l\t *| , i.e. on the proximity to the SRT. The minimum value of

|t - t *| l\t *| ensuring the thermal stability of the information storage at a given area A of the free magnetic layer is inversely proportional to A so that it increases rapidly with decreasing area of the free layer. For a free layer with the typical volume V~ 3000 nm³, the thermal stability is preserved if |t - t *|/|t *| > 3% , preferably |t - t *|/|t *| > 4% , wherein t* denotes a critical thickness at said spin reorientation transition.

The inventors found that a very substantial reduction of the critical current density may be achieved with free magnetic layers made of a ferromagnet with weak cubic magnetocrystal- line anisotropy and/or a high magnetostriction, or with ultrathin free layers with an appropriate surface magnetocrystalline anisotropy and thickness.

In a preferred embodiment, said material comprises a ferromagnet, in particular a cubic ferromagnet, with an anisotropy constant Κ « μ_ΰΜ] I A for Κ > 0 , or anisotropy constants

K\, Ki such that

- K₂ /2\ « μ_ΰΜ for K_x < 0 , where μ₀ denotes the vacuum permeability and M_s denotes the spontaneous magnetization. Ferromagnets with > 0 may be particularly suitable for free magnetic layers when K_x≤ 0.003μ₀Μ , and preferably K_{≤0.001μ₀Μ . Ferromagnets with ^, < 0 may be particularly suitable when I , - K₂12| <

0.002 ₀ . Preferably, said material comprises a ferromagnet, in particular a cubic ferromagnet, with a magnetoelastic coefficient |-5,| » μ₀Μ] , where μ₀ denotes the vacuum permeability and M_s denotes the spontaneous magnetization. The inventors found that ferromagnets are particularly suitable if > \ μ₀Μ , and preferably |-B,| > 50μ₀Μ^ .

The inventors also found that good results may be achieved with a free magnetic layer that has the form of a Ni film deposited on a cubic substrate, for instance, a (OOl)-oriented Ni film deposited on a (OOl)-oriented cubic substrate.

In another embodiment, ultrathin ferromagnetic films may be employed as a free magnetic layer. The inventors found that the surface magnetic anisotropy may reduce the critical strain u* to a level accessible for substrate-induced strains. This approach makes it possible to employ ferromagnetic materials that might otherwise have too high critical strains. The reduction of critical strains may be achieved by choosing a suitable thickness of free layers, typically on the order of a few monolayers (3-10 monolayers).

In a preferred embodiment, said material comprises a Co-Fe alloy film, in particular a Co oFe ₀ film.

A thickness of said Co-Fe alloy film may be smaller than 10 monolayers, preferably smaller than 5 monolayers.

The fabrication procedure of the magnetoresistive memory element may ensure a strain in the free magnetic layer due to a strong mechanical coupling at the interfaces between the free magnetic layers and adjacent materials. In a preferred embodiment, such strain may result from the epitaxial growth of a thin free layer on the substrate or on a single-crystalline over- layer deposited on it. The latter may be an insulating buffer layer or metallic film patterned subsequently into conductive lines necessary for the device functioning.

Preferably, said material, in particular a Ni film or Co₄₀Fe₆o film, may be formed on an over- layer, in particular a Cu overlayer or a vanadium overlayer, respectively, wherein said over- layer is formed on a substrate, in particular on a silicon wafer. A magnetoresistive memory element according to the present invention may further comprise a reference magnetic layer separated from said free magnetic layer. In a preferred embodiment, said reference layer may have a critical current density which is at least five times higher, and preferably at least ten times higher, than a critical current density of said free magnetic layer.

Said reference layer may preferably comprise a CoFe alloy, or a CoFeB alloy.

Preferably, said magnetoresistive memory element may comprise an insulating barrier layer or nonmagnetic conducting spacer formed between said free layer and said reference layer.

In a preferred embodiment, said barrier layer may comprise MgO or Mg-B-O.

In a preferred embodiment, said free magnetic layer may be mechanically coupled to an actuator adapted to induce and or change lattice strains in said free magnetic layer.

Said free magnetic layer may be mechanically coupled to a piezoelectric actuator, such that said piezoelectric actuator may induce and/or change lattice strains in said free magnetic layer.

By providing a piezoelectric substrate coupled to the free magnetic layer, the level of strain induced in the free magnetic layer may be adjusted externally by applying a voltage to the substrate. The electric field may create piezoelectric deformations, which may in turn induce additional lattice strains in the free magnetic layers. These additional strains may enhance the proximity of the strain-thickness state of the free magnetic layer to the critical state at which the spin reorientation transition takes place. Advantageously, this allows the magnetoresistive memory element to be kept in a strain-thickness state that is more remote from the spin reorientation transition while no writing is performed to the memory element, thereby enhancing the thermal stability of the information storage. Prior to writing, additional strains may be induced in the free magnetic layer by means of the piezoelectric actuator in order to bring the strain-thickness state closer to the critical state, thereby reducing the critical current needed for the magnetization switching. After the writing, the additional strains created by means of the piezoelectric actuator may be removed, and the thermal stability will again be increased to prevent information loss. In a preferred embodiment, said magnetoresistive memory element may comprise a magnetic tunnel junction or a multilayer exhibiting a giant magnetoresistance.

Said free magnetic layer may be directly coupled to said actuator, in particular to said piezoelectric actuator. This includes configurations wherein the free magnetic layer is the bottom layer of the memory element. However, the present invention likewise encompasses configurations in which the free magnetic layer is only indirectly coupled to the actuator, and may be separated from the actuator by another layer. In particular, this encompasses configurations in which the reference magnetic layer is the bottom layer of the memory element and is directly coupled to the actuator, whereas the free magnetic layer is separated from the actuator by the bottom reference layer and the barrier layer separating the reference layer from the free magnetic layer. In this configuration, the mechanical coupling of the free magnetic layer to the actuator is mediated by the reference layer and the barrier.

Said actuator may be comprised by said memory element, or may be an external component.

In a configuration employing a plurality of memory elements, these memory elements may be formed on a common actuator, in particular on a common piezoelectric actuator, such that said actuator may induce and/or change lattice strains simultaneously and cohesively in said plurality of memory elements.

The present invention is likewise directed at a magnetoresistive memory device comprising a plurality of memory elements with some or all of the features as described above, wherein said memory elements are formed on a common substrate, in particular a piezoelectric substrate. Said memory elements may be grouped into a plurality of first groups, wherein said free magnetic layers of each said first group of memory elements are electrically connected among one another. But electrical connections may be absent between free magnetic layers of memory elements belonging to different first groups.

In a preferred embodiment, said memory elements may each comprise a reference layer separated from said free magnetic layer, wherein said memory elements are grouped into a plurality of second groups, wherein said reference layers of each said second group of memory elements are electrically connected among one another. But electrical connections may be absent between reference layers of memory elements belonging to different second groups. Preferably, each said second group and each said first group do not have more than one memory element in common, and in particular have exactly one memory element in common.

A transistor device may be electrically connected between any two neighbouring free magnetic layers in said first group and/or between any two neighbouring reference layers in said second group.

This architecture allows providing a grid of magnetoresistive memory elements that may be addressed individually, formed on a common substrate. Each individual cell may comprise a magnetic tunnel junction, or a magnetic multilayer exhibiting a giant magnetoresistance.

The present invention likewise relates to a method for writing to a magnetoresistive memory element, wherein said magnetoresistive memory element comprises a free magnetic layer with a material that is prone to a spin reorientation transition driven by lattice strains and/or by a surface magnetocrystalline anisotropy.

Said free magnetic layer may be mechanically coupled to an actuator, wherein said method comprises a step of inducing and/or changing lattice strains in said free magnetic layer by applying an external field to said actuator. Preferably, said free magnetic layer is formed on said actuator.

As described above, this allows providing a magnetoresistive memory element that is thermally very stable, but at the same time has a low critical current.

In a preferred embodiment, said method may further comprise the step of removing induced lattice strains or restoring initial strains in said free magnetic layer by switching off said external field after said step of writing.

In a preferred embodiment, said actuator is a piezoelectric actuator mechanically coupled to said free magnetic layer, and said step of writing comprises a step of applying an electric field to said piezoelectric actuator. Said step of writing may further comprise the step of injecting a spin-polarized current into said free magnetic layer.

In the inventive method, said magnetoresistive memory element may be a memory element with some or all of the features as described above.

DESCRIPTION OF PREFERRED EMBODIMENTS

The features and numerous advantages of the present invention will best be understood from a detailed description of the preferred embodiments and the accompanying drawings, in which:

Fig. 1 is a perspective schematic view of an array of magnetoresistive memory elements according to a first embodiment of the present invention;

Fig. 2 is a perspective schematic view of an array of magnetoresistive memory elements according to a second embodiment of the present invention, wherein memory elements are formed on a common piezoelectric substrate;

Fig. 3 is a schematic top view of a two-dimensional array of magnetoresistive memory elements according to the present invention, and the electrical connections between reference magnetic layers; and

Fig. 4 is a schematic bottom view of a two-dimensional array of magnetoresistive memory elements according to the present invention, and the electrical connections between free magnetic layers.

A magnetoresistive memory device according to an embodiment of the present invention comprises an array of magnetoresistive memory elements (or memory cells) 10 coupled to a common substrate 12. The memory cells 10 may each comprise magnetic tunnel junctions or magnetic multilayers exhibiting a giant magnetoresistance effect, and have strained free layers made of a ferromagnet with weak cubic magnetocrystalline anisotropy and a high magnetostriction. Alternatively or additionally, ultrathin free layers with a significant surface magnetocrystalline anisotropy and an appropriate thickness may be used. The substrate-induced lattice strains in the free magnetic layer, or its surface magnetocrystalline anisotropy, provide a drastic reduction of the current density needed for magnetization switching in the free magnetic layer via the spin transfer torque. This reduction results from the proximity of the strain- thickness state to the critical state corresponding to the strain-induced or size-driven spin re- orientation transition between an in-plane and an out-of-plane orientation of the magnetization easy axis.

As can be seen from Fig. 1, the memory cell 10 formed on the substrate 12 comprises a free magnetic layer 14, as well as a reference magnetic layer 16 formed above or below said free magnetic layer 14. The reference layer 16 is separated from the free magnetic layer 14 by a thin insulating layer or nonmagnetic conducting spacer 18. Typical in-plane dimensions of a memory cell 10 are 20-50 nm, which ensures data storage with a high density of about 500 Gbit per square inch. The shape of memory cells is not necessarily square, as depicted in Figs. 1-4, but may also be circular, elliptical or rectangular. Typical thicknesses of the free magnetic layer 14 and the reference layer 16 are 2-5 nm, whilst the thickness of barrier 18 is typically 1-2 nm.

The illustration of Fig. 1 shows four memory cells 10, 10a, 10b, and 10c formed on the common substrate 12 and separated from substrate 12 by an insulating buffer layer 20. It will be understood, however, that a magnetoresistive memory device may in principle comprise any number of memory cells on one or more common substrates, and in any configuration. The memory cells 10a, 10b, and 10c shown in Fig. 1 are in general similar or identical to memory cell 10, and thus only memory cell 10 will henceforth be described in detail, while the description of memory cells 10a, 10b, and 10c is omitted to avoid unnecessary duplication. Corresponding reference signs denote corresponding parts in memory cells 10, 10a, 10b, and 10c.

The memory cells 10, 10a, 10b, and 10c are distinguished from the prior art by the existence of a spin reorientation transition driven by lattice strains. For instance, the free magnetic layers 14 may be made of a ferromagnetic material with cubic magnetocrystalline anisotropy and non-zero magnetostriction, which has a purely strain-induced spin reorientation transition. The critical strain state corresponding to this spin reorientation transition is characterized by moderate values of compressive or tensile strains, which can be created in a ferromagnetic film via the mechanical interaction with underlying substrate 12, buffer layer 20, or a conductive line.

As another example, free magnetic layers in the form of (OOl)-oriented Ni films deposited on a (OOl)-oriented cubic substrate may be employed. They have a gradual spin reorientation transition starting at the biaxial strain u* calculated to be between 0.718 % and 0.94 %, cf. N. A. Pertsev, Phys. Rev. B 78 (2008) 212102. Other cubic ferromagnets with the magnetoelastic coefficient B_\ satisfying the inequality » μ₀Μ may be suitable as well.

Alternatively, ultrathin ferromagnetic films may likewise be employed as free magnetic layers 14. This allows to reduce the critical strain «* to a level accessible for substrate-induced strains. As a result, it becomes possible to employ ferromagnetic materials that otherwise would have too high critical strains, such as Co4oFe<¾o alloy which has a critical strain «* « -(5 ± 0.5)% according to the inventors' calculations. The reduction of critical strain is achieved by choosing a suitable thickness of free layers 14, typically on the order of a few monolayers.

A significant reduction in the threshold current density for magnetization switching may likewise be achieved in the vicinity of a (purely or predominantly) size-driven spin reorientation transition. In this case, unstrained ultrathin layers with a thickness close to the critical thickness /* at which the size-induced spin reorientation transition occurs in a particular material may be employed as free magnetic layers 14. Examples for suitable materials that show a size-induced spin reorientation transition are described by N. C. Koon et al, Phys Rev. Lett. 59 (1987) 2463, as well as H. Lee et αΙ., ΑρρΙ Phys. Lett. 89 (2006) 112516.

In general, the spin reorientation transition in the free magnetic layer 14 of the memory cell 10 according to the present invention may be either driven by lattice strains, or by surface magnetocrystalline anisotropy, or by a combination of these two factors.

The reference magnetic layers 16 of the memory cells have a fixed magnetization orientation not switchable by spin-polarized currents employed in the writing process. In the preferred embodiment, this feature is achieved by making the reference layers 16 from a ferromagnetic material different from that used for the free layers 14. The material employed for the reference layers 16 should be characterized by a high critical current density J_c exceeding that of the free layers 14 by at least one order of magnitude. Usually, J_c « 10⁷ -10⁸A/cm² , and hence this requirement leaves much room for the choice of material for the reference layers 16. In particular, the reference layers 16 may be formed from a CoFe or CoFeB alloy with a high critical strain u*, or may likewise be formed from a ferromagnetic material with an uniaxial magnetocrystalline anisotropy, such as hexagonal cobalt. In other embodiments, the reference layers 16 and the free magnetic layers 14 may be made of the same material, but the magnetizations of the fixed reference layers 16 may be pinned by adjacent antiferromagnetic layers.

The materials combination employed for the fabrication of magnetic tunnel junctions or GMR multilayers ensures a sufficient tunnelling magnetoresistance ratio or GMR ratio, respectively, allowing for data readout via resistance measurements. In one particular embodiment, the magnetic tunnel junctions comprise a Co₄oFe₆₀ free layer 14 of appropriate thickness and a fixed reference layer 16 made of a CoFeB alloy, which are separated by a tunnel barrier 18 comprising MgO. Alternatively, magnetic tunnel junctions with a Ni free electrode 14 and a FeCoB reference layer 16 in combination with a tunnel barrier 18 comprising Mg-B-0 can be employed, which are expected to have a high tunnelling magnetoresistance in view of the experimental data published by J. C. Read et αΙ., ΑρρΙ. Phys. Lett. 94 (2009) 112504.

In yet another example, the memory cell 10 may comprise a GMR multilayer where two ferromagnetic films are separated by a nonmagnetic conducting spacer and one of these films is coupled to an antiferromagnetic pinning layer. Such a spin valve can be realized, for instance, in the form of a Co₄oFe₆₀/Cu/Co₄₀Fe6o/IrMn multilayer structure.

The fabrication process of the magnetoresistive memory device ensures a strong mechanical coupling at the interfaces between the free magnetic layers 14 and adjacent materials. In the preferred embodiments, such coupling may result from the epitaxial growth of a thin free layer 14 on the substrate 12 itself, or alternatively on a single-crystalline overlayer 20 deposited on it. The overlayer 20 may be an insulating buffer layer or metallic film patterned subsequently into conductive lines necessary for the device functioning.

Owing to differences in lattice constants and thermal expansion coefficients between dissimilar materials comprising the heterostructure, in-plane lattice strains

= 1,2) appear in thin free layer 14. The magmtude of these strains is determined either by material parameters of the substrate or by those of a thick overlayer. In one particular embodiment, the (001)- oriented layer of a cubic ferromagnetic material grows directly on the (OOl)-oriented thick cubic substrate 12 so that the in-plane biaxial strain u = u_u = u₂₂ in the free layer equals u = (b - a)/a , where b is the substrate lattice parameter and a is the lattice constant of the ferromagnetic material in the bulk form. Another embodiment involves the growth of a free magnetic layer on a thin insulating over- layer fully strained by the substrate. The biaxial strain u is defined by the same relation in this case, but the introduction of a buffer layer makes it possible to use a metallic or semiconducting substrate 12 (e.g., silicon wafer) and may have further technological advantages.

In another embodiment, the free layer 14 is deposited on a much thicker crystalline overlayer, where the substrate-induced strains are fully or partially relaxed owing to the generation of misfit dislocations at the interface. Here the strains u_ap are determined by lattice constants of the overlayer, which may be tuned between their bulk values and those of the substrate by changing the overlayer composition, thickness, and deposition temperature. This approach opens additional possibilities to accomplish proximity of in-plane strains in free magnetic layers to the critical strains corresponding to the SRT.

For instance, in the example of Ni free layer deposited on a (OOl)-oriented Cu overlayer, the biaxial in-plane strain u may hence be reduced from the nominal value u = 2.56% to a value slightly below the critical strain u* « 0.9% either via strain relaxation in the Ni layer or by depositing a Cu film on an appropriate substrate with a smaller lattice constant.

Another favourable material combination comprises a thin Co₄oFe₆o free layer grown on a vanadium film. In this embodiment, proximity to the SRT can be accomplished by decreasing the critical strain u* towards the nominal misfit strain u « -3.44% of the Co₄oFe₆o/V couple with the aid of the surface/interface magnetic anisotropy by varying the thickness of the Co₄oFe₆o layer.

In order to achieve a significant reduction of the threshold density J_c of the spin-polarized current needed for the magnetization switching in the spin-transfer torque MRAM cells, the strain-thickness state of the free magnetic layers 14 should be close to the critical state at which the orientation of the magnetization easy axis changes between an in-plane direction and an out-of-plane one. For instance, the easy axis may be parallel to the surfaces of a strained free layer 14, and the current-induced magnetization switching may occur between two in-plane directions. According to the inventors' calculations, in the exemplary case of a Co₄₀Fe₆₀ layer subjected to an isotropic biaxial strain u and having a strain-induced SRT at u = u*, the critical current density J_c reduces by a factor of 10 at |w - w *|/|w *| « 9% and by a factor of 50 at

|W - M *| /|M *| « 1% . Similar strain effects can be achieved for Ni films: J_c(w)= 0.1J_C(0) at

|M - W *|/|« *| « 8% and J_c(w) = 0.03J_C(0) at |H - M *|/|« *| « 1% . In general, strong reduction of the threshold density J_c is expected for cubic ferromagnetic metals with relatively low magne- tocrystalline anisotropy. Specifically, the anisotropy constants Ki should preferably satisfy the inequality

- K₂ /2\ « μ_ϋΜ in ferro- magnets with K_\ < 0.

The thermal stability of the information storage in the magnetoresistive memory device may be ensured by potential barriers separating different magnetization states of the memory cells 10. For STT-MRAMs employed at room temperature T_r, the height of these barriers should preferably not be less than about 50 A¾ T_r, where ks is the Boltzmann constant. This condition can be fulfilled by keeping the volume of a free layer 14 above the minimum value V*. Although V* increases in the vicinity of the SRT, the inventors found that it remains small enough for high-density STT-MRAMs. For instance, at the strain-thickness conditions reduc- ing the critical current by a factor of 10, the minimum volume V* is about 1000 nm for the Co₄oFe₆o free layer and about 14000 nm³ for the Ni layer. At the representative thickness of 3 nm, therefore, the necessary thermal stability is achieved aheady at the Co₄oFe₆o area of about 330 nm and at the Ni area less than 5000 nm .

The inventors found that the minimum value V* depends on the ratio \u - u *\/\u *\ , i.e., on the proximity to the SRT. The minimum value of \u - u *|/|w *| ensuring the thermal stability of the information storage at a given volume Vof the free magnetic layer is inversely proportional to V so that it increases rapidly with decreasing volume of the free layer. For example, at V « 3000 nm³, which ensures data storage with a high density of about 500 Gbit per square inch (free layer area A « 1000 nm combined with a typical layer thickness t = 3 nm), the thermal stability may be preserved if

*| > 3% , preferably |w - u *| /|w *| > 4% .

Similarly, in the case of a spin reorientation transition driven by a surface magnetocrystalline anisotropy, thermal stability may be preserved by using a free magnetic layer with sufficient area A exceeding a minimum area A* which depends on the ratio

, i.e., on the prox- imity to the SRT. The minimum value of |t - 1 *| l\t *\ ensuring the thermal stability of the information storage at a given area A of the free magnetic layer is inversely proportional to A so that it increases rapidly with decreasing area of the free layer. For a free layer with the typical volume V « 3000 nm³, the thermal stability is preserved if |t - 1 *\ l\t *| > 3% , preferably |t - t *| /|t *| > 4% , wherein t* denotes a critical thickness at said spin reorientation transition.

The inventors found that an experimental test may be performed for checking whether the free layer 14 is ready for a current-induced magnetization switching. This test may be based on the measurement of the magnetic field H_c needed to induce a 90° magnetization reorientation in the free layer 14. When the free layer 14 initially has an in-plane magnetization M_S = M(H = 0), the measuring magnetic field H should be applied along the normal N to the surfaces of this layer. Then a low field intensity H_c needed to make the magnetization M(H) orthogonal to the layer surfaces (parallel to N) will indicate a low critical current density J_c.

This correlation is highly nontrivial because, in this example, the current-induced magnetization switching takes place in the film plane, but not between in-plane and out-of-plane directions. When the (OOl)-oriented ferromagnetic layer with a positive magnetocrystalline coefficient K_\ > 0 is subjected to an isotropic biaxial strain u_m, the critical magnetic field H_c can be calculated as

2 ₀M_SC_{U 0}M_sc_n where B_\ is the magnetoelastic coefficient and ο_αβ are the elastic stiffness coefficients of the magnetic layer. Substituting into this equation the misfit strain u_m at which the critical current density J_c of the Co₄₀Fe₆₀ layer reduces by a factor of 10, the inventors found that the corresponding magnetic field H_c is about 1000 Oe. In the case of a Ni free layer (K_\ < 0), the condition Jc(w) < 0.1 J_c(0) is achieved when the critical field H_c becomes less than 300 Oe. At the same time, the measured field H_c should not be too low, as such observation points to a relatively large volume of the free layer needed for the thermal stability of data storage. In the case of the Co₄oFe₆o layer, for example, the measurement of H_c = 100 Oe not only indicates that the critical current reduces by a factor of 50, but also shows that the minimum volume V* increases up to 12000 nm³. The strain-induced reduction of the critical threshold current can be facilitated externally with the aid of a piezoelectric actuator 22 mechanically coupled to the substrate 12, or forming part of the substrate 12, or used as a substrate 12. This alternative embodiment is illustrated in Fig. 2, which generally corresponds to Fig. 1 apart from the fact that substrate 12 is replaced by a piezoelectric actuator 22 on which the memory cells are formed. Identical elements have the same reference signs in Figs. 1 and 2, and reference is made to the detailed description of Fig. 1 for an account of their functionality.

As can be seen in Fig. 2, a voltage source 24 may be connected to the piezoelectric actuator 22 by means of wires attached to the electrodes 38, 40 covering the two side faces of a piezoelectric crystal. A voltage applied to the electrodes by the voltage source 24 then induces an electric field E inside the piezoelectric crystal, and the resulting polarization P(E) creates piezoelectric deformations here. Owing to the interfacial mechanical coupling between all constituents of the heterostructure, these deformations change in-plane dimensions of the free magnetic layers 14 so that additional lattice strains appear in these layers. These strains may enhance the proximity of the strain state of the free magnetic layers 14 to the critical strain state u* at which the spin reorientation transition takes place. In this way, the proximity to the spin reorientation transition may be ensured externally by applying an electric field to the piezoelectric actuator 22.

Alternatively, anisotropic in-plane strains in the free magnetic layer 14 with an in-plane magnetization may be created by an electric field applied to the actuator, e.g., in the direction parallel to the interface. These strains promote the 90° magnetization rotation, thus additionally reducing the critical current density needed for the magnetization switching.

The electric field may be applied to the piezoelectric actuator 22 during data writing only, thereby driving the strain-thickness state to the vicinity of the spin reorientation transition and lowering the critical current density for STT-induced magnetization switching. The electric field may be removed from the piezoelectric actuator 22 when no writing of data is desired, thereby enhancing the thermal stability of the data storage.

The architecture of a magnetoresistive memory device according to an embodiment of the present invention is illustrated schematically in Fig. 3 (top view) and Fig. 4 (bottom view). As can be seen from Figs. 3 and 4, the memory cells 10 are organized into a grid of rows and columns on the substrate 12. Figs. 3 and 4 show a plurality of memory cells 10 comprising magnetic tunnel junctions or GMR multilayers, wherein these memory cells are in general similar or identical. For ease of presentation, again only one memory cell 10 will be described.

The memory cells 10 shown in the top view of Fig. 3 are grouped into columns, wherein the memory cells 10 of each column are wired together in series by means of conductive lines 26, which connect the reference layers 16 of all memory cells 10 in the column. Each said column of reference layers 16 is connected to a respective voltage source 28.

As can be seen from the corresponding bottom view of Fig. 4, free magnetic layers 14 of memory cells 10 are likewise connected into groups, but organized in rows rather than in columns. The free magnetic layers 14 of each row are connected by conductive lines 30, which may be grounded. Transistor elements 32 are provided in said conductive lines 30 in between any two free magnetic layers 14. Further conductive lines 34 connect the respective gates of the transistor elements 32 of each of the rows to respective voltage sources 36. The voltage source 36 allows switching the transistor elements 32 so to connect the free magnetic layers 14 to the ground, or to disconnect them. This architecture allows addressing each memory cell individually.

Alternatively, transistor elements 32 may be placed between the reference layers 16 rather than between free magnetic layers 14.

In the preferred embodiments, the magnetizations of free and fixed ferromagnetic layers in all memory cells 10 initially have the same spatial orientation (logic value "0"). This can be achieved by the application of a dc magnetic field to the cell array, which exceeds the coercive fields of both magnetic layers 14, 16, and is removed afterwards.

Current-induced switching of magnetizations in the free layers of selected memory cells is then employed to create the logic state "1" in these cells. This is achieved with spin-polarized write currents that create spin torques leading to the magnetization reversal. Since each memory cell is addressed individually, it can be switched from the "0" logic state to the "1" state and back. The method according to the present invention significantly reduces the power consumption of the memory device. The readout of the logic state is made nondestructively by measuring the magnitude of current flowing through an MTJ or a GMR multilayer at a given applied voltage. The description of the preferred embodiments and the drawings merely serve to illustrate the features and numerous advantages of the present invention, but should not be understood to imply any limitation. The scope of the invention is to be determined solely by the appended claims.

Reference Signs

10, 10a, 10b, 10c memory cell

12 substrate

14, 14a, 14b, 14c free magnetic layer

16, 16a, 16b, 16c reference magnetic layer

18, 18a, 18b, 18c insulating barrier layer or nonmagnetic conducting spacer

20 insulating buffer layer

22 piezoelectric actuator

24 voltage source

26 conductive lines connecting reference layers 16

28 voltage sources

30 conductive lines connecting free magnetic layers 14 to ground

32 transistor element

34 conductive lines connecting gates of transistors 32 to voltage sources 36

36 voltage sources

38 top electrode of piezoelectric actuator 22

40 bottom electrode of piezoelectric actuator 22

Claims

1. A magnetoresistive memory element (10, 10a, 10b, 10c) with a free magnetic layer (14, 14a, 14b, 14c) comprising a material that is strained and/or has a surface magnetocrys- talline anisotropy, wherein said material is prone to a spin reorientation transition due to said lattice strains and/or surface magnetocrystalline anisotropy.

2. The magnetoresistive memory element (10, 10a, 10b, 10c) according to claim 1,

wherein a strain-thickness state of said free magnetic layer (14, 14a, 14b, 14c) is close to a critical state corresponding to said spin reorientation transition.

3. The magnetoresistive memory element (10, 10a, 10b, 10c) according to claim 1 or 2, wherein said spin reorientation transition is a transition at which the magnetization easy axis changes orientation from a direction in the plane of said free magnetic layer (14, 14a, 14b, 14c) to a direction out of the plane of said free magnetic layer (14, 14a, 14b, 14c), in particular orthogonal to said free magnetic layer (14, 14a, 14b, 14c).

4. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material has a strain u such that \u - u*\/\u* \≤ 10%, preferably \u - u*\/\u*\≤ 5%, wherein u* denotes a critical strain at said spin reorientation transition.

5. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material has a strain u such that \u - u*\i\u*\ > 3%, preferably \u - W*|/|M*| > 4%, wherein u* denotes a critical strain at said spin reorientation transition.

6. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material, in particular an unstrained material, has a thick-

68.358 ness t such that \t - t*\l\t*\≤ 10%, preferably |t - t*|/|t*| < 5%, wherein t* denotes a critical thickness corresponding to said spin reorientation transition.

7. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material, in particular an unstrained material, has a thickness t such that |t- t*|/|t*| > 3%, preferably |t - t*|/|t*| > 4%, wherein t* denotes a critical thickness corresponding to said spin reorientation transition.

8. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material comprises a ferromagnet with an anisotropy constant K_x « μ₀Μ² 14 for K_\ > 0, or anisotropy constants K_\, K₂ such that

« μ₀Μ for K_\ < 0, where μ denotes the vacuum permeability and M_s denotes the spontaneous magnetization.

9. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material comprises a ferromagnet with a magnetoelastic coefficient B_\ such that 15,1 » μ_ΰΜ , where μ denotes the vacuum permeability and M_s denotes the spontaneous magnetization.

10. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material comprises a Ni film deposited on a cubic substrate (12).

11. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material comprises a Co-Fe alloy film, in particular a Co₄₀Fe₆₀ film.

12. The magnetoresistive memory element (10, 10a, 10b, 10c) according to claim 11,

wherein a thickness of said Co-Fe alloy film is smaller than 10 monolayers, preferably smaller than 5 monolayers.

13. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said material, in particular in the form of a Ni film or a Co₄₀Fe₆o film, is formed on an overlayer, in particular a Cu overlayer or a vanadium overlayer, wherein said overlayer is formed on a substrate (12), in particular a silicon substrate.

The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said free magnetic layer (14, 14a, 14b, 14c) is coupled to an ac tuator (22) adapted to induce and/or change lattice strains in said free magnetic layer (14, 14a, 14b, 14c).

The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said free magnetic layer (14, 14a, 14b, 14c) is mechanically coupled to a piezoelectric actuator (22), such that said piezoelectric actuator (22) may induce and/or change lattice strains in said free magnetic layer (14, 14a, 14b, 14c).

The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the preceding claims, wherein said magnetoresistive memory element (10, 10a, 10b, 10c) comprises a magnetic tunnel junction or a multilayer exhibiting a giant magnetoresis- tance.

17. The magnetoresistive memory element (10, 10a, 10b, 10c) according to any of the pre- ceding claims, further comprising a reference magnetic layer (16, 16a, 16b, 16c) separated from said free magnetic layer (14, 14a, 14b, 14c), wherein said reference layer (16, 16a, 16b, 16c) has a critical current density which is at least five times higher, and preferably at least ten times higher, than a critical current density of said free magnetic layer (14, 14a, 14b, 14c).

18. The magnetoresistive memory element (10, 10a, 10b, 10c) according to claim 17,

wherein said reference magnetic layer (16, 16a, 16b, 16c) comprises a CoFe alloy or a CoFeB alloy.

The magnetoresistive memory element (10, 10a, 10b, 10c) according to claims 17 or 18, wherein said magnetoresistive memory element (10, 10a, 10b, 10c) comprises a barrier layer (18, 18a, 18b, 18c) formed between said free layer (14, 14a, 14b, 14c) and said reference magnetic layer (16, 16a, 16b, 16c), wherein said barrier preferably comprises MgO or Mg-B-O. A magnetoresistive memory device comprising a plurality of memory elements (10, 10a, 10b, 10c) according to any of the claims 1 to 19, wherein said memory elements (10, 10a, 10b, 10c) are formed on a common substrate (12), in particular a piezoelectric substrate (22), and wherein said memory elements (10, 10a, 10b, 10c) are grouped into a plurality of first groups, wherein said free magnetic layers (14, 14a, 14b, 14c) of each said first group of memory elements (10, 10a, 10b, 10c) are electrically connected among one another.

The magnetoresistive memory device according to claim 20, wherein said memory elements (10, 10a, 10b, 10c) each comprise a reference magnetic layer (16, 16a, 16b, 16c) separated from said free magnetic layer (14, 14a, 14b, 14c), wherein said memory elements (10, 10a, 10b, 10c) are grouped into a plurality of second groups, wherein said reference layers (16, 16a, 16b, 16c) of each said second group of memory elements (10, 10a, 10b, 10c) are electrically connected among one another such that each said second group and each said first group preferably do not have more than one memory element (10, 10a, 10b, 10c) in common.

The magnetoresistive memory device according to claim 20 or 21, wherein a transistor device (32) is electrically connected between any two neighbouring free magnetic layers (14, 14a, 14b, 14c) of said first group, and/or a transistor device is electrically connected between any two neighbouring reference magnetic layers (16, 16a, 16b, 16c) of said second group.

A method for writing to a magnetoresistive memory element (10, 10a, 10b, 10c), wherein said magnetoresistive memory element (10, 10a, 10b, 10c) comprises a free magnetic layer (14, 14a, 14b, 14c) with a material that is prone to a spin reorientation transition driven by lattice strains and/or by a surface magnetocrystalline anisotropy.

The method according to claim 23, wherein said free magnetic layer (14, 14a, 14b, 14c) is mechanically coupled to an actuator (22), and wherein said method comprises a step of inducing and/or changing lattice strains in said free magnetic layer (14, 14a, 14b, 14c) by applying an external field to said actuator (22).

25. The method according to claim 23 or 24, wherein said actuator is a piezoelectric actuator (22) mechanically coupled to said free magnetic layer (14, 14a, 14b, 14c), and said method comprises a step of applying an electric field to said piezoelectric actuator (22).

26. The method according to any of the claims 23 to 25, wherein said method comprises a step of injecting a spin-polarized current into said free magnetic layer (14, 14a, 14b, 14c).

27. The method according to any of the claims 23 to 26, wherein said magnetoresistive memory element (10, 10a, 10b, 10c) is a memory element (10, 10a, 10b, 10c) according to any of the claims 1 to 22.