WO2013004289A1 - Procédé destiné à obtenir un court-circuit à long terme dans un module d'électronique de puissance - Google Patents

Procédé destiné à obtenir un court-circuit à long terme dans un module d'électronique de puissance Download PDF

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Publication number
WO2013004289A1
WO2013004289A1 PCT/EP2011/061215 EP2011061215W WO2013004289A1 WO 2013004289 A1 WO2013004289 A1 WO 2013004289A1 EP 2011061215 W EP2011061215 W EP 2011061215W WO 2013004289 A1 WO2013004289 A1 WO 2013004289A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor chips
module
chip
semiconductor
scfm
Prior art date
Application number
PCT/EP2011/061215
Other languages
English (en)
Inventor
Jürgen Häfner
Didier Cottet
Iulian Nistor
Liutauras Storasta
Munaf Rahimo
Nicola Schulz
Thorsten STRASSEL
Raffael Schnell
Original Assignee
Abb Technology Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Technology Ag filed Critical Abb Technology Ag
Priority to PCT/EP2011/061215 priority Critical patent/WO2013004289A1/fr
Publication of WO2013004289A1 publication Critical patent/WO2013004289A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters

Definitions

  • the present invention relates to the technical field of power electronics (PE).
  • PE power electronics
  • it concerns a method for reducing the blocking voltage of a semiconductor chip in a power electronics module.
  • VSC Voltage source converters
  • IGBT insulated gate bipolar transistor
  • SVC static var compensators
  • IGBTs IGBTs and GTO thyristors are suitable for high power applications. IGBTs are often preferable as they combine great power handling ability with features that make them well suited for connection in series.
  • Short circuit situations may occur in semiconductor circuits. In such situations it is necessary to be able to handle the effect of the short circuit.
  • a semiconductor breaks down, e.g. as a result of an over current or over voltage, the semiconductor cannot hold a voltage any longer.
  • a damaged semiconductor cannot be controlled. It may hold only a small voltage difference and when conducting its resistance can have a value within a broad range. In the worst case, forcing a current through a damaged semiconductor with high resistance can generate an arc that will generate extensive power dissipation.
  • ABBs StakPak module One example of a power electronics module is ABBs StakPak module.
  • StakPak modules are used as power switches. They have the ability to go into a stable short circuit failure mode (SCFM) in case of an IGBT or diode failure. These modules are connected in series to obtain a valve with high blocking voltage. The blocking capability is taken over by the remaining modules in the stack in case of a short circuit in a module.
  • SCFM capability in StakPak modules is achieved by placing a plate made of a suitable metal on top of the IGBT and diode chips. A failure usually leads to a break-through and subsequently melts the metal plate and the silicon chip which then forms a conductive metal-silicon alloy. The lifetime of a conductive alloy, i.e.
  • WO 2006/104430 A1 describes the procedure of detecting a semiconductor element failure in a converter valve of an electric power converter.
  • the converter valve comprises a first and second group of parallel connected semiconducting elements and a current sensing device which senses the current flow of both groups.
  • the converter valve further comprises a control unit which provides a signal for assuming a closed circuit after detecting a difference in the current flow of the first and second group of
  • the invention is based on the insight that the blocking voltage of typical gate-controlled semiconductor chips used in PE modules is reduced when the chips' gates are floating. In the case of an SCFM transition, a lower breakdown voltage would trigger the SCFM transition earlier and thus facilitate the use of chips with a higher blocking voltage.
  • a method for simplifying SCFM transitions after a first semiconductor chip failure in a PE module is provided as defined in claim 1 .
  • a PE module for simplifying SCFM transitions is provided as defined in claim 7.
  • a PE module comprises a first
  • the semiconductor chip a plurality of second semiconductor chips, and at least one switch located between the gates of at least one of the plurality of second semiconductor chips and a GU.
  • the at least one switch is controlled by the GU.
  • the at least one switch is configured to be closed, in response to a signal provided by the GU.
  • the signal could be e.g. a voltage, a current or an optical signal.
  • the failed chip enters an SCFM.
  • the GU applies no more signals to the control terminal of the at least one switch it changes to an open position, wherein the gates of at least one of the plurality of second semiconductor chips become floating.
  • the SCFM will be aging and finally it will lead to an SCFM transition.
  • the SCFM transition will move to the chip with the lowest blocking voltage, which will be the at least one of the plurality of second semiconductor chips with a floating gate.
  • a PE module comprises a first semiconductor chip, a plurality of second semiconductor chips, and at least one switch is located between at least one of the plurality of second semiconductor chips and a GU.
  • the at least one switch which is controlled by the GU, is kept in a closed position until a chip failure.
  • the at least one switch will be opened as the GU will not supply any more signals and the failed chip will enter an SCFM.
  • the blocking capability of the at least one of the plurality of second semiconductor chips is reduced which means that the at least one of the plurality of second semiconductor chips is the one with the lowest breakdown voltage.
  • the difference between the at least one of the plurality of second semiconductor chips and the other semiconductor chips or sub-modules is that this specific at least one of the plurality of second semiconductor chips is not intended for switching under normal operating conditions like the other chips.
  • This specific chip stays in blocking mode (i.e. with a defined gate voltage) all the time until a chip fails somewhere. Then this specific chip's gate is set to floating by opening the switch and its blocking voltage is reduced.
  • the SCFM will be aging and finally it will lead to an SCFM transition.
  • the SCFM transition will then go with certainty to this specific chip since it has the lowest blocking voltage.
  • the at least one of the plurality of second semiconductor chips can be designed in a particular way so that its SCFM lifetime is much longer than the SCFM lifetime of a normal chip, e.g. the it can have a much larger area (it could e.g. be a whole wafer) or a more elaborate mechanical construction, more expensive materials etc. could be used to obtain a very long SCFM lifetime, in particular longer than the
  • One advantage with the concept of the present invention is that it does not need to be powered after an initial failure and SCFM event. It will be acting completely passively and will ease SCFM transitions which become more difficult when up-scaling the module's blocking voltage. Another advantage and benefit is that new solutions for a stable long-term electrical bypass become possible. This, along with that the SCFM transitions will happen more smoothly, results in a higher reliability of the StakPak module and the potential to up-scale the StakPak with respect to higher currents/voltages.
  • Figure 1 shows a schematic drawing of a PE module in accordance with an exemplifying embodiment of the invention.
  • Figure 2 shows a schematic flowchart of method steps in accordance with an exemplifying embodiment of the present invention.
  • Figure 3 shows a schematic drawing of a PE module in accordance with another exemplifying embodiment of the invention.
  • the PE module 100 comprises switches 101 -104 and a first semiconductor chip or sub-module 105 and a plurality of second semiconductor chips or sub- modules 106-108. Further, the PE module 100 comprises a gate unit terminal 109 for connection to a gate unit (GU) 1 10. During normal operation the switches 101 -104 are in a closed state which allows the GU 1 10 to control the first- and second semiconductor chips 105- 108. With reference to figure 2, the operation according to an embodiment is shown. At step 200, the switches connecting the first- and second semiconductor chips or sub-modules to the GU are permanently on, e.g.
  • step 201 a SCFM is formed at the failed first semiconductor chip's position which may lead to a gate- emitter short within this chip, step 202. This leads to a shorted gate of all other gates within the PE module.
  • step 203 the GU then detects the failure, by e.g. a voltage measurement, and subsequently powers down or it fails to operate. As the GU applies no more signals to the control terminal of the switches, the switches are opened, step 204, and the gates of the second semiconductor chips, i.e. the non-failed chips, become floating.
  • the applied signal from the GU to control the switches could include a voltage, a current or an optical signal.
  • the switches can be e.g. voltage-controlled semiconductor switches (e.g. MOSFETs). In the case of normally-off switches, the switches are closed when a voltage is applied to their control terminal and they are open when zero voltage is applied which happens after a GU power-down. Further possibilities for switches are mechanical switches, relays or fuses.
  • the initial SCFM is aging and it will eventually lead to an SCFM transition, step 205.
  • the SCFM transition will move to the chip with the lowest blocking capability. As the blocking voltage of a chip is reduced when the chip's gate is floating, the SCFM transition will move to a chip with a floating gate. Thus, the SCFM transition will move to one of the plurality of second semiconductor chips.
  • a new SCFM is formed at the newly failed second semiconductor chip.
  • the PE module needs to be replaced, step 208. Otherwise, if all chips within the PE module are not used up by the SCFM, the cycle of forming a SCFM at a failed chip which eventually will lead to a transition is repeated again, starting from step 205.
  • the PE module 300 comprises a switch 301 , a first semiconductor chip or sub-module 302 and a plurality of second semiconductor chips or sub- modules 303-305. Further, the PE module 300 comprises a gate unit terminal 306 for connection to a GU 307.
  • One of the plurality of second semiconductor chips 308, which is electrically blocking with an applied gate voltage, is connected in parallel to the first- and second semiconductor chips or sub-modules 302-304 of the PE module 300.
  • the second semiconductor chip 305 is connected to the GU 307 via a gate unit terminal 306 containing a disconnection switch 301 , which is controlled by the GU 307.
  • the one of the plurality of semiconductor chips 305 can be placed outside the PE module but still connected in parallel to the first- and second semiconductor chips or sub- modules 302-304, and be connected to the GU 307 via a gate unit terminal 306.
  • the disconnection switch 301 which is controlled by the GU, could be placed either inside or outside the PE module 300.
  • the switch disconnects the second semiconductor chip 305 from the GU 307 after an initial failure of the first semiconductor chip 302 in the PE module 300, making its gate floating, the blocking capability of the second semiconductor chip 305 is reduced, similar to the process described in figure 2.
  • the second semiconductor chip 305 will fail with certainty since it is the only one with a floating gate.
  • the second semiconductor chip 305 can be optimised to possess specific properties, e.g. a high current carrying capability.
  • the second semiconductor chip 305 and the parallel connected first- and second semiconductor chips or sub-modules 302-304 should have a comparable blocking voltage since the second semiconductor chip 305 has to withstand the voltages occurring during normal operation. It should just be made sure that after a failure, the second semiconductor chip 305 is the one with the lowest breakdown voltage.
  • the second semiconductor chip 305 could be e.g. a semiconductor device such as an IGBT, MOSFET or a thyristor.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)

Abstract

L'invention concerne un procédé destiné à faciliter les transitions de mode de défaillance par court-circuit (SCFM) dans un module d'électronique de puissance. Le procédé comprend les étapes suivantes : maintenir au moins un commutateur (101, 102, 103, 104) dans une position fermée à l'aide d'un signal (109) fourni par une unité de grille (110). Après défaillance d'une première puce à semi-conducteur (105) pendant laquelle la puce défaillante passe en mode SCFM, le commutateur (102, 103, 104) est ouvert, si bien que les grilles des secondes puces à semi-conducteur (106, 107, 108) deviennent flottantes. De cette manière, on réduit la tension de blocage des puces à semi-conducteur.
PCT/EP2011/061215 2011-07-04 2011-07-04 Procédé destiné à obtenir un court-circuit à long terme dans un module d'électronique de puissance WO2013004289A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/EP2011/061215 WO2013004289A1 (fr) 2011-07-04 2011-07-04 Procédé destiné à obtenir un court-circuit à long terme dans un module d'électronique de puissance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2011/061215 WO2013004289A1 (fr) 2011-07-04 2011-07-04 Procédé destiné à obtenir un court-circuit à long terme dans un module d'électronique de puissance

Publications (1)

Publication Number Publication Date
WO2013004289A1 true WO2013004289A1 (fr) 2013-01-10

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10263506B2 (en) 2015-03-05 2019-04-16 Ge Energy Power Conversion Technology Ltd Circuit arrangement and method for gate-controlled power semiconductor devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0785625A2 (fr) * 1996-01-16 1997-07-23 Cegelec Controls Ltd. Montage de protection pour un dispositif de commutation
WO2006104430A1 (fr) 2005-03-31 2006-10-05 Abb Research Ltd Vanne de convertisseur

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0785625A2 (fr) * 1996-01-16 1997-07-23 Cegelec Controls Ltd. Montage de protection pour un dispositif de commutation
WO2006104430A1 (fr) 2005-03-31 2006-10-05 Abb Research Ltd Vanne de convertisseur

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KAUFMANN S ET AL: "Innovative press pack modules for high power IGBTs", PROCEEDINGS OF THE 13TH. INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS. ISPSD'01. OSAKA, JAPAN, JUNE 4 - 7, 2001; [INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & IC'S], NEW YORK, NY : IEEE, US, 4 June 2001 (2001-06-04), pages 59 - 62, XP010551570, ISBN: 978-4-88686-056-9, DOI: 10.1109/ISPSD.2001.934559 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10263506B2 (en) 2015-03-05 2019-04-16 Ge Energy Power Conversion Technology Ltd Circuit arrangement and method for gate-controlled power semiconductor devices

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