WO2012163296A1

WO2012163296A1 - Passive electronic tag

Info

Publication number: WO2012163296A1
Application number: PCT/CN2012/076392
Authority: WO
Inventors: 刘智佳
Original assignee: Liu Zhijia
Priority date: 2011-06-03
Filing date: 2012-06-01
Publication date: 2012-12-06
Also published as: WO2012163294A1; CN202084069U

Abstract

Disclosed is a passive electronic tag, including: a radiation surface, a first substrate under the radiation surface, a second substrate under the first substrate, a ground surface under the second substrate, a tag chip between the upper surface of the second substrate and the lower surface of the first substrate, a tunable through-hole for regulating the frequency of the passive electronic tag and consisting of a plurality of first through-holes, wherein the tunable through-hole is located on the radiation surface, the first substrate, the second substrate and the ground surface, and the plurality of first through-holes are electrically connected to the radiation surface and the ground surface by passing through the first substrate and the second substrate. The frequency offset caused by production errors can be corrected due to the design of the through-holes and the tunable through-hole cooperating.

Description

Passive electronic tag

Technical field

The present invention relates to a passive electronic tag, and more particularly to a passive electronic tag capable of correcting for a frequency offset caused by a production error. Background technique

At present, electronic label technology is widely used in many fields, such as logistics management, medical industry, tracking management monitoring of goods and dangerous goods, aviation industry, mandatory inspection products, document security, road and bridge non-stop charging, electronic tickets, etc. . According to the different structures of the electronic tag power supply system, the electronic tags are mainly classified into active tags, semi-active tags and passive tags. Active tags and semi-active tags have an external battery that provides energy for the operation of the tag chip via an external battery. Passive tags rely on the reader's RF signal to provide energy to operate, and passive tags have the advantages of low cost and large-scale production.

The following structural design defects exist in existing passive electronic tags:

One: In the prior art, the chip is generally directly exposed on the surface of the substrate. Therefore, the electronic tag is easily affected by the external environment (such as moisture or high temperature), and the electronic tag is easily worn during handling or installation.

Second: In the production process, electronic tags often have a certain frequency offset and are difficult to correct. Summary of the invention

It is an object of the present invention to provide a passive electronic tag that addresses at least one of the above disadvantages.

In one aspect, the passive electronic tag includes: a radiating surface (1); a second substrate (3) located below the radiating surface (1); a ground plane (11) located on the second substrate ( 3); the passive electronic tag further comprising: a first substrate (2) between the radiation surface (1) and the second substrate (3); opening (13 Passing through the radiating surface (1) and the first substrate (2); a label chip (12) located on an upper surface of the second substrate (3) and the first substrate (2) Between the lower surfaces of the openings, and located in the openings (13); the first through-hole unit (4) and the second through-hole unit (5) are respectively located on the radiating surface (1), the first The substrate (2), the second substrate (3), and the two sides of the ground plane (11) are composed of a plurality of second through holes, and the plurality of second through holes pass through the first The substrate (2) and the second substrate (3) electrically connect the radiating surface (1) and the ground plane (11); the first bonding via (7) and the second bonding via ( 8), passing through the tag chip (12), the first substrate (2) and the radiating surface (1) without passing through the ground plane (11); the first feeder (9) and the second feeder (10), Arranged on both sides of the tag chip (12), bonding the tag chip (12), and connecting through the first bonding via (7) and the second bonding via (8) Said radiation surface (1).

In another aspect, a passive electronic tag includes: a radiating surface, a second substrate under the radiating surface, a ground plane below the second substrate, and a label chip on the second substrate a top surface, a tuning via for adjusting a frequency of the passive electronic tag, the tuning via being formed by a plurality of first vias, wherein the tuning via is located on the radiating surface, the first substrate, the second substrate And a grounding surface, the plurality of first through holes electrically connecting the radiating surface and the grounding surface through the first substrate and the second substrate.

The present invention improves the tag's ability to protect against chip data and corrects for frequency offsets due to production errors. DRAWINGS

1 is an exploded perspective view of a passive electronic tag 100;

2 is an overall schematic view of a passive electronic tag 100. detailed description

The invention will now be further described with reference to the accompanying drawings and embodiments.

In the first embodiment, referring to FIG. 1 and FIG. 2, a passive electronic tag disclosed in the present invention includes a radiating surface 1, a first substrate 2, a second substrate 3, a ground plane 11, a label chip 12, and a circle. The opening hole 13, the first through hole unit 4, the second through hole unit 5, the first bonding through hole 7, the second bonding through hole 8, the first feeding line 9, and the second feeding line 10.

In addition, the first substrate 2 of the passive electronic tag is located below the radiating surface 1, the second substrate 3 is located below the first substrate 2, and the grounding surface 11 is located below the second substrate 3, the radiating surface 1 and A substrate 2 has the circular opening 13, and the label chip 12 is located in the circular opening 13, that is, between the upper surface of the second substrate 3 and the lower surface of the first substrate 2. The first through hole unit 4 and the second through hole unit 5 are respectively located on both sides of the radiation surface 1, the first substrate 2, the second substrate 3, and the ground plane 11, and are formed by a plurality of diameters of, for example, 0.2 mm to 1.5 mm. The second through hole is configured to electrically connect the radiation surface 1 and the ground surface 4 through the first substrate 2 and the second substrate 3. The first bonding via 7 and the second bonding via 8 respectively pass through the tag chip 12, the first substrate 2, and the radiating surface 1, so that the first bonding via 7 can be connected to the first feeding line 9, the second state The fixed through hole 8 can be connected to the second feed line 10, but the first bonding through hole Ί and the second bonding through hole 8 are not connected to the ground plane 11, and the grounding surface 11 is made to be hollowed out to prevent the connection. The first bonding through hole 7 and the second bonding through hole 8 can also pass through the second substrate 3, and the main reason for this is that if the second substrate 2 is not passed, the processing process is complicated and the manufacturing cost is relatively high. High, of course, it is also possible to choose not to pass through the second substrate 3 as the case may be. The first feed line 9 and the second feed line 10 are located on the second substrate 3 The surface is divided on both sides of the label chip 12, and the label chip 12 is bonded to the first feed line 9 and the second feed line 10. The first feed line 9 and the second feed line 10 pass through the first bonding through hole 7 and the second tuning pass. The Kongbang fixed through hole 8 is connected to the radiating surface 1.

Furthermore, the tag chip 12 is preferably located in the center of the circular opening 13, but may be slightly offset.

Further, although the opening 13 is circular in this embodiment, it will be understood by those skilled in the art that the opening may be any other shape such as a square, a rectangle or a polygon as long as it can accommodate the tag chip 12.

Since the invention embeds the label chip in the opening of the substrate, the label chip can be effectively protected from the external environment, and can be highly resistant to conventional wear, and the data of the electronic label to the label chip is improved. Protection ability.

In a second embodiment, the passive electronic tag of the present invention can include a tuned via 6. The tuning via 6 is located on the surface of the passive electronic tag for adjusting the frequency of the passive electronic tag, and the tuning via 6 is formed by a plurality of first vias.

The passive electronic tag of the present invention further comprises a radiating surface 1; a first substrate 2, located below the radiating surface 1; a second substrate 3, located below the first substrate 2; a grounding surface 11, located at the second substrate a lower portion of the labeling chip 12, located between the upper surface of the second substrate 3 and the lower surface of the first substrate 2; wherein the tuning via 6 is located on the radiation surface 1, the first substrate 2, the second substrate 3 and the ground plane 11 are formed by, for example, seven first through holes having a diameter of 0.2 mm to 1.5 mm on each side, and the tuning through holes 6 are electrically connected to the radiating surface 1 through the first substrate 2 and the second substrate 3 Ground 4.

The passive electronic tag of the present invention may further include a first through hole unit 4, a second through hole unit 5, a first bonding through hole 7, a second bonding through hole 8, a first feeding line 9, and a second feeding line 10. . The first through hole unit 4 and the second through hole unit 5 are respectively located on both sides of the radiation surface 1, the first substrate 2, the second substrate 3, and the ground plane 11, and are formed by a plurality of second through holes having a diameter of, for example, 0.2 mm. The second through hole electrically connects the radiation surface 1 and the ground surface 4 through the first substrate 2 and the second substrate 3. The first bonding via 7 and the second bonding via 8 respectively pass through the tag chip 12, the first substrate 2, and the radiating surface 1, so that the first bonding via 7 can be connected to the first feeding line 9, the second state The fixed through hole 8 can be connected to the second feed line 10, but the first bonding through hole 7 and the second bonding through hole 8 are not connected to the ground plane 11, and the grounding surface 11 is made to be hollowed out to prevent the connection. The first bonding through hole 7 and the second bonding through hole 8 can also pass through the second substrate 3, and the main reason for this is that if the second substrate 2 is not passed, the processing process is complicated and the manufacturing price is relatively high. High, of course, it is also possible to choose not to pass through the second substrate 3 as the case may be. The first feed line 9 and the second feed line 10 are located on the upper surface of the second substrate 3, are arranged on both sides of the label chip 12, and the label chip 12 is bonded to the first feed line 9 and the second feed line 10, and the first feed line 9 and The second feed line 10 is connected to the radiating surface 1 through the first bonding through hole 7 and the second tuning through hole bonding through hole 8.

In addition, the tuning vias 6 are preferably located on the radiating surface 1, the first substrate 2, the second substrate 3, and the ground plane 11 on both sides perpendicular to the second via unit 5 and adjacent to the second via unit 5. . However, the tuning via 6 may also be adjacent to the first via unit 4 or may be placed near the center line. Also, the tuned vias can be placed only on one side or multilaterally Upper (as the tuning via 6 on one side of Figure 1 is removed, leaving only one side). Furthermore, the distribution of the tuning vias 6 is preferably evenly distributed. In addition, the first feed line 9 and the second feed line 10 are coincident polygons, and the distance between the two is equal to or greater than the pin width of the chip 12, preferably the pin width of the chip 12 is conveniently mounted.

Further, the thickness of the first substrate 2 is larger than the thickness of the label chip 12 and is less than 3 mm. It should be noted that the first substrate 2 in this embodiment is provided for the purpose of protecting the label chip 12 for the purpose of the previous invention. In the embodiment, the frequency of the first substrate 2 in realizing the electronic label is achieved. The configuration of the function of the offset adjustment is not an essential structure.

In addition, the radiating surface 1, the grounding surface 11, the first through hole unit 4, the second through hole unit 5, the tuning through hole 6, the first bonding through hole 7, the second bonding through hole 8, the first feeding line 9, The material of the second feed line 10 is all metal, such as copper. Further, the first base material 2 and the second base material 3 are composed of a dielectric material having a dielectric constant of 2 to 150.

Thanks to the design of the vias for tuning the vias, it is possible to correct the frequency offset due to production errors. In the present invention, the tuning via is tuned by: Using a special tool, by damaging the metal layer in the via, the tuning via is no longer able to connect the radiating surface to the ground plane, which will cause the tag resonant frequency to drop. Debugging (previously "destruction") An example of the sequence of tuning vias begins with a tuning via that is remote from the second via unit, increasing the amount of debugging, symmetrical tuning of the left and right tuning vias, and the resonant frequency is decreasing. In accordance with an embodiment of the present invention, at the beginning of the design, the target frequency is at a position of several tuning vias that are in the middle of debugging, i.e., the first vias in the middle of the plurality of first vias. Because in actual production, there will be a large number of parameters, so that the actual frequency and the target frequency are inconsistent, so using this method can make the tag resonate at the target frequency.

Further, the present invention also includes a technical solution combining the first embodiment and the second embodiment.

The passive electronic tag of the present invention is preferably applicable to the aviation industry, and in particular to the SAE AS5678 standard for the development of aerospace components with strict quality requirements, so that it not only conforms to international standards, but also adapts to various environmental conditions and adapts. Metal surface and fireproof properties. In addition, it can be used in countries all over the world because it can support different frequency bands specified by each country.

In the present invention, the progress of the label is that the chip is buried in the substrate by using the opening, which can effectively protect the chip from the external environment, and can have high tolerance to conventional wear and improve the label pair. Chip data protection. Further, the present invention also employs a through-hole matching tuning via design that can be corrected for frequency offsets due to production errors. The present invention has been described in the above embodiments, but it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit the scope of the present invention. While the present invention has been described in detail with reference to the preferred embodiments of the present invention, it should be understood by those skilled in the art that modifications and equivalents of the embodiments of the present invention still fall within the spirit and scope of the invention. As long as the invention Any modifications or variations made are intended to be within the scope of the appended claims.

Claims

Rights request

1. A passive electronic tag, comprising:

Radiation surface (1);

a second substrate (3) located below the radiation surface (1);

a ground plane (11) located below the second substrate (3);

a label chip (12) located on an upper surface of the second substrate (3),

Tuning a via (6) for adjusting a frequency of the passive electronic tag, the tuning via (6) being constituted by a plurality of first vias, wherein the tuning via (6) is located at the radiation On the surface (1), the second substrate (3) and the ground plane (11), the plurality of first through holes electrically connect the radiation surface through the second substrate (3) 1) and the ground plane (11).

2. The passive electronic tag of claim 1, further comprising:

a first substrate (2) located between the radiating surface (1) and the second substrate (3), the tuning via (6) being located at the radiating surface (1), the first On the substrate (2), the second substrate (3), and the ground plane (11), the plurality of first through holes pass through the first substrate (2) and the second base The material (3) electrically connects the radiating surface (1) and the ground plane (Π).

3. The passive electronic tag of claim 2, further comprising:

a first through hole unit (4) and a second through hole unit (5) located at the radiating surface (1), the first substrate (2), the second substrate (3), and the Two sides of the ground plane (11) are formed by a plurality of second through holes, and the plurality of second through holes are electrically connected through the first substrate (2) and the second substrate (3) Said radiation surface (1) and said ground plane (11) _;

a first bonding via (7) and a second bonding via (8) passing through the tag chip (12), the first substrate (2), and the radiating surface (1) without wearing Passing the ground plane (11) _;

a first feed line (9) and a second feed line (10) are arranged on both sides of the label chip (12), bonding the label chip (12), and passing through the first bonding through hole (7) And the second bonding via (8) is connected to the radiating surface (1),

Wherein the tuning via (6) is located on the radiation surface (1), the first substrate (2), the second substrate (3), and the ground plane (11) The second via unit (5) is perpendicular and adjacent to the second via unit (5).

4. The passive electronic tag of claim 1 wherein the target frequency of the passive electronic tag is debugged by a first via in the middle of the plurality of first vias.

5. The passive electronic tag of claim 3, wherein the second through hole has a diameter of 0.2 mm to 1.5 mm.

6. The passive electronic tag of claim 1 wherein said first through hole has seven sides on each of said sides and has a diameter of from 0.2 mm to 1.5 mm.

7. The passive electronic tag of claim 3, wherein said first feed line (9) and said second feed line (10) are coincident polygons, said first feed line (9) and said The distance of the second feed line (10) is greater than or equal to the pin width of the tag chip (12).

8. The passive electronic tag of claim 3, characterized in that the radiating surface (1), the first through hole unit (4), the second through hole unit (5), the tuning through hole (6), The first bonding through hole (7), the second bonding through hole (8), the first feeding line (9), the second feeding line (10), and the grounding surface (11) are all made of copper. , aluminum or silver.