WO2012151869A1 - 一种峰值搜索方法及装置 - Google Patents

一种峰值搜索方法及装置 Download PDF

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Publication number
WO2012151869A1
WO2012151869A1 PCT/CN2011/081294 CN2011081294W WO2012151869A1 WO 2012151869 A1 WO2012151869 A1 WO 2012151869A1 CN 2011081294 W CN2011081294 W CN 2011081294W WO 2012151869 A1 WO2012151869 A1 WO 2012151869A1
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Prior art keywords
peak
candidate
level
circuit
peaks
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PCT/CN2011/081294
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English (en)
French (fr)
Inventor
黎立煌
戴冠新
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中兴通讯股份有限公司
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Publication of WO2012151869A1 publication Critical patent/WO2012151869A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7073—Synchronisation aspects
    • H04B1/7075—Synchronisation aspects with code phase acquisition
    • H04B1/7077—Multi-step acquisition, e.g. multi-dwell, coarse-fine or validation

Definitions

  • the present invention relates to a peak search technique, and more particularly to a peak search method and apparatus.
  • Peak search is often used in application scenarios such as cell search, multipath search, and slot synchronization, and the requirements for speed are relatively high.
  • LTE Long-Term Evolution
  • when a cell is first searched 15 4800 sequences are searched every 5 ms, other processes require about 420 k clock cycles; when neighboring cells are started, every 5 ms. Perform a search of three 4800 sequences, and there may be other tasks such as downlink reception, measurement, and neighbor search.
  • the existing peak search circuit reads a single energy data each time, and compares the read energy data with the previously obtained maximum energy data until the energy data is read one by one to obtain the maximum energy data. Value, and need to perform forward and reverse scans repeatedly, find other maximum values.
  • Chinese patent application No. 200510098701.4 proposes a peak search in Wideband Code Division Multiple Access (WCDMA) system.
  • WCDMA Wideband Code Division Multiple Access
  • the existing peak search method has low scanning efficiency and high power consumption, and cannot meet the requirements of a high amount of processor throughput.
  • the present invention provides a peak search method, the method comprising:
  • the first level peak screening circuit acquires multiple energy data and acquires multiple energy data Screening to obtain a primary candidate peak
  • the second-stage peak screening circuit screens the first-level candidate peaks obtained by the first-stage peak screening circuit to obtain second-level candidate peaks;
  • the peak ordering circuit sorts and rejects the false peak processing of the second candidate peaks obtained by the second stage peak screening circuit to obtain a peak value.
  • the first stage peak screening circuit filters the obtained plurality of energy data to obtain a first-level candidate peak, which is:
  • the first-stage peak screening circuit uses a method of comparing adjacent points to filter the obtained plurality of energy data to obtain a first-level candidate peak.
  • the first-stage peak screening circuit uses a method of comparing adjacent points to filter the obtained plurality of energy data to obtain a first-level candidate peak, including:
  • the first stage peak screening circuit performs adjacent data comparison on the obtained plurality of energy data, and extracts energy data located at the switching position of the size relationship to obtain a first-level candidate peak.
  • the second-stage peak screening circuit filters the first-level candidate peaks obtained by the first-stage peak screening circuit to obtain a second-level candidate peak, which is:
  • the second-stage peak screening circuit obtains a first-level candidate peak from the first-level peak screening circuit, and uses the method of comparing adjacent points to filter the obtained first-level candidate peaks, and then separately obtains the results obtained after screening. Comparing with the preset peak threshold to obtain a secondary candidate peak.
  • the second-level peak screening circuit filters the first-level candidate peaks obtained by the first-stage peak screening circuit to obtain second-level candidate peaks, including:
  • the second stage peak screening circuit reads a first-level candidate peak from the first-stage peak screening circuit, compares the read first-level candidate peaks with adjacent data, and extracts a first-level candidate located at the size relationship switching position.
  • the peak value is further extracted from the extracted first-level candidate peaks, and the first-level candidate peaks of the peak threshold are obtained, and the second-level candidate peaks are obtained.
  • the peak ordering circuit sorts and rejects the peak peak processing obtained by the second-level peak screening circuit to obtain a peak value, including:
  • the peak ordering circuit performs the following processing on each of the second candidate peaks:
  • the peak sorting circuit reads one of the second candidate peaks, and compares the read secondary candidate peaks with the obtained peaks, and simultaneously reads the addresses of the read secondary candidate peaks and the obtained peaks. The difference between the addresses is compared to a pre-configured clear threshold;
  • the read secondary candidate peaks are culled, or the read secondary candidate peaks are stored as peaks and the resulting peaks are ranked.
  • the method further includes:
  • a second stage peak screening circuit saves the obtained secondary candidate peaks to a peak buffer; the peak ordering circuit reads a secondary candidate peak for: the peak sequencing circuit reads one from the peak buffer Secondary candidate peak.
  • the method before the first level peak screening circuit acquires multiple energy data, the method further includes:
  • the first stage peak selection circuit is capable of acquiring a plurality of energy data from the data store.
  • the data memory stores a plurality of energy data per row; the first stage peak screening circuit acquires a plurality of energy data, wherein: the first level peak screening circuit is from the data memory each time Read a row of energy data.
  • the present invention also provides a peak search device, the device comprising: a first stage peak screening circuit, a second level peak screening circuit, and a peak ordering circuit, wherein
  • a first level peak screening circuit for acquiring multiple energy data and for obtaining multiple energy The quantity data is screened to obtain a first-level candidate peak
  • a second stage peak screening circuit configured to select a first-order candidate peak obtained by the first-stage peak screening circuit to obtain a second-level candidate peak
  • a peak sorting circuit configured to sort and cancel the false peak processing obtained by the second-level peak screening circuit to obtain a peak value.
  • the first stage peak screening circuit comprises: P adders, Q first level candidate peak registers, Q address registers, P is an integer greater than 1, and Q is a minimum integer not less than P/2. ; among them,
  • P adders are used for comparing the currently read P energy data and the last one of the last read energy data to obtain a first-level candidate peak
  • the Q address registers are used to store the addresses of the first-level candidate peaks obtained by the P adders.
  • the second-stage peak screening circuit includes: Q adders, R second-level candidate peak registers, and R address registers, where R is a minimum integer not less than Q/2;
  • Q adders for reading the first-level candidate peaks obtained by the first-stage peak screening circuit, and performing adjacent data on the first-level candidate peaks read and the last one of the first-level candidate peaks Comparing, and comparing with a preset peak threshold, obtaining a secondary candidate peak;
  • R secondary candidate peak registers for storing secondary candidate peaks obtained by the Q adders
  • R address registers for storing the addresses of the secondary candidate peaks obtained by the Q adders.
  • the peak ordering circuit is configured to read a secondary candidate peak, and compare the read secondary candidate peak with the obtained peaks, and at the same time, read the secondary candidate Comparing the difference between the selected peak address and the address from which the peaks have been obtained and the pre-configured clear threshold; according to the result of the comparison, the read secondary candidate peak is culled, or the read The secondary candidate peaks are peaked and the resulting peaks are sorted.
  • the device further includes: a peak buffer, configured to save a secondary candidate peak obtained by the second-level peak screening circuit, and an address of the secondary candidate peak;
  • the second stage peak selection circuit is further configured to save the obtained addresses of each of the second candidate peaks and the second candidate peaks to the peak buffer;
  • the peak ordering circuit is further configured to read a secondary candidate peak from the peak buffer.
  • the device further includes: a data memory and a vector processor, wherein the data memory is configured to save all energy data to be searched;
  • a vector processor configured to perform correlation operation processing and filtering operation processing on the acquired sampling data, perform modulo operation processing, extract a real part from a result of the modulo operation processing, obtain the energy data, and save the energy data to the data memory Medium
  • the first stage peak screening circuit is further configured to read a plurality of energy data from the data memory each time.
  • a plurality of energy data are simultaneously filtered by the first-stage peak screening circuit, and the screening result of the first-level peak screening circuit is further filtered by the second-stage peak screening circuit.
  • the peak sorting circuit sorts the results obtained by the second-level peak screening circuit and eliminates the false peaks, obtains peaks, processes multiple energy data in parallel, and only needs to scan all the energy data once to find all peaks, and peak search High efficiency and speed, which can meet the high throughput requirements of vector processors;
  • the present invention performs the extraction real part operation when saving the energy data, saves the data memory space, and doubles the efficiency of reading the energy data, and correspondingly, improves the efficiency and speed of the peak search.
  • FIG. 1 is a schematic structural diagram of a peak search device of the present invention
  • FIG. 3 is a schematic structural diagram of a data storage device in a peak search device according to an embodiment of the present invention
  • FIG. 4 is a schematic structural diagram of each warehouse of a data storage device in a peak search device according to an embodiment of the present invention
  • FIG. 5 is a schematic structural diagram of a peak search module in a peak search device according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a first stage peak screening circuit in a peak search device according to an embodiment of the present invention.
  • Figure 7 is a block diagram showing the structure of a peak sorting circuit in a peak search device according to an embodiment of the present invention. Detailed ways
  • the basic idea of the present invention is: acquiring a plurality of energy data, and filtering a plurality of energy data by the first-stage peak screening circuit to obtain a first-level candidate peak, and then performing the first-level candidate peak by the second-level peak screening circuit. Screening, obtaining the second-level candidate peaks. Finally, the peak sorting circuit sorts the obtained second-level candidate peaks and removes the false peak processing to obtain a peak value, so that only one scan of the energy data is needed, and more can be searched. Peak, high efficiency, able to adapt to the high throughput requirements of vector processors.
  • the peak search method of the present invention may mainly include the following steps: Step 101: The first level peak screening circuit acquires multiple energy data, and filters the obtained multiple energy data to obtain a first-level candidate. Peak value
  • Step 102 The second-stage peak screening circuit performs screening on the first-level candidate peaks obtained by the first-stage peak screening circuit to obtain second-level candidate peaks.
  • Step 103 The second-order candidate peak obtained by the peak ordering circuit for the second-stage peak screening circuit The values are sorted and the false peak processing is eliminated, resulting in a peak.
  • the first-stage peak screening circuit uses a method of comparing adjacent points to filter the obtained plurality of energy data to obtain a first-level candidate peak.
  • the first-stage peak screening circuit performs adjacent data comparison on the acquired plurality of energy data, and extracts energy data located at a switching position of the size relationship, that is, energy at a "greater than” and “less than” switching positions. Data, get a first-level candidate peak.
  • the second-stage peak screening circuit obtains each primary candidate peak from the first-level peak screening circuit, and uses the neighboring point comparison method to filter the obtained primary candidate peaks, and then obtains the filtered The results are compared with the preset peak thresholds to obtain secondary candidate peaks.
  • the second-stage peak screening circuit reads each of the first-level candidate peaks from the first-stage peak screening circuit, compares the read first-level candidate peaks with adjacent data, and extracts the relationship between the size and the relationship. A first-level candidate peak of the location, and then extracting a first-level candidate peak that is not less than the peak threshold from the extracted primary candidate peaks, to obtain a secondary candidate peak.
  • the process of the peak ordering circuit sorting the second-level candidate peaks obtained by the second-stage peak screening circuit and eliminating the false peak processing to obtain the peak value may include: the peak sorting circuit performs the following processing on each of the second-level candidate peaks : The peak sorting circuit reads one of the second candidate peaks, and compares the read secondary candidate peaks with the obtained peaks, and simultaneously obtains the addresses of the read secondary candidate peaks and the obtained peaks The difference between the addresses is compared with a pre-configured clear threshold; according to the result of the comparison, the read secondary candidate peaks are eliminated, or the read secondary candidate peaks are stored as peaks and The resulting peaks are sorted.
  • the peak sorting circuit will complete the sorting and culling of the false peak processing for all the second candidate peaks, and then obtain the peak sequence containing all the peaks to be searched and correspondingly.
  • the peak address sequence
  • the method further includes: The second stage peak screening circuit saves the resulting secondary candidate peaks to the peak buffer.
  • the peak ordering circuit can read a secondary candidate peak from the peak buffer every clock cycle.
  • the second-level peak screening circuit reads the first-level candidate peak and its address from the first-level peak screening circuit, After the first-level candidate peaks are filtered, when the second-level candidate peaks are obtained, the obtained secondary candidate peaks and their addresses are also saved to the peak buffer.
  • the address of the first-level candidate peak can be obtained as follows:
  • the first-level peak screening circuit internally includes a temporary register, and the temporary register records a base address, where the base address is the address of the first energy data acquired.
  • the first-level peak screening circuit may obtain the address of the acquired energy data according to the displacement between the address of the acquired energy data and the address of the acquired first energy data, thereby acquiring energy data.
  • the address of the energy data can be obtained, and thus, the address of the first-level candidate peak can be obtained when the first-level candidate peak is obtained.
  • the second stage peak screening circuit also obtains the address of the secondary candidate peak simultaneously when the secondary candidate peak is obtained in the above manner.
  • the address of an energy data read in for the first time is 128, and the address of the energy data corresponding to the energy data read in the second time may be 128+P.
  • the peak sorting circuit can also read the address of each secondary candidate peak from the second-stage peak screening circuit, and also store the address of the read secondary candidate peak when the read secondary candidate peak is stored as a peak. Save as the corresponding peak address.
  • the method may further include: the vector processor performing correlation operation processing, filtering operation processing, and then performing modulo operation processing on the acquired sampling data, The real part is extracted from the result of the modulo operation processing, and the energy data is obtained and saved in the data memory so that the first stage peak screening circuit can acquire a plurality of energy data from the data memory.
  • the data memory stores a plurality of energy data per row; the first stage peak screening circuit acquires a plurality of energy data, wherein: the first stage peak screening circuit reads a row of energy data from the data memory .
  • the present invention further provides a peak search device, the device comprising: a first level peak screening circuit, a second level peak screening circuit, and a peak ordering circuit, wherein the first level peak screening circuit is configured to acquire a plurality of energy data, and filtering the obtained plurality of energy data to obtain a first-level candidate peak; the second-level peak screening circuit is configured to filter the first-level candidate peaks obtained by the first-level peak screening circuit, Obtaining a secondary candidate peak; a peak ordering circuit, configured to sort and cancel the false peak processing obtained by the second-level peak screening circuit to obtain a peak value.
  • the first stage peak screening circuit includes: P adders, Q first-level candidate peak registers, Q address registers, P is an integer greater than 1, and Q is a minimum integer not less than P/2; P adders are used to compare the currently read P energy data and the last read energy data into adjacent data to obtain a first-level candidate peak; Q first-level candidate peak registers, a first-level candidate peak obtained by storing the P adders; and Q address registers for storing addresses of the first-level candidate peaks obtained by the P adders.
  • the second-level peak screening circuit includes: Q adders, R second-level candidate peak registers, and R address registers, where R is a minimum integer not less than Q/2; wherein, Q adders, Reading the first-level candidate peak obtained by the first-stage peak screening circuit, and performing comparison between adjacent data, and the previous data of the first-level candidate peak read and the last read-level candidate peak Set the peak threshold comparison to obtain the second candidate peak; R two secondary candidates Selecting a peak register for storing the secondary candidate peaks obtained by the Q adders; and R address registers for storing addresses of the secondary candidate peaks obtained by the Q adders.
  • the peak sorting circuit is configured to read the secondary candidate peaks, and compare the read secondary candidate peaks with the obtained peaks, and simultaneously, the addresses of the read secondary candidate peaks have been Comparing the difference between the addresses of the peaks and the pre-configured clear threshold; according to the result of the comparison, the read secondary candidate peaks are eliminated, or the read secondary candidate peaks are saved as Peaks are sorted and the resulting peaks are sorted.
  • the device further includes: a peak buffer, configured to save a secondary candidate peak obtained by the second-level peak screening circuit, and an address of a secondary candidate peak; the second-level peak screening circuit is further used for And storing the obtained addresses of the second-level candidate peaks and the second-level candidate peaks in the peak buffer; and the peak sorting circuit is further configured to read the second-level candidate peaks from the peak buffer.
  • a peak buffer configured to save a secondary candidate peak obtained by the second-level peak screening circuit, and an address of a secondary candidate peak
  • the second-level peak screening circuit is further used for And storing the obtained addresses of the second-level candidate peaks and the second-level candidate peaks in the peak buffer
  • the peak sorting circuit is further configured to read the second-level candidate peaks from the peak buffer.
  • the device further includes: a data memory and a vector processor, wherein the data memory is configured to save all the energy data to be searched; the vector processor is configured to perform related operation processing and filtering operation processing on the acquired sample data. Then, the modulo operation processing is performed, and the real part is extracted from the result of the modulo operation processing, and the energy data is obtained and stored in the data memory.
  • the first stage peak screening circuit is further configured to read a plurality of energy data from the data memory each time.
  • the pre-peak search task is performed by a vector processor, and the peak search process can be implemented by a hardware accelerator.
  • the peak search device may include: a radio frequency receiving module, a data memory, a vector processor, and a peak search module, wherein the radio frequency receiving module is configured to receive data sampled by the ADC, and store the obtained adoption data to a data processor; a vector processor, configured to read sample data from the data memory, and process the read sample data to obtain energy Data, and save the obtained energy data to the data memory; a peak search module for reading energy data from the data memory, performing peak search processing, finding a desired peak, saving the found peak, and returning to the location Vector processor.
  • the radio frequency receiving module receives the data sampled by the ADC, and stores the sampled data into the data memory, and the vector processor reads the sampled data from the data memory, and performs correlation operation, filtering operation, and modulo operation processing on the sampled data. After that, the real part is extracted, energy data is obtained, and the obtained energy data is saved in the data memory; after the vector processor sets the parameter of the peak search module, the peak search module reads the energy data from the data memory. , perform peak search processing, find the peak, and return to the vector processor.
  • the process of processing the sampled data by the vector processor may include: the vector processor reads the sampled data from the data memory in a pipeline manner, and performs the operations of correlating and filtering the downlink sampled data with the primary synchronization sequence (PSS). And storing the obtained operation result (including the correlation of the I channel, the filtered result, and the Q channel correlation, the filtered result) into the data memory, and performing the modulo operation processing, and then reading the correlation from the data memory The modulo operation processing is performed on the filtered result, and then the real part is extracted from the result of the modulo operation processing to obtain energy data, and the obtained energy data is written into the data memory.
  • PSS primary synchronization sequence
  • the real part of the obtained result is energy data, and is stored in the lower 16 bits of the data memory, and the imaginary part of the obtained result is 0, and is stored in the data memory.
  • a bank of the data memory stores P energy data, thus not only compressing/saving the storage space of the data memory, but also In the subsequent peak search, the efficiency of reading energy data will be doubled, and the throughput of parallel search can be doubled.
  • the vector processor can perform the processing of extracting the real part by an instruction for extracting the real part.
  • the data memory has the following structural features:
  • the peak search includes the operation of extracting the real part, that is, after the correlation operation and the filtering operation, and then extracting the real
  • the instruction of the part extracts the real part and then writes the result back to the memory.
  • the vector processor can access the same column of data of the four banks of the memory at a time, and the peak search module can access one row of a bank of the memory at a time, that is, 16*P bits of data, that is, P energy data. (If the vector processor has not performed the operation of extracting the real part, then each time it is read or written is P/2 data).
  • the data memory may be a synchronous static memory (SSRAM).
  • the vector processor is further configured to perform parameter setting on the peak search module.
  • the peak search module performs peak search processing on the read energy data according to the parameter settings of the vector processor.
  • the peak search module can be implemented by a hardware accelerator, can access the data memory, and perform a peak search on the energy data read each time in a pipeline manner, and finally, each time The results of the peak search are compared to find the peaks, and in this loop, the n maxima to be searched are found in the energy data, where n is an integer greater than zero.
  • the peak search module when the peak search module performs the peak search, the three-stage circuit is used to implement the peak search function in a pipeline manner.
  • the peak search module may include: a read data control circuit, a first level peak filter circuit, a second level peak filter circuit, a peak order circuit, and a peak buffer, wherein the read data control circuit
  • the first-level peak screening circuit For reading energy data from the energy data storage, the first-level peak screening circuit reads the energy data from the data memory and filters the read energy data by using an adjacent point comparison method to obtain a first-level candidate peak, which is input to
  • the second-stage peak screening circuit uses a method of combining adjacent point comparison and threshold value determination to filter the input candidate peaks to obtain secondary candidate peaks and input peaks.
  • the buffer is saved, so after two screenings, the number of candidate peaks entering the peak buffer is reduced, which can reduce the peak buffer capacity requirement; the peak sorting circuit reads the second candidate peak from the peak buffer, and performs After sorting and culling the false peaks, the peak is obtained and the resulting peak is re To keep the peak buffer.
  • the first-level peak screening circuit reads P energy data at a time, and the first-level peak filtering is performed for parallel comparison.
  • the circuit needs to include P adders, and the second stage peak screening circuit also needs to include Q adders, and Q is the smallest integer not less than P/2. It is also possible to adjust the number of adders in the first-stage peak filter circuit and the second-stage peak filter circuit according to the amount of energy data that is actually required to be processed in parallel.
  • the first level peak screening circuit includes Q first-level candidate peak registers, P adders, Q address registers, and Q is a minimum integer not less than P/2, wherein P The adder is used for comparing the currently read energy data and the last one of the last read energy data to obtain a first-level candidate peak, and the Q first-level candidate peak registers are used for storing the obtained Primary candidate peak, Q address registers are used to record each level candidate The address of the peak.
  • the second stage peak screening circuit comprises: Q adders, R second candidate peak registers and R address registers, R is a minimum integer not less than Q/2, wherein Q adders are used for the current first level
  • Q adders are used for the current first level
  • the first candidate peak obtained in the peak screening circuit, and the last one of the first candidate peaks obtained last time are compared between adjacent data, and compared with a preset peak threshold to obtain a secondary candidate peak
  • Q secondary The candidate peak register is used to store the obtained secondary candidate peaks
  • the Q address registers are used to record the addresses of the secondary candidate peaks.
  • the peak threshold can also be compared by the first-stage peak screening circuit.
  • the peak threshold is compared by the second-stage peak screening circuit, which can save the number of adders, and is advantageous for reducing cost and improving screening. effectiveness.
  • the peak sorting circuit includes one or more comparison units, each of which includes an adder, a data register, and an address register, wherein the adder is used to sort the secondary candidate peaks and reject the false peaks.
  • the data register is used to store the peak value obtained after sorting
  • the address register is used to store the address of each peak.
  • the number of comparison units in the peak sequencing circuit can be set according to the needs of the actual peak search.
  • the peak search module performs the peak search process.
  • the specific process is as follows:
  • Step 1 The read data control circuit for reading energy data from the energy data memory verifies whether there is still unread energy data in the data memory, and if so, proceeds to step 2, and does not continue to step 8;
  • the read data control circuit can verify whether the current read data cycle has reached data_len/P cycles, and if so, all energy data in the data memory has been read, otherwise, there is still no read. Energy data.
  • Step 2 The read data control circuit reads P data from the unread energy data in the data memory, where P is an integer greater than zero.
  • Step 3 The read data control circuit inputs the read P data into the first to the P-1th temporary data registers, so that, as shown in FIG. 6, the 0th temporary data register is stored.
  • the last energy data of the P energy data is input, that is, the P-1 energy data of the P energy data input last time, and the first temporary data register stores the 0th energy data of the currently input data.
  • the first temporary data register stores the first energy data of the currently input data, and so on, and the Pth temporary data register stores the P-1th energy data of the currently input data.
  • the 0th data register needs to be set to 0.
  • Step 4 P adders in the first stage peak screening circuit read energy data from the first to the P-1 temporary data registers, and store P in the P+1 temporary data registers respectively. +1 energy data for comparison between adjacent data, and the energy data located at the switching position of the size relationship, that is, the energy data at the "greater than” and “less than” switching positions, is written as the first-level candidate peak to the first-level candidate peak register. And writing the address of the obtained first-level candidate peak to the corresponding address register, so that the first-level screening circuit filters out at most M primary candidate peaks;
  • M is an integer not larger than Q.
  • the energy data at the switching positions of "greater than” and “less than” may be peaks, then the first Pl, P-3, 3, 0 energy data may be peaks, and the first Pl, P-3, 3, 0 energy data will be
  • the first-level candidate peaks are respectively written into the four first-level candidate peak registers, and the addresses of the P-1, P-3, 3, and 0 energy data are respectively written into the corresponding four address registers, for example, If it will be Pl, P-3, 3, 0 energy data is written to the 0th, 1st, 2nd, and 3rd first-level candidate peak registers, and the P1, P-3, 3, 0 energy will be
  • the addresses of the data are written to the 0th, 1st, 2nd, and 3rd address registers of the first stage peak filter circuit, respectively.
  • Step 5 The second-stage peak screening circuit reads the M first-level candidate peaks from the first-level candidate peak register in the first-stage peak screening circuit.
  • Step 6 The adder of the second-stage peak screening circuit compares the M first-level candidate peaks read by itself with adjacent data, and compares the first-level candidate peaks located at the size relationship switching position with the preset peak threshold. Finally, the first-level candidate peaks located at the switching position of the size relationship and not less than the peak threshold are used as secondary candidate peaks, respectively written in the secondary candidate peak registers, and the addresses of the secondary candidate peaks are written. Enter into the corresponding address register in the second level screening circuit;
  • the first-level candidate data register and the address register of the first-level peak screening circuit are respectively connected to the second-stage peak screening circuit.
  • the implementation process of the comparison between adjacent data by the adder in the second-stage peak screening circuit is similar to the implementation process of the adder in the first-stage peak screening circuit, and details are not described herein again.
  • Step 7 the adder in the second-stage peak screening circuit outputs the obtained secondary candidate peak and the address of the secondary candidate peak to the peak buffer for saving, returns to step 2, and continues to step 8;
  • Step 8 peak ordering The circuit reads the secondary candidate peaks one by one from the peak buffer, and sorts the read secondary candidate peaks one by one, and rejects the false peak processing;
  • Step 9 The peak ordering circuit obtains a peak sequence and a corresponding peak address sequence.
  • the process of sorting and culling the false peaks by the peak sorting circuit may be: Step a, the peak sorting circuit first reads in the secondary candidate peaks from the peak buffer, and simultaneously reads the address of the secondary candidate peaks, and The second candidate peak value is stored as the peak max0, and the peak sorting circuit has n comparison units, and the preset peaks max-1, max-2, ..., max_n-1 are cleared to zero, and the candidate peaks are The address is stored as the address addr — 0, and the address addr— 1 , addr — n-1 Cleared
  • Step b the peak sorting circuit verifies whether the peak buffer is empty, and if so, pauses until the peak buffer is not empty, that is, until a new secondary candidate peak is stored in the peak buffer; Otherwise, continue to step C;
  • Step C The peak sorting circuit continues to read the secondary candidate peak from the peak buffer, and simultaneously reads the address of the secondary candidate peak;
  • Step d starting from the second reading of the secondary candidate peak, the peak sorting circuit compares the read secondary candidate peak with the peaks max-0, max-1 max-Pl, and simultaneously reads the secondary The difference between the address of the candidate peak and the address addr-0, addr-1 addr_Pl is compared with a pre-configured clear threshold m;
  • the clearing threshold m can be pre-configured by the vector processor in the peak sorting circuit, indicating that it is necessary to clear/mask the m left and right sides of the peak.
  • Step e according to the comparison result of step d, the max-sort circuit stores the read secondary candidate peak as a peak max-k (k is 0, 1, 2, ..., -n-1), and The address of the secondary candidate peak is stored as ⁇ "the address addr k;
  • the operations in this step involve copying and shifting operations between peaks max-0, max-1, ..., max-[eta]-1.
  • the read secondary candidate peak data_in is smaller than the peak max-1 but greater than the peak max-2, and the difference between the address of the secondary candidate peak addr_in and the address addr-1 is greater than the pre-configured clearing
  • the threshold m, the address of the secondary candidate peak addr_in and the address addr-2 are greater than the pre-configured clear threshold m, and the peaks max-2 ⁇ max-n-2 are respectively max-3 ⁇ max-n -1 moves, the original max-n-1 is thrown away, and the read secondary candidate peak data_in is stored as the peak max 2; if the read secondary candidate peak is less than the peak max 1 and greater than the peak max 2 And the difference between the address of the secondary candidate peak addr_in and the address addr-1 is greater than the pre-configured clear threshold m, and the difference between the address of the secondary candidate peak addr in and the address addr 2 is not greater than the pre-configuration
  • the clearing threshold m, the original peak max-2 is a false peak, is invalid, in this case, only need to
  • the peak sorting circuit will also sort all the secondary candidate peaks and eliminate the false peak processing. After that, the peak sequence (max_0, max_l, ... , Max_n-l) and the corresponding peak address sequence (addr_0, addr_l, ..., addr_n-l), so far, the search processing for n peaks is completed.
  • the peak search module needs to be configured by the vector processor, and the configured parameters may include: source data indicating that the energy data address is to be read.
  • the address dest_addr the data length data_len to read the energy data
  • the threshold number n of the peak number the number of data to be cleared/masked on the left and right sides of the peak, that is, the clear threshold m
  • the address dest in the data memory for storing the peak value — data — addr, used to indicate the parameter dest-sel stored in the register or data memory.
  • the peak number threshold n indicates the number of peaks that need to be searched.
  • the second-level peak screening circuit stores the obtained second-level candidate peaks into the peak buffer, and stores up to P/4 second-level candidate peaks at a time, if not If a secondary candidate peak is obtained, then no secondary candidate peak is stored in the peak buffer. If the peak buffer is full when the secondary candidate peak is stored, the read data control circuit stops reading energy data from the energy storage, the peak search process needs to be paused, and some secondary candidate peaks are processed in the peak search module.
  • the post peak buffer clears the data, that is, after the peak sorting circuit reads a part of the candidate peaks from the peak buffer, and the peak buffer is not full, the above peak search process is continued.
  • the peak sequencing circuit reads the secondary candidate peaks from the peak buffer every time, sorting and culling the false peak processing. If the peak buffer is empty, the peak sequencing circuit needs to suspend operation until the peak buffer has a new secondary level. After the candidate peaks are deposited, the peak sequencing circuit continues to operate.
  • Embodiment 2 In this embodiment, a process of performing a cell search by applying the peak search method and apparatus provided by the present invention will be described in detail.
  • a cell search is required to synchronize a mobile terminal with a base station, and synchronization refers to aligning a local scrambling code of a mobile terminal with a scrambling code of a received signal, and thus, moving The terminal can demodulate the data from the received signal.
  • the process of performing cell search in WCDMA may include the following steps:
  • Step 1 The vector processor of the peak search device performs correlation operation and filtering on the PSC and the downlink sample data (that is, cumulatively averaging the correlation operations of a plurality of slots) to obtain energy values of a series of correlation operations. Storing the energy value of the correlation operation in a data memory of the peak search device, the peak search module of the peak search device reading the energy value of the correlation operation from the data memory, and finding the energy value of the correlation operation The peak in the middle, finally, the slot boundary is determined based on the found peak.
  • Step 2 The vector processor performs a correlation operation on the secondary synchronization sequence (SSC) and the downlink sampling data, and performs filtering (that is, cumulatively averaging the correlation operations of the plurality of frames) to obtain an energy value of the correlation operation.
  • the energy value of the correlation operation is stored in the data memory, and the peak search module reads the energy value of the correlation operation from the data memory to find a peak value in the energy value of the correlation operation. Determine the frame boundary and scramble code group according to the slot boundary determined in step 1, and the peak found in this step and the location of the peak.
  • step 2 needs to be repeated 15 times, and each possible SSC (SSCo - SSC) 14 ) Perform correlation operations with the downsampled data, and perform peak search on the energy values of the obtained correlation operations.
  • SSCo - SSC 14 perform correlation operations with the downsampled data, and perform peak search on the energy values of the obtained correlation operations.
  • the slot boundary determined in step 1 and the downlink sampling data and SSC in this step.
  • a sequence in SSC 14 is searched for related operations
  • the peak to which it is and the location where the peak is located determines the frame boundary and the scrambling code group.
  • the process of finding the peak from the result is the same as the process of performing the peak search in the first embodiment, and will not be described again.
  • Step 3 The vector processor uses a spread code of a common pilot channel (CPICH, Common Pilot Channel) and the determined scrambling code group, and each possible scrambling code and downlink in the scrambling code group
  • CPICH Common Pilot Channel
  • the sampled signal is further correlated and filtered to obtain a series of energy values of the correlation operation, and the energy value of the correlation operation is stored in the data memory, and the peak search module reads the correlation operation from the data memory.
  • the energy value, the peak value is found, the specific scrambling code and the phase of the scrambling code are determined, and thus the cell search in WCDMA is completed.
  • the process of performing cell search in LTE may include the following steps:
  • Step 1 The vector processor performs a sliding correlation operation and filtering on the PSC and the downlink sampling data to obtain a sequence of energy values of the correlation operation, and stores the energy value sequence of the correlation operation in the data memory, and the peak search module reads the correlation.
  • the energy value of the operation finds the peak value in the energy value of the correlation operation, and determines the slot boundary and the used PSC based on the found peak value.
  • Step 2 The vector processor multiplies and sums each of the 168 kinds of SSCs (the chip length is 62) with the corresponding points of the 62 subcarrier data specified in the protocol, and obtains 168 results, and the 168 results are obtained.
  • the peak search module Stored in the data store, the peak search module reads the 168 results and finds the peak of the 168 results. Based on the location of the peak found in this step and the SSC used, and the PSC used in step 1, the ID of the cell in which the mobile terminal is located is determined, and the scrambling code used by the cell is confirmed by the cell ID. At this point, the cell search process ends.

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Abstract

本发明公开了一种峰值搜索方法，所述方法包括：第一级峰值筛选电路获取多个能量数据，并对所获取的多个能量数据进行筛选，得到一级候选峰值；第二级峰值筛选电路对所述第一级峰值筛选电路得到的一级候选峰值进行筛选，得到二级候选峰值；峰值排序电路对所述第二级峰值筛选电路得到的二级候选峰值进行排序和剔除假峰值处理，得到峰值。本发明还公开了一种峰值搜索装置，峰值搜索效率高，速度快，能够适用矢量处理器高吞吐率的要求，此外，本发明的峰值搜索装置只需要加法器和寄存器即可实现，简单易实现，面积小，成本低。

Description

一种峰值搜索方法及装置 技术领域 本发明涉及峰值搜索技术， 尤其涉及一种峰值搜索方法及装置。 背景技术 峰值搜索常用于小区搜索、 多径搜索、 时隙同步等应用场景， 对于速 度的要求比较高。 例如， 在长期演进（LTE, Long-Term Evolution ) 中， 小 区初搜时， 每 5ms进行 15个 4800序列的搜索， 其它处理大概需要 420k时 钟周期（clock cycle );邻区搜索启动时，每 5ms进行 3个 4800序列的搜索, 同时可能还会有下行接收、 测量和邻区搜索等的其它任务。
现有的峰值搜索电路， 每次读入单个能量数据， 并通过将读入的能量 数据与之前得到的最大能量数据进行比较， 直到各能量数据一一读取完毕 时， 才能得到能量数据的最大值， 并需要反复进行正向、 反向扫描， 找到 其他最大值， 如申请号为 200510098701.4的中国专利， 就提出了一种宽带 码分多址（ WCDMA, Wideband Code Division Multiple Access )系统中峰值 搜索的方法， 现有的峰值搜索方法扫描效率低， 功耗高， 不能适应适量处 理器高吞吐率的要求。 发明内容 有鉴于此， 本发明的主要目的在于提供一种峰值搜索方法及装置， 能 够适应矢量处理器高吞吐率的要求。
为达到上述目的， 本发明的技术方案是这样实现的：
本发明提供了一种峰值搜索方法， 所述方法包括：
第一级峰值筛选电路获取多个能量数据， 并对所获取的多个能量数据 进行筛选， 得到一级候选峰值；
第二级峰值筛选电路对所述第一级峰值筛选电路得到的一级候选峰值 进行筛选， 得到二级候选峰值；
峰值排序电路对所述第二级峰值筛选电路得到的二级候选峰值进行排 序和剔除假峰值处理， 得到峰值。
在上述方案中， 所述第一级峰值筛选电路对所获取的多个能量数据进 行筛选， 得到一级候选峰值， 为：
所述第一级峰值筛选电路采用相邻点比较的方法， 对所获取的多个能 量数据进行筛选， 得到一级候选峰值。
在上述方案中， 所述第一级峰值筛选电路采用相邻点比较的方法， 对 所获取的多个能量数据进行筛选， 得到一级候选峰值， 包括：
所述第一级峰值筛选电路对所获取到的多个能量数据进行相邻数据间 比较， 提取位于大小关系切换位置的能量数据， 得到一级候选峰值。
在上述方案中， 所述第二级峰值筛选电路对所述第一级峰值筛选电路 得到的一级候选峰值进行筛选， 得到二级候选峰值， 为：
所述第二级峰值筛选电路从所述第一级峰值筛选电路获取一级候选峰 值， 采用相邻点比较的方法对所获取的一级候选峰值进行筛选后， 再将筛 选后得到的结果分别与所述预先设置的峰值门限进行比较， 得到二级候选 峰值。
在上述方案中， 所述第二级峰值筛选电路对所述第一级峰值筛选电路 得到的一级候选峰值进行筛选， 得到二级候选峰值， 包括：
所述第二级峰值筛选电路从所述第一级峰值筛选电路读取一级候选峰 值， 将所读取的一级候选峰值进行相邻数据间比较， 提取位于大小关系切 换位置的一级候选峰值 , 再从所提取的一级候选峰值中提取不 d、于所述峰 值门限的一级候选峰值， 得到二级候选峰值。 在上述方案中， 所述峰值排序电路对所述第二级峰值筛选电路得到的 二级候选峰值进行排序和剔除假峰值处理， 得到峰值， 包括：
峰值排序电路对所述各二级候选峰值进行以下处理：
峰值排序电路读取一个所述二级候选峰值， 并将所读取的二级候选峰 值与已得到的各峰值进行比较， 同时， 将所读取二级候选峰值的地址与已 得到各峰值的地址之间的差值和预先配置的清零阈值进行比较；
根据所述比较的结果， 将所读取的二级候选峰值剔除， 或将所读取的 二级候选峰值存为峰值并对所得到的各峰值进行排序。
在上述方案中， 在第二级峰值筛选电路得到二级候选峰值后， 所述方 法还包括：
第二级峰值筛选电路将所得到的二级候选峰值保存到峰值緩存器； 所述峰值排序电路读取一个二级候选峰值， 为： 所述峰值排序电路从 所述峰值緩存器中读取一个二级候选峰值。
在上述方案中， 在所述第一级峰值筛选电路获取多个能量数据之前， 所述方法还包括：
矢量处理器对获取的采样数据进行相关运算处理、 过滤运算处理后， 再进行取模运算处理， 从取模运算处理的结果中提取实部， 得到所述能量 数据并保存到数据存储器中， 使得所述第一级峰值歸选电路能够从所述数 据存储器中获取多个能量数据。
在上述方案中， 所述数据存储器每行存储有多个能量数据； 所述第一 级峰值筛选电路获取多个能量数据， 为： 所述第一级峰值筛选电路每次从 所述数据存储器中读取一行能量数据。
本发明还提供了一种峰值搜索装置， 所述装置包括： 第一级峰值筛选 电路、 第二级峰值筛选电路、 和峰值排序电路， 其中，
第一级峰值筛选电路， 用于获取多个能量数据， 并对所获取的多个能 量数据进行筛选， 得到一级候选峰值；
第二级峰值筛选电路， 用于对所述第一级峰值筛选电路得到的一级候 选峰值进行歸选， 得到二级候选峰值；
峰值排序电路， 用于对所述第二级峰值筛选电路得到的二级候选峰值 进行排序和剔除假峰值处理， 得到峰值。
在上述方案中， 所述第一级峰值筛选电路包括： P个加法器、 Q个一级 候选峰值寄存器、 Q个地址寄存器， P为大于 1的整数， Q为不小于 P/2的 最小整数； 其中，
P个加法器，用于对当前读入的 P个能量数据、以及上次所读入能量数 据的最后一个进行相邻数据间比较， 得到一级候选峰值；
Q个一级候选峰值寄存器， 用于存放所述 P个加法器得到的一级候选 峰值；
Q个地址寄存器， 用于存放所述 P个加法器所得到各一级候选峰值的 地址。
在上述方案中， 所述第二级峰值筛选电路包括： Q个加法器、 R个二级 候选峰值寄存器和 R个地址寄存器， R为不小于 Q/2的最小整数； 其中，
Q个加法器， 用于读取所述第一级峰值筛选电路得到的一级候选峰值， 并对所读入一级候选峰值、 以及上次读入一级候选峰值的最后一个进行相 邻数据间比较、 以及与预先设置的峰值门限比较， 得到二级候选峰值；
R个二级候选峰值寄存器， 用于存放所述 Q个加法器得到的二级候选 峰值；
R个地址寄存器， 用于存放所述 Q个加法器所得到二级候选峰值的地 址。
在上述方案中， 所述峰值排序电路， 用于读取二级候选峰值， 并将所 读取的二级候选峰值与已得到的各峰值进行比较， 同时， 将所读取二级候 选峰值的地址与已得到各峰值的地址之间的差值和预先配置的清零阈值进 行比较； 根据所述比较的结果， 将所读取的二级候选峰值剔除， 或将所读 取的二级候选峰值存为峰值并对所得到的各峰值进行排序。
在上述方案中， 所述装置还包括： 峰值緩存器， 用于保存所述第二级 峰值筛选电路得到的二级候选峰值、 以及二级候选峰值的地址；
所述第二级峰值歸选电路， 还用于将得到的各二级候选峰值及二级候 选峰值的地址保存到所述峰值緩存器；
所述峰值排序电路， 还用于从所述峰值緩存器读取二级候选峰值。 在上述方案中， 所述装置还包括： 数据存储器和矢量处理器， 其中， 数据存储器， 用于保存所有需搜索的能量数据；
矢量处理器， 用于对获取的采样数据进行相关运算处理、 过滤运算处 理后， 再进行取模运算处理， 从取模运算处理的结果中提取实部， 得到所 述能量数据并保存到数据存储器中；
所述第一级峰值筛选电路， 还用于每次从所述数据存储器读取多个能 量数据。
本发明所提供的峰值搜索方法及装置， 先由第一级峰值筛选电路同时 对多个能量数据进行筛选， 再由第二级峰值筛选电路对第一级峰值筛选电 路的筛选结果进一步进行筛选， 最后由峰值排序电路对第二级峰值筛选电 路得到的结果进行排序和剔除假峰值， 得到峰值， 并行处理多个能量数据， 并且只需要对所有能量数据扫描一遍， 即可找到所有峰值， 峰值搜索效率 高、 速度快， 能够适用矢量处理器高吞吐率的要求；
此外， 本发明在保存能量数据时， 执行了提取实部操作， 节省了数据 存储器空间， 也使得读取能量数据的效率提高一倍， 相应的， 也提高了峰 值搜索的效率和速度。 附图说明
图 1为本发明峰值搜索方法的实现流程图；
图 1为本发明的峰值搜索装置的组成结构示意图；
图 3为本发明具体实施例峰值搜索装置中数据存储器的结构示意图； 图 4为本发明具体实施例峰值搜索装置中数据存储器每个仓库（bank ) 的结构示意图；
图 5 为本发明具体实施例峰值搜索装置中峰值搜索模块的组成结构示 意图；
图 6为本发明具体实施例峰值搜索装置中第一级峰值筛选电路的组成 结构示意图；
图 7为本发明具体实施例峰值搜索装置中峰值排序电路的组成结构示 意图 。 具体实施方式
本发明的基本思想是： 获取多个能量数据， 由第一级峰值筛选电路对 多个能量数据进行筛选， 得到一级候选峰值， 再由第二级峰值筛选电路对 所述一级候选峰值进行筛选， 得到二级候选峰值， 最后， 由峰值排序电路 对所得到的二级候选峰值进行排序和剔除假峰值处理， 得到峰值， 这样， 只需要对能量数据扫描一遍， 就能够得到要搜索的多个峰值， 效率高， 能 够适应矢量处理器高吞吐率的要求。
本发明的峰值搜索方法， 参照图 1所示， 主要可以包括以下步驟： 步驟 101 : 第一级峰值筛选电路获取多个能量数据， 并对所获取的多个 能量数据进行筛选， 得到一级候选峰值；
步驟 102:第二级峰值筛选电路对所述第一级峰值筛选电路得到的一级 候选峰值进行筛选， 得到二级候选峰值；
步驟 103:峰值排序电路对所述第二级峰值筛选电路得到的二级候选峰 值进行排序和剔除假峰值处理， 得到峰值。
其中， 所述第一级峰值筛选电路采用相邻点比较的方法， 对所获取的 多个能量数据进行筛选， 得到一级候选峰值。
具体地， 所述第一级峰值筛选电路对所获取到的多个能量数据进行相 邻数据间比较， 提取位于大小关系切换位置的能量数据， 即位于 "大于" 和 "小于" 切换位置的能量数据， 得到一级候选峰值。
其中， 所述第二级峰值筛选电路从所述第一级峰值筛选电路获取各一 级候选峰值， 采用相邻点比较的方法对所获取的一级候选峰值进行筛选后， 再将筛选后得到的结果分别与所述预先设置的峰值门限进行比较， 得到二 级候选峰值。
具体地， 所述第二级峰值筛选电路从所述第一级峰值筛选电路读取各 一级候选峰值， 将所读取的各一级候选峰值进行相邻数据间比较， 提取位 于大小关系切换位置的一级候选峰值， 再从所提取的一级候选峰值中提取 不小于所述峰值门限的一级候选峰值， 得到二级候选峰值。
其中， 峰值排序电路对所述第二级峰值筛选电路得到的二级候选峰值 进行排序和剔除假峰值处理， 得到峰值的过程， 可以包括： 峰值排序电路 对所述各二级候选峰值进行以下处理： 峰值排序电路读取一个所述二级候 选峰值， 并将所读取的二级候选峰值与已得到的各峰值进行比较， 同时， 将所读取二级候选峰值的地址与已得到各峰值的地址之间的差值和预先配 置的清零阈值进行比较； 根据所述比较的结果， 将所读取的二级候选峰值 剔除， 或将所读取的二级候选峰值存为峰值并对所得到的各峰值进行排序。 如此， 在所有能量数据均已处理完成后， 峰值排序电路也就会完成对所有 二级候选峰值的排序和剔除假峰处理， 之后， 便得到包含有要搜索的所有 峰值的峰值序列以及相对应的峰值地址序列。
其中， 在第二级峰值筛选电路得到二级候选峰值后， 所述方法还包括： 第二级峰值筛选电路将所得到的二级候选峰值保存到峰值緩存器。 所述峰 值排序电路每一个时钟周期可以从所述峰值緩存器中读取一个二级候选峰 值。
这里， 在得到一级候选峰值时， 还将所述一级候选峰值、 以及其地址 保存； 第二级峰值筛选电路从第一级峰值筛选电路读取所述一级候选峰值 及其地址， 对一级候选峰值进行筛选后， 得到二级候选峰值时， 还将所得 到的二级候选峰值及其地址保存到峰值緩存器。
这里， 所述一级候选峰值的地址可以通过如下方式得到： 第一级峰值 筛选电路内部包含有临时寄存器， 该临时寄存器记录一个基地址， 该基地 址为所获取的第一个能量数据的地址， 第一级峰值筛选电路在获取能量数 据时， 可以根据所获取能量数据的地址与所获取第一个能量数据的地址之 间的移位， 得到所获取能量数据的地址， 从而在获取能量数据时， 就能得 到能量数据的地址， 如此， 在得到一级候选峰值时就能得到一级候选峰值 的地址。 第二级峰值筛选电路也按照上述方式， 可以在得到二级候选峰值 时同时得到二级候选峰值的地址。
例如， 第一次读入的一个能量数据的地址是 128 , 那么第二次读入的与 所述能量数据对应的能量数据的地址可以是 128+P。
这里， 峰值排序电路还可以从第二级峰值筛选电路读取各二级候选峰 值的地址， 在将所读取的二级候选峰值存为峰值时， 还将所读取二级候选 峰值的地址存为对应的峰值地址。
实际应用中， 在第一级峰值筛选电路获取多个能量数据之前， 所述方 法还可以包括： 矢量处理器对获取的采样数据进行相关运算处理、 过滤运 算处理后， 再进行取模运算处理， 从取模运算处理的结果中提取实部， 得 到所述能量数据并保存到数据存储器中， 使得第一级峰值筛选电路能够从 所述数据存储器中获取多个能量数据。 这里， 所述数据存储器每行存储有多个能量数据； 所述第一级峰值筛 选电路获取多个能量数据， 为： 所述第一级峰值筛选电路从所述数据存储 器中读取一行能量数据。
相应的， 本发明还提供了一种峰值搜索装置， 所述装置包括： 第一级 峰值筛选电路、 第二级峰值筛选电路、 和峰值排序电路， 其中， 第一级峰 值筛选电路， 用于获取多个能量数据， 并对所获取的多个能量数据进行筛 选， 得到一级候选峰值； 第二级峰值筛选电路， 用于对所述第一级峰值筛 选电路得到的一级候选峰值进行筛选， 得到二级候选峰值； 峰值排序电路， 用于对所述第二级峰值筛选电路得到的二级候选峰值进行排序和剔除假峰 值处理， 得到峰值。
具体地， 所述第一级峰值筛选电路包括： P个加法器、 Q个一级候选峰 值寄存器、 Q个地址寄存器， P为大于 1的整数， Q为不小于 P/2的最小整 数； 其中， P个加法器， 用于对当前读入的 P个能量数据、 以及上次所读入 能量数据的最后一个进行相邻数据间比较， 得到一级候选峰值； Q 个一级 候选峰值寄存器， 用于存放所述 P个加法器得到的一级候选峰值； Q个地 址寄存器， 用于存放所述 P个加法器所得到各一级候选峰值的地址。
实际应用中， 所述第一级峰值筛选电路的输入是 P+1个能量数据， 其 组成部分包括：， P个加法器， Q个一级候选峰值的数据寄存器， Q个对应 的地址寄存器， 其输出为 X ( X<=Q )个一级候选峰值， 存储与候选峰值的 数据寄存器中。
具体地， 所述第二级峰值筛选电路包括： Q个加法器、 R个二级候选峰 值寄存器和 R个地址寄存器， R为不小于 Q/2的最小整数； 其中， Q个加 法器， 用于读取所述第一级峰值筛选电路得到的一级候选峰值， 并对所读 入一级候选峰值、 以及上次读入一级候选峰值的最后一个进行相邻数据间 比较、 以及与预先设置的峰值门限比较， 得到二级候选峰值； R个二级候 选峰值寄存器， 用于存放所述 Q个加法器得到的二级候选峰值； R个地址 寄存器， 用于存放所述 Q个加法器所得到二级候选峰值的地址。
其中， 所述峰值排序电路， 用于读取二级候选峰值， 并将所读取的二 级候选峰值与已得到的各峰值进行比较， 同时， 将所读取二级候选峰值的 地址与已得到各峰值的地址之间的差值和预先配置的清零阈值进行比较； 根据所述比较的结果， 将所读取的二级候选峰值剔除， 或将所读取的二级 候选峰值存为峰值并对所得到的各峰值进行排序。
这里， 所述装置还包括： 峰值緩存器， 用于保存所述第二级峰值筛选 电路得到的二级候选峰值、 以及二级候选峰值的地址； 所述第二级峰值筛 选电路， 还用于将得到的各二级候选峰值及二级候选峰值的地址保存到所 述峰值緩存器； 所述峰值排序电路， 还用于从所述峰值緩存器读取二级候 选峰值。
其中， 所述装置还包括： 数据存储器和矢量处理器， 其中， 数据存储 器， 用于保存所有需搜索的能量数据； 矢量处理器， 用于对获取的采样数 据进行相关运算处理、 过滤运算处理后， 再进行取模运算处理， 从取模运 算处理的结果中提取实部， 得到所述能量数据并保存到数据存储器中。 这 里， 所述第一级峰值筛选电路， 还用于每次从所述数据存储器读取多个能 量数据。
实施例一
实际应用中， 峰值搜索前的计算任务由矢量处理器来完成， 峰值搜索 的过程可以由硬件加速器来实现。
如图 1所示， 峰值搜索装置可以包括： 射频接收模块、 数据存储器、 矢量处理器和峰值搜索模块， 其中， 射频接收模块， 用于接收 ADC采样的 数据， 并将所得到的采用数据存储到数据存储器； 矢量处理器， 用于从所 述数据存储器读取采样数据， 对所读取的采样数据进行处理后， 得到能量 数据， 并将所得到的能量数据保存到数据存储器； 峰值搜索模块， 用于从 数据存储器中读取能量数据， 进行峰值搜索处理， 找到需要的峰值， 将所 找到的峰值保存， 并返回给所述矢量处理器。
具体地， 射频接收模块接收 ADC采样的数据， 并将采样数据存储到数 据存储器， 矢量处理器从所述数据存储器中读取采样数据， 并对采样数据 进行相关运算、 过滤运算、 取模运算处理后， 并提取实部， 得到能量数据， 将所得到的能量数据再保存到所述数据存储器中； 在矢量处理器对峰值搜 索模块进行参数设置后， 峰值搜索模块从数据存储器中读取能量数据， 进 行峰值搜索处理， 找到峰值， 并返回给矢量处理器。
实际应用中， 矢量处理器对采样数据进行处理的过程可以包括： 矢量 处理器以流水线的方式从数据存储器中读取采样数据， 再进行下行采样数 据与主同步序列 （PSS )相关和滤波等运算， 将所得到的运算结果（包括 I 通道的相关、 滤波后的结果和 Q通道相关、 滤波后的结果）存储到数据存 储器中， 进行取模运算处理时， 再从数据存储器中读取上述相关和过滤后 的结果进行取模运算处理， 之后， 从取模运算处理的结果中再提取实部， 得到能量数据， 再将所得到的能量数据写入到数据存储器中。
其中， 矢量处理器按照公式（1 )进行取模运算处理后， 所得到结果的 实部为能量数据， 保存于数据存储器的低 16比特， 所得到结果中的虚部为 0, 保存于数据存储器的高 16比特。
\ r \= r 9 r* = Re2 + Im2 ( Λ Λ 1 1 ( l ) 其中， 表示一个复数信号， Re为 的实部， Im为？的虚部。 原先每个 bank存储 P/2个数据， 执行提取实部的压缩处理后， 将数据虚部的空位去 掉， 则数据存储器的一个 bank就存储了 P个能量数据， 如此， 不仅压缩 / 节省了数据存储器的存储空间， 并且， 在后续进行峰值搜索时， 读取能量 数据的效率会相应提高一倍， 并行搜索的吞吐率也可以提高一倍。 实际应 用中， 矢量处理器可以通过一个提取实部的指令来进行上述提取实部的处 理。
具体地， 为了适应矢量处理器的吞吐率， 所述数据存储器具有以下结 构特征： 数据存储格式为复数能量 = Re+ ' Im , 用 32比特的单元来存储一 个复数能量数据， 其中低 16比特为实部， 高 16比特为虚部； 如图 3所示， 存储器宽度（width )为 16*P*4比特（P为大于 0的偶数）， 分为 4个 bank, 每个 bank有 P/2个 32比特的存储单元，矢量处理器能够一次读取存储器的 一列数据， 即 P*2个能量数据。 如果矢量处理器只进行相关运算、 滤波运 算等操作， 便将结果写回存储器中， 其结果还是存储器的一列有 P*2个能 量数据， 但是每个 32 比特的存储单元将存放着复数能量的模值， 其高 16 比特为 0, 低 16比特为实部（不为 0 ), 而实际上， 峰值搜索中包含提取实 部的操作， 即在相关运算、 滤波运算后， 紧接着用提取实部的指令进行提 取实部的操作， 然后将结果写回存储器中， 那么存储器的一列存放 (16*P*4)/16=P*4个能量数据， 即一个 32比特的单元存放着两个能量数据， 一个 bank能存放 P个能量数据， 如图 4所示。
前面描述了矢量处理器能一次访问存储器的 4个 bank的同一列数据， 而峰值搜索模块则每次可以访问存储器的某一个 bank的一行， 即 16*P比 特的数据， 也即 P个能量数据（如果矢量处理器没有进行过提取实部的操 作， 那么每次读写的是 P/2个数据）。
实际应用中， 所述数据存储器可以是同步静态存储器（SSRAM )。 其中， 矢量处理器还用于对所述峰值搜索模块进行参数设置。 峰值搜 索模块根据所述矢量处理器的参数设置， 对读取到的能量数据进行峰值搜 索处理。
其中， 峰值搜索模块可以由硬件加速器来实现， 可以访问数据存储器， 并以流水线的方式， 对每次读取的能量数据进行峰值搜索， 最后， 将每次 峰值搜索的结果进行比较找到峰值， 如此循环， 在所述能量数据中找到要 搜索的 n个最大值， 其中， n为大于 0的整数。
本发明中， 峰值搜寻模块进行峰值搜索时， 采用三级电路以流水线方 式实现峰值的搜索功能。 如图 5 所述， 所述峰值搜索模块可以包括： 读数 据控制电路、 第一级峰值筛选电路、 第二级峰值筛选电路、 峰值排序电路 和峰值緩存器 （buffer ), 其中， 读数据控制电路用于从能量数据存储器读 取能量数据， 第一级峰值筛选电路从数据存储器中读取能量数据并采用相 邻点比较的方法对读入的能量数据进行筛选， 得到一级候选峰值， 输入到 第二级峰值筛选电路； 第二级峰值筛选电路采用相邻点比较、 以及门限值 判断相结合的方法， 对输入的所述一级候选峰值进行筛选， 得到二级候选 峰值， 输入到峰值緩存器中保存， 如此， 经过两次筛选， 进入峰值 buffer 的候选峰值数量被精减， 可以降低峰值 buffer对容量的需求； 峰值排序电 路从所述峰值緩存器中读取二级候选峰值， 进行排序和剔除假峰处理后， 得到峰值， 并将所得到的峰值重新保存到所述峰值 buffer中。
实际应用中，如果数据存储器中一个 bank存储了 P个能量数据，其中， P为大于 0的整数， 第一级峰值筛选电路一次读入 P个能量数据， 为实现 并行比较， 第一级峰值筛选电路中需要包含 P个加法器， 第二级峰值筛选 电路也需要包含 Q个加法器， Q为不小于 P/2的最小整数。 也可以根据实 际需要并行处理的能量数据的数量， 调整第一级峰值筛选电路、 及第二级 峰值筛选电路中加法器的数量。
具体地， 如图 6所示， 第一级峰值筛选电路包含有 Q个一级候选峰值 寄存器、 P个加法器、 Q个地址寄存器， Q为不小于 P/2的最小整数， 其中， P个加法器用于对当前所读入的能量数据、以及上次所读取能量数据中的最 后一个进行相邻数据间比较， 得到一级候选峰值， Q 个一级候选峰值寄存 器用于存放所得到的一级候选峰值， Q 个地址寄存器用于记录各一级候选 峰值的地址。
第二级峰值筛选电路包括： Q个加法器、 R个二级候选峰值寄存器和 R 个地址寄存器， R为不小于 Q/2的最小整数， 其中， Q个加法器用于对当前 从第一级峰值筛选电路中获取的一级候选峰值、 以及上次所获取各一级候 选峰值的最后一个进行相邻数据间比较、 以及与预先设置的峰值门限比较， 得到二级候选峰值； Q 个二级候选峰值寄存器用于存放所得到的二级候选 峰值， Q个地址寄存器用于记录各二级候选峰值的地址。
实际应用中， 也可以由第一级峰值筛选电路进行峰值门限的比较， 本 发明中， 由第二级峰值筛选电路进行峰值门限的比较， 能够节约加法器的 数量， 有利于减低成本， 提高筛选效率。
如图 7所示， 峰值排序电路包括一个或多个比较单元， 每个比较单元 包括一个加法器、 一个数据寄存器和一个地址寄存器， 其中， 加法器用于 对二级候选峰值进行排序、 剔除假峰值等处理， 得到峰值， 数据寄存器用 于保存排序后得到的峰值， 地址寄存器用于保存各峰值的地址。 实际应用 中， 峰值排序电路中比较单元的个数， 可以根据实际峰值搜索的需要来设 置。
峰值搜索模块进行峰值搜索的过程， 具体流程如下：
步驟 1 :用于从能量数据存储器读取能量数据的读数据控制电路验证所 述数据存储器中是否还有未读取的能量数据，如果是，则继续步驟 2,否贝' 继续步驟 8;
具体地， 读数据控制电路可以通过验证当前读取数据的周期是否已经 达到 data— len/P个周期，如果是，则数据存储器中所有的能量数据均已读取， 否则， 还有未读取的能量数据。
步驟 2, 读数据控制电路从数据存储器中未读取的能量数据中读入 P 个数据， 其中， P为大于 0的整数。 步驟 3 ,读数据控制电路将所读取的 P个数据，分别输入到第 1个到第 P-1个临时数据寄存器中， 如此， 如图 6所示， 使得第 0个临时数据寄存器 存放上次所输入 P个能量数据中的最后一个能量数据， 即上次所输入 P个 能量数据中的第 P-1个能量数据，第 1个临时数据寄存器存放当前所输入数 据的第 0个能量数据， 第 1个临时数据寄存器存储当前所输入数据的第 1 个能量数据， 依次类推， 第 P个临时数据寄存器存放当前所输入数据的第 P-1个能量数据。
这里， 在第一次向第一级峰值筛选电路输入能量数据时， 第 0个数据 寄存器需设置为 0。
步驟 4,第一级峰值筛选电路中的 P个加法器从所述第 1个到第 P-1个 临时数据寄存器中读取能量数据， 对分别存放于 P+1个临时数据寄存器中 的 P+1个能量数据进行相邻数据间比较， 并将位于大小关系切换位置的能 量数据， 即位于 "大于" 和 "小于" 切换位置的能量数据， 作为一级候选 峰值写到一级候选峰值寄存器中， 并将所得到一级候选峰值的地址写入到 对应的地址寄存器中， 如此， 第一级筛选电路最多筛选出 M个一级候选峰 值；
这里， M为不大于 Q的整数。
具体地， 如果各加法器对各能量数据进行相邻数据间比较后， 得到分 别存放于 P+1个临时数据寄存器中的 P+1个能量数据的相邻数据间大小关 系如下：
P P-1 P-2 P-3 P-4 4 3 2 1 0
< > < > < > > <
位于 "大于"和 "小于" 的切换位置的能量数据可能为峰值， 则第 P-l、 P-3 , 3、 0个能量数据可能是峰值， 将第 P-l、 P-3 , 3、 0个能量数据作为 一级候选峰值分别写入到四个一级候选峰值寄存器中，并将第 P-1、 P-3、 3、 0个能量数据的地址分别写入到对应的四个地址寄存器中， 例如， 如果将第 P-l、 P-3、 3、 0个能量数据写入到第 0个、 第 1个、 第 2个、 第 3个一级 候选峰值寄存器， 则将第 P-l、 P-3、 3、 0个能量数据的地址分别写入到第 一级峰值筛选电路的第 0个、 第 1个、 第 2个、 第 3个地址寄存器中。
步驟 5 ,第二级峰值筛选电路从所述第一级峰值筛选电路中一级候选峰 值寄存器中读取到所述 M个一级候选峰值；
步驟 6, 第二级峰值筛选电路的加法器将自身读取的 M个一级候选峰 值进行相邻数据间比较， 将位于大小关系切换位置的一级候选峰值再与预 先设置的峰值门限比较， 最后， 将位于大小关系切换位置的、 且不小于所 述峰值门限的一级候选峰值作为二级候选峰值， 分别写入到各二级候选峰 值寄存器中， 并将各二级候选峰值的地址写入到第二级筛选电路中对应的 地址寄存器中；
实际应用中， 第一级峰值筛选电路的一级候选人数据寄存器和地址寄 存器分别连接到第二级峰值筛选电路上。
这里， 第二级峰值筛选电路中的加法器进行相邻数据间比较的实现过 程， 与第一级峰值筛选电路中加法器的实现过程相似， 在此不再赘述。
步驟 7, 第二级峰值筛选电路中的加法器将得到的二级候选峰值、及二 级候选峰值的地址输出到峰值緩存器中保存，返回步驟 2、以及继续步驟 8; 步驟 8,峰值排序电路从峰值緩存器中逐个读取二级候选峰值， 并将对 所读取的二级候选峰值逐个进行排序处理、 以及剔除假峰值处理；
步驟 9, 峰值排序电路得到峰值序列和对应的峰值地址序列。
具体地， 峰值排序电路进行排序以及剔除假峰值的过程可以是： 步驟 a, 峰值排序电路从峰值緩存器首次读入二级候选峰值， 同时， 从 读取该二级候选峰值的地址， 并将该二级候选峰值存为峰值 max0、 假设峰 值排序电路有 n个比较单元， 将预设的峰值 max— 1、 max— 2、 ...、 max— n-1 清零， 将该候选峰值的地址存为地址 addr— 0, 将地址 addr— 1 , addr— n-1 清零；
步驟 b , 峰值排序电路验证峰值緩存器是否已读空， 如果是， 则暂停， 直到所述峰值緩存器中不为空， 即直到有新的二级候选峰值存入所述峰值 緩存器中； 否则， 继续步驟 C;
步驟 C , 峰值排序电路继续从峰值緩存器读入二级候选峰值， 同时， 从 读取该二级候选峰值的地址；
步驟 d,从第二次读取二级候选峰值开始，峰值排序电路将所读入的二 级候选峰值与 峰值 max— 0、 max— 1 max— P-l进行比较， 同时， 将 所读入二级候选峰值的地址与地址 addr— 0、 addr— 1 addr— P-l之间的差 值和预先配置的清零阈值 m进行比较；
这里， 清零阈值 m可以由矢量处理器预先配置在峰值排序电路， 表示 需要将峰值左右两边的 m个清零 /屏蔽。
步驟 e, 根据步驟 d的比较结果， max— sort 电路将该读入的二级候选峰 值存为峰值 max— k ( k为 0、 1、 2, ... , —n-1 ), 并将该二级候选峰值的地址 存为 ^"应的地址 addr k;
本步驟中的操作牵涉到峰值 max— 0, max— 1 , ... , max— η- 1 之间的拷贝和 移位操作。
例如，如果所读入的二级候选峰值 data— in小于峰值 max— 1但大于峰值 max— 2,且二级候选峰值的地址 addr— in与地址 addr— 1的差值大于预先配置 的清零阈值 m、 二级候选峰值的地址 addr— in与地址 addr— 2的差值大于预 先配置的清零阈值 m, 则将峰值 max— 2 ~ max— n-2 分别往 max— 3~max— n-1 移动， 原先的 max— n-1 扔掉， 将所读入的二级候选峰值 data— in存为峰值 max 2; 如果所读入的二级候选峰值小于峰值 max 1且大于峰值 max 2, 且二级候选峰值的地址 addr— in与地址 addr— 1的差值大于预先配置的清零阈 值 m、 二级候选峰值的地址 addr in与地址 addr 2的差值不大于预先配置 的清零阈值 m, 则原先的峰值 max— 2为假峰值， 是无效的， 此时， 只须将 data— in存为峰值 max— 2, max— 3~max— n-1不需要往后移动， 保持不变。
实际应用中， 在所有能量数据均已处理完成后， 峰值排序电路也就会 完成对所有二级候选峰值的排序和剔除假峰处理， 之后， 便得到峰值序列 ( max_0,max_l,... ,max_n-l ) 以 及相 对应 的 峰值地 址序 列 ( addr_0,addr_l,...,addr_n-l ), 至此， 完成对 n个峰值的搜索处理。
需要说明的是， 本实施例中， 在峰值搜索模块开始进行峰值搜索之前， 需要由矢量处理器对峰值搜索模块进行参数配置， 所配置的参数可以包括： 表示要读取能量数据地址的源数据地址 dest— addr、 要读取能量数据的数据 长度 data— len、峰值个数阈值 n、 峰值左右两边需清除 /屏蔽的数据个数即清 零阈值 m、 数据存储器中用于存放峰值的地址 dest— data— addr、 用于表示存 储于寄存器还是数据存储器的参数 dest— sel等。 其中， 峰值个数阈值 n表示 需要搜索到的峰值个数。
另外， 在上述峰值搜索过程中， 两级筛选后， 第二级峰值筛选电路将 得到的二级候选峰值存入峰值緩存器中， 每次最多存入 P/4 个二级候选峰 值， 如果没有得到二级候选峰值， 则没有二级候选峰值存入峰值緩存器。 如果在存入二级候选峰值时， 峰值緩存器已满， 则读数据控制电路停止从 能量存储器中读入能量数据， 峰值搜索的流程需要暂停， 在峰值搜索模块 对一些二级候选峰值进行处理后峰值緩存器清除这些数据， 即峰值排序电 路从峰值緩存器中读走一部分候选峰值后， 峰值緩存器处于未满状态时， 再继续上述的峰值搜索流程。 另外， 峰值排序电路每次从峰值緩存器读入 二级候选峰值， 进行排序和剔除假峰值处理， 如果峰值緩存器为空， 则峰 值排序电路需要暂停工作， 直到峰值緩存器有新的二级候选峰值存入之后， 峰值排序电路再继续工作。
实施例二 本实施例， 对应用本发明所提供的峰值搜索方法及装置进行小区搜索 的过程做详细说明。 实际应用中， 在扩频通信领域， 都需要通过小区搜索 使得移动终端与基站同步，同步是指将移动终端本地的扰码（ scramble code ) 与所接收到信号的扰码对准， 如此， 移动终端才能从所接收到的信号中解 调出数据。
基于实施例一的峰值搜索方法， WCDMA 中进行小区搜索的过程可以 包括如下步驟：
步驟 1 : 峰值搜索装置的矢量处理器将 PSC与下行采样数据进行相关 运算、 滤波（即， 对多个时隙 （slot ) 的相关运算结果累加取平均）， 得到 一系列相关运算的能量值， 将所述相关运算的能量值存储在峰值搜索装置 的数据存储器中， 峰值搜索装置的峰值搜索模块从所述数据存储器中读取 所述相关运算的能量值， 并找到所述相关运算的能量值中的峰值， 最后， 基于所找到的峰值确定 slot边界。
步驟 2: 矢量处理器将辅同步序列 （SSC )与下行采样数据进行相关运 算， 滤波（即， 对多个帧（frame )的相关运算结果累加取平均）， 得到相关 运算的能量值， 将所述相关运算的能量值存储到所述数据存储器中， 峰值 搜索模块从所述数据存储器中读取所述相关运算的能量值， 找到所述相关 运算的能量值中的峰值。 根据步驟 1所确定的 slot边界， 以及本步驟中找 到峰值及该峰值所在的位置， 确定 frame 边界和扰码组 （scramble code group )。
这里， 由于 WCDMA的帧结构包括 15个时隙， PSC每个 slot会重复 一次， 而每个 slot的 SSC都不同， 因此， 步驟 2需要重复进行 15次， 将每 一个可能的 SSC ( SSCo - SSC14 )都与下行采样数据进行相关运算， 并对得 到的相关运算的能量值进行峰值搜索。 根据步驟 1所确定的 slot边界， 以 及本步驟中下行采样数据跟 SSC。 - SSC14中的一个序列进行相关运算后找 到的峰值及该峰值所在的位置， 确定 frame边界和扰码组。 这里， 从所述结 果中找到峰值的过程与实施例一中进行峰值搜索的过程相同， 不再赘述。
步驟 3:矢量处理器利用公共导频信道（ CPICH, Common Pilot Channel ) 的扩频码（spread code )和所确定的扰码组， 将所述扰码组中的每一个可能 的扰码和下行采样信号再进行相关运算和滤波， 得到一系列相关运算的能 量值， 将所述相关运算的能量值存储到所述数据存储器中， 峰值搜索模块 再从所述数据存储器读取所述相关运算的能量值， 找到峰值， 确定具体的 扰码和该扰码的相位， 至此， WCDMA中的小区搜索完成。
这里， 上述各个步驟搜索峰值的具体实现过程与实施例一中进行峰值 搜索的过程相同， 不再赘述。
LTE中进行小区搜索的过程可以包括如下步驟：
步驟 1 : 矢量处理器将 PSC与下行采样数据进行滑动相关运算、 滤波， 得到相关运算的能量值序列， 将所述相关运算的能量值序列存储到数据存 储器中， 峰值搜索模块读取所述相关运算的能量值， 找到相关运算的能量 值中的峰值， 基于所找到的峰值， 确定 slot边界和所使用的 PSC。
这里， 由于有 3个 PSC序列， 具体使用哪个 PSC, 需要重复步驟 1三 次来确定。
步驟 2: 矢量处理器将 168种 SSC中的每一个序列 （码片长度为 62 ) 与协议中规定的 62个子载波数据对应点相乘并求和， 得到 168个结果， 将 所述 168个结果存储到数据存储器中， 峰值搜索模块读取所述 168个结果， 找到所述 168个结果中的峰值。 基于本步驟所找到峰值的位置和所使用的 的 SSC, 以及步驟 1中所确定使用的 PSC, 确定移动终端所在小区的 ID, 由小区 ID确认该小区使用的扰码。 至此， 小区搜索过程结束。
以上所述， 仅为本发明的较佳实施例而已， 并非用于限定本发明的保 护范围。

Claims

权利要求书
1、 一种峰值搜索方法， 其特征在于， 所述方法包括：
第一级峰值筛选电路获取多个能量数据， 并对所获取的多个能量数据 进行筛选， 得到一级候选峰值；
第二级峰值筛选电路对所述第一级峰值筛选电路得到的一级候选峰值 进行筛选， 得到二级候选峰值；
峰值排序电路对所述第二级峰值筛选电路得到的二级候选峰值进行排 序和剔除假峰值处理， 得到峰值。
2、 根据权利要求 1所述峰值搜索方法， 其特征在于， 所述第一级峰值 筛选电路对所获取的多个能量数据进行筛选， 得到一级候选峰值， 为： 所 述第一级峰值筛选电路采用相邻点比较的方法， 对所获取的多个能量数据 进行筛选， 得到一级候选峰值。
3、 根据权利要 2所述峰值搜索方法， 其特征在于， 所述第一级峰值筛 选电路采用相邻点比较的方法， 对所获取的多个能量数据进行筛选， 得到 一级候选峰值， 包括：
所述第一级峰值筛选电路对所获取到的多个能量数据进行相邻数据间 比较， 提取位于大小关系切换位置的能量数据， 得到一级候选峰值。
4、 根据权利要求 1所述峰值搜索方法， 其特征在于， 所述第二级峰值 筛选电路对所述第一级峰值筛选电路得到的一级候选峰值进行筛选 , 得到 二级候选峰值， 为： 所述第二级峰值筛选电路从所述第一级峰值筛选电路 获取一级候选峰值， 采用相邻点比较的方法对所获取的一级候选峰值进行 筛选后 , 再将筛选后得到的结果分别与所述预先设置的峰值门限进行比较， 得到二级候选峰值。
5、 根据权利要求 4所述峰值搜索方法， 其特征在于， 所述第二级峰值 筛选电路对所述第一级峰值筛选电路得到的一级候选峰值进行筛选， 得到 二级候选峰值， 包括：
所述第二级峰值筛选电路从所述第一级峰值筛选电路读取一级候选峰 值， 将所读取的一级候选峰值进行相邻数据间比较， 提取位于大小关系切 换位置的一级候选峰值 , 再从所提取的一级候选峰值中提取不 d、于所述峰 值门限的一级候选峰值， 得到二级候选峰值。
6、 根据权利要求 1所述峰值搜索方法， 其特征在于， 所述峰值排序电 路对所述第二级峰值筛选电路得到的二级候选峰值进行排序和剔除假峰值 处理， 得到峰值， 包括：
峰值排序电路对所述各二级候选峰值进行以下处理：
峰值排序电路读取一个所述二级候选峰值， 并将所读取的二级候选峰 值与已得到的各峰值进行比较， 同时， 将所读取二级候选峰值的地址与已 得到各峰值的地址之间的差值和预先配置的清零阈值进行比较；
根据所述比较的结果， 将所读取的二级候选峰值剔除， 或将所读取的 二级候选峰值存为峰值并对所得到的各峰值进行排序。
7、 根据权利要求 6所述峰值搜索方法， 其特征在于， 在第二级峰值筛 选电路得到二级候选峰值后， 所述方法还包括：
第二级峰值筛选电路将所得到的二级候选峰值保存到峰值緩存器； 所述峰值排序电路读取一个二级候选峰值， 为： 所述峰值排序电路从 所述峰值緩存器中读取一个二级候选峰值。
8、 根据权利要求 1至 7任一项所述峰值搜索方法， 其特征在于， 在所 述第一级峰值筛选电路获取多个能量数据之前， 所述方法还包括：
矢量处理器对获取的采样数据进行相关运算处理、 过滤运算处理后， 再进行取模运算处理， 从取模运算处理的结果中提取实部， 得到所述能量 数据并保存到数据存储器中， 使得所述第一级峰值歸选电路能够从所述数 据存储器中获取多个能量数据。
9、 根据权利要求 8所述峰值搜索方法， 其特征在于， 所述数据存储器 每行存储有多个能量数据； 所述第一级峰值筛选电路获取多个能量数据， 为： 所述第一级峰值筛选电路每次从所述数据存储器中读取一行能量数据。
10、 一种峰值搜索装置， 其特征在于， 所述装置包括： 第一级峰值筛 选电路、 第二级峰值筛选电路、 和峰值排序电路， 其中，
第一级峰值筛选电路， 用于获取多个能量数据， 并对所获取的多个能 量数据进行筛选， 得到一级候选峰值；
第二级峰值筛选电路， 用于对所述第一级峰值筛选电路得到的一级候 选峰值进行歸选， 得到二级候选峰值；
峰值排序电路， 用于对所述第二级峰值筛选电路得到的二级候选峰值 进行排序和剔除假峰值处理， 得到峰值。
11、 根据权利要求 10所述峰值搜索装置， 其特征在于， 所述第一级峰 值筛选电路包括： P个加法器、 Q个一级候选峰值寄存器、 Q个地址寄存器， P为大于 1的整数， Q为不小于 P/2的最小整数； 其中，
P个加法器，用于对当前读入的 P个能量数据、以及上次所读入能量数 据的最后一个进行相邻数据间比较， 得到一级候选峰值；
Q个一级候选峰值寄存器， 用于存放所述 P个加法器得到的一级候选 峰值；
Q个地址寄存器， 用于存放所述 P个加法器所得到各一级候选峰值的 地址。
12、 根据权利要求 11所述峰值搜索装置， 其特征在于， 所述第二级峰 值筛选电路包括： Q个加法器、 R个二级候选峰值寄存器和 R个地址寄存 器， R为不小于 Q/2的最小整数； 其中，
Q个加法器， 用于读取所述第一级峰值筛选电路得到的一级候选峰值， 并对所读入一级候选峰值、 以及上次读入一级候选峰值的最后一个进行相 邻数据间比较、 以及与预先设置的峰值门限比较， 得到二级候选峰值；
R个二级候选峰值寄存器， 用于存放所述 Q个加法器得到的二级候选 峰值；
R个地址寄存器， 用于存放所述 Q个加法器所得到二级候选峰值的地 址。
13、 根据权利要求 10所述峰值搜索装置， 其特征在于， 所述峰值排序 电路， 用于读取二级候选峰值， 并将所读取的二级候选峰值与已得到的各 峰值进行比较， 同时， 将所读取二级候选峰值的地址与已得到各峰值的地 址之间的差值和预先配置的清零阈值进行比较； 根据所述比较的结果， 将 所读取的二级候选峰值剔除， 或将所读取的二级候选峰值存为峰值并对所 得到的各峰值进行排序。
14、 根据权利要求 13所述峰值搜索装置， 其特征在于， 所述装置还包 括： 峰值緩存器， 用于保存所述第二级峰值筛选电路得到的二级候选峰值、 以及二级候选峰值的地址；
所述第二级峰值筛选电路， 还用于将得到的各二级候选峰值及二级候 选峰值的地址保存到所述峰值緩存器；
所述峰值排序电路， 还用于从所述峰值緩存器读取二级候选峰值。
15、 根据权利要求 10至 14任一项所述峰值搜索装置， 其特征在于， 所述装置还包括： 数据存储器和矢量处理器， 其中，
数据存储器， 用于保存所有需搜索的能量数据；
矢量处理器， 用于对获取的采样数据进行相关运算处理、 过滤运算处 理后， 再进行取模运算处理， 从取模运算处理的结果中提取实部， 得到所 述能量数据并保存到数据存储器中；
所述第一级峰值筛选电路， 还用于每次从所述数据存储器读取多个能 量数据。
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