WO2012128284A1 - Rear surface electrode-type solar cell, manufacturing method for rear surface electrode-type solar cell, and solar cell module - Google Patents

Rear surface electrode-type solar cell, manufacturing method for rear surface electrode-type solar cell, and solar cell module Download PDF

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Publication number
WO2012128284A1
WO2012128284A1 PCT/JP2012/057178 JP2012057178W WO2012128284A1 WO 2012128284 A1 WO2012128284 A1 WO 2012128284A1 JP 2012057178 W JP2012057178 W JP 2012057178W WO 2012128284 A1 WO2012128284 A1 WO 2012128284A1
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electrode
thin wire
solar cell
electrodes
bus bar
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PCT/JP2012/057178
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French (fr)
Japanese (ja)
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三島　孝博
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三洋電機株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
    • H01L31/02008—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules
    • H01L31/0201—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules comprising specially adapted module bus-bar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/05—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
    • H01L31/0504—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module
    • H01L31/0516—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module specially adapted for interconnection of back-contact solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a back electrode type solar cell in which positive and negative electrodes are arranged on the back side opposite to the light receiving surface and a solar cell module using the back electrode type solar cell.
  • the solar cell constituting the solar cell module is, for example, a layer having a conductivity type opposite to the conductivity type of the silicon substrate on the surface (light receiving surface) on the side where sunlight enters among the surfaces of the single crystal or polycrystalline silicon substrate And a pn junction is formed, and electrodes are formed on the light receiving surface of the silicon substrate and the back surface on the opposite side. Further, it is generally used to increase the output by the back surface field effect by diffusing impurities of the same conductivity type as the silicon substrate at a high concentration on the back surface of the silicon substrate. However, in the solar cell having such a structure, there is a problem that the output of the solar cell is lowered because the electrode formed on the light receiving surface side blocks sunlight incident thereon.
  • a so-called back electrode type solar cell has been developed in which an electrode of a different conductivity type is formed only on the back surface of the silicon substrate without forming an electrode on the light receiving surface of the silicon substrate.
  • a back electrode type solar cell a p-type region and an n-type region are formed on the back surface of the silicon substrate without forming an electrode on the light-receiving surface side of the solar cell, and both positive and negative carriers are taken out in a comb shape.
  • a back-junction solar cell taken out from see, for example, Patent Document 1).
  • a conventional back junction solar cell will be described with reference to FIG.
  • a p-type region and an n-type region are alternately formed at predetermined intervals on the back surface of the n-type silicon substrate 101 opposite to the light-receiving surface.
  • a p-type thin wire electrode 111 is formed on the p-type region, and an n-type thin wire electrode 112 is formed on the n-type region.
  • the p-type fine wire electrode 111 and the n-type fine wire electrode 112 are formed so as to cover substantially the entire silicon substrate 101.
  • a p-type bus bar electrode 113 extending in a direction intersecting with the p-type thin wire electrode 111 is formed at an end portion on the back surface of the silicon substrate 101, and an n-type thin wire is formed at the other end portion on the back surface of the silicon substrate 101.
  • An n-type bus bar electrode 114 extending in a direction intersecting with the electrode 12 is formed.
  • the bus bar electrodes 113 and 114 and the thin wire electrodes 112 or 111 are formed with a predetermined width. For this reason, this area becomes an invalid part from the viewpoint of collecting carriers.
  • This invention makes it the 1st subject to improve the efficiency of the solar cell of a back electrode type solar cell. Moreover, this invention makes it 2nd subject to reduce the resistance of a back surface electrode and to improve the efficiency of a solar cell.
  • the solar cell of the present invention includes a semiconductor substrate and an electrode portion formed on the back surface of the semiconductor substrate, and the electrode portion includes a plurality of first thin wire electrodes formed on the back surface, and the first A plurality of second thin wire electrodes formed adjacent to the thin wire electrodes, and extending in a direction intersecting on the first thin wire electrode and the second thin wire electrode, the plurality of first thin wire electrodes being connected to each other.
  • a plurality of second bus electrodes extending in a direction intersecting the first bus bar electrode, the second thin line electrode, and the first thin line electrode. The thin wire electrodes are connected to each other, and the second bus bar electrodes are insulated from the first thin wire electrodes.
  • a semiconductor substrate is prepared, and on the back surface of the semiconductor substrate, a plurality of ground electrodes for the first thin wire electrodes and the ground electrodes for the first thin wire electrodes are adjacent.
  • the solar cell module of the present invention is a solar cell module including a plurality of electrically connected solar cells, and the solar cell includes a semiconductor substrate and electrodes formed on the back surface of the semiconductor substrate. A plurality of first thin wire electrodes formed on the back surface, a plurality of second thin wire electrodes formed adjacent to the first thin wire electrode, and on the first thin wire electrode.
  • a first bus bar electrode that extends in a direction intersecting on the second thin wire electrode, connects the plurality of first thin wire electrodes to each other, and is insulated from the second thin wire electrode;
  • a second bus bar electrode provided extending in a direction intersecting on the two thin wire electrodes and on the first thin wire electrode, interconnecting the plurality of second thin wire electrodes to each other and insulated from the first thin wire electrode And have.
  • the first fine wire electrode and the second fine wire electrode can be provided up to the bottom of the bus bar electrode. Therefore, the invalid area of the bus bar electrode portion can be reduced, the carrier collection efficiency is improved, and the solar cell Efficiency can be improved.
  • FIG. 1 is a plan view showing a solar cell according to a first embodiment.
  • FIG. 2 is a cross-sectional view taken along line A-A ′ of FIG. 1.
  • FIG. 2 is a sectional view taken along line B-B ′ of FIG. 1.
  • FIG. 2 is a sectional view taken along line C-C ′ of FIG. 1.
  • FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the solar cell according to the first embodiment.
  • FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the solar cell according to the first embodiment.
  • FIG. 3 is a plan view showing a manufacturing process of the solar cell according to the first embodiment.
  • FIG. 8 is a sectional view taken along line D-D ′ of FIG. 7.
  • FIG. 10 is a sectional view taken along line E-E ′ of FIG. 9.
  • FIG. 10 is a sectional view taken along line F-F ′ of FIG. 9.
  • FIG. 3 is a plan view showing a manufacturing process of the solar cell according to the first embodiment.
  • FIG. 13 is a sectional view taken along line G-G ′ of FIG. 12.
  • FIG. 13 is a sectional view taken along line H-H ′ of FIG. 12.
  • FIG. 16 is a sectional view taken along line I-I ′ of FIG. 15. It is a top view of the solar cell concerning 3rd Embodiment.
  • FIG. 10 is a sectional view taken along line E-E ′ of FIG. 9.
  • FIG. 10 is a sectional view taken along line F-F ′ of FIG. 9.
  • FIG. 3 is a plan view showing a manufacturing process of the solar cell according to the first embodiment.
  • FIG. 13 is a sectional view taken along line G-G ′ of FIG. 12.
  • FIG. 18 is a cross-sectional view taken along the line F-F ′ of FIG. 17. It is principal part sectional drawing of the solar cell concerning 4th Embodiment. It is a top view of the solar cell concerning 4th Embodiment.
  • FIG. 21 is a sectional view taken along line G-G ′ of FIG. 20. It is a schematic sectional drawing which shows the back junction type solar cell using the structure which improved the interface of heterojunction. It is a schematic sectional drawing which shows a back electrode type solar cell. It is a schematic sectional drawing which shows the solar cell module using the solar cell concerning each embodiment. It is a schematic plan view which shows the connection of the solar cell concerning each embodiment, and a wiring tab.
  • the “light receiving surface” means a surface of a semiconductor substrate in a solar cell or a solar cell module on the side on which sunlight is mainly incident
  • the “back surface” is a light receiving surface in the semiconductor substrate. Means the opposite surface.
  • FIG. 1 is a plan view showing the solar cell according to the first embodiment
  • FIG. 2 is a cross-sectional view taken along the line AA ′ in FIG. 1
  • FIG. 3 is a cross-sectional view taken along the line BB ′ in FIG.
  • FIG. 4 is a cross-sectional view taken along the line CC ′.
  • the solar cell 10 is formed by diffusing a plurality of n-type regions 12 and p-type regions 13 alternately spaced along the back surface of an n-type single crystal silicon (Si) substrate 11. Is formed.
  • An n-type thin wire electrode 16 f is formed on the n-type region 12 on the back side of the substrate 11, and a p-type thin wire electrode 17 f is formed on the p-type region 13.
  • a highly conductive material such as silver or aluminum is used so that a current generated in the solar cell can be taken out sufficiently.
  • a material in which copper or the like is grown on the base electrode by plating to form a low resistance electrode is used.
  • copper layers (plating layers) 16c and 17c are grown on the base electrodes 16a and 17a formed by sputtering or the like by plating.
  • a protective film (not shown) such as an insulating film is formed on the substrate 11, and the protective film at predetermined positions on the n-type region 12 and the p-type region 13 is removed.
  • An n-type thin wire electrode 16f connected to the region 12 and a p-type thin wire electrode 17f connected to the p-type region 13 are provided.
  • the n-type bus bar electrode 16i extending in the direction intersecting on the n-type thin wire electrode 16f on the one end side of the substrate 11 and connected to the n-type thin wire electrode 16f is formed in multiple layers.
  • An insulating layer 20 is provided between the n-type bus bar electrode 16 located on the p-type thin wire electrode 17f, and the p-type thin wire electrode 17f and the n-type bus bar electrode 16i are not short-circuited. .
  • an insulating layer 20 having an opening on the base electrode 16a for the n-type thin wire electrode is provided on the substrate 11, a base electrode 16b is provided thereon, and a plating layer 16c is formed on the base electrode 16b. It is constituted by.
  • the n-type electrode 16 is constituted by the n-type thin wire electrode 16f and the bus bar electrode 16i.
  • a p-type bus bar electrode 17i extending in a direction intersecting on the p-type thin wire electrode 17f on the other end side of the substrate 11 and connected to the p-type thin wire electrode 17f is formed in multiple layers.
  • An insulating layer 20 is provided between the p-type bus bar electrode 17i located on the n-type thin wire electrode 16f, and the n-type thin wire electrode 16f and the p-type bus bar electrode 17 are not short-circuited. .
  • an insulating layer 20 having an opening on the base electrode 17a for the p-type thin wire electrode is provided on the substrate 11, a base electrode 17b is provided thereon, and a plating layer 17c is formed on the base electrode 17b. It is constituted by.
  • the p-type electrode 17 is composed of the p-type thin wire electrode 17f and the bus bar electrode 17i.
  • a surface passivation layer 18a made of an n-type doping layer and an antireflection film 18b such as titanium oxide (TiO 2 ) are formed.
  • the thin wire electrodes 16f and 17f described above are electrodes that mainly collect current generated in the solar cell 10.
  • the bus bar electrodes 16i and 17i are electrodes used to collect currents collected by the thin wire electrodes 16f and 17f, respectively, and are mainly used for connection with other solar cells.
  • the n-type thin wire electrode 16f and the p-type thin wire electrode 17f can be provided up to the bottom of the bus bar electrodes 16i and 17i. Can be reduced, carrier collection efficiency can be improved, and solar cell efficiency can be improved.
  • FIGS. 5 and 6 are schematic cross-sectional views showing the manufacturing process of the solar cell according to the first embodiment
  • FIG. 7 is a plan view showing the manufacturing process of the solar cell
  • FIG. 8 is a DD of FIG. 9 is a plan view showing a manufacturing process of the solar cell
  • FIG. 10 is a cross-sectional view taken along the line EE ′ of FIG. 9
  • FIG. 13 is a cross-sectional view taken along the line GG ′ of FIG. 12
  • FIG. 14 is a cross-sectional view taken along the line HH ′ of FIG.
  • the single crystal silicon substrate 11 is obtained by slicing an ingot of silicon crystal. When the substrate 11 is sliced, a damaged layer is formed in the vicinity of the surface thereof. Therefore, it is preferable to remove the damaged layer by etching using an acidic or alkaline solution.
  • the conductivity type of the substrate 11 may be n-type or p-type. In this embodiment, an n-type single crystal silicon substrate is used. Further, the size and thickness of the substrate 11 can be appropriately changed. In this embodiment, a substrate having a thickness of 200 ⁇ m, a size of 100 mm square, and a resistivity of 1 ⁇ cm was used.
  • a pyramidal microstructure called a texture is formed on the light receiving surface of the substrate 11 in order to suppress loss due to reflection of incident sunlight, the surface orientation of the light receiving surface of the substrate 11 is (100). Preferably there is.
  • 13a is attached in a predetermined pattern.
  • means for attaching the paste materials 12a and 13a in a predetermined pattern include screen printing and inkjet printing.
  • the paste materials 12a and 13a are formed on the back surface of the substrate 11 by screen printing.
  • the n-type paste material 12 a and the p-type paste material 13 a are formed along the back surface of the substrate 11 at intervals.
  • the substrate 11 is heated and diffused for 30 minutes at a temperature of about 800 ° C. to 900 ° C., for example, 850 ° C. in this embodiment.
  • the n-type impurity (phosphorus) contained in the n-type paste material 12a and the p-type impurity (boron) contained in the p-type paste material 13a are diffused into the substrate 11, and as shown in FIG.
  • a plurality of n-type regions 12 and p-type regions 13 are alternately formed along the back surface.
  • both the n-type region 12 and the p-type region 13 have a size of 0.8 mm ⁇ 98 mm, a gap of 0.4 mm, and a junction depth of 0.3 ⁇ m.
  • the number of p-type regions 13 is 41 and the number of n-type regions 12 is 40.
  • a number, thickness, etc. differ from an actual thing.
  • the oxide film formed on the surface of the substrate 11 is removed using dilute hydrofluoric acid (2%), and a surface passivation layer 18a made of an n-type doping layer is formed on the light receiving surface.
  • An antireflection film 18b is formed on the passivation layer 18a by thermal CVD (Chemical Vapor Deposition) to a thickness of about 80 nm.
  • the base electrode 16 a for the n-type thin wire electrode and the base electrode 17 a for the p-type thin wire electrode are provided on the n-type region 12 and the p-type region 13 on the back surface side of the substrate 11. Formed.
  • Each of the underlying electrodes 16a and 17a is 0.8 mm ⁇ 98 mm in size, 1 ⁇ m to 4 ⁇ m in thickness, and in this embodiment, 2 ⁇ m of copper is formed by sputtering using a metal mask.
  • rectangular insulating materials 20 each having a width of 10 mm and a length of 100 mm are provided on both ends of the substrate 11 so as to cover the base electrodes 16a and 17a.
  • This insulating material 20 is formed so as to cover all of one electrode end. That is, on the side where the n-type bus bar electrode is provided, an insulating layer 20 is provided which is opened on the base electrode 16a for the n-type thin wire electrode and patterned so as to cover the base electrode 17a for the p-type thin wire electrode. .
  • an insulating layer 20 which is open on the base electrode 17a for the p-type thin wire electrode and patterned so as to cover the base electrode 16a for the n-type thin wire electrode. It is done.
  • the size of each open area is 0.8 mm wide and 2 mm long.
  • the insulating layer 20 was formed by applying a polyimide resin with a film thickness of 1 ⁇ m to 10 ⁇ m, in this embodiment 5 ⁇ m, with a dispenser and heating temperature of 200 ° C. and heating time of 5 minutes.
  • a bus bar base electrode 16b connected to the base electrode 16a and a bus bar base electrode 17b connected to the base electrode 17a are formed on the insulating layer 20.
  • the base electrodes 16b and 17b have a width of 8 mm ⁇ a length of 98 mm, and a branch portion connected to each base electrode has a width of 0.8 mm.
  • the base electrodes 16b and 17b had a thickness of 1 ⁇ m to 4 ⁇ m, and in this embodiment, 2 ⁇ m of copper was formed by sputtering using a metal mask.
  • the base electrodes 16b and 17b are overlapped with each other by about 2 mm in length to ensure electrical connection.
  • the base electrodes 16a, 16b, 17a, and 17b are subjected to electric field plating while being individually fed to form plated layers 16c and 17c.
  • FIGS. Battery 10 is obtained.
  • the anode was phosphor-containing copper
  • the cathode was the base electrode 16a, 16b or 17a, 17b
  • the plating thickness was 10 ⁇ m to 30 ⁇ m, and in this embodiment, 10 ⁇ m.
  • the plating current was 2A
  • the plating solution was copper sulfate
  • the distance between the electrodes was 5 cm
  • the temperature was 40 ° C.
  • the thickness of the electrode can be increased by plating, and the resistance loss can be reduced.
  • Table 1 and FIG. 29 show the simulation results of the relationship between the electrode thickness and the resistance loss. Measurement is based on the assumption that the cell area is 100 cm 2 , the copper resistivity is 1.72 ⁇ cm, the resistance loss occurs in the length direction of the copper electrode, the electrode width is 0.8 mm, the number of electrodes is 41, and the pattern shape is the same as in FIG. did. Since FIG. 1 is simplified as described above, the number of electrodes is different from the number shown in FIG.
  • the base electrodes 16a and 17a for thin wire electrodes and the base electrodes 16b and 17b for bus bar electrodes can be easily and reliably connected. Therefore, when the plating power is supplied, power can be reliably supplied to all the underlying electrodes, and a plating layer having an optimum thickness can be formed on all the underlying electrodes. As a result, the thickness of all the electrodes can be formed to 10 ⁇ m or more, and the power loss at the electrodes can be reduced as much as possible.
  • a vapor-deposited metal film is used as the base electrode.
  • a transparent conductive film made of a mixture of indium oxide and tin oxide, a zinc oxide-based transparent conductive film, or the like is used as the base electrode. It can also be used as an electrode.
  • FIG. 15 is a plan view of a solar cell according to the second embodiment
  • FIG. 16 is a cross-sectional view taken along the line I-I ′ of FIG.
  • the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method.
  • the bus bar base electrodes 16h and 17h are connected to the base electrodes 16a and 17a for the thin wire electrodes using the conductive adhesive 21.
  • the bus bar base electrodes 16h and 17h in this embodiment are made of a copper foil plate having a thickness of 5 ⁇ m to 50 ⁇ m. Specifically, in the second embodiment, a copper foil plate having a width of 8 mm, a length of 98 mm, and a thickness of 10 ⁇ m was used. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
  • the conductive resin adhesive 21 includes a resin adhesive component and conductive particles dispersed therein.
  • the conductive adhesive 21 is applied onto the insulating layer 20 with a dispenser, and base electrodes 16h and 17h made of a copper foil plate are placed thereon.
  • the conductive adhesive is cured while pressing the underlying electrodes 16h and 17h, and the underlying electrodes 16h and 17h are connected to the underlying electrodes 16a and 17a, respectively, thereby forming the underlying electrodes.
  • the resin adhesive component of the conductive resin adhesive 21 is composed of a composition containing a thermosetting resin, and for example, epoxy resin, phenoxy resin, acrylic resin, polyimide resin, polyamide resin, and polycarbonate resin can be used. These thermosetting resins are used singly or in combination of two or more, and one or more thermosetting resins selected from the group consisting of epoxy resins, phenoxy resins and acrylic resins are preferable. In addition, it is possible to use an ultraviolet curable resin as a resin adhesive component.
  • Examples of the conductive particles of the conductive resin adhesive 21 include metal particles such as gold particles, silver particles, copper particles, and nickel particles, or conductive or insulating properties such as gold plated particles, copper plated particles, and nickel plated particles. Conductive particles obtained by coating the surfaces of the core particles with a conductive layer such as a metal layer are used.
  • a liquid or a film can be used as the conductive adhesive 21 .
  • the underlying electrodes 16h and 17h made of a copper foil plate are placed on the conductive adhesive 21 and heated at 200 ° C. for 5 minutes under a pressure of about 1 to 2 MPa, for example, to cure the conductive adhesive 21.
  • the base electrodes 16h and 17h are bonded to the base electrodes 16a and 17a, respectively. This heating is preferably performed in a nitrogen atmosphere in order to prevent oxidation of the copper foil.
  • the electrodes 16 and 17 are formed by plating the same as in the first embodiment described above, so that the solar cell of the present invention is formed. Is obtained.
  • the p side and the n side can be plated simultaneously.
  • FIG. 17 is a plan view of a solar cell according to the third embodiment
  • FIG. 18 is a cross-sectional view taken along the line F-F ′ of FIG.
  • the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method.
  • the bus bar base electrodes 16d and 17d are connected to the base electrodes 16a and 17a for the thin wire electrodes by using a thermosetting conductive paste. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
  • thermosetting Ag paste is used as the conductive paste, and the thickness is 2 ⁇ m to 20 ⁇ m.
  • the width is 8 mm, the length is 98 mm, and the thickness is 10 ⁇ m.
  • Formed by screen printing. The curing condition is 180 ° C. for 30 minutes.
  • An Ag paste was formed on the insulating layer 20 by screen printing, heated at 200 ° C. for 5 minutes to cure the Ag paste, and formed with an Ag paste connected to the underlying electrodes 16a and 17a for the thin wire electrodes. Bus bar base electrodes 16d and 17d are formed.
  • FIGS. 19 is a cross-sectional view of the main part of the solar cell according to the fourth embodiment
  • FIG. 20 is a plan view of the solar cell according to the fourth embodiment
  • FIG. 21 is a cross-sectional view taken along the line GG ′ of FIG. It is.
  • the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method.
  • the copper foil 19 is connected by welding to the base electrodes 16a and 17a for the thin wire electrodes. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
  • each electrode is plated to form a plating layer 19a around the copper foil 19.
  • the electrodes including the bus bar electrodes 16e and 17e are formed.
  • a metal wire may be used for connection by welding, and then plating may be performed.
  • the back surface junction is formed by the diffusion layer.
  • the solar cell shown in FIG. 22 is a back junction solar cell using a so-called Hetero-junction with Intrinsic thin-layer structure in which the heterojunction interface is improved.
  • a passivation film 31 is formed on the light receiving surface of the n-type silicon substrate 11.
  • an intrinsic amorphous silicon layer 30 is formed on substantially the entire surface, and an n-type amorphous silicon layer 12i and a p-type amorphous silicon layer 13i are alternately formed in a comb shape thereon.
  • the n-type and p-type amorphous silicon layers 12i and 13i are provided with thin wire electrodes 16 and 17 for taking out, respectively, and the charges generated in the solar cell are taken out from the p side and the electrons are taken out from the n side.
  • an n-type bus bar electrode extending in a direction intersecting on the thin wire electrode 16 on one end side of the substrate 11 and connected to the thin wire electrode 16 is formed in multiple layers. Yes. An insulating layer is provided between the n-type bus bar electrode and the n-type bus bar electrode positioned on the fine wire electrode 17 so that the p-type fine wire electrode 17 and the n-type bus bar electrode are not short-circuited.
  • a p-type bus bar electrode that extends in the direction intersecting on the thin wire electrode 17 on the other end side of the substrate 11 and is connected to the thin wire electrode 17 is formed in multiple layers.
  • An insulating layer is provided between the n-type thin wire electrode 16 and the p-type bus bar electrode, and the n-type fine wire electrode 16 and the p-type bus bar electrode are not short-circuited.
  • the configuration other than the element structure of the solar cell is the same as that of the above-described embodiment.
  • the above-described solar cell is provided with a semiconductor junction on the back surface side, but the example shown in FIG. 23 is an electrode provided on the back surface side, and the semiconductor junction is provided on the light receiving surface side. That is, the p or n type impurity region 13 is provided on the surface side of the n or p type semiconductor substrate 11.
  • An electrode 16 having the same polarity as that of the substrate 11 is provided on the back side of the substrate 11, and an electrode of the impurity region 13 on the front side is provided on the back side of the substrate 11 through a through hole 31.
  • the electrodes 16 and 17 are the same as the electrodes described above.
  • the base electrode for the fine wire electrode and the base electrode for the bus bar are wired in multiple layers through the insulating layer, as in the above-described embodiment. What is necessary is just to comprise.
  • FIG. 24 is a schematic cross-sectional view showing a solar cell module using the solar cell of each embodiment
  • FIGS. 25 and 26 are schematic plan views showing the connection between the solar cell and a wiring tab.
  • the solar cell module electrically connects the p-side electrode 17 of one solar cell 10 and the n-side electrode 16 of the other solar cell 10 using a wiring tab 50 to form a string shape. Furthermore, as shown in FIG. 26, the solar cell module has a crossover wiring 52 that connects the strings. From the solar cell 10 located at the end, a wiring 52 is connected to the electrode 17 via a wiring tab 51, and this wiring 52 is connected to a terminal of a terminal box (not shown). An insulating sheet 55 is interposed between the wiring 52 and the solar cell 10 to prevent a short circuit between the wiring 52 and the electrode of the solar cell 10. As shown in FIG. 26, the bus bar electrodes of adjacent strings are arranged so as to have different polarities, and are considered so that they can be easily connected when connecting both strings using the crossover wiring 52.
  • the wiring 52 is a copper foil having a thickness of about 100 ⁇ m to 300 ⁇ m and a width of about 6 mm, and its entire surface is solder-coated, cut into a predetermined length, and soldered to a wiring tab or the like.
  • the surface of the output wiring is covered with an insulating film.
  • the solar cell module includes a plurality of solar cell modules connected from the light receiving surface side by a surface protection member 41 such as glass, a light-transmitting sealing material 43 such as EVA, a wiring tab 50, a crossover wiring 52, and the like.
  • the solar cell 10, the rear surface side light-transmitting sealing material 43, and the back surface protection member 42 composed of a back sheet and the like are stacked in this order, laminated and integrated. By this laminating process, the solar cell 10 and the wiring tab 30 are integrated in a connected state.
  • the wiring tab 51 connected to the bus bar electrode 17 (16) is connected to the crossover wiring 52 and is taken out as a lead line.
  • the wiring tab 51 and the transition wiring 52 cross over the n-type electrode 16 and the p-type electrode 17.
  • an insulating sheet 55 made of a filler or an insulating material is sandwiched between the wirings 51 and 52 and the solar cell 10 in order to prevent a short circuit due to the wiring.
  • the n-type electrode 16 and the p-type electrode 17 are connected by the wiring tab 50.
  • the position where the bus bar electrode is provided is not limited to the end.
  • one bus bar electrode 16x can be provided at the end, and the other bus bar electrode 17x can be provided at a predetermined distance from the end.
  • FIG. 28 by separating the bus bar electrode 17 from the end portion by a predetermined distance, a layout that reduces the overlapping of the crossover wirings 52 is possible, and there is an advantage that the overlapping of wirings of the solar cell module can be reduced. can get.
  • the electrode is formed by electrolytic plating, but may be formed by electroless plating.
  • the base electrode may be formed of a metal such as tin or nickel that has a higher ionization tendency than copper.
  • the electroless plating solution for example, a solution containing at least one of cupric sulfate, ethylenediaminetetraacetic acid, formaldehyde, and alkali hydroxide as a main component can be used.

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Abstract

The purpose of the present invention is to increase the solar cell efficiency of a rear surface electrode-type solar cell. This solar cell has, on a substrate (11), a light-receiving surface for receiving sunlight and a rear surface provided on the opposite side of the light-receiving surface, and comprises electrode sections (16, 17) formed on the rear surface of the substrate (11). The electrode section has the following: a plurality of n-type fine wire electrodes (16f) formed on the rear surface; a plurality of p-type fine wire electrodes (17f) formed adjacent to the n-type fine wire electrodes (16f); an n-type bus bar electrode (16i) that is provided extending in a direction that intersects the n-type fine wire electrodes (16f) and the p-type fine wire electrodes (17f) and that, while mutually connecting the plurality of n-type fine wire electrodes (16f), is isolated from the p-type fine wire electrodes (17f); and a p-type bus bar electrode (17i) that is provided in a direction that intersects the p-type fine wire electrodes (17f) and the n-type fine wire electrodes (16f) and that, while mutually connecting the plurality of p-type fine wire electrodes (17f), is isolated from the n-type fine wire electrodes (16f).

Description

裏面電極型太陽電池、裏面電極型太陽電池の製造方法及び太陽電池モジュールBack electrode type solar cell, method for manufacturing back electrode type solar cell, and solar cell module
　この発明は、受光面と反対の裏面側に正負の電極が配置される裏面電極型太陽電池及びそれを用いた太陽電池モジュールに関するものである。 The present invention relates to a back electrode type solar cell in which positive and negative electrodes are arranged on the back side opposite to the light receiving surface and a solar cell module using the back electrode type solar cell.
太陽電池モジュールを構成する太陽電池は、例えば、単結晶又は多結晶のシリコン基板の面のうち太陽光が入射する側の面（受光面）にシリコン基板の導電型と反対の導電型となる層を設けてｐｎ接合を形成し、シリコン基板の受光面とその反対側にある裏面にそれぞれ電極を形成して製造される。また、シリコン基板の裏面にはシリコン基板と同じ導電型の不純物を高濃度に拡散することによって、裏面電界効果による高出力化を図ることも一般的用いられている。しかしながら、このような構造の太陽電池においては、受光面側に形成される電極が入射する太陽光を遮るため、太陽電池の出力が低下するという問題があった。 The solar cell constituting the solar cell module is, for example, a layer having a conductivity type opposite to the conductivity type of the silicon substrate on the surface (light receiving surface) on the side where sunlight enters among the surfaces of the single crystal or polycrystalline silicon substrate And a pn junction is formed, and electrodes are formed on the light receiving surface of the silicon substrate and the back surface on the opposite side. Further, it is generally used to increase the output by the back surface field effect by diffusing impurities of the same conductivity type as the silicon substrate at a high concentration on the back surface of the silicon substrate. However, in the solar cell having such a structure, there is a problem that the output of the solar cell is lowered because the electrode formed on the light receiving surface side blocks sunlight incident thereon.
　そこで、シリコン基板の受光面には電極を形成せずに、シリコン基板の裏面のみに異なる導電型の電極を形成するいわゆる裏面電極型太陽電池が開発されている。裏面電極型太陽電池として、太陽電池の受光面側に電極を形成せずに、シリコン基板の裏面にｐ型領域、ｎ型領域を形成し、正負両キャリアの取り出しを櫛型に形成した取り出し電極から取り出す裏面接合型太陽電池がある（例えば、特許文献１参照）。 Therefore, a so-called back electrode type solar cell has been developed in which an electrode of a different conductivity type is formed only on the back surface of the silicon substrate without forming an electrode on the light receiving surface of the silicon substrate. As a back electrode type solar cell, a p-type region and an n-type region are formed on the back surface of the silicon substrate without forming an electrode on the light-receiving surface side of the solar cell, and both positive and negative carriers are taken out in a comb shape. There is a back-junction solar cell taken out from (see, for example, Patent Document 1).
　図３０に従い従来の裏面接合型太陽電池について説明する。裏面接合型太陽電池は、ｎ型のシリコン基板１０１の受光面側とは反対側の裏面に、ｐ型領域、ｎ型領域とが交互に所定間隔を開けて形成されている。ｐ型領域上にはｐ型細線電極１１１が形成され、ｎ型領域上にはｎ型細線電極１１２が形成されている。 A conventional back junction solar cell will be described with reference to FIG. In the back junction solar cell, a p-type region and an n-type region are alternately formed at predetermined intervals on the back surface of the n-type silicon substrate 101 opposite to the light-receiving surface. A p-type thin wire electrode 111 is formed on the p-type region, and an n-type thin wire electrode 112 is formed on the n-type region.
　太陽電池の出力を向上させる観点から、ｐ型細線電極１１１とｎ型細線電極１１２とがシリコン基板１０１の略全体を覆うように形成されている。そして、シリコン基板１０１の裏面上における端部に、ｐ型細線電極１１１と交差する方向に延在するp型バスバー電極１１３が形成され、シリコン基板１０１の裏面上における他端部に、ｎ型細線電極１２と交差する方向に延在するｎ型バスバー電極１１４が形成されている。 From the viewpoint of improving the output of the solar cell, the p-type fine wire electrode 111 and the n-type fine wire electrode 112 are formed so as to cover substantially the entire silicon substrate 101. A p-type bus bar electrode 113 extending in a direction intersecting with the p-type thin wire electrode 111 is formed at an end portion on the back surface of the silicon substrate 101, and an n-type thin wire is formed at the other end portion on the back surface of the silicon substrate 101. An n-type bus bar electrode 114 extending in a direction intersecting with the electrode 12 is formed.
　この裏面接合型太陽電池の受光面に太陽光が入射すると、シリコン基板１０１の受光面近傍で生じたキャリアが裏面に形成されたｐｎ接合まで到達し、ｐ型細線電極１１１およびｎ型細線電極１１２に電流として収集される。この電流が外部に取り出されて太陽電池の出力となる。 When sunlight is incident on the light-receiving surface of the back junction solar cell, carriers generated in the vicinity of the light-receiving surface of the silicon substrate 101 reach the pn junction formed on the back surface, and the p-type thin wire electrode 111 and the n-type thin wire electrode 112. Collected as current. This current is taken out and becomes the output of the solar cell.
特開２００６－１２０９４４号JP 2006-120944 A
　上記した従来の裏面接合型太陽電池においては、それぞれのバスバー電極１１３および１１４と細線電極１１２または１１１とが所定の幅を持って形成されている。このため、この領域はキャリアを収集する点からみると、無効部分となる。 In the conventional back junction solar cell described above, the bus bar electrodes 113 and 114 and the thin wire electrodes 112 or 111 are formed with a predetermined width. For this reason, this area becomes an invalid part from the viewpoint of collecting carriers.
　太陽電池においては、キャリアの収集効率を向上させることは，太陽電池の効率を向上させる点から重要なファクタである。 In solar cells, improving carrier collection efficiency is an important factor from the standpoint of improving solar cell efficiency.
　この発明は、裏面電極型太陽電池の太陽電池の効率を向上させることを第１の課題とする。また、この発明は、裏面電極の抵抗を低減させ、太陽電池の効率を向上させることを第２の課題とする。 This invention makes it the 1st subject to improve the efficiency of the solar cell of a back electrode type solar cell. Moreover, this invention makes it 2nd subject to reduce the resistance of a back surface electrode and to improve the efficiency of a solar cell.
　この発明の太陽電池は、半導体基板と、前記半導体基板の裏面上に形成された電極部とを備え、前記電極部は、前記裏面上に形成された複数の第１細線電極と、前記第１細線電極に隣接して形成された複数の第２細線電極と、前記第１細線電極及び前記第２細線電極上で交差する方向に延在して設けられ、前記複数の第１細線電極を互い接続するとともに、前記第２細線電極とは絶縁された第１バスバー電極と、前記第２細線電極上及び前記第１細線電極上で交差する方向に延在して設けられ、前記複数の第２細線電極を互い接続するとともに、前記第１細線電極とは絶縁された第２バスバー電極と、を有する。 The solar cell of the present invention includes a semiconductor substrate and an electrode portion formed on the back surface of the semiconductor substrate, and the electrode portion includes a plurality of first thin wire electrodes formed on the back surface, and the first A plurality of second thin wire electrodes formed adjacent to the thin wire electrodes, and extending in a direction intersecting on the first thin wire electrode and the second thin wire electrode, the plurality of first thin wire electrodes being connected to each other. A plurality of second bus electrodes extending in a direction intersecting the first bus bar electrode, the second thin line electrode, and the first thin line electrode. The thin wire electrodes are connected to each other, and the second bus bar electrodes are insulated from the first thin wire electrodes.
　また、この発明の太陽電池の製造方法は、半導体基板を用意し、前記半導体基板の裏面上に、複数の第１細線電極用の下地電極と、前記第１細線電極用の下地電極に隣接する複数の第２細線電極用の下地電極を形成し、前記第１細線電極用の下地電極及び第２細線電極用の下地電極上で交差する方向に延在する方向に配置され、、前記複数の第１細線電極用の下地電極を互い接続するとともに、前記第２細線電極用の下地電極とは絶縁された第１バスバー電極用の下地電極を形成し、前記第２細線電極用の下地電極及び第１細線電極用の下地電極上で交差する方向に延在する方向に配置され、前記複数の第２細線電極用の下地電極を互い接続するとともに、前記第１細線電極用の下地電極とは絶縁された第２バスバー電極用の下地電極を形成し、前記各下地電極にメッキを行い、第１細線電極、第１バスバー電極、第２細線電極及び第２バスバー電極を形成する。 In the method for manufacturing a solar cell according to the present invention, a semiconductor substrate is prepared, and on the back surface of the semiconductor substrate, a plurality of ground electrodes for the first thin wire electrodes and the ground electrodes for the first thin wire electrodes are adjacent. Forming a plurality of base electrodes for the second thin wire electrode, arranged in a direction extending in a direction intersecting on the base electrode for the first thin wire electrode and the base electrode for the second thin wire electrode, A ground electrode for the first thin wire electrode is connected to each other, and a ground electrode for the first bus bar electrode is formed insulated from the ground electrode for the second thin wire electrode, and the ground electrode for the second thin wire electrode and Arranged in a direction extending in a direction intersecting on the base electrode for the first thin wire electrode, the plurality of base electrodes for the second thin wire electrode are connected to each other, and the base electrode for the first thin wire electrode is Form an insulated base electrode for the second bus bar electrode And performs plating on the respective underlying electrodes, the first fine-line electrodes, the first bus bar electrode, forming a second thin wire electrode and the second bus bar electrode.
　また、この発明の太陽電池モジュールは、電気的に接続されている複数の太陽電池を含む太陽電池モジュールであって、前記太陽電池は、半導体基板と、前記半導体基板の裏面上に形成された電極部を備え、前記電極部は、前記裏面上に形成された複数の第１細線電極と、前記第１細線電極に隣接して形成された複数の第２細線電極と、前記第１細線電極上及び前記第２細線電極上で交差する方向に延在して設けられ、前記複数の第１細線電極を互い接続するとともに、前記第２細線電極とは絶縁された第１バスバー電極と、前記第２細線電極上及び前記第１細線電極上で交差する方向に延在して設けられ、前記複数の第２細線電極を互い接続するとともに、前記第１細線電極とは絶縁された第２バスバー電極と、を有している。 Moreover, the solar cell module of the present invention is a solar cell module including a plurality of electrically connected solar cells, and the solar cell includes a semiconductor substrate and electrodes formed on the back surface of the semiconductor substrate. A plurality of first thin wire electrodes formed on the back surface, a plurality of second thin wire electrodes formed adjacent to the first thin wire electrode, and on the first thin wire electrode. And a first bus bar electrode that extends in a direction intersecting on the second thin wire electrode, connects the plurality of first thin wire electrodes to each other, and is insulated from the second thin wire electrode; A second bus bar electrode provided extending in a direction intersecting on the two thin wire electrodes and on the first thin wire electrode, interconnecting the plurality of second thin wire electrodes to each other and insulated from the first thin wire electrode And have.
　この発明の太陽電池は、第１細線電極、第２細線電極をバスバー電極の下まで設けることができるので、バスバー電極の部分の無効領域を削減でき、キャリアの収集効率を向上させ、太陽電池の効率を向上させることができる。 In the solar cell of the present invention, the first fine wire electrode and the second fine wire electrode can be provided up to the bottom of the bus bar electrode. Therefore, the invalid area of the bus bar electrode portion can be reduced, the carrier collection efficiency is improved, and the solar cell Efficiency can be improved.
第1の実施形態にかかる太陽電池を示す平面図である。1 is a plan view showing a solar cell according to a first embodiment. 図１のＡ－Ａ’線断面図である。FIG. 2 is a cross-sectional view taken along line A-A ′ of FIG. 1. 図１のＢ－Ｂ’線断面図である。FIG. 2 is a sectional view taken along line B-B ′ of FIG. 1. 図１のＣ－Ｃ’線断面図である。FIG. 2 is a sectional view taken along line C-C ′ of FIG. 1. 第1の実施形態にかかる太陽電池の製造工程を示す概略断面図である。FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the solar cell according to the first embodiment. 第1の実施形態にかかる太陽電池の製造工程を示す概略断面図である。FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the solar cell according to the first embodiment. 第1の実施形態にかかる太陽電池の製造工程を示す平面図である。FIG. 3 is a plan view showing a manufacturing process of the solar cell according to the first embodiment. 図７のＤ－Ｄ’線断面図である。FIG. 8 is a sectional view taken along line D-D ′ of FIG. 7. この発明の太陽電池の製造工程を示す平面図である。It is a top view which shows the manufacturing process of the solar cell of this invention. 図９のＥ－Ｅ’線断面図である。FIG. 10 is a sectional view taken along line E-E ′ of FIG. 9. 図９のＦ－Ｆ’線断面図である。FIG. 10 is a sectional view taken along line F-F ′ of FIG. 9. 第1の実施形態にかかる太陽電池の製造工程を示す平面図である。FIG. 3 is a plan view showing a manufacturing process of the solar cell according to the first embodiment. 図１２のＧ－Ｇ’線断面図である。FIG. 13 is a sectional view taken along line G-G ′ of FIG. 12. 図１２のＨ－Ｈ’線断面図である。FIG. 13 is a sectional view taken along line H-H ′ of FIG. 12. 第２の実施形態にかかる太陽電池の平面図である。It is a top view of the solar cell concerning 2nd Embodiment. 図１５のＩ－Ｉ’線断面図である。FIG. 16 is a sectional view taken along line I-I ′ of FIG. 15. 第３の実施形態にかかる太陽電池の平面図である。It is a top view of the solar cell concerning 3rd Embodiment. 図１７のＦ－Ｆ’線断面図である。FIG. 18 is a cross-sectional view taken along the line F-F ′ of FIG. 17. 第４の実施形態にかかる太陽電池の要部断面図である。It is principal part sectional drawing of the solar cell concerning 4th Embodiment. 第４の実施形態にかかる太陽電池の平面図である。It is a top view of the solar cell concerning 4th Embodiment. 図２０のＧ－Ｇ’線断面図である。FIG. 21 is a sectional view taken along line G-G ′ of FIG. 20. ヘテロ接合の界面を改善した構造を用いた裏面接合型太陽電池を示す概略断面図である。It is a schematic sectional drawing which shows the back junction type solar cell using the structure which improved the interface of heterojunction. 裏面電極型太陽電池を示す概略断面図である。It is a schematic sectional drawing which shows a back electrode type solar cell. 各実施形態にかかる太陽電池を用いた太陽電池モジュールを示す概略断面図である。It is a schematic sectional drawing which shows the solar cell module using the solar cell concerning each embodiment. 各実施形態にかかる太陽電池と配線タブとの接続を示す模式的平面図である。It is a schematic plan view which shows the connection of the solar cell concerning each embodiment, and a wiring tab. この発明の太陽電池と配線タブとの接続を示す模式的平面図である。It is a typical top view which shows the connection of the solar cell of this invention, and a wiring tab. 実施形態の変形例の太陽電池を示す模式的平面図である。It is a typical top view which shows the solar cell of the modification of embodiment. 実施形態の変形例の太陽電池を用いた太陽電池モジュールの配線状態を示す模式的平面図である。It is a typical top view which shows the wiring state of the solar cell module using the solar cell of the modification of embodiment. 銅電極厚と抵抗損失との関係を示す図である。It is a figure which shows the relationship between a copper electrode thickness and resistance loss. 従来の裏面電極型の太陽電池を示す平面図である。It is a top view which shows the conventional back electrode type solar cell.
　この発明の実施の形態について図面を参照しながら詳細に説明する。なお、図中同一または相当部分には同一符号を付し、説明の重複を避けるためにその説明は繰返さない。 Embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and the description thereof will not be repeated in order to avoid duplication of description.
　尚、本願明細書において、「受光面」とは、太陽電池または太陽電池モジュールにおける半導体基板の太陽光が主として入射する側の表面を意味し、「裏面」とは、上記半導体基板における受光面と反対側の表面を意味する。 In the present specification, the “light receiving surface” means a surface of a semiconductor substrate in a solar cell or a solar cell module on the side on which sunlight is mainly incident, and the “back surface” is a light receiving surface in the semiconductor substrate. Means the opposite surface.
　図１は、第１の実施形態にかかる太陽電池を示す平面図、図２は、図１のＡ－Ａ’線断面図、図３は、図１のＢ－Ｂ’線断面図、図４は、Ｃ－Ｃ’線断面図である。 1 is a plan view showing the solar cell according to the first embodiment, FIG. 2 is a cross-sectional view taken along the line AA ′ in FIG. 1, FIG. 3 is a cross-sectional view taken along the line BB ′ in FIG. FIG. 4 is a cross-sectional view taken along the line CC ′.
　図１～図４に示すように、太陽電池１０は、ｎ型単結晶シリコン（Ｓｉ）基板１１の裏面に沿って複数のｎ型領域１２およびｐ型領域１３が交互に間隔をあけて拡散により形成されている。そして、基板１１の裏面側のｎ型領域１２上に、ｎ型細線電極１６ｆ、ｐ型領域１３上にｐ型細線電極１７ｆがそれぞれ形成されている。この電極１６ｆ、１７ｆの材料としては、太陽電池に発生する電流を外部に十分に取り出すことができるように、銀又はアルミニウムなどの高導電材料が用いられる。さらに、メッキにより銅などを下地電極上に成長させ、低抵抗の電極を形成したものが用いられる。この実施形態では、スパッタなどにより形成した下地電極１６ａ、１７ａ上にメッキにより銅層(メッキ層)１６ｃ、１７ｃを成長させたものを用いている。 As shown in FIGS. 1 to 4, the solar cell 10 is formed by diffusing a plurality of n-type regions 12 and p-type regions 13 alternately spaced along the back surface of an n-type single crystal silicon (Si) substrate 11. Is formed. An n-type thin wire electrode 16 f is formed on the n-type region 12 on the back side of the substrate 11, and a p-type thin wire electrode 17 f is formed on the p-type region 13. As the material of the electrodes 16f and 17f, a highly conductive material such as silver or aluminum is used so that a current generated in the solar cell can be taken out sufficiently. Further, a material in which copper or the like is grown on the base electrode by plating to form a low resistance electrode is used. In this embodiment, copper layers (plating layers) 16c and 17c are grown on the base electrodes 16a and 17a formed by sputtering or the like by plating.
　基板１１上には、絶縁膜などの保護膜（図示せず）が形成され、ｎ型領域１２、ｐ型領域１３上の所定の箇所の保護膜が除去され、その部分に合わせて、ｎ型領域１２と接続するｎ型細線電極１６ｆ、ｐ型領域１３と接続するｐ型細線電極１７ｆが設けられている。 A protective film (not shown) such as an insulating film is formed on the substrate 11, and the protective film at predetermined positions on the n-type region 12 and the p-type region 13 is removed. An n-type thin wire electrode 16f connected to the region 12 and a p-type thin wire electrode 17f connected to the p-type region 13 are provided.
　そして、基板１１の一端部側にｎ型細線電極１６ｆ上で交差する方向に延在して、ｎ型細線電極１６ｆと接続するｎ型バスバー電極１６ｉが多層に形成されている。ｐ型細線電極１７ｆ上に位置するｎ型バスバー電極１６との間には絶縁層２０が設けられ、ｐ型細線電極１７ｆとｎ型バスバー電極１６ｉとが短絡することが無いように構成されている。このバスバー電極１６ｉは、ｎ型細線電極用の下地電極１６ａ上が開口した絶縁層２０を基板１１上に設け、この上に下地電極１６ｂを設け、この下地電極１６ｂ上にメッキ層１６ｃを形成することにより構成されている。ｎ型細線電極１６ｆとバスバー電極１６ｉとでｎ型電極１６が構成される。 The n-type bus bar electrode 16i extending in the direction intersecting on the n-type thin wire electrode 16f on the one end side of the substrate 11 and connected to the n-type thin wire electrode 16f is formed in multiple layers. An insulating layer 20 is provided between the n-type bus bar electrode 16 located on the p-type thin wire electrode 17f, and the p-type thin wire electrode 17f and the n-type bus bar electrode 16i are not short-circuited. . In this bus bar electrode 16i, an insulating layer 20 having an opening on the base electrode 16a for the n-type thin wire electrode is provided on the substrate 11, a base electrode 16b is provided thereon, and a plating layer 16c is formed on the base electrode 16b. It is constituted by. The n-type electrode 16 is constituted by the n-type thin wire electrode 16f and the bus bar electrode 16i.
　また、基板１１の他端側にｐ型細線電極１７ｆ上で交差する方向に延在して、ｐ型細線電極１７ｆと接続するｐ型バスバー電極１７ｉが多層に形成されている。ｎ型細線電極１６ｆ上に位置するｐ型バスバー電極１７ｉとの間には絶縁層２０が設けられ、ｎ型細線電極１６ｆとｐ型バスバー電極１７とが短絡することが無いように構成されている。このバスバー電極１７ｉは、ｐ型細線電極用の下地電極１７ａ上が開口した絶縁層２０を基板１１上に設け、この上に下地電極１７ｂを設け、この下地電極１７ｂ上にメッキ層１７ｃを形成することにより構成されている。ｐ型細線電極１７ｆとバスバー電極１７ｉとでｐ型電極１７が構成される。 Further, a p-type bus bar electrode 17i extending in a direction intersecting on the p-type thin wire electrode 17f on the other end side of the substrate 11 and connected to the p-type thin wire electrode 17f is formed in multiple layers. An insulating layer 20 is provided between the p-type bus bar electrode 17i located on the n-type thin wire electrode 16f, and the n-type thin wire electrode 16f and the p-type bus bar electrode 17 are not short-circuited. . In this bus bar electrode 17i, an insulating layer 20 having an opening on the base electrode 17a for the p-type thin wire electrode is provided on the substrate 11, a base electrode 17b is provided thereon, and a plating layer 17c is formed on the base electrode 17b. It is constituted by. The p-type electrode 17 is composed of the p-type thin wire electrode 17f and the bus bar electrode 17i.
　また、基板１１の受光面側には、ｎ型のドーピング層からなる表面パッシベーション層１８ａ、及び酸化チタン（ＴｉＯ２）等の反射防止膜１８ｂが形成されている。 On the light receiving surface side of the substrate 11, a surface passivation layer 18a made of an n-type doping layer and an antireflection film 18b such as titanium oxide (TiO 2 ) are formed.
　上記した細線電極１６ｆ、１７ｆは、主として、太陽電池１０に発生した電流を収集する電極である。また、バスバー電極１６ｉ、１７ｉは、細線電極１６ｆ、１７ｆがそれぞれ収集した電流を集め、主に他の太陽電池との接続に用いられる電極である。 The thin wire electrodes 16f and 17f described above are electrodes that mainly collect current generated in the solar cell 10. The bus bar electrodes 16i and 17i are electrodes used to collect currents collected by the thin wire electrodes 16f and 17f, respectively, and are mainly used for connection with other solar cells.
　このように、この実施形態にかかる太陽電池１０は、ｎ型細線電極１６ｆ、ｐ型細線電極１７ｆがバスバー電極１６ｉ、１７ｉの下まで設けることができるので、バスバー電極１６ｉ、１７ｉの部分の無効領域を削減でき、キャリアの収集効率を向上させ、太陽電池の効率を向上させることができる。 Thus, in the solar cell 10 according to this embodiment, the n-type thin wire electrode 16f and the p-type thin wire electrode 17f can be provided up to the bottom of the bus bar electrodes 16i and 17i. Can be reduced, carrier collection efficiency can be improved, and solar cell efficiency can be improved.
　更に、各細線電極の下地電極１６ａ、１７ａと接続するバスバー用の下地電極１６ｂ、１７ｂを設けてメッキによる電極形成を行うことができるので、メッキの際に各細線電極との間の接続不良を防ぎ、良好なメッキ電極が形成できる。この結果、電極の抵抗を小さくでき、抵抗損失が減少する。 Furthermore, since it is possible to perform electrode formation by plating by providing base electrodes 16b and 17b for bus bars that are connected to the base electrodes 16a and 17a of the thin wire electrodes, poor connection between the thin wire electrodes during plating can be achieved. It can prevent and form a good plating electrode. As a result, the resistance of the electrode can be reduced and the resistance loss is reduced.
　次に、上記した太陽電池１０を製造する方法につき、図５～図１４を参照して説明する。図５及び図６は、第１の実施形態にかかる太陽電池の製造工程を示す概略断面図、図７は、同太陽電池の製造工程を示す平面図、図８は、図７のＤ－Ｄ’線断面図、図９は、同太陽電池の製造工程を示す平面図、図１０は、図９のＥ－Ｅ’線断面図、図１１は、図９のＦ－Ｆ’線断面図、図１２は、同太陽電池の製造工程を示す平面図、図１３は、図１２のＧ－Ｇ’線断面図、図１４は、図１２のＨ－Ｈ’線断面図である。 Next, a method for manufacturing the above-described solar cell 10 will be described with reference to FIGS. 5 and 6 are schematic cross-sectional views showing the manufacturing process of the solar cell according to the first embodiment, FIG. 7 is a plan view showing the manufacturing process of the solar cell, and FIG. 8 is a DD of FIG. 9 is a plan view showing a manufacturing process of the solar cell, FIG. 10 is a cross-sectional view taken along the line EE ′ of FIG. 9, and FIG. 11 is a cross-sectional view taken along the line FF ′ of FIG. 12 is a plan view showing the manufacturing process of the solar cell, FIG. 13 is a cross-sectional view taken along the line GG ′ of FIG. 12, and FIG. 14 is a cross-sectional view taken along the line HH ′ of FIG.
　単結晶シリコン基板１１は、シリコン結晶のインゴッドをスライスして得られる。基板１１は、スライスの際にその表面近傍にダメージ層が形成される。そこで、酸性またはアルカリ性の溶液を用いて、ダメージ層をエッチング除去することが好ましい。なお、基板１１の導電型はｎ型でもｐ型でもよいが、この実施形態では、ｎ型単結晶シリコン基板を用いた。また、基板１１の大きさや厚みについても適宜変更が可能である。この実施形態では、厚さ２００μｍ、大きさ１００ｍｍ角、抵抗率１Ωｃｍの基板を用いた。尚、入射する太陽光の反射による損失を抑制するために基板１１の受光面にいわゆるテクスチャと呼ばれるピラミッド状の微細構造を形成する場合には、基板１１の受光面の面方位が（１００）であることが好ましい。 The single crystal silicon substrate 11 is obtained by slicing an ingot of silicon crystal. When the substrate 11 is sliced, a damaged layer is formed in the vicinity of the surface thereof. Therefore, it is preferable to remove the damaged layer by etching using an acidic or alkaline solution. The conductivity type of the substrate 11 may be n-type or p-type. In this embodiment, an n-type single crystal silicon substrate is used. Further, the size and thickness of the substrate 11 can be appropriately changed. In this embodiment, a substrate having a thickness of 200 μm, a size of 100 mm square, and a resistivity of 1 Ωcm was used. When a pyramidal microstructure called a texture is formed on the light receiving surface of the substrate 11 in order to suppress loss due to reflection of incident sunlight, the surface orientation of the light receiving surface of the substrate 11 is (100). Preferably there is.
　図５に示すように、基板１１の受光面の反対側にある裏面にｎ型不純物（例えば、リン）を含むｎ型ペースト材１２ａと、ｐ型不純物（例えば、ボロン）を含むｐ型ペースト材１３ａとが所定のパターンで付着される。ペースト材１２ａ、１３ａを所定のパターンで付着する手段としては、例えばスクリーン印刷やインクジェット印刷などがある。この実施形態では、スクリーン印刷により、ペースト材１２ａ、１３ａを基板１１の裏面上に形成した。ここで、基板１１内に発生する少数キャリアを効率良く収集するため、ｎ型ペースト材１２ａとｐ型ペースト材１３ａとが基板１１の裏面に沿って交互に間隔を空けて形成される。 As shown in FIG. 5, an n-type paste material 12 a containing an n-type impurity (for example, phosphorus) and a p-type paste material containing a p-type impurity (for example, boron) on the back surface opposite to the light receiving surface of the substrate 11. 13a is attached in a predetermined pattern. Examples of means for attaching the paste materials 12a and 13a in a predetermined pattern include screen printing and inkjet printing. In this embodiment, the paste materials 12a and 13a are formed on the back surface of the substrate 11 by screen printing. Here, in order to efficiently collect the minority carriers generated in the substrate 11, the n-type paste material 12 a and the p-type paste material 13 a are formed along the back surface of the substrate 11 at intervals.
　次に、基板１１は、例えば８００℃～９００℃程度の温度、この実施形態では、８５０℃の温度で３０分間に加熱して熱拡散を行う。これにより、ｎ型ペースト材１２ａに含まれるｎ型不純物（リン）およびｐ型ペースト材１３ａに含まれるｐ型不純物（ボロン）が基板１１中に拡散され、図６に示すように、基板１１の裏面に沿って、複数のｎ型領域１２およびｐ型領域１３が交互に間隔をあけて形成される。裏面側の接合は、例えば、ｎ型領域１２、ｐ型領域１３ともに、サイズ０．８ｍｍ×９８ｍｍ、ギャップ０．４ｍｍ、接合深さ０．３μｍである。そして、ｐ型領域１３が４１本、ｎ型領域１２が４０本としている。尚、図では、簡略化して記載しているので、本数、厚みなどは，実際のものとは異なっている。 Next, the substrate 11 is heated and diffused for 30 minutes at a temperature of about 800 ° C. to 900 ° C., for example, 850 ° C. in this embodiment. As a result, the n-type impurity (phosphorus) contained in the n-type paste material 12a and the p-type impurity (boron) contained in the p-type paste material 13a are diffused into the substrate 11, and as shown in FIG. A plurality of n-type regions 12 and p-type regions 13 are alternately formed along the back surface. For example, both the n-type region 12 and the p-type region 13 have a size of 0.8 mm × 98 mm, a gap of 0.4 mm, and a junction depth of 0.3 μm. The number of p-type regions 13 is 41 and the number of n-type regions 12 is 40. In addition, in the figure, since it has simplified and described, a number, thickness, etc. differ from an actual thing.
　この後、基板１１表面に形成された酸化膜を、希フッ酸（２％）を用いて除去し、そして、受光面に、ｎ型のドーピング層からなる表面パッシベーション層１８ａを形成し、更に、パッシベーション層１８ａの上に反射防止膜１８ｂを熱ＣＶＤ（Chemical Vapor Deposition）にて，約８０ｎｍ厚さで形成した。 Thereafter, the oxide film formed on the surface of the substrate 11 is removed using dilute hydrofluoric acid (2%), and a surface passivation layer 18a made of an n-type doping layer is formed on the light receiving surface. An antireflection film 18b is formed on the passivation layer 18a by thermal CVD (Chemical Vapor Deposition) to a thickness of about 80 nm.
　続いて、図７及び図８に示すように、基板１１の裏面側のｎ型領域１２、ｐ型領域１３に、ｎ型細線電極用の下地電極１６ａ、ｐ型細線電極用の下地電極１７ａを形成した。それぞれの下地用電極１６ａ、１７ａは、サイズ０．８ｍｍ×９８ｍｍ、厚みは１μｍ～４μｍ、この実施形態では、２μｍの銅を、メタルマスクを用いたスパッタ法により形成した。 Subsequently, as shown in FIG. 7 and FIG. 8, the base electrode 16 a for the n-type thin wire electrode and the base electrode 17 a for the p-type thin wire electrode are provided on the n-type region 12 and the p-type region 13 on the back surface side of the substrate 11. Formed. Each of the underlying electrodes 16a and 17a is 0.8 mm × 98 mm in size, 1 μm to 4 μm in thickness, and in this embodiment, 2 μm of copper is formed by sputtering using a metal mask.
　図９～図１１に示すように、下地用電極１６ａ、１７ａを覆う形で、幅１０ｍｍ×長さ１００ｍｍの長方形の絶縁材２０を基板１１の両端にそれぞれ設ける。この絶縁材２０は、一方の電極端を全て覆う形で形成されている。すなわち、ｎ型のバスバー電極が設けられる側には、ｎ型細線電極用の下地電極１６ａ上が開口し、ｐ型細線電極用の下地電極１７ａを覆うようにパターニングされた絶縁層２０が設けられる。同様に、ｐ型のバスバー電極が設けられる側には、ｐ型細線電極用の下地電極１７ａ上が開口し、ｎ型細線電極用の下地電極１６ａを覆うようにパターニングされた絶縁層２０が設けられる。なお、それぞれ開口する領域の大きさは幅０．８ｍｍ、長さ２ｍｍである。 As shown in FIGS. 9 to 11, rectangular insulating materials 20 each having a width of 10 mm and a length of 100 mm are provided on both ends of the substrate 11 so as to cover the base electrodes 16a and 17a. This insulating material 20 is formed so as to cover all of one electrode end. That is, on the side where the n-type bus bar electrode is provided, an insulating layer 20 is provided which is opened on the base electrode 16a for the n-type thin wire electrode and patterned so as to cover the base electrode 17a for the p-type thin wire electrode. . Similarly, on the side where the p-type bus bar electrode is provided, there is provided an insulating layer 20 which is open on the base electrode 17a for the p-type thin wire electrode and patterned so as to cover the base electrode 16a for the n-type thin wire electrode. It is done. The size of each open area is 0.8 mm wide and 2 mm long.
　この絶縁層２０は、ポリイミド樹脂を膜厚１μｍから１０μｍ、この実施形態では、５μｍの厚さで、ディスペンサーにより塗布し、加熱温度２００℃、加熱時間５分で形成した。 The insulating layer 20 was formed by applying a polyimide resin with a film thickness of 1 μm to 10 μm, in this embodiment 5 μm, with a dispenser and heating temperature of 200 ° C. and heating time of 5 minutes.
　続いて、図１２～図１４に示すように、下地用電極１６ａと接続するバスバー用の下地電極１６ｂと、下地用電極１７ａと接続するバスバー用の下地電極１７ｂとを絶縁層２０の上に形成した。この下地電極１６ｂ、１７ｂは、この実施形態では、幅８ｍｍ×長さ９８ｍｍで、各下地電極と接続する枝部の幅が０．８ｍｍである。下地用電極１６ｂ、１７ｂは、厚みは１μｍ～４μｍ、この実施形態では、２μｍの銅を、メタルマスクを用いたスパッタ法により形成した。この際、各細線電極用の下地電極１６ａ、１７ａ上で、下地電極１６ｂ、１７ｂが長さ２ｍｍ程度重なるようにして，電気的接続を確保している。 Subsequently, as shown in FIGS. 12 to 14, a bus bar base electrode 16b connected to the base electrode 16a and a bus bar base electrode 17b connected to the base electrode 17a are formed on the insulating layer 20. did. In this embodiment, the base electrodes 16b and 17b have a width of 8 mm × a length of 98 mm, and a branch portion connected to each base electrode has a width of 0.8 mm. The base electrodes 16b and 17b had a thickness of 1 μm to 4 μm, and in this embodiment, 2 μm of copper was formed by sputtering using a metal mask. At this time, on the base electrodes 16a and 17a for the respective thin wire electrodes, the base electrodes 16b and 17b are overlapped with each other by about 2 mm in length to ensure electrical connection.
　その後、下地電極１６ａ、１６ｂ、１７ａ、１７ｂに対して、個別に給電しながら電界メッキを行い、メッキ層１６ｃ、１７ｃを形成して、図１～図５に示すように、この実施形態の太陽電池１０が得られる。メッキは、アノードを含りん銅、カソードを下地電極１６ａ、１６ｂ又は１７ａ、１７ｂとし、メッキ厚１０μｍ～３０μｍ、この実施形態では、１０μｍとした。メッキ条件は、メッキ電流は２Ａ、メッキ液は硫酸銅、電極間距離は５ｃｍ、温度は４０℃とした。 Thereafter, the base electrodes 16a, 16b, 17a, and 17b are subjected to electric field plating while being individually fed to form plated layers 16c and 17c. As shown in FIGS. Battery 10 is obtained. In the plating, the anode was phosphor-containing copper, the cathode was the base electrode 16a, 16b or 17a, 17b, and the plating thickness was 10 μm to 30 μm, and in this embodiment, 10 μm. As for the plating conditions, the plating current was 2A, the plating solution was copper sulfate, the distance between the electrodes was 5 cm, and the temperature was 40 ° C.
　このように、メッキで電極の厚みを大きくすることができ、抵抗損失を少なくできる。 Thus, the thickness of the electrode can be increased by plating, and the resistance loss can be reduced.
　表１並びに図２９に、電極厚さと抵抗損失の関係をシミュレーションした結果を示す。測定は、セル面積１００ｃｍ２、銅抵抗率１．７２μΩｃｍ、抵抗損失は銅電極の長さ方向で生じると仮定、電極幅は０．８ｍｍ、電極本数は４１本、パターン形状は図１と同様とした。尚、前述と同様に図１は簡略されているので、電極本数は図１に示す本数とは異なる。 Table 1 and FIG. 29 show the simulation results of the relationship between the electrode thickness and the resistance loss. Measurement is based on the assumption that the cell area is 100 cm 2 , the copper resistivity is 1.72 μΩcm, the resistance loss occurs in the length direction of the copper electrode, the electrode width is 0.8 mm, the number of electrodes is 41, and the pattern shape is the same as in FIG. did. Since FIG. 1 is simplified as described above, the number of electrodes is different from the number shown in FIG.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　表１および図２９より、電極の厚さが１０μｍ以上であると、電極でのパワー損失が発電電力の０．５％以下になり、実用上問題が無くなることが分かる。このように、この実施形態によれば、細線電極用の下地電極１６ａ、１７ａとバスバー電極用の下地電極１６ｂ、１７ｂを簡単にして確実に接続できる。従って、メッキの給電の際に，全下地電極に確実に給電が行え、全下地電極上に最適な厚さのメッキ層を形成することができる。この結果、全ての電極の膜厚を１０μｍ以上に形成することができ、電極でのパワー損失を限りなく小さくできる。 From Table 1 and FIG. 29, it can be seen that when the electrode thickness is 10 μm or more, the power loss at the electrode is 0.5% or less of the generated power, and there is no practical problem. Thus, according to this embodiment, the base electrodes 16a and 17a for thin wire electrodes and the base electrodes 16b and 17b for bus bar electrodes can be easily and reliably connected. Therefore, when the plating power is supplied, power can be reliably supplied to all the underlying electrodes, and a plating layer having an optimum thickness can be formed on all the underlying electrodes. As a result, the thickness of all the electrodes can be formed to 10 μm or more, and the power loss at the electrodes can be reduced as much as possible.
　上記した実施形態においては、下地電極として、蒸着金属膜を用いたが、金属膜以外に、インジウム酸化物とスズ酸化物との混合物からなる透明導電膜、酸化亜鉛系の透明導電膜などを下地電極として用いることも可能である。 In the above-described embodiment, a vapor-deposited metal film is used as the base electrode. However, in addition to the metal film, a transparent conductive film made of a mixture of indium oxide and tin oxide, a zinc oxide-based transparent conductive film, or the like is used as the base electrode. It can also be used as an electrode.
　次に、第２の実施形態につき、図１５～図１６に従い説明する。図１５は、第２の実施形態にかかる太陽電池の平面図、図１６は、図１５のＩ－Ｉ’線断面図である。 Next, a second embodiment will be described with reference to FIGS. FIG. 15 is a plan view of a solar cell according to the second embodiment, and FIG. 16 is a cross-sectional view taken along the line I-I ′ of FIG.
　上記した第１の実施形態は、細線電極用の下地電極と接続するバスバー電極用下地電極をスパッタ法により形成した。これに対して、この第２の実施形態は、導電性接着剤２１を用いてバスバー用下地電極１６ｈ、１７ｈをそれぞれの細線電極用の下地電極１６ａ、１７ａに接続する。この実施形態におけるバスバー用下地電極１６ｈ、１７ｈは、厚さ５μｍ～５０μｍの銅箔板からなる。具体的には、この第２の実施形態においては、幅８ｍｍ、長さ９８ｍｍ、厚さ１０μｍの銅箔板を用いた。尚、絶縁層２０を形成するまでは、前述した第１の実施形態と同様である。 In the first embodiment described above, the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method. On the other hand, in the second embodiment, the bus bar base electrodes 16h and 17h are connected to the base electrodes 16a and 17a for the thin wire electrodes using the conductive adhesive 21. The bus bar base electrodes 16h and 17h in this embodiment are made of a copper foil plate having a thickness of 5 μm to 50 μm. Specifically, in the second embodiment, a copper foil plate having a width of 8 mm, a length of 98 mm, and a thickness of 10 μm was used. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
　導電性樹脂接着剤２１は、樹脂接着成分とその中に分散した導電性粒子とを含んで構成される。この導電性接着剤２１を絶縁層２０の上にディスペンサーにて塗布し、その上に銅箔板からなる下地用電極１６ｈ、１７ｈを載せる。下地用電極１６ｈ、１７ｈを押圧しながら、導電性接着剤を硬化させ、下地用電極１６ａ、１７ａにそれぞれ下地電極１６ｈ、１７ｈを接続させて下地用電極を形成する。 The conductive resin adhesive 21 includes a resin adhesive component and conductive particles dispersed therein. The conductive adhesive 21 is applied onto the insulating layer 20 with a dispenser, and base electrodes 16h and 17h made of a copper foil plate are placed thereon. The conductive adhesive is cured while pressing the underlying electrodes 16h and 17h, and the underlying electrodes 16h and 17h are connected to the underlying electrodes 16a and 17a, respectively, thereby forming the underlying electrodes.
　導電性樹脂接着剤２１の樹脂接着成分は熱硬化性樹脂を含有する組成物からなり、例えば、エポキシ樹脂、フェノキシ樹脂、アクリル樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリカーボネート樹脂を用いることができる。これらの熱硬化性樹脂は、１種を単独で用いるか２種以上を組み合わせて用いられ、エポキシ樹脂、フェノキシ樹脂及びアクリル樹脂からなる群より選ばれる１種以上の熱硬化性樹脂が好ましい。他にも樹脂接着成分として、紫外線硬化型の樹脂を使用することも可能である。 The resin adhesive component of the conductive resin adhesive 21 is composed of a composition containing a thermosetting resin, and for example, epoxy resin, phenoxy resin, acrylic resin, polyimide resin, polyamide resin, and polycarbonate resin can be used. These thermosetting resins are used singly or in combination of two or more, and one or more thermosetting resins selected from the group consisting of epoxy resins, phenoxy resins and acrylic resins are preferable. In addition, it is possible to use an ultraviolet curable resin as a resin adhesive component.
　導電性樹脂接着剤２１の導電性粒子としては、例えば、金粒子、銀粒子、銅粒子及びニッケル粒子などの金属粒子、或いは、金メッキ粒子、銅メッキ粒子及びニッケルメッキ粒子などの導電性又は絶縁性の核粒子の表面を金属層などの導電層で被覆してなる導電性粒子が用いられる。 Examples of the conductive particles of the conductive resin adhesive 21 include metal particles such as gold particles, silver particles, copper particles, and nickel particles, or conductive or insulating properties such as gold plated particles, copper plated particles, and nickel plated particles. Conductive particles obtained by coating the surfaces of the core particles with a conductive layer such as a metal layer are used.
　導電性接着剤２１としては、液状のものやフィルム状に形成されたものを用いることができる。導電性接着剤２１の上に銅箔板からなる下地用電極１６ｈ、１７ｈを載せ、例えば、１～２ＭＰａの程度の加圧下で２００℃で５分間加熱して、導電性接着剤２１を硬化させ、下地用電極１６ａ、１７ａにそれぞれ下地電極１６ｈ、１７ｈを接着させる。尚、この加熱の際には、銅箔の酸化防止のために、窒素雰囲気中で行うことが好ましい。 As the conductive adhesive 21, a liquid or a film can be used. The underlying electrodes 16h and 17h made of a copper foil plate are placed on the conductive adhesive 21 and heated at 200 ° C. for 5 minutes under a pressure of about 1 to 2 MPa, for example, to cure the conductive adhesive 21. The base electrodes 16h and 17h are bonded to the base electrodes 16a and 17a, respectively. This heating is preferably performed in a nitrogen atmosphere in order to prevent oxidation of the copper foil.
　このように、下地電極１６ａ、１６ｈ、１７ａ、１７ｈを形成した後、前述した第１の実施形態と同様にして、それぞれにメッキを施して電極１６、１７を形成して、この発明の太陽電池が得られる。なお、ｐ側とｎ側は同時にメッキを行うことも可能である。 After forming the base electrodes 16a, 16h, 17a, and 17h in this manner, the electrodes 16 and 17 are formed by plating the same as in the first embodiment described above, so that the solar cell of the present invention is formed. Is obtained. The p side and the n side can be plated simultaneously.
　次に、第３の実施形態につき、図１７～図１８に従い説明する。図１７は、第３の実施形態にかかる太陽電池の平面図、図１８は、図１７のＦ－Ｆ’線断面図である。 Next, a third embodiment will be described with reference to FIGS. FIG. 17 is a plan view of a solar cell according to the third embodiment, and FIG. 18 is a cross-sectional view taken along the line F-F ′ of FIG.
　上記した第１の実施形態は、細線電極用の下地電極と接続するバスバー電極用下地電極をスパッタ法により形成した。これに対して、この第３の実施形態は、熱硬化型の導電ペーストを用いてバスバー用下地電極１６ｄ、１７ｄをそれぞれの細線電極用の下地電極１６ａ、１７ａに接続する。尚、絶縁層２０を形成するまでは、前述した第１の実施形態と同様である。 In the first embodiment described above, the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method. In contrast, in the third embodiment, the bus bar base electrodes 16d and 17d are connected to the base electrodes 16a and 17a for the thin wire electrodes by using a thermosetting conductive paste. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
　バスバー用下地電極１６ｄ、１７ｄは、導電性ペーストとして，例えば、熱硬化型のＡｇペーストを用い、厚さ２μｍ～２０μｍ、この第３の実施形態においては、幅８ｍｍ、長さ９８ｍｍ、厚さ１０μｍのものスクリーン印刷により形成した。硬化条件は、１８０℃で３０分である。 For the bus bar base electrodes 16d and 17d, for example, a thermosetting Ag paste is used as the conductive paste, and the thickness is 2 μm to 20 μm. In the third embodiment, the width is 8 mm, the length is 98 mm, and the thickness is 10 μm. Formed by screen printing. The curing condition is 180 ° C. for 30 minutes.
　Ａｇペーストを絶縁層２０の上にスクリーン印刷により形成し、２００℃で５分間加熱して、Ａｇペーストを硬化させ，それぞれの細線電極用の下地電極１６ａ、１７ａに接続するＡｇペーストで形成されたバスバー用下地電極１６ｄ、１７ｄが形成される。 An Ag paste was formed on the insulating layer 20 by screen printing, heated at 200 ° C. for 5 minutes to cure the Ag paste, and formed with an Ag paste connected to the underlying electrodes 16a and 17a for the thin wire electrodes. Bus bar base electrodes 16d and 17d are formed.
　このように、下地電極１６ａ、１６ｄ、１７ａ、１７ｄを形成した後、前述した第１の実施形態と同様にして、それぞれメッキを施して電極１６、１７を形成して、第３の実施形態の太陽電池が得られる。 In this manner, after forming the base electrodes 16a, 16d, 17a, and 17d, similarly to the first embodiment described above, plating is performed to form the electrodes 16 and 17, respectively. A solar cell is obtained.
　次に、第４の実施形態につき、図１９～図２１に従い説明する。図１９は、第４の実施形態にかかる太陽電池の要部断面図、図２０は、第４の実施形態にかかる太陽電池の平面図、図２１は、図２０のＧ－Ｇ’線断面図である。 Next, a fourth embodiment will be described with reference to FIGS. 19 is a cross-sectional view of the main part of the solar cell according to the fourth embodiment, FIG. 20 is a plan view of the solar cell according to the fourth embodiment, and FIG. 21 is a cross-sectional view taken along the line GG ′ of FIG. It is.
　上記した第１の実施形態は、細線電極用の下地電極と接続するバスバー電極用下地電極をスパッタ法により形成した。これに対して、この第４の実施形態は、図１９に示すように、銅箔１９をそれぞれの細線電極用の下地電極１６ａ、１７ａに溶接して接続するものである。尚、絶縁層２０を形成するまでは、前述した第１の実施形態と同様である。 In the first embodiment described above, the base electrode for the bus bar electrode connected to the base electrode for the fine wire electrode is formed by the sputtering method. On the other hand, in the fourth embodiment, as shown in FIG. 19, the copper foil 19 is connected by welding to the base electrodes 16a and 17a for the thin wire electrodes. The process until the insulating layer 20 is formed is the same as that in the first embodiment.
　溶接により、それぞれ下地電極１６ａ、１７ａ及び銅箔１９を形成した後、図２０、図２１に示すように、それぞれの電極にメッキを施して、銅箔１９の周りにメッキ層１９ａを形成して、バスバー電極１６ｅ，１７ｅを含む電極を形成するものである。銅箔１９を溶接しただけでは機械的強度が弱いことが懸念されるが、銅箔１９を含め、下地電極１６ａ、１７ａの周囲にメッキ層１９ａを形成することで、薄膜１９の周りと下地電極１６ａ、１７ａとの間がメッキ層１９ａで覆われ、十分な機械的強度が確保できる。 After the base electrodes 16a and 17a and the copper foil 19 are formed by welding, as shown in FIGS. 20 and 21, each electrode is plated to form a plating layer 19a around the copper foil 19. The electrodes including the bus bar electrodes 16e and 17e are formed. Although it is feared that the mechanical strength is weak only by welding the copper foil 19, by forming the plating layer 19a around the base electrodes 16a and 17a including the copper foil 19, the periphery of the thin film 19 and the base electrode A space between 16a and 17a is covered with a plating layer 19a, and sufficient mechanical strength can be secured.
　尚、銅箔１９の代わりに金属ワイヤを用いて溶接により接続し、その後メッキを施しても良い。 In addition, instead of the copper foil 19, a metal wire may be used for connection by welding, and then plating may be performed.
　なお、下地電極は、上記した以外に、金属粉末を射出して焼結させた金属粉焼成物を用いることが可能である。 In addition to the above, it is possible to use a fired metal powder obtained by injecting and sintering a metal powder as the base electrode.
　次に、他の実施形態の太陽電池につき説明する。上記した実施形態の太陽電池においては、拡散層により，裏面接合を形成したものである。図２２に示す太陽電池は、ヘテロ接合の界面を改善したいわゆるHetero-junction with Intrinsic Thin-layer構造を用いた裏面接合型太陽電池である。ｎ型シリコン基板１１の受光面には、パッシベーション膜３１を形成している。 Next, solar cells according to other embodiments will be described. In the solar cell of the above-described embodiment, the back surface junction is formed by the diffusion layer. The solar cell shown in FIG. 22 is a back junction solar cell using a so-called Hetero-junction with Intrinsic thin-layer structure in which the heterojunction interface is improved. A passivation film 31 is formed on the light receiving surface of the n-type silicon substrate 11.
　基板１１の裏面には、略全面に真性のアモルファスシリコン層３０が形成され、その上部にｎ型アモルファスシリコン層１２ｉ、ｐ型アモルファスシリコン層１３ｉが櫛型に交互に形成されている。そして、このｎ型、ｐ型アモルファスシリコン層１２ｉ、１３ｉにそれぞれ取り出し用の細線電極１６、１７が設けられ、太陽電池で発生した電荷をホールはｐ側、電子はｎ側から取り出す。 On the back surface of the substrate 11, an intrinsic amorphous silicon layer 30 is formed on substantially the entire surface, and an n-type amorphous silicon layer 12i and a p-type amorphous silicon layer 13i are alternately formed in a comb shape thereon. The n-type and p-type amorphous silicon layers 12i and 13i are provided with thin wire electrodes 16 and 17 for taking out, respectively, and the charges generated in the solar cell are taken out from the p side and the electrons are taken out from the n side.
　前述した実施形態と同様に、図示はしないが、基板１１の一端部側に細線電極１６上で交差する方向に延在して、細線電極１６と接続するｎ型バスバー電極が多層に形成されている。細線電極１７上に位置するｎ型バスバー電極との間には絶縁層が設けられ、ｐ型細線電極１７とｎ型バスバー電極とが短絡することが無いように構成されている。 Similar to the above-described embodiment, although not shown, an n-type bus bar electrode extending in a direction intersecting on the thin wire electrode 16 on one end side of the substrate 11 and connected to the thin wire electrode 16 is formed in multiple layers. Yes. An insulating layer is provided between the n-type bus bar electrode and the n-type bus bar electrode positioned on the fine wire electrode 17 so that the p-type fine wire electrode 17 and the n-type bus bar electrode are not short-circuited.
　また、基板１１の他端側に細線電極１７上で交差する方向に延在して、細線電極１７と接続するｐ型バスバー電極が多層に形成されている。ｎ型細線電極１６上に位置するｐ型バスバー電極との間には絶縁層が設けられ、ｎ型細線電極１６とｐ型バスバー電極とが短絡することが無いように構成されている。 In addition, a p-type bus bar electrode that extends in the direction intersecting on the thin wire electrode 17 on the other end side of the substrate 11 and is connected to the thin wire electrode 17 is formed in multiple layers. An insulating layer is provided between the n-type thin wire electrode 16 and the p-type bus bar electrode, and the n-type fine wire electrode 16 and the p-type bus bar electrode are not short-circuited.
　太陽電池の素子構造以外は前述の実施形態と同様に構成される。 The configuration other than the element structure of the solar cell is the same as that of the above-described embodiment.
　次に更に異なる実施形態の太陽電池につき説明する。上記した太陽電池は，裏面側に半導体接合が設けられているが、図２３に示す例は、電極を裏面側に設けたものであり、半導体接合は受光面側に設けている。すなわち、ｎ又はｐ型の半導体基板１１の表面側にｐ又はｎ型の不純物領域１３が設けられる。基板１１の裏面側には、基板１１と同極性の電極１６が設けられ、表面側の不純物領域１３の電極はスルーホール３１を介して基板１１の裏面側に設けられる。 Next, solar cells of different embodiments will be described. The above-described solar cell is provided with a semiconductor junction on the back surface side, but the example shown in FIG. 23 is an electrode provided on the back surface side, and the semiconductor junction is provided on the light receiving surface side. That is, the p or n type impurity region 13 is provided on the surface side of the n or p type semiconductor substrate 11. An electrode 16 having the same polarity as that of the substrate 11 is provided on the back side of the substrate 11, and an electrode of the impurity region 13 on the front side is provided on the back side of the substrate 11 through a through hole 31.
　この電極１６、１７は、前述した電極と同様である。図２２及び図２３に示した太陽電池の裏面側に設けた電極に際して、前述の実施形態と同様に、細線電極用の下地電極とバスバー用の下地電極とを絶縁層を介して多層に配線するように構成すればよい。 The electrodes 16 and 17 are the same as the electrodes described above. In the electrodes provided on the back surface side of the solar cell shown in FIGS. 22 and 23, the base electrode for the fine wire electrode and the base electrode for the bus bar are wired in multiple layers through the insulating layer, as in the above-described embodiment. What is necessary is just to comprise.
　上記の各実施形態の太陽電池を複数個用い、複数の太陽電池を電気的に接続して太陽電池モジュールを形成する。次に、この実施形態の太陽電池を用いた太陽電池モジュールにつき図２４～図２６を参照して説明する。図２４は、各実施形態の太陽電池を用いた太陽電池モジュールを示す概略断面図、図２５及び図２６は、同太陽電池と配線タブとの接続を示す模式的平面図である。 A plurality of solar cells of each of the above embodiments are used, and a plurality of solar cells are electrically connected to form a solar cell module. Next, a solar cell module using the solar cell of this embodiment will be described with reference to FIGS. FIG. 24 is a schematic cross-sectional view showing a solar cell module using the solar cell of each embodiment, and FIGS. 25 and 26 are schematic plan views showing the connection between the solar cell and a wiring tab.
　太陽電池モジュールは、一方の太陽電池１０のｐ側電極１７と他方の太陽電池１０のｎ側電極１６とを配線タブ５０を用いて電気的に接続し、ストリング状にする。さらに、図２６に示すように、太陽電池モジュールには、ストリング間を接続する渡り配線５２を有する。端部に位置する太陽電池１０からは、電極１７に配線タブ５１を介して配線５２が接続され、この配線５２が端子ボックス（図示しない）の端子と接続される。この配線５２と太陽電池１０との間には絶縁シート５５を介在させ、配線５２と太陽電池１０の電極との短絡を防止している。図２６に示すように、隣り合うストリング同士のバスバー電極は極性が異なるように配置され、渡り配線５２を用いて両ストリングを接続する際に容易に接続できるように考慮されている。 The solar cell module electrically connects the p-side electrode 17 of one solar cell 10 and the n-side electrode 16 of the other solar cell 10 using a wiring tab 50 to form a string shape. Furthermore, as shown in FIG. 26, the solar cell module has a crossover wiring 52 that connects the strings. From the solar cell 10 located at the end, a wiring 52 is connected to the electrode 17 via a wiring tab 51, and this wiring 52 is connected to a terminal of a terminal box (not shown). An insulating sheet 55 is interposed between the wiring 52 and the solar cell 10 to prevent a short circuit between the wiring 52 and the electrode of the solar cell 10. As shown in FIG. 26, the bus bar electrodes of adjacent strings are arranged so as to have different polarities, and are considered so that they can be easily connected when connecting both strings using the crossover wiring 52.
　配線５２は、厚さ１００μｍ～３００μｍ程度、幅６ｍｍ程度の銅箔にその全面を半田コートしたものを所定の長さに切断し、配線タブ等に半田付けされている。また、出力配線の表面は、絶縁フィルムによって被覆されている。 The wiring 52 is a copper foil having a thickness of about 100 μm to 300 μm and a width of about 6 mm, and its entire surface is solder-coated, cut into a predetermined length, and soldered to a wiring tab or the like. The surface of the output wiring is covered with an insulating film.
　図２４に示すように、太陽電池モジュールは、受光面側からガラス等の表面保護部材４１、ＥＶＡ等の透光性を有する封止材４３、配線タブ５０、渡り配線５２等で接続された複数の太陽電池１０、裏面側の透光性の封止材４３、バックシートなどからなる裏面保護部材４２をこの順序で積み重ね、ラミネートされて一体化される。このラミネート処理により、太陽電池１０と配線タブ３０とが接続された状態で一体化される。 As shown in FIG. 24, the solar cell module includes a plurality of solar cell modules connected from the light receiving surface side by a surface protection member 41 such as glass, a light-transmitting sealing material 43 such as EVA, a wiring tab 50, a crossover wiring 52, and the like. The solar cell 10, the rear surface side light-transmitting sealing material 43, and the back surface protection member 42 composed of a back sheet and the like are stacked in this order, laminated and integrated. By this laminating process, the solar cell 10 and the wiring tab 30 are integrated in a connected state.
　また、図２６に示すように、バスバー電極１７（１６）に接続した配線タブ５１が渡り配線５２に接続され、そして、引き出し線として取り出される。このように、配線タブ５１、渡り配線５２がｎ型電極１６、ｐ型電極１７の上を横切ることになる。このような場合には、配線による短絡を防止するために、充填材または絶縁材等からなる絶縁シート５５が配線５１、５２と太陽電池１０との間に挟み込まれる。このように、配線５１、５２と太陽電池１０との間に絶縁シート５５を挟み込んで配線を行うことで、渡り配線５２の配置に余裕ができ、モジュール化が容易になる。 Further, as shown in FIG. 26, the wiring tab 51 connected to the bus bar electrode 17 (16) is connected to the crossover wiring 52 and is taken out as a lead line. Thus, the wiring tab 51 and the transition wiring 52 cross over the n-type electrode 16 and the p-type electrode 17. In such a case, an insulating sheet 55 made of a filler or an insulating material is sandwiched between the wirings 51 and 52 and the solar cell 10 in order to prevent a short circuit due to the wiring. In this manner, by performing the wiring by sandwiching the insulating sheet 55 between the wirings 51 and 52 and the solar cell 10, there is a margin in the arrangement of the transitional wiring 52, and modularization becomes easy.
　そして、図２５、２６に示すように、太陽電池１０、１０を直列に接続する場合には、ｎ型電極１６とｐ型電極１７が配線タブ５０で接続される。 25 and 26, when the solar cells 10 and 10 are connected in series, the n-type electrode 16 and the p-type electrode 17 are connected by the wiring tab 50.
　バスバー電極を設ける位置は、端部には限らない。例えば、図２７に示すように、一方のバスバー電極１６ｘは端部に，他方のバスバー電極１７ｘを端部から所定の距離を隔てて設けることができる。図２８に示すように、バスバー電極１７を端部から所定の距離を隔てることで、渡り配線５２の重なりを減らすようなレイアウトが可能になり、太陽電池モジュールの配線の重なりを少なくできるという利点が得られる。 The position where the bus bar electrode is provided is not limited to the end. For example, as shown in FIG. 27, one bus bar electrode 16x can be provided at the end, and the other bus bar electrode 17x can be provided at a predetermined distance from the end. As shown in FIG. 28, by separating the bus bar electrode 17 from the end portion by a predetermined distance, a layout that reduces the overlapping of the crossover wirings 52 is possible, and there is an advantage that the overlapping of wirings of the solar cell module can be reduced. can get.
　また、上記した実施形態においては、電極は、電解メッキを用いて形成しているが、無電解メッキで形成してもよい。なお、電極として無電解メッキで銅を析出させるためには、銅よりイオン化傾向の大きい錫やニッケルなどの金属で下地電極を形成すればよい。また、無電解メッキ液としては、例えば硫酸第二銅、エチレンジアミン四酢酸、ホルムアルデヒド、及び水酸化アルカリの少なくとも一つを主成分としているものを用いることができる。  In the above-described embodiment, the electrode is formed by electrolytic plating, but may be formed by electroless plating. In order to deposit copper by electroless plating as the electrode, the base electrode may be formed of a metal such as tin or nickel that has a higher ionization tendency than copper. In addition, as the electroless plating solution, for example, a solution containing at least one of cupric sulfate, ethylenediaminetetraacetic acid, formaldehyde, and alkali hydroxide as a main component can be used.
　今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。この発明の範囲は、上記した実施の形態の説明ではなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。 The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiment but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.
　１０　太陽電池
　１１　基板
　１２　ｎ型領域
　１３　ｐ型領域
　１６　ｎ型電極
　１６ｆ　ｎ型細線電極
　１６ｉ　ｎ型バスバー電極
　１７　ｐ型電極
　１７ｆ　ｐ型細線電極
　１７ｉ　ｐ型バスバー電極
　２０　絶縁層 DESCRIPTION OF SYMBOLS 10 Solar cell 11 Substrate 12 N-type area | region 13 p-type area | region 16 n-type electrode 16f n-type thin wire electrode 16i n-type bus-bar electrode 17 p-type electrode 17f p-type thin-wire electrode 17i p-type bus-bar electrode 20 Insulating layer

Claims (8)

  1. 　半導体基板と、
    　前記半導体基板の裏面上に形成された電極部とを備え、
    　前記電極部は、
    　前記裏面上に形成された複数の第１細線電極と、
    　前記第１細線電極に隣接して形成された複数の第２細線電極と、
    　前記第１細線電極及び前記第２細線電極上で交差する方向に延在して設けられ、前記複数の第１細線電極を互い接続するとともに、前記第２細線電極とは絶縁された第１バスバー電極と、
    　前記第２細線電極上及び前記第１細線電極上で交差する方向に延在して設けられ、前記複数の第２細線電極を互い接続するとともに、前記第１細線電極とは絶縁された第２バスバー電極と、
    　を有する、太陽電池。     A semiconductor substrate;
    An electrode portion formed on the back surface of the semiconductor substrate,
    The electrode part is
    A plurality of first thin wire electrodes formed on the back surface;
    A plurality of second thin wire electrodes formed adjacent to the first thin wire electrode;
    A first bus bar that extends in a direction intersecting on the first thin wire electrode and the second thin wire electrode, connects the plurality of first thin wire electrodes to each other, and is insulated from the second thin wire electrode Electrodes,
    The second thin line electrode extends in a direction intersecting on the second thin line electrode and the first thin line electrode, connects the plurality of second thin line electrodes to each other, and is insulated from the first thin line electrode. A busbar electrode;
    A solar cell.
  2. 　前記第１バスバー電極と第２バスバー電極とは間隔を開けて形成されている、請求項１に記載の太陽電池。 The solar cell according to claim 1, wherein the first bus bar electrode and the second bus bar electrode are formed with an interval therebetween.
  3. 　前記第１細線電極、第１バスバー電極、第２細線電極、及び前記第２バスバー電極は、下地電極上にメッキにより形成された電極である、請求項１又は請求項２に記載の太陽電池。 The solar cell according to claim 1 or 2, wherein the first thin wire electrode, the first bus bar electrode, the second thin wire electrode, and the second bus bar electrode are electrodes formed on a base electrode by plating.
  4. 　前記第１バスバー電極と第２細線電極との間に絶縁層が設けられ、前記第２バスバー電極と第２細線電極との間に絶縁層が設けられている、請求項１～請求項３のいずれか１項に記載の太陽電池。 The insulating layer is provided between the first bus bar electrode and the second thin wire electrode, and the insulating layer is provided between the second bus bar electrode and the second thin wire electrode. The solar cell of any one of Claims.
  5. 　前記下地電極は、蒸着金属膜、導電性樹脂、金属箔、金属ワイヤ、透明導電膜又は金属粉焼成物のいずれかから選択されている、請求項３に記載の太陽電池。 The solar cell according to claim 3, wherein the base electrode is selected from any one of a deposited metal film, a conductive resin, a metal foil, a metal wire, a transparent conductive film, and a fired metal powder.
  6. 　半導体基板を用意し、
    　前記半導体基板の裏面上に、複数の第１細線電極用の下地電極と、前記第１細線電極用の下地電極に隣接する複数の第２細線電極用の下地電極を形成し、
    　前記第１細線電極用の下地電極及び第２細線電極用の下地電極上で交差する方向に延在する方向に配置され、前記複数の第１細線電極用の下地電極を互い接続するとともに、前記第２細線電極用の下地電極とは絶縁された第１バスバー電極用の下地電極を形成し、
    　前記第２細線電極用の下地電極及び第１細線電極用の下地電極上で交差する方向に延在する方向に配置され、前記複数の第２細線電極用の下地電極を互い接続するとともに、前記第１細線電極用の下地電極とは絶縁された第２バスバー電極用の下地電極を形成し、
    前記各下地電極にメッキを行い、第１細線電極、第１バスバー電極、第２細線電極及び第２バスバー電極を形成する、太陽電池の製造方法。     Prepare a semiconductor substrate,
    Forming a plurality of ground electrodes for the first thin wire electrode and a plurality of ground electrodes for the second thin wire electrode adjacent to the ground electrode for the first thin wire electrode on the back surface of the semiconductor substrate;
    The base electrode for the first thin wire electrode and the base electrode for the second thin wire electrode are arranged in a direction extending in a crossing direction, and the plurality of base electrodes for the first thin wire electrode are connected to each other, and Forming a base electrode for the first bus bar electrode insulated from the base electrode for the second thin wire electrode;
    Arranged in a direction extending in a direction intersecting on the base electrode for the second thin wire electrode and the base electrode for the first thin wire electrode, and connecting the plurality of base electrodes for the second thin wire electrode to each other, Forming a base electrode for the second bus bar electrode insulated from the base electrode for the first thin wire electrode;
    A method of manufacturing a solar cell, comprising plating each of the base electrodes to form a first thin wire electrode, a first bus bar electrode, a second thin wire electrode, and a second bus bar electrode.
  7. 　電気的に接続されている複数の太陽電池を含む太陽電池モジュールであって、
    　前記太陽電池は、半導体基板と、前記半導体基板の裏面上に形成された電極部を備え、
    　前記電極部は、
    　前記裏面上に形成された複数の第１細線電極と、前記第１細線電極に隣接して形成された複数の第２細線電極と、
    　前記第１細線電極上及び前記第２細線電極上で交差する方向に延在して設けられ、前記複数の第１細線電極を互い接続するとともに、前記第２細線電極とは絶縁された第１バスバー電極と、
    　前記第２細線電極上及び前記第１細線電極上で交差する方向に延在して設けられ、前記複数の第２細線電極を互い接続するとともに、前記第１細線電極とは絶縁された第２バスバー電極と、
    　を有する、太陽電池モジュール。     A solar cell module including a plurality of solar cells electrically connected,
    The solar cell includes a semiconductor substrate and an electrode portion formed on the back surface of the semiconductor substrate,
    The electrode part is
    A plurality of first thin wire electrodes formed on the back surface; a plurality of second thin wire electrodes formed adjacent to the first thin wire electrode;
    The first thin wire electrode extends in a direction intersecting on the first thin wire electrode and the second thin wire electrode, connects the plurality of first thin wire electrodes to each other, and is insulated from the second thin wire electrode. A busbar electrode;
    The second thin line electrode extends in a direction intersecting on the second thin line electrode and the first thin line electrode, connects the plurality of second thin line electrodes to each other, and is insulated from the first thin line electrode. A busbar electrode;
    A solar cell module.
  8. 　前記第１細線電極及び第２細線電極を含む太陽電池上に絶縁材が設けられ、この絶縁材上に前記第１または第２のバスバー電極と接続される配線が設けられる、請求項７に記載の太陽電池モジュール。 The insulating material is provided on the solar cell including the first thin wire electrode and the second thin wire electrode, and the wiring connected to the first or second bus bar electrode is provided on the insulating material. Solar cell module.
PCT/JP2012/057178 2011-03-24 2012-03-21 Rear surface electrode-type solar cell, manufacturing method for rear surface electrode-type solar cell, and solar cell module WO2012128284A1 (en)

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