WO2012115005A1 - Method for inspecting liquid crystal panel, and liquid crystal panel - Google Patents

Method for inspecting liquid crystal panel, and liquid crystal panel Download PDF

Info

Publication number
WO2012115005A1
WO2012115005A1 PCT/JP2012/053813 JP2012053813W WO2012115005A1 WO 2012115005 A1 WO2012115005 A1 WO 2012115005A1 JP 2012053813 W JP2012053813 W JP 2012053813W WO 2012115005 A1 WO2012115005 A1 WO 2012115005A1
Authority
WO
WIPO (PCT)
Prior art keywords
inspection
signal line
liquid crystal
line group
crystal panel
Prior art date
Application number
PCT/JP2012/053813
Other languages
French (fr)
Japanese (ja)
Inventor
悠二郎 武田
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Publication of WO2012115005A1 publication Critical patent/WO2012115005A1/en

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136254Checking; Testing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix

Definitions

  • the present invention relates to a liquid crystal panel inspection method and a liquid crystal panel.
  • the present invention relates to an inspection method for an array substrate of a liquid crystal panel. Note that this application claims priority based on Japanese Patent Application No. 2011-39288 filed on Feb. 25, 2011, the entire contents of which are incorporated herein by reference. .
  • a liquid crystal panel which is a component of a liquid crystal display device (LCD) has a structure in which a pair of glass substrates are opposed to each other with a predetermined gap secured.
  • the glass substrate on the array side (mother glass) and the glass substrate on the color filter side (mother glass) are processed in separate steps.
  • the film forming process, the photolithography process, and the etching process are repeated (TFT array process), and after forming a thin film transistor (TFT), a transparent electrode, a wiring connecting them, etc., finally an alignment film Process.
  • TFT array process On the glass substrate on the array side, the film forming process, the photolithography process, and the etching process are repeated (TFT array process), and after forming a thin film transistor (TFT), a transparent electrode, a wiring connecting them, etc., finally an alignment film Process.
  • TFT array process On the glass substrate on the array side, the film forming process, the photolithography process, and the etching process are repeated (TFT array process), and after forming a thin film transistor (TFT), a transparent electrode, a wiring connecting them, etc., finally an alignment film Process.
  • TFT array process On the glass substrate on the array side, the film forming process, the photolithography process, and the etching process are repeated (TFT array process), and after forming a
  • FIG. 1 shows an equivalent circuit diagram of the liquid crystal panel 1000.
  • a plurality of scanning signal wirings 11 and image signal wirings 12 are provided in a matrix.
  • a pixel electrode 13 is provided at each intersection of the scanning signal wiring 11 and the image signal wiring 12.
  • a switching transistor (TFT) 14 having a source / drain terminal connected to the pixel electrode 13 and the image signal wiring 12 and a gate terminal connected to the scanning signal wiring 11 is provided.
  • An additional capacitor 16 for holding charges is provided between the pixel electrode 13 and the counter electrode 15.
  • a liquid crystal panel 1000 before connecting a driving circuit (not shown) to the terminals of the scanning signal wiring 11 and the image signal wiring 12, it is inspected whether or not it operates normally.
  • a plurality of scanning signal lines 11 are short-circuited by a short-circuit ring 11a, and a plurality of image signal lines 12 are short-circuited by a short-circuit ring 12a.
  • a full lighting test was performed by supplying the scanning signal V G and the image signal V S to the plurality of scanning signal wirings 11 and the plurality of image signal wirings 12.
  • point defects can be inspected with simple inspection wiring and terminals. That is, in the structure 1000 shown in FIG. 1, since all the image signal wirings (source wirings) 12 are short-circuited by the short-circuit ring 12a, all the pixel regions (or sub-pixel regions) are turned on at a time. As a result, point defects can be inspected. However, a predetermined picture element region cannot be turned on, and therefore, the occurrence of source wiring-source wiring (SS) leakage and the inspection of single color unevenness cannot be performed. Therefore, it is possible to inspect point defects (which picture element areas are not lit), but for other inspections (SS leak, single color unevenness), the drive circuit is scanned in the mounting process. Only after connection to the terminals of the signal wiring 11 and the image signal wiring 12 can be carried out.
  • SS source wiring-source wiring
  • the source wiring of each column is connected.
  • a structure may be adopted in which each type is bundled and short-circuited and connected to the inspection pad, and the image signal Vs can be supplied to the inspection pad. That is, the source voltage (or image signal) Vs can be applied to all the source wirings 12 so that point defects can be detected, and the source voltage Vs is applied to the adjacent source wirings 12 so that SS leakage can be detected.
  • the structure can be applied.
  • a structure in which the source voltage Vs can be selectively applied to the pixel regions (R (red), G (green), and B (blue)) that define each color is also required. .
  • FIG. 2 shows a structure of the array substrate 200 capable of executing inspection of point defects, SS leaks, and single color unevenness.
  • source wiring (image signal wiring) 12 is formed so as to extend in the column direction.
  • gate wiring (scanning signal wiring) extending in the row direction is omitted.
  • the picture element areas 20 are arranged in the order of R, G, B from the left.
  • Each pixel region 20 is formed with a source wiring 12 extending in the column direction.
  • the odd-numbered (Odd) source wiring 12 (o) and the even-numbered (Even) source wiring 12 (e). Are lined up alternately.
  • the odd-numbered pixel region 20 in the matrix region 50 is represented by “Ro”, “Go”, “Bo”, and the even-numbered pixel region 20 is represented by “Re”, “Ge”, “Be”. ".
  • a short-circuit wiring for inspection that bundles the source wirings 12 of “Ro”, “Go”, “Bo”, “Re”, “Ge”, and “Be” in the matrix region 50. 22 is formed.
  • An inspection pad 25 is connected to each short-circuit wiring 22.
  • the array substrate 200 can be inspected by applying a source voltage (Vs) to the inspection pad 25.
  • the gate voltage applied to the gate wiring (not shown) is controlled to thereby control the pixel region 20 (Ro).
  • a lighting test can be performed.
  • the source voltage (Vs) is applied to all the inspection pads 25 (Ro, Go, Bo, Re, Ge, Be), the full lighting inspection can be performed. From this, it is possible to execute an inspection of a pixel area (point defect) that is not lit.
  • a leak between the source wiring and the source wiring can be determined. For example, if a source voltage (Vs) is applied to the pad 25 (Ro) and the pad 25 (Ge), the source wiring 12 (o) of the pixel region 20 (Ro) and the source of the pixel region 20 (Ge) It is possible to determine a leak (SS leak) between the wiring 12 (e).
  • the picture element region 20 (Ro, Re) that defines a predetermined color for example, R
  • a predetermined color for example, R
  • the matrix region 50 can be brought into the same state as that of red display, and thereby, single-color unevenness can be detected.
  • six inspection pads 25 are required. These six pads 25 are arranged in a non-display area (an area other than the matrix area 50) of the liquid crystal panel. Although the pad 25 has a size of about 1 mm square, it has become difficult to arrange the six pads 25 in the non-display area due to the influence of the narrow frame design in recent years. Further, since the arrangement interval of the six pads 25 is narrow, it may be difficult to bring the inspection terminals into contact with all the pads 25 arranged in the narrow interval.
  • the array substrate 200 using the six pads 25 is difficult to arrange the pads 25 and the layout of the short-circuit lines 22 connected to the pads 25 is not simple, so the design of the array substrate 200 is complicated. Become. In recent years, from the viewpoint of cost reduction, a design that is as simple as possible is required rather than a complicated design, and the array substrate 200 has a problem also in this respect.
  • the present invention has been made in view of such a point, and a main object thereof is to provide a liquid crystal panel capable of performing a plurality of inspections without using six inspection pads and an inspection method thereof.
  • the liquid crystal panel according to the present invention includes a matrix region in which a plurality of picture element regions are arranged, a plurality of scanning lines in the matrix region, which are arranged in parallel, and arranged orthogonal to the plurality of scanning lines.
  • a plurality of signal lines wherein the plurality of signal lines are a first signal line group that passes through a first pixel region that defines red and a second signal pixel region that defines blue.
  • Two signal line groups and a third signal line group passing through a third picture element region defining green, and the first signal line group is connected to the first test pad via a first short-circuit wiring.
  • the second signal line group is connected to the second test pad via a second short-circuit wiring
  • the third signal line group is connected to the third test pad via a third short-circuit wiring.
  • a point defect, a leak between adjacent signal lines, and a single color unevenness A check is performed.
  • An inspection method is an inspection method for a liquid crystal panel, wherein the liquid crystal panel includes a matrix region in which a plurality of pixel regions are arranged, and a plurality of scanning lines in the matrix region and arranged in parallel. And a plurality of signal lines arranged orthogonally to the plurality of scanning lines, the plurality of signal lines defining a first signal line group passing through a first pixel region defining red, and defining blue A second signal line group passing through the second picture element region, and a third signal line group passing through the third picture element region defining green, the first signal line group passing through the first short-circuit wiring
  • the second signal line group is connected to the second test pad via a second short-circuit wiring
  • the third signal line group is connected to the first test pad.
  • the third test pad is connected to the first test pad.
  • the plurality of signal lines include a first signal line group passing through the first pixel region defining red, a second signal line group passing through the second pixel region defining blue, and green.
  • the third signal line group is connected to the third inspection pad via a third short-circuit wiring. Therefore, by applying an inspection voltage to the first inspection pad, the second inspection pad, and the third inspection pad, it is possible to execute inspection of point defects, leakage between adjacent signal lines, and single-color unevenness. As a result, a liquid crystal panel capable of performing a plurality of tests without using six test pads can be provided.
  • FIG. 6 is an equivalent circuit diagram of a liquid crystal panel 1000 disclosed in Patent Document 1.
  • FIG. It is a figure which shows the structure of the liquid crystal panel 200 used as a comparative example. It is a figure which shows the structure of the liquid crystal panel 100 which concerns on embodiment of this invention. It is a figure which shows the structure of the liquid crystal panel 300 used as a comparative example. It is a figure which shows the structure of the liquid crystal panel 400 used as a comparative example.
  • (A) And (b) is a figure for demonstrating the test
  • FIG. 3 is a view for explaining the structure of the liquid crystal panel 100 according to the embodiment of the present invention.
  • the liquid crystal panel 100 according to the present embodiment includes a matrix region 50 in which a plurality of pixel regions 20 are arranged, a plurality of scanning lines 11 arranged in parallel, and a plurality of rows arranged orthogonal to the plurality of scanning lines 11. And a signal line 12.
  • the plurality of scanning lines 11 and the plurality of signal lines 12 extend through the matrix region 50.
  • the matrix region 50 of the present embodiment includes a first pixel region 20 (R) that defines red (R), a second pixel region 20 (G) that defines green (G), and blue (B).
  • the third picture element region 20 (B) is defined.
  • the first pixel region 20 (R), the second pixel region 20 (G), and the third pixel region 20 (B) are arranged in this order.
  • the odd-numbered (odd) pixel region 20 is represented by Ro, Go, or Bo
  • the even-numbered (even) pixel region 20 is represented by Re, Ge, or Be.
  • the minimum unit for displaying each color is referred to as “picture element” or “picture element region”, while the minimum unit for performing color display is referred to as “pixel” or “pixel region”. Therefore, in the case of a liquid crystal panel displaying three primary colors of red (R), green (G), and blue (B), the “picture element region” of red (R), green (G), and blue (B) The unit is referred to as a “pixel region”.
  • the “pixel region” is referred to as a pixel
  • the “picture element region” may be referred to as a sub-pixel.
  • a scanning line 11 and a signal line 12 extend in each picture element region 20, a scanning line 11 and a signal line 12 extend.
  • the scanning line (gate wiring) 11 extends in the row direction and is connected to the gate of a transistor (TFT) 15 formed in each pixel region 20.
  • the signal line (source wiring) 12 extends in the column direction and is connected to the source of a transistor (TFT) 15 formed in each picture element region.
  • the drain of the TFT 15 is connected to the pixel electrode 17.
  • the signal lines 12 of the present embodiment include a first signal line group 12 (R) that passes through the first pixel region 20 (R) and a second signal line group 12 (G that passes through the second pixel region 20 (G). ) And a third signal line group 12 (B) passing through the third picture element region 20 (B).
  • the first signal line group 12 (R) is connected to the first inspection pad 25 (R) via the first short-circuit wiring 22 (R).
  • the second signal line group 12 (G) is connected to the second inspection pad 25 (G) via the second short-circuit wiring 22 (G).
  • the third signal line group 12 (B) is connected to the third inspection pad 25 (B) via the third short-circuit wiring 22 (B).
  • the 1st short circuit wiring 22 (R), the 2nd short circuit wiring 22 (G), and the 3rd short circuit wiring 22 (B) are wiring patterns for a test
  • the first short-circuit wiring 22 (R) is a wiring that short-circuits the first signal line group 12 (R) and connects it to the first inspection pad 25 (R).
  • the second short-circuit wiring 22 (G) is a wiring that short-circuits the second signal line group 12 (G) and connects it to the second inspection pad 25 (G).
  • the third short-circuit wiring 22 (B) is a wiring that short-circuits the third signal line group 12 (B) and connects it to the third inspection pad 25 (B).
  • the liquid crystal panel 100 (especially the array substrate) of the present embodiment, by applying an inspection signal to the first inspection pad 25 (R), the second inspection pad 25 (G), and the third inspection pad 25 (B), Inspection of point defects, leaks between adjacent signal lines 12, and single color unevenness can be performed.
  • an inspection apparatus provided with a probe (contact terminal) that can contact the first inspection pad 25 (R), the second inspection pad 25 (G), and the third inspection pad 25 (B), The probe is brought into contact with the first test pad 25 (R), the second test pad 25 (G), and the third test pad 25 (B) to conduct.
  • the first pixel region 20 (R) when the voltage (Vs) is selectively applied to the first inspection pad 25 (R), the first pixel region 20 (R) can be selectively lit, so that the single color unevenness (red unevenness) is reduced. An inspection can be performed.
  • the second inspection pad 25 (G) when the voltage (Vs) is selectively applied to the second inspection pad 25 (G), the second picture element region 20 (G) can be selectively lit, so that the single color unevenness (green unevenness) is reduced. An inspection can be performed.
  • the voltage (Vs) is selectively applied to the third inspection pad 25 (B), the third pixel region 20 (B) can be selectively lit, so that the inspection of the single color unevenness (blue unevenness) is performed. Can be executed.
  • three inspection pads 25 are used to perform three types of inspections (point defects, SS leaks, single color unevenness). ) Can be provided. Therefore, in the configuration of the present embodiment, three types of inspection (point defect, SS leak, single color unevenness) were performed with six inspection pads as shown in FIG. It is possible to execute with the inspection pad 25, and as a result, three types of inspection can be executed with a simple configuration.
  • FIG. 4 is a diagram showing the structure of a liquid crystal panel 300 as a comparative example.
  • all the signal lines 12 are connected to the test pad 25 (All) via the short-circuit wiring 22.
  • a point defect can be inspected by applying an inspection signal to the inspection pad 25 (All).
  • the inspection of leaks between adjacent signal lines 12 and single-color unevenness cannot be performed.
  • FIG. 5 is a diagram showing a structure of a liquid crystal panel 400 as a comparative example.
  • the odd-numbered signal line 12 (o) is connected to the test pad 25 (o) via the short-circuit wiring 22 (o).
  • the even-numbered signal line 12 (e) is connected to the test pad 25 (e) via the short-circuit wiring 22 (e). Therefore, in this comparative example 400, not only point defects but also leaks between adjacent signal lines 12 are inspected by applying an inspection signal to the inspection pads 25 (o) and / or 25 (e). be able to.
  • this comparative example 400 since monochrome display cannot be performed, it is not possible to perform inspection for monochrome unevenness.
  • three types of inspection point defect, SS leak, single color unevenness
  • six inspection pads are required.
  • three types of inspection point defect, SS leak, single color unevenness
  • the configuration 100 of this embodiment since only three test pads 25 are used, it is easy to cope with the narrowing of the frame of the liquid crystal panel, and the design is easy and the cost is reduced. Can do.
  • FIG. 6A is a diagram for explaining the execution of the SS leak inspection and the single color unevenness inspection in the liquid crystal panel 100 of the present embodiment.
  • the source applied to each pixel region 20 is shown in FIG.
  • the state of the voltage Vs (inspection signal) is shown.
  • the liquid crystal panel 100 shown in FIG. 6A shows a state where a red (R) single color display is performed.
  • each single color display of red (R), green (G), and blue (B) can be performed, so that a single color unevenness inspection can be performed.
  • the source voltage (+) indicates, for example, + 5V
  • the source voltage ( ⁇ ) indicates, for example, ⁇ 5V, but is not limited thereto.
  • the liquid crystal panel 100 shown in FIG. 6B shows a state in which SS leak inspection is being performed.
  • an SS leak between the red (R) column and the green (G) column is inspected.
  • the application state of the left red row (R1) and the right red row (R2) is the same as the state shown in FIG. 6 (a).
  • column (G1, G2) adjacent to them (R1, R2) is made into the antiphase.
  • an inspection result of 0 V (or a value close thereto) will be obtained.
  • liquid crystal panel capable of performing a plurality of inspections (three types of inspections) without using six inspection pads, and an inspection method thereof.

Landscapes

  • Engineering & Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)

Abstract

Provided is a liquid crystal panel on which a plurality of inspections can be carried out without using six inspection pads. A liquid crystal panel (100) which is provided with: a matrix region (50) in which a plurality of picture element regions (20) are arranged; and a plurality of signal lines (12) that are arranged so as to perpendicularly intersect a plurality of scan lines (11). The plurality of signal lines (12) include: a first signal line group (12(R)) that passes through a first picture element region (20(R)) that defines red (R); a second signal line group (12(G)) that passes through a second picture element region (20(G)) that defines green (G); and a third signal line group (12(B)) that passes through a third picture element region (20(B)) that defines blue (B). The first signal line group (12(R)) is connected to a first inspection pad (25(R)) via a first short-circuit wire (22(R)); the second signal line group (12(G)) is connected to a second inspection pad (25(G)) via a second short-circuit wire (22(G)); and the third signal line group (12(B)) is connected to a third inspection pad (25(B)) via a third short-circuit wire (22(B)).

Description

液晶パネルの検査方法および液晶パネルLiquid crystal panel inspection method and liquid crystal panel
 本発明は、液晶パネルの検査方法および液晶パネルに関する。特に、液晶パネルのアレイ基板の検査方法に関する。
 なお、本出願は2011年2月25日に出願された日本国特許出願2011-39288号に基づく優先権を主張しており、その出願の全内容は本明細書中に参照として組み入れられている。
The present invention relates to a liquid crystal panel inspection method and a liquid crystal panel. In particular, the present invention relates to an inspection method for an array substrate of a liquid crystal panel.
Note that this application claims priority based on Japanese Patent Application No. 2011-39288 filed on Feb. 25, 2011, the entire contents of which are incorporated herein by reference. .
 液晶表示装置(LCD)の構成部品である液晶パネルは、一対のガラス基板を所定のギャップを確保した状態で対向させた構造を有している。液晶パネルの製造工程においては、まず、アレイ側のガラス基板(マザーガラス)と、カラーフィルタ側のガラス基板(マザーガラス)がそれぞれ別々の工程で加工が行われる。 A liquid crystal panel, which is a component of a liquid crystal display device (LCD), has a structure in which a pair of glass substrates are opposed to each other with a predetermined gap secured. In the manufacturing process of the liquid crystal panel, first, the glass substrate on the array side (mother glass) and the glass substrate on the color filter side (mother glass) are processed in separate steps.
 アレイ側のガラス基板においては、成膜工程とフォトリソグラフィ工程とエッチング工程とが繰り返され(TFTアレイ工程)、薄膜トランジスタ(TFT)、透明電極、それらを繋ぐ配線などを形成した後、最後に配向膜処理を行う。なお、カラーフィルタ側の加工については省略する。セル工程に入ると、アレイ側のガラス基板とカラーフィルタ側のガラス基板との間に、スペーサを介して、液晶材料を注入する。その後は、それぞれのパネルサイズに切り分けた後、偏光板等のフィルムを接着する。このようにして液晶パネルが製造される。 On the glass substrate on the array side, the film forming process, the photolithography process, and the etching process are repeated (TFT array process), and after forming a thin film transistor (TFT), a transparent electrode, a wiring connecting them, etc., finally an alignment film Process. The processing on the color filter side is omitted. When entering the cell process, a liquid crystal material is injected through a spacer between the glass substrate on the array side and the glass substrate on the color filter side. Then, after dividing into each panel size, films, such as a polarizing plate, are pasted up. In this way, a liquid crystal panel is manufactured.
 液晶パネルの検査には、その製造工程において大別して2つの機能検査がある。1つはアレイ工程の最終に行う検査である。この検査は、ガラス基板上に作製されたTFT回路の機能、および、短絡を検査するものである。もう一方は、セル工程の最終に行う検査である。この検査は、液晶を封入したパネル(アレイ基板)を点灯させて、テストパターンを表示させることによって、パネルの動作状態を確認するものである。この検査は、点灯検査とも呼ばれ、色度、色ムラ、パネルの動作状態を確認するものである。 There are two functional inspections for the inspection of liquid crystal panels. One is an inspection performed at the end of the array process. This inspection is for inspecting the function and short circuit of the TFT circuit fabricated on the glass substrate. The other is an inspection performed at the end of the cell process. In this inspection, a panel (array substrate) enclosing a liquid crystal is turned on to display a test pattern, thereby confirming the operation state of the panel. This inspection is also called a lighting inspection, and confirms chromaticity, color unevenness, and operation state of the panel.
 上述のように、液晶パネルが製造されたときには、液晶パネルの欠陥検査が行われる。図1を参照しながら、液晶パネルの欠陥検査について説明する(例えば、特許文献1参照)。 As described above, when a liquid crystal panel is manufactured, a defect inspection of the liquid crystal panel is performed. The defect inspection of the liquid crystal panel will be described with reference to FIG. 1 (see, for example, Patent Document 1).
 図1は、液晶パネル1000の等価回路図を示している。図1に示した液晶パネル1000では、複数の走査信号配線11と画像信号配線12とがマトリックス状に設けられている。走査信号配線11と画像信号配線12との各交点に画素電極13を設ける。この画素電極13と画像信号配線12にソース・ドレイン端子が接続されると共に、走査信号配線11にゲート端子が接続されたスイッチング用トランジスタ(TFT)14を設ける。そして、この画素電極13と対向電極15との間には、電荷保持用の付加容量16を設けている。 FIG. 1 shows an equivalent circuit diagram of the liquid crystal panel 1000. In the liquid crystal panel 1000 shown in FIG. 1, a plurality of scanning signal wirings 11 and image signal wirings 12 are provided in a matrix. A pixel electrode 13 is provided at each intersection of the scanning signal wiring 11 and the image signal wiring 12. A switching transistor (TFT) 14 having a source / drain terminal connected to the pixel electrode 13 and the image signal wiring 12 and a gate terminal connected to the scanning signal wiring 11 is provided. An additional capacitor 16 for holding charges is provided between the pixel electrode 13 and the counter electrode 15.
 このような液晶パネル1000では、駆動回路(不図示)を走査信号配線11および画像信号配線12の端子に接続する前に、正常に動作するか否かを検査する。このような検査を行うに際しては、複数の走査信号配線11を短絡環11aで短絡接続するとともに、複数の画像信号配線12を短絡環12aで短絡接続する。そして、この複数の走査信号配線11と複数の画像信号配線12に、走査信号VGと画像信号VSを供給することによって、全点灯試験を行っていた。 In such a liquid crystal panel 1000, before connecting a driving circuit (not shown) to the terminals of the scanning signal wiring 11 and the image signal wiring 12, it is inspected whether or not it operates normally. When performing such an inspection, a plurality of scanning signal lines 11 are short-circuited by a short-circuit ring 11a, and a plurality of image signal lines 12 are short-circuited by a short-circuit ring 12a. Then, a full lighting test was performed by supplying the scanning signal V G and the image signal V S to the plurality of scanning signal wirings 11 and the plurality of image signal wirings 12.
特開平6-82817号公報JP-A-6-82817
 この液晶パネル(アレイ基板)1000の検査では、簡便な検査用配線および端子にて、点欠陥を検査することができる。すなわち、図1に示した構造1000では、全ての画像信号配線(ソース配線)12を短絡環12aにて短絡接続しているので、全ての絵素領域(またはサブ画素領域)を一度に点灯させることができ、その結果、点欠陥を検査することができる。しかしながら、所定の絵素領域を点灯させることはできず、それゆえ、ソース配線-ソース配線(S-S)リークの発生、および、単色ムラの検査を行うことができない。したがって、点欠陥(どの絵素領域が点灯していないか)を検査することは可能であるが、他の検査(S-Sリーク、単色ムラ)については、実装工程にて駆動回路を、走査信号配線11および画像信号配線12の端子に接続した後でないと実施することができない。 In the inspection of the liquid crystal panel (array substrate) 1000, point defects can be inspected with simple inspection wiring and terminals. That is, in the structure 1000 shown in FIG. 1, since all the image signal wirings (source wirings) 12 are short-circuited by the short-circuit ring 12a, all the pixel regions (or sub-pixel regions) are turned on at a time. As a result, point defects can be inspected. However, a predetermined picture element region cannot be turned on, and therefore, the occurrence of source wiring-source wiring (SS) leakage and the inspection of single color unevenness cannot be performed. Therefore, it is possible to inspect point defects (which picture element areas are not lit), but for other inspections (SS leak, single color unevenness), the drive circuit is scanned in the mounting process. Only after connection to the terminals of the signal wiring 11 and the image signal wiring 12 can be carried out.
 一方、駆動回路を、走査信号配線11および画像信号配線12の端子に接続する前に、種々の検査(点欠陥、S-Sリーク、単色ムラ)を実行するには、各列のソース配線を種類ごとに束ねて短絡させて検査パッドに接続し、その検査パッドに画像信号Vsを供給できる構造にしたらよい。すなわち、点欠陥を検出できるように全てのソース配線12にソース電圧(または画像信号)Vsを印加できる構造にするとともに、S-Sリークを検出できるように隣接するソース配線12にソース電圧Vsを印加できる構造にする。そして、単色ムラを検出できるように、各色を規定する絵素領域(R(赤)、G(緑)、B(青))に選択的にソース電圧Vsを印加できる構造にすることも求められる。 On the other hand, in order to perform various inspections (point defects, SS leaks, single color unevenness) before connecting the driving circuit to the terminals of the scanning signal wiring 11 and the image signal wiring 12, the source wiring of each column is connected. A structure may be adopted in which each type is bundled and short-circuited and connected to the inspection pad, and the image signal Vs can be supplied to the inspection pad. That is, the source voltage (or image signal) Vs can be applied to all the source wirings 12 so that point defects can be detected, and the source voltage Vs is applied to the adjacent source wirings 12 so that SS leakage can be detected. The structure can be applied. In order to detect single color unevenness, a structure in which the source voltage Vs can be selectively applied to the pixel regions (R (red), G (green), and B (blue)) that define each color is also required. .
 図2は、点欠陥、S-Sリーク、単色ムラの検査を実行することができるアレイ基板200の構造を示している。絵素領域20がマトリックス状に配置されたマトリックス領域50において、列方向に延びるようにソース配線(画像信号配線)12が形成されている。なお、このマトリックス領域50において、行方向に延びるゲート配線(走査信号配線)は省略している。 FIG. 2 shows a structure of the array substrate 200 capable of executing inspection of point defects, SS leaks, and single color unevenness. In the matrix region 50 in which the pixel regions 20 are arranged in a matrix, source wiring (image signal wiring) 12 is formed so as to extend in the column direction. In the matrix region 50, gate wiring (scanning signal wiring) extending in the row direction is omitted.
 マトリックス領域50では、左から順に、R・G・Bの順で絵素領域20が配置されている。また、各絵素領域20には、列方向に延びるソース配線12が形成されており、奇数列(Odd)のソース配線12(o)と、偶数列(Even)のソース配線12(e)とが交互に並んでいる。なお、マトリックス領域50における奇数列目の絵素領域20を、「Ro」、「Go」、「Bo」で表し、偶数列目の絵素領域20を、「Re」、「Ge」、「Be」で表している。 In the matrix area 50, the picture element areas 20 are arranged in the order of R, G, B from the left. Each pixel region 20 is formed with a source wiring 12 extending in the column direction. The odd-numbered (Odd) source wiring 12 (o) and the even-numbered (Even) source wiring 12 (e). Are lined up alternately. The odd-numbered pixel region 20 in the matrix region 50 is represented by “Ro”, “Go”, “Bo”, and the even-numbered pixel region 20 is represented by “Re”, “Ge”, “Be”. ".
 図2に示したアレイ基板200では、マトリックス領域50の「Ro」、「Go」、「Bo」、「Re」、「Ge」、「Be」の各ソース配線12を束ねる、検査用の短絡配線22が形成されている。各短絡配線22には、検査用のパッド25が接続されている。そして、検査用のパッド25にソース電圧(Vs)を印加することにより、アレイ基板200の検査を行うことができる。 In the array substrate 200 shown in FIG. 2, a short-circuit wiring for inspection that bundles the source wirings 12 of “Ro”, “Go”, “Bo”, “Re”, “Ge”, and “Be” in the matrix region 50. 22 is formed. An inspection pad 25 is connected to each short-circuit wiring 22. The array substrate 200 can be inspected by applying a source voltage (Vs) to the inspection pad 25.
 ここで、例えば、検査用のパッド25(Ro)にソース電圧(Vs)を印加すれば、ゲート配線(不図示)に印加されるゲート電圧を制御することにより、絵素領域20(Ro)の点灯検査を行うことができる。そして、全ての検査用のパッド25(Ro、Go、Bo、Re、Ge、Be)にソース電圧(Vs)を印加すれば、全点灯検査を行うことができ、その結果、マトリックス領域50の中から、点灯しない絵素領域(点欠陥)の検査を実行することができる。 Here, for example, if the source voltage (Vs) is applied to the inspection pad 25 (Ro), the gate voltage applied to the gate wiring (not shown) is controlled to thereby control the pixel region 20 (Ro). A lighting test can be performed. Then, if the source voltage (Vs) is applied to all the inspection pads 25 (Ro, Go, Bo, Re, Ge, Be), the full lighting inspection can be performed. From this, it is possible to execute an inspection of a pixel area (point defect) that is not lit.
 また、隣り合う絵素領域20のソース配線12についてのパッド25にソース電圧を印加することによって、ソース配線-ソース配線の間のリーク(S-Sリーク)を判定することができる。例えば、パッド25(Ro)と、パッド25(Ge)にソース電圧(Vs)を印加すれば、絵素領域20(Ro)のソース配線12(o)と、絵素領域20(Ge)のソース配線12(e)との間のリーク(S-Sリーク)を判定することが可能である。 Further, by applying a source voltage to the pad 25 for the source wiring 12 in the adjacent picture element region 20, a leak between the source wiring and the source wiring (SS leak) can be determined. For example, if a source voltage (Vs) is applied to the pad 25 (Ro) and the pad 25 (Ge), the source wiring 12 (o) of the pixel region 20 (Ro) and the source of the pixel region 20 (Ge) It is possible to determine a leak (SS leak) between the wiring 12 (e).
 さらに、所定の色(例えば、R)を規定する絵素領域20(Ro、Re)を点灯させれば、単色ムラの検査を実行することができる。具体的には、パッド25(Ro)および(Re)にソース電圧を印加することによって、マトリックス領域50を赤色表示と同じ状態にすることができ、それによって、単色ムラを検出することができる。 Furthermore, if the picture element region 20 (Ro, Re) that defines a predetermined color (for example, R) is turned on, it is possible to perform a single color unevenness inspection. Specifically, by applying a source voltage to the pads 25 (Ro) and (Re), the matrix region 50 can be brought into the same state as that of red display, and thereby, single-color unevenness can be detected.
 図2に示したアレイ基板200の場合、6個の検査用のパッド25(Ro、Go、Bo、Re、Ge、Be)が必要である。これらの6個のパッド25は、液晶パネルの非表示領域(マトリックス領域50以外の領域)に配置される。パッド25は1mm角程度の寸法であるが、近年の狭額縁設計の影響により、6個のパッド25を非表示領域に配置することが困難になってきている。また、6個のパッド25の配置間隔は狭いため、その狭い間隔に配列されたパッド25の全てに、検査用端子を接触させることが困難である場合もある。 In the case of the array substrate 200 shown in FIG. 2, six inspection pads 25 (Ro, Go, Bo, Re, Ge, Be) are required. These six pads 25 are arranged in a non-display area (an area other than the matrix area 50) of the liquid crystal panel. Although the pad 25 has a size of about 1 mm square, it has become difficult to arrange the six pads 25 in the non-display area due to the influence of the narrow frame design in recent years. Further, since the arrangement interval of the six pads 25 is narrow, it may be difficult to bring the inspection terminals into contact with all the pads 25 arranged in the narrow interval.
 加えて、6個のパッド25を用いたアレイ基板200は、パッド25の配置の困難さとともに、パッド25に接続される短絡線22のレイアウトも単純ではないため、アレイ基板200の設計が複雑になる。近年、低コスト化を含めた観点から、複雑な設計よりも、できるだけ簡単な設計が求められており、その点でも、アレイ基板200は問題を有している。 In addition, the array substrate 200 using the six pads 25 is difficult to arrange the pads 25 and the layout of the short-circuit lines 22 connected to the pads 25 is not simple, so the design of the array substrate 200 is complicated. Become. In recent years, from the viewpoint of cost reduction, a design that is as simple as possible is required rather than a complicated design, and the array substrate 200 has a problem also in this respect.
 本発明はかかる点に鑑みてなされたものであり、その主な目的は、6個の検査パッドを用いずに、複数の検査を実行可能な液晶パネルおよびその検査方法を提供することにある。 The present invention has been made in view of such a point, and a main object thereof is to provide a liquid crystal panel capable of performing a plurality of inspections without using six inspection pads and an inspection method thereof.
 本発明の液晶パネルは、複数の絵素領域が配列されたマトリックス領域と、前記マトリックス領域にあって、平行に配列される複数の走査線と、前記複数の走査線に直交して配列される複数の信号線とを備えた液晶パネルであり、前記複数の信号線は、赤を規定する第1絵素領域を通る第1信号線群と、青を規定する第2絵素領域を通る第2信号線群と、緑を規定する第3絵素領域を通る第3信号線群とを含み、前記第1信号線群は、第1短絡配線を介して、第1検査パッドに接続されており、前記第2信号線群は、第2短絡配線を介して、第2検査パッドに接続されており、前記第3信号線群は、第3短絡配線を介して、第3検査パッドに接続されている。 The liquid crystal panel according to the present invention includes a matrix region in which a plurality of picture element regions are arranged, a plurality of scanning lines in the matrix region, which are arranged in parallel, and arranged orthogonal to the plurality of scanning lines. A plurality of signal lines, wherein the plurality of signal lines are a first signal line group that passes through a first pixel region that defines red and a second signal pixel region that defines blue. Two signal line groups and a third signal line group passing through a third picture element region defining green, and the first signal line group is connected to the first test pad via a first short-circuit wiring. The second signal line group is connected to the second test pad via a second short-circuit wiring, and the third signal line group is connected to the third test pad via a third short-circuit wiring. Has been.
 ある好適な実施形態において、前記第1検査パッド、前記第2検査パッドおよび前記第3検査パッドに検査信号を印加することにより、点欠陥、隣接する信号線の間のリーク、および、単色ムラの検査が実行される。 In a preferred embodiment, by applying an inspection signal to the first inspection pad, the second inspection pad, and the third inspection pad, a point defect, a leak between adjacent signal lines, and a single color unevenness A check is performed.
 本発明に係る検査方法は、液晶パネルの検査方法であり、前記液晶パネルは、複数の絵素領域が配列されたマトリックス領域と、前記マトリックス領域にあって、平行に配列される複数の走査線と、前記複数の走査線に直交して配列される複数の信号線とを備え、前記複数の信号線は、赤を規定する第1絵素領域を通る第1信号線群と、青を規定する第2絵素領域を通る第2信号線群と、緑を規定する第3絵素領域を通る第3信号線群とを含み、前記第1信号線群は、第1短絡配線を介して、第1検査パッドに接続されており、前記第2信号線群は、第2短絡配線を介して、第2検査パッドに接続されており、前記第3信号線群は、第3短絡配線を介して、第3検査パッドに接続されており、前記第1検査パッド、前記第2検査パッドおよび前記第3検査パッドにソース電圧を印加することにより、点欠陥、隣接する信号線の間のリーク、および、単色ムラの検査を実行する。 An inspection method according to the present invention is an inspection method for a liquid crystal panel, wherein the liquid crystal panel includes a matrix region in which a plurality of pixel regions are arranged, and a plurality of scanning lines in the matrix region and arranged in parallel. And a plurality of signal lines arranged orthogonally to the plurality of scanning lines, the plurality of signal lines defining a first signal line group passing through a first pixel region defining red, and defining blue A second signal line group passing through the second picture element region, and a third signal line group passing through the third picture element region defining green, the first signal line group passing through the first short-circuit wiring The second signal line group is connected to the second test pad via a second short-circuit wiring, and the third signal line group is connected to the first test pad. Are connected to a third test pad via the first test pad, the second test pad, and the third test pad. By applying a source voltage to the third inspection pad, point defects, leakage between the adjacent signal lines, and performs a test of single-color unevenness.
 本発明によれば、複数の信号線は、赤を規定する第1絵素領域を通る第1信号線群と、青を規定する第2絵素領域を通る第2信号線群と、緑を規定する第3絵素領域を通る第3信号線群とを含み、第1信号線群は、第1短絡配線を介して第1検査パッドに接続され、第2信号線群は、第2短絡配線を介して第2検査パッドに接続され、第3信号線群は、第3短絡配線を介して第3検査パッドに接続されている。したがって、第1検査パッド、第2検査パッドおよび第3検査パッドに検査電圧を印加することにより、点欠陥、隣接する信号線の間のリーク、および、単色ムラの検査を実行することができる。その結果、6個の検査パッドを用いずに、複数の検査を実行可能な液晶パネルを提供することができる。 According to the present invention, the plurality of signal lines include a first signal line group passing through the first pixel region defining red, a second signal line group passing through the second pixel region defining blue, and green. A third signal line group passing through a third pixel region to be defined, the first signal line group being connected to the first inspection pad via a first short-circuit wiring, and the second signal line group being a second short-circuit The third signal line group is connected to the third inspection pad via a third short-circuit wiring. Therefore, by applying an inspection voltage to the first inspection pad, the second inspection pad, and the third inspection pad, it is possible to execute inspection of point defects, leakage between adjacent signal lines, and single-color unevenness. As a result, a liquid crystal panel capable of performing a plurality of tests without using six test pads can be provided.
特許文献1に開示された液晶パネル1000の等価回路図である。6 is an equivalent circuit diagram of a liquid crystal panel 1000 disclosed in Patent Document 1. FIG. 比較例となる液晶パネル200の構造を示す図である。It is a figure which shows the structure of the liquid crystal panel 200 used as a comparative example. 本発明の実施形態に係る液晶パネル100の構造を示す図である。It is a figure which shows the structure of the liquid crystal panel 100 which concerns on embodiment of this invention. 比較例となる液晶パネル300の構造を示す図である。It is a figure which shows the structure of the liquid crystal panel 300 used as a comparative example. 比較例となる液晶パネル400の構造を示す図である。It is a figure which shows the structure of the liquid crystal panel 400 used as a comparative example. (a)および(b)は、液晶パネル100の検査方法を説明するための図である。(A) And (b) is a figure for demonstrating the test | inspection method of the liquid crystal panel 100. FIG.
 以下、図面を参照しながら、本発明の実施形態を説明する。以下の図面においては、説明の簡潔化のために、実質的に同一の機能を有する構成要素を同一の参照符号で示す。なお、本発明は以下の実施形態に限定されない。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, components having substantially the same function are denoted by the same reference numerals for the sake of brevity. In addition, this invention is not limited to the following embodiment.
 図3は、本発明の実施形態に係る液晶パネル100の構造を説明するための図である。本実施形態の液晶パネル100は、複数の絵素領域20が配列されたマトリックス領域50と、平行に配列される複数の走査線11と、複数の走査線11に直交して配列される複数の信号線12とを備えている。複数の走査線11および複数の信号線12は、マトリックス領域50内を通過して延びている。 FIG. 3 is a view for explaining the structure of the liquid crystal panel 100 according to the embodiment of the present invention. The liquid crystal panel 100 according to the present embodiment includes a matrix region 50 in which a plurality of pixel regions 20 are arranged, a plurality of scanning lines 11 arranged in parallel, and a plurality of rows arranged orthogonal to the plurality of scanning lines 11. And a signal line 12. The plurality of scanning lines 11 and the plurality of signal lines 12 extend through the matrix region 50.
 本実施形態のマトリックス領域50は、赤(R)を規定する第1絵素領域20(R)と、緑(G)を規定する第2絵素領域20(G)と、青(B)を規定する第3絵素領域20(B)とから構成されている。本実施形態の構成では、マトリックス領域50において、第1絵素領域20(R)、第2絵素領域20(G)、第3絵素領域20(B)の順に配列されている。また、便宜上、図3において、奇数番目(odd)の絵素領域20を、Ro、Go又はBoで表し、偶数番目(even)の絵素領域20を、Re、Ge又はBeで表している。 The matrix region 50 of the present embodiment includes a first pixel region 20 (R) that defines red (R), a second pixel region 20 (G) that defines green (G), and blue (B). The third picture element region 20 (B) is defined. In the configuration of the present embodiment, in the matrix region 50, the first pixel region 20 (R), the second pixel region 20 (G), and the third pixel region 20 (B) are arranged in this order. For the sake of convenience, in FIG. 3, the odd-numbered (odd) pixel region 20 is represented by Ro, Go, or Bo, and the even-numbered (even) pixel region 20 is represented by Re, Ge, or Be.
 なお、本実施形態では、各色を表示する最小単位を「絵素」又は「絵素領域」と称し、一方で、カラー表示を行うための最小単位を「画素」または「画素領域」と称する。したがって、赤(R)、緑(G)、青(B)の三原色表示の液晶パネルの場合、赤(R)、緑(G)、青(B)の「絵素領域」を1つのまとまりの単位として「画素領域」と称する。ここで、「画素領域」をピクセルと称するならば、「絵素領域」をサブピクセルと称しても構わない。 In the present embodiment, the minimum unit for displaying each color is referred to as “picture element” or “picture element region”, while the minimum unit for performing color display is referred to as “pixel” or “pixel region”. Therefore, in the case of a liquid crystal panel displaying three primary colors of red (R), green (G), and blue (B), the “picture element region” of red (R), green (G), and blue (B) The unit is referred to as a “pixel region”. Here, if the “pixel region” is referred to as a pixel, the “picture element region” may be referred to as a sub-pixel.
 各絵素領域20には、走査線11および信号線12が延びている。図3に示した例では、走査線(ゲート配線)11は、行方向に延びて、各絵素領域20に形成されたトランジスタ(TFT)15のゲートに接続されている。また、信号線(ソース配線)12は、列方向に延びて、各絵素領域に形成されたトランジスタ(TFT)15のソースに接続されている。なお、TFT15のドレインは、画素電極17に接続されている。 In each picture element region 20, a scanning line 11 and a signal line 12 extend. In the example shown in FIG. 3, the scanning line (gate wiring) 11 extends in the row direction and is connected to the gate of a transistor (TFT) 15 formed in each pixel region 20. The signal line (source wiring) 12 extends in the column direction and is connected to the source of a transistor (TFT) 15 formed in each picture element region. The drain of the TFT 15 is connected to the pixel electrode 17.
 本実施形態の信号線12は、第1絵素領域20(R)を通る第1信号線群12(R)と、第2絵素領域20(G)を通る第2信号線群12(G)と、第3絵素領域20(B)を通る第3信号線群12(B)とを含む。そして、第1信号線群12(R)は、第1短絡配線22(R)を介して、第1検査パッド25(R)に接続されている。第2信号線群12(G)は、第2短絡配線22(G)を介して、第2検査パッド25(G)に接続されている。第3信号線群12(B)は、第3短絡配線22(B)を介して、第3検査パッド25(B)に接続されている。 The signal lines 12 of the present embodiment include a first signal line group 12 (R) that passes through the first pixel region 20 (R) and a second signal line group 12 (G that passes through the second pixel region 20 (G). ) And a third signal line group 12 (B) passing through the third picture element region 20 (B). The first signal line group 12 (R) is connected to the first inspection pad 25 (R) via the first short-circuit wiring 22 (R). The second signal line group 12 (G) is connected to the second inspection pad 25 (G) via the second short-circuit wiring 22 (G). The third signal line group 12 (B) is connected to the third inspection pad 25 (B) via the third short-circuit wiring 22 (B).
 なお、第1短絡配線22(R)、第2短絡配線22(G)、第3短絡配線22(B)は、検査用の配線パターンである。第1短絡配線22(R)は、第1信号線群12(R)を短絡させて、第1検査パッド25(R)に接続させる配線である。同様に、第2短絡配線22(G)は、第2信号線群12(G)を短絡させて、第2検査パッド25(G)に接続させる配線である。第3短絡配線22(B)は、第3信号線群12(B)を短絡させて、第3検査パッド25(B)に接続させる配線である。 In addition, the 1st short circuit wiring 22 (R), the 2nd short circuit wiring 22 (G), and the 3rd short circuit wiring 22 (B) are wiring patterns for a test | inspection. The first short-circuit wiring 22 (R) is a wiring that short-circuits the first signal line group 12 (R) and connects it to the first inspection pad 25 (R). Similarly, the second short-circuit wiring 22 (G) is a wiring that short-circuits the second signal line group 12 (G) and connects it to the second inspection pad 25 (G). The third short-circuit wiring 22 (B) is a wiring that short-circuits the third signal line group 12 (B) and connects it to the third inspection pad 25 (B).
 本実施形態の液晶パネル100(特に、アレイ基板)では、第1検査パッド25(R)、第2検査パッド25(G)および第3検査パッド25(B)に検査信号を印加することにより、点欠陥、隣接する信号線12の間のリーク、および、単色ムラの検査を実行することができる。具体的には、第1検査パッド25(R)、第2検査パッド25(G)および第3検査パッド25(B)に接触可能なプローブ(接触端子)を備えた検査装置を用いて、当該プローブを、第1検査パッド25(R)、第2検査パッド25(G)および第3検査パッド25(B)に接触させて導通させる。 In the liquid crystal panel 100 (especially the array substrate) of the present embodiment, by applying an inspection signal to the first inspection pad 25 (R), the second inspection pad 25 (G), and the third inspection pad 25 (B), Inspection of point defects, leaks between adjacent signal lines 12, and single color unevenness can be performed. Specifically, using an inspection apparatus provided with a probe (contact terminal) that can contact the first inspection pad 25 (R), the second inspection pad 25 (G), and the third inspection pad 25 (B), The probe is brought into contact with the first test pad 25 (R), the second test pad 25 (G), and the third test pad 25 (B) to conduct.
 本実施形態の構成の場合、第1検査パッド25(R)、第2検査パッド25(G)および第3検査パッド25(B)に電圧(検査用のソース電圧:Vs)を印加すると、絵素領域20の全て(20(R)、20(G)、20(B))が点灯するので、点欠陥を検査することができる。 In the case of the configuration of this embodiment, when a voltage (source voltage for inspection: Vs) is applied to the first inspection pad 25 (R), the second inspection pad 25 (G), and the third inspection pad 25 (B), a picture is displayed. Since all of the elementary regions 20 (20 (R), 20 (G), 20 (B)) are lit, point defects can be inspected.
 また、第1検査パッド25(R)および第2検査パッド25(G)に電圧(Vs)を印加すると、第1絵素領域20(R)と第2絵素領域20(G)とは隣接しているので、隣接する信号線12の間のリーク、すなわち、第1信号線12(R)と第2信号線12(G)との間のリークを検査することができる。 Further, when a voltage (Vs) is applied to the first test pad 25 (R) and the second test pad 25 (G), the first pixel region 20 (R) and the second pixel region 20 (G) are adjacent to each other. Therefore, a leak between adjacent signal lines 12, that is, a leak between the first signal line 12 (R) and the second signal line 12 (G) can be inspected.
 同様に、第2検査パッド25(G)および第3検査パッド25(B)に電圧(Vs)を印加すると、第2絵素領域20(G)と第3絵素領域20(B)とは隣接しているので、隣接する信号線12の間のリーク、すなわち、第2信号線12(G)と第3信号線12(B)との間のリークを検査することができる。さらに、第3検査パッド25(B)および第1検査パッド25(R)に電圧(Vs)を印加すると、第3絵素領域20(B)と第1絵素領域20(R)とは隣接しているので、第3信号線12(B)と第1信号線12(R)との間のリークを検査することができる。 Similarly, when a voltage (Vs) is applied to the second inspection pad 25 (G) and the third inspection pad 25 (B), the second pixel region 20 (G) and the third pixel region 20 (B) Since they are adjacent to each other, a leak between the adjacent signal lines 12, that is, a leak between the second signal line 12 (G) and the third signal line 12 (B) can be inspected. Further, when a voltage (Vs) is applied to the third inspection pad 25 (B) and the first inspection pad 25 (R), the third pixel region 20 (B) and the first pixel region 20 (R) are adjacent to each other. Therefore, the leak between the third signal line 12 (B) and the first signal line 12 (R) can be inspected.
 加えて、第1検査パッド25(R)に選択的に電圧(Vs)を印加すると、第1絵素領域20(R)を選択的に点灯させることができるので、単色ムラ(赤色ムラ)の検査を実行することができる。同様に、第2検査パッド25(G)に選択的に電圧(Vs)を印加すると、第2絵素領域20(G)を選択的に点灯させることができるので、単色ムラ(緑色ムラ)の検査を実行することができる。さらに、第3検査パッド25(B)に選択的に電圧(Vs)を印加すると、第3絵素領域20(B)を選択的に点灯させることができるので、単色ムラ(青色ムラ)の検査を実行することができる。 In addition, when the voltage (Vs) is selectively applied to the first inspection pad 25 (R), the first pixel region 20 (R) can be selectively lit, so that the single color unevenness (red unevenness) is reduced. An inspection can be performed. Similarly, when the voltage (Vs) is selectively applied to the second inspection pad 25 (G), the second picture element region 20 (G) can be selectively lit, so that the single color unevenness (green unevenness) is reduced. An inspection can be performed. Further, when the voltage (Vs) is selectively applied to the third inspection pad 25 (B), the third pixel region 20 (B) can be selectively lit, so that the inspection of the single color unevenness (blue unevenness) is performed. Can be executed.
 したがって、本実施形態の構成によれば、3個の検査パッド25(25(R)、25(G)、25(B))によって、3種の検査(点欠陥、S-Sリーク、単色ムラ)を実行可能な液晶パネルを提供することができる。したがって、図2に示したような6個の検査パッドにて3種の検査(点欠陥、S-Sリーク、単色ムラ)を実行していたものを、本実施形態の構成では、3個の検査パッド25にて実行することが可能となり、その結果、簡便な構成にて3種の検査を実行することができる。 Therefore, according to the configuration of the present embodiment, three inspection pads 25 (25 (R), 25 (G), 25 (B)) are used to perform three types of inspections (point defects, SS leaks, single color unevenness). ) Can be provided. Therefore, in the configuration of the present embodiment, three types of inspection (point defect, SS leak, single color unevenness) were performed with six inspection pads as shown in FIG. It is possible to execute with the inspection pad 25, and as a result, three types of inspection can be executed with a simple configuration.
 図4は、比較例となる液晶パネル300の構造を示す図である。図4に示した構造では、全ての信号線12が短絡配線22を介して、検査パッド25(All)に接続されている。この比較例300では、検査パッド25(All)に検査信号を印加することにより、点欠陥を検査することはできる。しかしながら、隣接する信号線12の間のリーク、および、単色ムラの検査は実行することはできない。 FIG. 4 is a diagram showing the structure of a liquid crystal panel 300 as a comparative example. In the structure shown in FIG. 4, all the signal lines 12 are connected to the test pad 25 (All) via the short-circuit wiring 22. In this comparative example 300, a point defect can be inspected by applying an inspection signal to the inspection pad 25 (All). However, the inspection of leaks between adjacent signal lines 12 and single-color unevenness cannot be performed.
 次に、図5は、比較例となる液晶パネル400の構造を示す図である。図5に示した構造では、奇数番目の信号線12(o)は、短絡配線22(o)を介して、検査パッド25(o)に接続されている。一方、偶数番目の信号線12(e)は、短絡配線22(e)を介して、検査パッド25(e)に接続されている。したがって、この比較例400では、検査パッド25(o)及び/又は25(e)に検査信号を印加することにより、点欠陥だけでなく、隣接する信号線12の間のリークの検査も実行することができる。しかしながら、この比較例400では、単色表示を行うことはできないので、単色ムラの検査は実行することはできない。 Next, FIG. 5 is a diagram showing a structure of a liquid crystal panel 400 as a comparative example. In the structure shown in FIG. 5, the odd-numbered signal line 12 (o) is connected to the test pad 25 (o) via the short-circuit wiring 22 (o). On the other hand, the even-numbered signal line 12 (e) is connected to the test pad 25 (e) via the short-circuit wiring 22 (e). Therefore, in this comparative example 400, not only point defects but also leaks between adjacent signal lines 12 are inspected by applying an inspection signal to the inspection pads 25 (o) and / or 25 (e). be able to. However, in this comparative example 400, since monochrome display cannot be performed, it is not possible to perform inspection for monochrome unevenness.
 以上説明したように、3種の検査(点欠陥、S-Sリーク、単色ムラ)を実行するには、図2に示すように6個の検査パッドが必要であったところ、本実施形態の構成では、3個の検査パッド25(25(R)、25(G)、25(B))によって、3種の検査(点欠陥、S-Sリーク、単色ムラ)を実行できる。6個の検査パッド25を用いた構成では、液晶パネルの狭額縁化の対応が困難であったこととともに、検査配線の構造が複雑になるがゆえに設計の困難性およびコストの問題があった。一方、本実施形態の構成100では、3個の検査パッド25のみを使用するので、液晶パネルの狭額縁化への対応が容易であり、そして、設計の容易さおよび低コスト化を実現することができる。 As described above, in order to execute three types of inspection (point defect, SS leak, single color unevenness), as shown in FIG. 2, six inspection pads are required. In the configuration, three types of inspection (point defect, SS leak, single color unevenness) can be executed by the three inspection pads 25 (25 (R), 25 (G), 25 (B)). In the configuration using the six test pads 25, it is difficult to cope with the narrowing of the frame of the liquid crystal panel, and there is a problem in design difficulty and cost because the structure of the test wiring is complicated. On the other hand, in the configuration 100 of this embodiment, since only three test pads 25 are used, it is easy to cope with the narrowing of the frame of the liquid crystal panel, and the design is easy and the cost is reduced. Can do.
 図6(a)は、それぞれ、本実施形態の液晶パネル100で、S-Sリークの検査および単色ムラの検査の実行を説明するための図であり、各絵素領域20に印加されるソース電圧Vs(検査信号)の状態を示している。 FIG. 6A is a diagram for explaining the execution of the SS leak inspection and the single color unevenness inspection in the liquid crystal panel 100 of the present embodiment. The source applied to each pixel region 20 is shown in FIG. The state of the voltage Vs (inspection signal) is shown.
 図6(a)に示した液晶パネル100では、赤色(R)の単色表示を行っている状態を示している。本実施形態の液晶パネル100では、赤色(R)、緑色(G)、青色(B)のそれぞれの単色表示を行うことができるので、単色ムラの検査を実行することができる。ここで、ソース電圧(+)は例えば+5Vを示し、ソース電圧(-)は例えば-5Vを示すが、それに限定されるものではない。 The liquid crystal panel 100 shown in FIG. 6A shows a state where a red (R) single color display is performed. In the liquid crystal panel 100 according to the present embodiment, each single color display of red (R), green (G), and blue (B) can be performed, so that a single color unevenness inspection can be performed. Here, the source voltage (+) indicates, for example, + 5V and the source voltage (−) indicates, for example, −5V, but is not limited thereto.
 図6(b)に示した液晶パネル100では、S-Sリークの検査を行っている状態を示している。ここでは、例えば、赤色(R)の列と緑色(G)の列との間のS-Sリークの検査している。なお、図6(a)に示した状態とは少し変えて、左側の赤色の列(R1)と、右側の赤色の列(R2)との印加状態が同じになるようにしている。そして、それら(R1、R2)に隣接する緑色の列(G1、G2)を逆位相にしている。この状態で、S-Sリークの検査をすれば、もしリークが生じた場合、0V(またはそれに近い値)の検査結果が出ることになる。 The liquid crystal panel 100 shown in FIG. 6B shows a state in which SS leak inspection is being performed. Here, for example, an SS leak between the red (R) column and the green (G) column is inspected. Note that the application state of the left red row (R1) and the right red row (R2) is the same as the state shown in FIG. 6 (a). And the green row | line | column (G1, G2) adjacent to them (R1, R2) is made into the antiphase. In this state, if the SS leak is inspected, if a leak occurs, an inspection result of 0 V (or a value close thereto) will be obtained.
 以上、本発明を好適な実施形態により説明してきたが、こうした記述は限定事項ではなく、勿論、種々の改変が可能である。 As mentioned above, although this invention has been demonstrated by suitable embodiment, such description is not a limitation matter and, of course, various modifications are possible.
 本発明によれば、6個の検査パッドを用いずに、複数の検査(3種の検査)を実行可能な液晶パネルおよびその検査方法を提供するができる。 According to the present invention, it is possible to provide a liquid crystal panel capable of performing a plurality of inspections (three types of inspections) without using six inspection pads, and an inspection method thereof.
 11 走査線(走査信号配線、ゲート配線)
 11a 短絡環
 12 信号線(画像信号配線、ソース配線)
 12a 短絡環
 13 画素電極
 15 対向電極
 16 付加容量
 17 画素電極
 20 絵素領域
 22 短絡配線
 25 検査パッド
 50 マトリックス領域
100 液晶パネル
200 液晶パネル
300 液晶パネル
400 液晶パネル
1000 液晶パネル
11 Scanning line (scanning signal wiring, gate wiring)
11a Shorting ring 12 Signal line (image signal wiring, source wiring)
12a Short-circuit ring 13 Pixel electrode 15 Counter electrode 16 Additional capacitance 17 Pixel electrode 20 Pixel region 22 Short-circuit wiring 25 Inspection pad 50 Matrix region 100 Liquid crystal panel 200 Liquid crystal panel 300 Liquid crystal panel 400 Liquid crystal panel 1000 Liquid crystal panel

Claims (3)

  1.  複数の絵素領域が配列されたマトリックス領域と、
     前記マトリックス領域にあって、平行に配列される複数の走査線と、
     前記複数の走査線に直交して配列される複数の信号線と
     を備えた液晶パネルであって、
     前記複数の信号線は、
          赤を規定する第1絵素領域を通る第1信号線群と、
          緑を規定する第2絵素領域を通る第2信号線群と、
          青を規定する第3絵素領域を通る第3信号線群と
     を含み、
     前記第1信号線群は、第1短絡配線を介して、第1検査パッドに接続されており、
     前記第2信号線群は、第2短絡配線を介して、第2検査パッドに接続されており、
     前記第3信号線群は、第3短絡配線を介して、第3検査パッドに接続されていることを特徴とする、液晶パネル。
    A matrix region in which a plurality of pixel regions are arranged; and
    A plurality of scanning lines arranged in parallel in the matrix region;
    A plurality of signal lines arranged orthogonal to the plurality of scanning lines, and a liquid crystal panel comprising:
    The plurality of signal lines are:
    A first signal line group passing through a first pixel region defining red;
    A second signal line group passing through the second pixel region defining green;
    A third signal line group passing through a third pixel region defining blue, and
    The first signal line group is connected to a first inspection pad via a first short-circuit wiring,
    The second signal line group is connected to a second inspection pad via a second short-circuit wiring,
    The liquid crystal panel, wherein the third signal line group is connected to a third inspection pad via a third short-circuit wiring.
  2.  前記第1検査パッド、前記第2検査パッドおよび前記第3検査パッドに検査信号を印加することにより、点欠陥、隣接する信号線の間のリーク、および、単色ムラの検査が実行されることを特徴とする、請求項1に記載の液晶パネル。 By applying inspection signals to the first inspection pad, the second inspection pad, and the third inspection pad, inspection of point defects, leakage between adjacent signal lines, and single-color unevenness is executed. The liquid crystal panel according to claim 1, which is characterized.
  3.  液晶パネルの検査方法であって、
     前記液晶パネルは、
     複数の絵素領域が配列されたマトリックス領域と、
     前記マトリックス領域にあって、平行に配列される複数の走査線と、
     前記複数の走査線に直交して配列される複数の信号線と
     を備え、
     前記複数の信号線は、
          赤を規定する第1絵素領域を通る第1信号線群と、
          緑を規定する第2絵素領域を通る第2信号線群と、
          青を規定する第3絵素領域を通る第3信号線群と
     を含み、
     前記第1信号線群は、第1短絡配線を介して、第1検査パッドに接続されており、
     前記第2信号線群は、第2短絡配線を介して、第2検査パッドに接続されており、
     前記第3信号線群は、第3短絡配線を介して、第3検査パッドに接続されており、
     前記第1検査パッド、前記第2検査パッドおよび前記第3検査パッドに検査信号を印加することにより、点欠陥、隣接する信号線の間のリーク、および、単色ムラの検査を実行する、検査方法。
    An inspection method for a liquid crystal panel,
    The liquid crystal panel is
    A matrix region in which a plurality of pixel regions are arranged; and
    A plurality of scanning lines arranged in parallel in the matrix region;
    A plurality of signal lines arranged orthogonal to the plurality of scanning lines, and
    The plurality of signal lines are:
    A first signal line group passing through a first pixel region defining red;
    A second signal line group passing through the second pixel region defining green;
    A third signal line group passing through a third pixel region defining blue, and
    The first signal line group is connected to a first inspection pad via a first short-circuit wiring,
    The second signal line group is connected to a second inspection pad via a second short-circuit wiring,
    The third signal line group is connected to a third inspection pad via a third short-circuit wiring,
    An inspection method for inspecting point defects, leakage between adjacent signal lines, and single-color unevenness by applying inspection signals to the first inspection pad, the second inspection pad, and the third inspection pad. .
PCT/JP2012/053813 2011-02-25 2012-02-17 Method for inspecting liquid crystal panel, and liquid crystal panel WO2012115005A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011039288 2011-02-25
JP2011-039288 2011-02-25

Publications (1)

Publication Number Publication Date
WO2012115005A1 true WO2012115005A1 (en) 2012-08-30

Family

ID=46720786

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2012/053813 WO2012115005A1 (en) 2011-02-25 2012-02-17 Method for inspecting liquid crystal panel, and liquid crystal panel

Country Status (1)

Country Link
WO (1) WO2012115005A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105676496A (en) * 2016-04-21 2016-06-15 深圳市华星光电技术有限公司 Liquid crystal display panel and liquid crystal display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10104647A (en) * 1996-09-30 1998-04-24 Advanced Display:Kk Liquid crystal display device
JP2001324721A (en) * 2000-03-06 2001-11-22 Hitachi Ltd Liquid crystal display device and its manufacturing method
JP2010164714A (en) * 2009-01-14 2010-07-29 Seiko Epson Corp Display, inspecting device, and inspection method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10104647A (en) * 1996-09-30 1998-04-24 Advanced Display:Kk Liquid crystal display device
JP2001324721A (en) * 2000-03-06 2001-11-22 Hitachi Ltd Liquid crystal display device and its manufacturing method
JP2010164714A (en) * 2009-01-14 2010-07-29 Seiko Epson Corp Display, inspecting device, and inspection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105676496A (en) * 2016-04-21 2016-06-15 深圳市华星光电技术有限公司 Liquid crystal display panel and liquid crystal display device

Similar Documents

Publication Publication Date Title
JP4869807B2 (en) Display device
JP4860699B2 (en) Display panel and display device having the same
US10223950B2 (en) Display panel
US20170205956A1 (en) Display substrate and method for testing the same, display apparatus
JP4662339B2 (en) LCD panel
KR101090255B1 (en) Panel and test method for display device
KR101628012B1 (en) Liquid crystal display device and method for testing pixels of the same
JP2001265248A (en) Active matrix display device, and inspection method therefor
JP2006053555A (en) Array substrate, main substrate having the same, and liquid crystal display device having the same
KR20080066308A (en) Display panel, method of inspecting the panel and method of manufacturing the panel
JP2010054551A (en) Display device and inspection probe for the display device
KR102010492B1 (en) Liquid crystal display device and Method for manufacturing the same
US20160343279A1 (en) Display device
KR20190095463A (en) Display device and its color screen inspection method
KR101152497B1 (en) Liquid crystal display device
JP2010164714A (en) Display, inspecting device, and inspection method
US20150241747A1 (en) Array substrate and display apparatus having the same
KR101174156B1 (en) Flat panel display
KR20080062264A (en) Array substrate for liquid crystal display device
JP2002098999A (en) Liquid crystal display device
JP2007171993A (en) Image display device
WO2010146745A1 (en) Method for inspecting display panel, and method for producing display device
WO2012115005A1 (en) Method for inspecting liquid crystal panel, and liquid crystal panel
JP2004102260A (en) Active matrix display inspection method
KR102037053B1 (en) Display panel

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12749834

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12749834

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP