WO2012111273A1 - Appareil électrique - Google Patents

Appareil électrique Download PDF

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Publication number
WO2012111273A1
WO2012111273A1 PCT/JP2012/000757 JP2012000757W WO2012111273A1 WO 2012111273 A1 WO2012111273 A1 WO 2012111273A1 JP 2012000757 W JP2012000757 W JP 2012000757W WO 2012111273 A1 WO2012111273 A1 WO 2012111273A1
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Prior art keywords
current
terminal
gate
circuit
voltage
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PCT/JP2012/000757
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English (en)
Japanese (ja)
Inventor
尚幸 中村
宮地　博幸
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パナソニック株式会社
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Publication of WO2012111273A1 publication Critical patent/WO2012111273A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
    • H03K17/785—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0081—Power supply means, e.g. to the switch driver

Definitions

  • the present invention is an upper arm power device such as an inverter system. More specifically, the present invention relates to a power device device that makes it possible to finely control the gate current by using the control power supply voltage value of the upper arm without increasing a dedicated control line for controlling the gate current value.
  • a power device such as an inverter system uses a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), and the driving of the power device is controlled by a constant voltage driving type gate driver.
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • IGBT Insulated Gate Bipolar Transistor
  • GaN GIT Gate Injection Transistor
  • a constant current driving method has attracted attention.
  • the GaN GIT device is turned on and off by applying or not applying a constant current to the gate of the GaN GIT device by a constant current circuit that generates a constant current.
  • the constant current circuit is usually used as a bias current for a linear circuit in many cases.
  • a combination of an on / off operation and a constant current circuit is used in an oscillation circuit (for example, Patent Document 1).
  • Patent Document 1 discloses an oscillation circuit composed of a combination of an on / off operation and a constant current circuit, and this oscillation circuit includes a constant current circuit proportional to a power supply voltage.
  • This constant current circuit is a conventional F / V conversion circuit (frequency / voltage conversion circuit) in which the oscillation frequency increases as the power supply voltage increases.
  • the present invention provides a power device device capable of finely controlling the gate current with a simple circuit configuration.
  • a power device device includes a source terminal, a drain terminal, and a gate terminal. Furthermore, the power device device includes a power device that is turned on and off by a gate current applied to the gate terminal. Furthermore, the power device apparatus has a variable voltage source that generates a variable voltage. Furthermore, the power device device includes a gate current setting unit that changes the gate current according to the voltage generated from the variable voltage source. Furthermore, the power device device has a current gate driver that outputs a current according to the output current of the gate current setting unit. Furthermore, the power device device has a level shift circuit for ensuring insulation and turning on / off the gate current.
  • the gate current when a large current load is applied, the gate current can be increased by increasing the power supply voltage of the insulating variable DCDC converter.
  • the power supply voltage of the insulated variable DCDC converter when the load is small, the power supply voltage of the insulated variable DCDC converter can be lowered.
  • the gate current can be set to an optimum gate current by reducing the gate current, and the gate current can be finely controlled without complicating the circuit configuration.
  • the gate current setting unit includes a V / I conversion circuit, and the V / I conversion circuit sets the gate current in proportion to the output voltage of the variable voltage source.
  • the gate current can be accurately controlled by changing the gate current in proportion to the output voltage of the insulating variable DCDC converter by the V / I conversion circuit.
  • the gate current setting unit is composed of a V / I conversion circuit, and the V / I conversion circuit has a current square circuit.
  • the gate current can be controlled more accurately.
  • variable voltage source has a bootstrap power supply circuit for superimposing a predetermined voltage on the gate voltage of the gate terminal.
  • the gate current can be controlled more accurately.
  • the power device device has a voltage sample hold circuit immediately before the gate current setting unit.
  • the power device device has a current sample and hold circuit immediately after the gate current setting unit.
  • the power supply voltage is converted into a current by the V / I conversion circuit, the timing at which the current is captured by the sample hold circuit is fixed, and the current can be held until the next capture.
  • the power device device has a photocoupler driver in which a level shift circuit, a current gate driver, and a gate current setting unit are integrated. Furthermore, the power device device preferably includes a gate current setting resistor as a gate current setting unit between the photocoupler driver and the gate terminal of the power device.
  • the gate current can be controlled by changing the potential difference between the source or drain of the power device and the gate.
  • FIG. 1 is a configuration diagram of the upper arm of the power device device according to the first embodiment of the present invention.
  • FIG. 2 is a first configuration diagram of a V / I conversion circuit included in the power device device of the embodiment.
  • FIG. 3 is a second configuration diagram of the V / I conversion circuit included in the power device device of the embodiment.
  • FIG. 4 is a third configuration diagram of the V / I conversion circuit included in the power device device of the embodiment.
  • FIG. 5 is a configuration diagram of a current square circuit included in the V / I conversion circuit of the embodiment.
  • FIG. 6 is a configuration diagram of the bootstrap power supply circuit and its peripheral circuits according to the embodiment.
  • FIG. 1 is a configuration diagram of the upper arm of the power device device according to the first embodiment of the present invention.
  • FIG. 2 is a first configuration diagram of a V / I conversion circuit included in the power device device of the embodiment.
  • FIG. 3 is a second configuration diagram of the V / I conversion circuit included in the power device
  • FIG. 7 is a diagram showing input / output current voltage characteristics in the first configuration of the V / I conversion circuit of the same embodiment.
  • FIG. 8 is a diagram showing input / output current voltage characteristics in the second configuration of the V / I conversion circuit of the same embodiment.
  • FIG. 9 is a diagram showing input / output current voltage characteristics in the third configuration of the V / I conversion circuit of the same embodiment.
  • FIG. 10 is a configuration diagram of a power device device according to the second embodiment of the present invention.
  • FIG. 11 is a configuration diagram of a voltage S / H (sample hold) circuit according to the embodiment.
  • FIG. 12 is a configuration diagram of a power device device according to the third embodiment of the present invention.
  • FIG. 13 is a configuration diagram of a current S / H (sample hold) circuit according to the embodiment.
  • FIG. 14 is a configuration diagram of a power device device according to the fourth embodiment of the present invention.
  • FIG. 15 is a configuration diagram of a power device device according to a comparative example of the embodiment of the present invention.
  • FIG. 1 is a configuration diagram of a power device device according to the first embodiment. Usually, this is a part called an upper arm, and a lower arm having almost the same configuration is connected and used in combination.
  • the power device device 1 includes a photocoupler 103 which is a kind of level shift circuit, a current gate driver 104, a current control terminal 114, a GaN / GIT device 105, A CPU (or control logic) 106, an insulating variable DCDC converter 107, a V / I conversion circuit (voltage / current conversion circuit) 108, and a main circuit positive power supply voltage terminal 109 are included.
  • the CPU (or control logic) 106 will be described below using the CPU 106 as an example, but is not limited to the CPU and may be a control logic.
  • the GaN / GIT device 105 is a gate injection transistor formed on a GaN substrate, and corresponds to the power device in the embodiment of the present invention.
  • the GaN GIT device 105 functions as a power device that has a low on-resistance and performs an on / off operation (switching operation) at a high speed.
  • the current gate driver 104 controls the on / off operation of the GaN / GIT device 105 by applying a constant on-current to the gate of the GaN / GIT device 105 or applying 0V or a negative off voltage.
  • a gate current setting resistor may be used instead of the current gate driver.
  • the insulated variable DCDC converter 107 is an insulated variable voltage source, and corresponds to the variable voltage source in the embodiment of the present invention.
  • the photocoupler 103 is a level shift circuit in the present invention.
  • the photocoupler 103 can transmit a current on / off signal (for example, H or L) from the CPU (or control logic) 106 despite the voltage transition of several hundred volts in the upper arm.
  • the upper arm is also called the high side.
  • the V / I conversion circuit 108 is a gate current setting unit in the embodiment of the present invention.
  • the V / I conversion circuit 108 changes the gate current according to the output voltage of the insulation type variable DCDC converter 107 via the current control terminal 114 provided at the output terminal of the current gate driver 104.
  • the CPU (or control logic) 106 sends a current on / off signal to the photocoupler 103 to generate a voltage floated from the main circuit negative power supply (main circuit ground) at the secondary output terminal of the photocoupler 103. Further, the CPU 106 outputs a signal to the control terminal 116 of the insulated variable DCDC converter 107 so that the output voltage of the insulated variable DCDC converter 107 becomes a desired value.
  • a secondary positive power supply terminal of a photocoupler 103 which is a kind of level shift circuit, a positive power supply terminal of a current gate driver 104, an input terminal of a V / I conversion circuit 108, A positive power supply terminal of the insulating variable DCDC converter 107 is connected to the node 100. Further, a negative power supply terminal on the secondary side of the photocoupler 103, a negative power supply terminal of the current gate driver 104, a source terminal of the GaN / GIT device 105, and a negative power supply terminal of the insulated variable DCDC converter 107 are provided. , Connected to the node 102.
  • the node 102 is connected to the lower arm, and is connected to the output terminal 110 of the power device device 1.
  • the lower arm is also called the low side.
  • the secondary output terminal of the photocoupler 103 and the input terminal of the current gate driver 104 are connected to the node 101.
  • the output terminal of the current gate driver 104 is connected to the gate terminal 111 of the GaN / GIT device 105 via the current control terminal 114.
  • the output terminal of the V / I conversion circuit 108 is connected to the current control terminal 114.
  • the drain terminal of the GaN / GIT device 105 is connected to the main circuit positive power supply voltage terminal 109.
  • the CPU (or control logic) 106 is connected to the primary-side anode terminal 112 and the cathode terminal 113 of the photocoupler 103, and the CPU (or control logic) 106 is also the control terminal of the insulation type variable DCDC converter 107. 116 is connected to 116.
  • FIG. 2 is a first configuration diagram of the V / I conversion circuit 108 included in the power device device 1 shown in FIG.
  • the voltage input terminal 200 is connected to one end of the upper voltage dividing resistor (r 1 ) 201. Further, the other end of the upper voltage dividing resistor (r 1 ) 201, one end of the lower voltage dividing resistor (r 2 ) 203, and the positive input terminal 202 of the operational amplifier 204 are connected. Further, the other end of the lower voltage dividing resistor (r 2 ) 203 and the ground terminal 210 of the V / I conversion circuit 2 are connected. The output terminal 205 of the operational amplifier 204 and the base terminal of the NPN transistor 206 are connected.
  • the negative input terminal 208 of the operational amplifier 204, the emitter terminal of the NPN transistor 206, and one end of a gm (mutual conductance) setting resistor (R) 209 are connected. Further, the other end of the gm setting resistor (R) 209 and the ground terminal 210 of the V / I conversion circuit 2 are connected, and the collector terminal of the NPN transistor 206 and the current output terminal 207 are connected.
  • FIG. 3 is another configuration (second configuration) diagram of the V / I conversion circuit 108 included in the power device apparatus 1 shown in FIG.
  • the voltage input terminal 300 is connected to one end of the upper voltage dividing resistor (r 1 ) 301. Further, the other end of the upper voltage dividing resistor (r 1 ) 301, one end of the lower voltage dividing resistor (r 2 ) 303, and the positive input terminal 302 of the operational amplifier 304 are connected. Further, the other end of the lower voltage dividing resistor (r 2 ) 303 and the ground terminal 310 of the V / I conversion circuit 3 are connected. The output terminal 305 of the operational amplifier 304 and the base terminal of the NPN transistor 306 are connected.
  • the negative input terminal 308 of the operational amplifier 304, the emitter terminal of the NPN transistor 306, and one end of the gm setting resistor (R 1 ) 309 are connected. Also, the other end of the gm setting resistor (R 1 ) 309 and the ground terminal 310 of the V / I conversion circuit 3 are connected. Further, the output of the band gap reference voltage circuit (V BG ) 311 and the positive input terminal 312 of the operational amplifier 313 are connected, the other end of the band gap reference voltage circuit (V BG ) 311, and the V / I conversion circuit 3 A ground terminal 310 is connected. Further, the output terminal 315 of the operational amplifier 313 and the base terminal of the NPN transistor 316 are connected.
  • the negative input terminal 317 of the operational amplifier 313, the emitter terminal of the NPN transistor 316, and one end of the gm setting resistor (R 2 ) 318 are connected, the other end of the gm setting resistor (R 2 ) 318, and the V / I conversion circuit.
  • 3 ground terminals 310 are connected.
  • the collector terminal 322 of the NPN transistor 316, the collector terminal and base terminal of the PNP transistor 320, and the base terminal of the PNP transistor 321 are connected.
  • the emitter terminal of the PNP transistor 320 and the emitter terminal of the PNP transistor 321 are connected to the power supply terminal 319.
  • the collector terminal of the NPN transistor 306, the collector terminal of the PNP transistor 321 and the current output terminal 307 are connected.
  • FIG. 4 is another configuration (third configuration) diagram of the V / I conversion circuit 108 included in the power device device 1 shown in FIG.
  • the V / I conversion circuit 4 in this configuration includes the V / I conversion circuit 3 shown in FIG. 3 and a current square circuit 401.
  • the V / I conversion circuit 3 converts the input voltage into a current and outputs the current.
  • the current square circuit 401 has a configuration that squares an input current and outputs the current.
  • FIG. 5 is a configuration diagram of the current square circuit 401 included in the V / I conversion circuit 4 of FIG.
  • a current input terminal 500, an anode terminal of a diode 501 and a base terminal of an NPN transistor 505 are connected. Further, the cathode terminal of the diode 501 and the anode terminal of the diode 502 are connected, and the cathode terminal of the diode 502 and the ground terminal 503 of the current square circuit 401 are connected. Further, the collector terminal of the NPN transistor 505 and the power supply terminal 504 of the current square circuit 401 are connected. The emitter terminal of the NPN transistor 505, the base terminal of the NPN transistor 508, the constant current source 507, and the node 506 are connected.
  • the emitter terminal of the NPN transistor 508 and the ground terminal 503 of the current square circuit 401 are connected, and the collector terminal of the NPN transistor 508 and the current output terminal 509 are connected. That is, the current input to the current input terminal 500 is squared, flows to the collector of the NPN transistor 508, and is output to the current output terminal 509 as a sink current. Thereby, the gate current can be controlled more finely.
  • FIG. 6 is a configuration diagram of a bootstrap power supply circuit used as a power supply for the upper arm control circuit according to the present embodiment and its peripheral circuits.
  • the power device apparatus 1 may include GaN / GIT devices 606 and 607 and a bootstrap power supply circuit 611 as shown in FIG. 6 instead of the insulating variable DCDC converter 107.
  • the bootstrap power supply circuit 611 functions to superimpose a predetermined voltage on the gate voltage of the gate terminal of the GaN / GIT device 606 of the upper arm with respect to the voltage at the midpoint of the GaN / GIT devices 606 and 607.
  • the upper arm means a circuit arranged on the positive side of the DC power supply
  • the lower arm means a circuit arranged on the negative side of the DC power supply.
  • the upper arm is connected to one end of a power device (for example, the GaN / GIT device 105 in FIG. 1) that performs the switching operation of the upper arm on the positive side of the DC power supply.
  • the load device is connected to one end of the power device that performs the switching operation of the lower arm from the other end of the power device.
  • the lower arm is connected to the other end of the power device that performs the switching operation of the load circuit and the upper arm and one end of the power device that performs the switching operation of the lower arm, and performs the switching operation of the lower arm on the negative side of the DC power supply.
  • a circuit to which the other end of the power device is connected a circuit in which the main circuit positive power supply voltage terminal 605 side is connected to the GaN / GIT device 606 is an upper arm, and a circuit in which the GaN / GIT device 607 is connected to a negative power supply voltage terminal 608 is a lower arm. Accordingly, the GaN / GIT device 606 functions as an upper arm control circuit, and the GaN / GIT device 607 functions as a lower arm control circuit.
  • negative power supply voltage terminal 604 in FIG. 6 corresponds to the node 102 in FIG.
  • positive power supply voltage terminal 603 in FIG. 6 corresponds to the node 100 in FIG.
  • the bootstrap power supply circuit 611 generates a gate voltage of the GaN / GIT device 606 with respect to the negative power supply voltage terminal 604 of the upper arm control circuit and the voltage ( For example, it has a function of generating a voltage higher by 10 V) from the positive power supply voltage terminal 603 of the upper arm control circuit.
  • the voltage at the negative power supply voltage terminal 604 of the upper arm control circuit is a source output that is a rectangular wave with an amplitude of 0V-300V.
  • the positive power supply voltage terminal 600 of the lower arm control circuit and the anode terminal of the diode 601 are connected, and the cathode terminal of the diode 601 and one end of the capacitor 602 are controlled by the upper arm.
  • the positive power supply voltage terminal 603 of the circuit is connected.
  • the source terminal of the GaN GIT device 606 for the upper arm, the drain terminal of the GaN GIT device 607 for the lower arm, and the other end of the capacitor 602 are connected to the negative power supply voltage terminal 604 of the upper arm control circuit. Has been.
  • the drain terminal of the GaN GIT device 606 for the upper arm is connected to the main circuit positive power supply voltage terminal 605
  • the source terminal of the GaN GIT device 607 for the lower arm is the main circuit ground terminal
  • the lower arm It is connected to the negative power supply voltage terminal 608 of the control circuit.
  • the gate terminal 609 of the upper arm GaN GIT device 606 is connected to the upper arm current gate driver
  • the gate terminal 610 of the lower arm GaN GIT device 607 is connected to the lower arm current gate driver.
  • the bootstrap power supply circuit 611 has a configuration in which both ends of the capacitor 602 are power supply terminals.
  • the power device apparatus 1 can superimpose a predetermined voltage on the gate voltage of the GaN • GIT device 105 without using the insulating variable DCDC converter 107.
  • the predetermined voltage is, for example, a voltage of 0-10V.
  • the voltage difference between the positive power supply voltage terminal 603 of the upper arm control circuit and the negative power supply voltage terminal (source output) 604 of the upper arm control circuit. Can be set to 0-10V.
  • the above is the apparatus configuration of the power device apparatus 1 according to the first embodiment of the present invention.
  • the CPU (or control logic) 106 uses PWM (Pulse Width Modulation) modulation as in a normal system to turn on and off the GaN / GIT device 105 as a power device.
  • PWM Pulse Width Modulation
  • the GaN • GIT device 105 does not use a linear operation region, and drive loss is reduced.
  • a current on / off signal is sent from the CPU 106 to the anode terminal 112 and the cathode terminal 113 on the primary input side of the photocoupler 103.
  • the photocoupler 103 can generate a voltage floating from the main circuit negative power source (main circuit ground) at the secondary output terminal of the photocoupler 103.
  • the secondary output terminal of the photocoupler 103 is connected to the input terminal of the current gate driver 104.
  • the output terminal of the current gate driver 104 is connected to the gate terminal 111 of the GaN / GIT device 105 via the current control terminal 114. With such a configuration, the GaN / GIT device 105 can be turned on and off.
  • the CPU (or control logic) 106 knows the drain current of the GaN / GIT device 105. For example, it is assumed that a motor is connected to the GaN • GIT device 105. The drain current flowing through the drain terminal of the GaN ⁇ GIT device 105 when the motor connected to the GaN ⁇ GIT device 105 is operating at maximum rotation is set to 50A. Further, the drain current when the motor to which the GaN / GIT device 105 is connected is performing the minimum rotation operation is 1A. At this time, the gate current necessary for flowing the drain current 50A to the GaN / GIT device 105 is, for example, 50 mA, and the gate current necessary for flowing the drain current 1A is, for example, 1 mA.
  • the current gate driver 104 During the maximum rotation of the motor, the current gate driver 104 generates a 50 mA gate current. For this purpose, the CPU (or control logic) 106 outputs a signal to the control terminal 116 of the insulating variable DCDC converter 107 so that a voltage of 10 V is output to the insulating variable DCDC converter 107. Further, the current gate driver 104 generates a 1 mA gate current during the minimum rotation operation of the motor. For this purpose, the CPU (or control logic) 106 outputs a signal to the control terminal 116 of the isolated variable DCDC converter 107 so that a voltage of 5 V is output to the isolated variable DCDC converter 107.
  • the V / I conversion circuit 108 receives the output voltage of the insulation type variable DCDC converter 107 and outputs a current.
  • the GaN • GIT device 105 performs the on / off operation without entering the linear operation region, so that the loss does not increase.
  • the output voltage (V CC ) of the insulation type variable DCDC converter 107 is the same as the voltage input terminal 200 and the V / I conversion. It is equal to the potential difference between the ground terminals 210 of the circuit 2.
  • the voltage related to the positive input terminal 202 divided by the first voltage dividing resistor (r 1 ) 201 and the second voltage dividing resistor (r 2 ) 203 is input to the positive side of the operational amplifier 204.
  • a gm setting resistor (R) 209 is connected to the negative input of the operational amplifier 204. Since the operational amplifier 204 operates so that the positive and negative input voltages are equal, the collector current of the NPN transistor 206, that is, the output current of the V / I conversion circuit 2 having the first configuration is expressed by the following (Equation 1). become.
  • the V / I conversion circuit 2 in this configuration changes the gate current of the GaN • GIT device 105 in proportion to the output voltage (V CC ) of the insulation type variable DCDC converter 107.
  • FIG. 7 is a diagram showing input / output current-voltage characteristics in the first configuration of the V / I conversion circuit in which this equation is graphed.
  • the function is a linear function passing through the origin.
  • the power supply voltage rating of a semiconductor process used in the current gate driver 104 is, for example, 5V to 10V or 10V to 30V in many cases. Therefore, the ratio of the variable range of the power supply voltage is about 1 to 3.
  • the necessary range of the gate current is, for example, 1 mA to 50 mA.
  • the ratio of the gate current can only be 1 to 3.
  • the output voltage (V CC ) of the insulation type variable DCDC converter 107 is equal to the voltage input terminal 300 and the V / I. It is equal to the potential difference between the ground terminals 310 of the conversion circuit.
  • the voltage divided by the first voltage dividing resistor (r 1 ) 301 and the second voltage dividing resistor (r 2 ) 303 is input to the positive side of the operational amplifier 304.
  • a gm setting resistor (R 1 ) 309 is connected to the negative input of the operational amplifier 304. Since the operation is performed so that the positive and negative input voltages of the operational amplifier are equal, the collector current of the NPN transistor 306 is expressed by the following (Equation 2).
  • the output voltage from the bandgap reference voltage circuit 311 is input to the positive side of the operational amplifier 313, and the gm setting resistor (R 2 ) 318 is connected to the negative input of the operational amplifier 313.
  • the operational amplifier 313 operates so that the positive and negative input voltages are equal to each other, and the collector current of the NPN transistor 316 is input to the mirror circuit constituted by the PNP transistors 320 and 321. Therefore, the collector current of the PNP transistor 321 is expressed by the following (Equation 3).
  • the V / I conversion circuit 3 in this configuration changes the gate current of the GaN • GIT device 105 in proportion to the output voltage of the insulation type variable DCDC converter 107.
  • FIG. 8 is a diagram showing input / output current-voltage characteristics in the second configuration of the V / I conversion circuit in which this equation is graphed.
  • the function is a linear function in which the Y intercept 800 is ⁇ V BG / R 2 .
  • the range of the gate current is, for example, 5 mA to 50 mA. can do. That is, the ratio of the variable range of the gate current is 10.
  • V CC V CC
  • FIG. 9 is a diagram showing the input / output current voltage characteristics in the third configuration of the V / I conversion circuit in which this equation is graphed.
  • the current-voltage characteristic of the V / I conversion circuit 3 in the second configuration shown in FIG. 8 is expressed by a linear function
  • the gate current range is set to 1 mA to 50 mA, for example. can do. That is, the ratio of the variable range of the gate current is 50.
  • the power device device 1 including any one of the V / I conversion circuits 2, 3, 4 from the first configuration to the third configuration includes the GaN •
  • the gate current can be set with high accuracy in accordance with the drain current of the GIT device 105.
  • the power device device 1 of the present invention performs the same operation. Further, even if the photocoupler 103 in FIG. 1 is replaced with a level shift circuit constituted by a high voltage transistor or the like, the power device device 1 of the present invention performs the same operation.
  • the power device device according to this embodiment is different from the power device device according to the first embodiment in that a voltage sample hold circuit is arranged at the input side terminal of the V / I conversion circuit.
  • FIG. 10 is a configuration diagram of a power device device according to the second embodiment.
  • the voltage S / H (sample hold) circuit 1015 has a function of fixing the timing of taking in the power supply voltage and holding the voltage until the next taking-in. Thereby, for example, it is possible to set an optimum gate current in accordance with the timing immediately before the drain current of the GaN / GIT device 1005 is turned on, and the influence of electromagnetic induction noise or the like due to the operation of the GaN / GIT device 1005 is affected. It is possible to avoid it.
  • the power device device 10 includes a secondary positive output terminal of a photocoupler 1003, a positive power supply terminal of a current gate driver 1004, a voltage S / H (sample hold).
  • the input terminal of the circuit 1015 and the positive power supply terminal of the insulation type variable DCDC converter 1007 are connected to the node 1000.
  • a negative power supply terminal on the secondary side of the photocoupler 1003, a negative power supply terminal of the current gate driver 1004, a source terminal of the GaN / GIT device 1005, and a negative power supply terminal of the insulating variable DCDC converter 1007 are provided. , Connected to the node 1002.
  • the node 1002 is connected to the lower arm and is connected to the output terminal 1010 of the power device device 10.
  • the secondary output terminal of the photocoupler 1003, the input terminal of the current gate driver 1004, and the control terminal of the voltage S / H (sample hold) circuit 1015 are connected to the node 1001.
  • the output terminal of the current gate driver 1004 is connected to the gate terminal 1011 of the GaN / GIT device 1005 via the current control terminal 1014. Further, the output terminal 1017 of the voltage S / H (sample hold) circuit 1015 and the input terminal of the V / I conversion circuit 1008 are connected. Further, the output terminal of the V / I conversion circuit 1008 and the current control terminal 1014 of the current gate driver 1004 are connected.
  • the drain terminal of the GaN • GIT device 1005 is connected to the main circuit positive power supply voltage terminal 1009.
  • the CPU (or control logic) 1006 is connected to the primary-side anode terminal 1012 and the cathode terminal 1013 of the photocoupler 1003, respectively.
  • the CPU (or control logic) 1006 is connected to the control terminal 1016 of the insulation type variable DCDC converter 1007.
  • FIG. 11 is a configuration diagram of the voltage S / H (sample hold) circuit 1015 included in FIG.
  • the voltage input terminal 1100 is connected to one end of the switch 1101.
  • the other end of the switch 1101, one end of the capacitor 1103, and the positive input terminal 1102 of the operational amplifier 1105 are connected.
  • the other end of the capacitor 1103 is connected to the ground terminal 1104 of the voltage S / H (sample hold) circuit.
  • the switch control terminal 1107 is connected to the control input terminal of the switch 1101. Further, the negative input terminal of the operational amplifier 1105, the output terminal of the operational amplifier 1105, and the voltage output terminal 1106 of the voltage S / H (sample hold) circuit are connected.
  • the power device device 10 has a voltage S / H (sample hold) immediately before a V / I conversion circuit 1008 corresponding to the V / I conversion circuit 108 in the power device device 1 of FIG. The difference is where the circuit 1015 is provided.
  • the insulated variable DCDC converter 1007 is used for the upper arm, but since it changes in a short time from the ground level of the main circuit to the potential difference of several hundred volts, there may be a lot of power supply noise. Therefore, even when it is desired to set the CPU (or control logic) 1006 in FIG. 10 to an arbitrary power supply voltage, a desired voltage may not be obtained due to power supply noise. Therefore, the output terminal of the photocoupler 1003 is connected to the control terminal of the voltage S / H (sample hold) circuit 1015, the timing for taking in the node 1000 as the power supply voltage is fixed, and the voltage is held until the next take-in.
  • the capture timing is, for example, the timing immediately before the drain current of the GaN / GIT device 1005 is turned on, and the influence of electromagnetic induction noise or the like due to the operation of the GaN / GIT device 1005 can be avoided.
  • V / I conversion circuit 1008 described with reference to FIGS. 2 to 5 can be used as it is.
  • the power device device 10 according to the second embodiment of the present invention can set an optimum gate current in accordance with the drain current of the GaN / GIT device 1005. Therefore, the conventional simple configuration can solve the problem that it is difficult to set a fine gate current.
  • the power device device 10 of the present invention performs the same operation as described above.
  • the bootstrap power supply circuit 611 is used, the fluctuation of the power supply voltage is particularly large. Therefore, the power device device 10 according to the second embodiment in which the timing for taking in the node 1000 that is the power supply voltage is fixed is particularly effective. Further, even if the photocoupler 1003 in FIG. 10 is replaced with a level shift circuit composed of a high voltage transistor or the like, the power device device of the present invention performs the same operation as described above.
  • the power device device in the present embodiment is different from the power device devices in the first and second embodiments in that, in the power device device, a current S / H (sample hold) circuit is connected to a terminal on the output side of the V / I conversion circuit. Is the point where is placed.
  • a current S / H (sample hold) circuit is connected to a terminal on the output side of the V / I conversion circuit. Is the point where is placed.
  • FIG. 12 is a configuration diagram of a power device device according to the third embodiment.
  • the power device device 12 includes a secondary positive power supply terminal of the photocoupler 1203, a positive power supply terminal of the current gate driver 1204, and an input terminal of the V / I conversion circuit 1208.
  • a positive power supply terminal of the variable type DCDC converter 1207 is connected to the node 1200.
  • the secondary negative power supply terminal of the photocoupler 1203, the negative power supply terminal of the current gate driver 1204, the source terminal of the GaN / GIT device 1205, and the negative power supply terminal of the insulated variable DCDC converter 1207 are provided.
  • the node 1202 is connected to the lower arm and connected to the output terminal 1210 of the power device device 12.
  • the secondary output terminal of the photocoupler 1203 and the input terminal of the current gate driver 1204 are connected to the node 1201.
  • the output terminal of the current gate driver 1204 is connected to the gate terminal 1211 of the GaN / GIT device 1205 via the current control terminal 1214. Further, the output terminal of the V / I conversion circuit 1208 and the input terminal 1217 of the current S / H circuit 1215 are connected. Also, the output terminal of the current S / H circuit 1215 and the current control terminal 1214 of the current gate driver 1204 are connected.
  • the drain terminal of the GaN / GIT device 1205 is connected to the main circuit positive power supply voltage terminal 1209.
  • the CPU (or control logic) 1206 is connected to the anode terminal 1212 and the cathode terminal 1213 on the primary side of the photocoupler 1203.
  • the CPU (or control logic) 1206 is connected to the control terminal 1216 of the insulation type variable DCDC converter 1207.
  • FIG. 13 is a configuration diagram of the current S / H circuit 1215 included in FIG.
  • the current input terminal 1300 of the current S / H circuit 1215 is connected to one end of the switch 1301 and the drain terminal of the Nch MOS transistor 1302.
  • the other end of the switch 1301, the gate terminal of the Nch MOS transistor 1302, and the gate terminal of the Nch MOS transistor 1304 are connected to the node 1303.
  • the source terminal of the Nch MOS transistor 1302 and the source terminal of the Nch MOS transistor 1304 are connected to the ground terminal 1306 of the current S / H circuit 1215.
  • the switch control terminal 1307 is connected to the control input terminal of the switch 1301. Further, the drain terminal of the Nch MOS transistor 1304 and the current output terminal 1305 of the current S / H circuit are connected.
  • the power device device 12 according to this embodiment shown in FIG. 12 is provided with a current S / H circuit 1215 immediately after the V / I conversion circuit 1208 corresponding to the V / I conversion circuit 108 in the power device device 1 of FIG.
  • the difference is the difference.
  • the insulating variable DCDC converter 1207 is used for the upper arm.
  • the CPU (or control logic) 1206 in FIG. 12 wants to set an arbitrary power supply voltage, a desired voltage may not be obtained due to power supply noise. Therefore, the output terminal of the photocoupler 1203 is connected to the control terminal of the current S / H circuit 1215, and the node 1200 that is the power supply voltage is converted into a current by the V / I conversion circuit 1208.
  • the timing at which the current from the V / I conversion circuit 1208 is captured is fixed by the current S / H circuit 1215, and the current is held until the next capture.
  • the operation of the current S / H circuit 1215 will be described with reference to FIG.
  • the switch 1301 When the switch 1301 is closed, the input current applied from the current input terminal 1300 is the same as the input current as an output current from the current output terminal 1305 because the Nch MOS transistors 1302 and 1304 form a mirror circuit. Pull in.
  • the switch control terminal 1307 is a sampling control terminal for current S / H. By opening the switch 1301, the gate voltage of the node 1303 can be held, and the current is held. As described above, the current S / H circuit operates.
  • V / I conversion circuit described in FIGS. 2 to 5 can be used as it is.
  • the power device device 12 according to the third embodiment of the present invention can set an optimum gate current in accordance with the drain current of the GaN • GIT device 1205. Therefore, the conventional simple configuration can solve the problem that it is difficult to set a fine gate current.
  • the power device device 12 of the present invention performs the same operation as described above.
  • the power device device 12 according to the third embodiment in which the fluctuation of the power supply voltage is particularly large and the timing for taking in the current from the V / I conversion circuit 1208 is fixed is particularly effective.
  • the photocoupler 1203 in FIG. 12 is replaced with a level shift circuit composed of a high voltage transistor or the like, the power device device of the present invention performs the same operation as described above.
  • the power device device in this embodiment is different from the power device device in the first embodiment in that instead of the photocoupler 103, the current gate driver 104, and the V / I conversion circuit 108, the photocoupler 103, the current gate driver 104, A photocoupler driver 1403 integrated with the V / I conversion circuit 108 is provided. Furthermore, a gate current setting resistor 1404 is provided as a gate current setting unit between the photocoupler driver 1403 and the gate of the GaN / GIT device 1405.
  • FIG. 14 is a configuration diagram of a power device device according to the fourth embodiment.
  • the secondary positive power supply terminal 1400 of the photocoupler driver 1403 is connected to the positive power supply terminal of the insulation type variable DCDC converter 1407.
  • the secondary negative power supply terminal 1402 of the photocoupler driver 1403, the source terminal of the GaN GIT device 1405, and the negative power supply terminal of the insulation type variable DCDC converter 1407 are connected to the node 1410.
  • the secondary output terminal 1401 of the photocoupler driver 1403 is connected to one end of the gate current setting resistor 1404.
  • the other end of the gate current setting resistor 1404 is connected to the gate terminal 1411 of the GaN / GIT device 1405.
  • the drain terminal of the GaN / GIT device 1405 is connected to the main circuit positive power supply voltage terminal 1409.
  • the CPU (or control logic) 1406 is connected to the primary-side anode terminal 1412 and the cathode terminal 1413 of the photocoupler driver 1403, respectively.
  • the CPU (or control logic) 1406 is connected to the control terminal 1416 of the insulation type variable DCDC converter 1407.
  • a CPU (or control logic) 1406 reduces the drive loss without using a linear operation region by using PWM modulation and turning on / off the power device as in a normal system.
  • the CPU (or control logic) 1406 sends a current on / off signal to the anode terminal 1412 and the cathode terminal 1413 of the photocoupler driver 1403.
  • the photocoupler driver 1403 can generate a voltage floating from the main circuit negative power supply (main circuit ground) at the output terminal 1401 on the secondary side.
  • the secondary output terminal 1401 of the photocoupler driver 1403 is connected to one end of the gate current setting resistor 1404 and supplies the gate current from the other end of the gate current setting resistor 1404 to the gate terminal 1411 of the GaN GIT device 1405. .
  • V F is V GS of the GaN / GIT device 1405, and can be expressed equivalently by the same formula as that in which a diode is connected between the gate and the source, and is expressed as V F representing the forward voltage. .
  • the GaN / GIT device 1405 can be turned on and off in the same manner as a general system.
  • the CPU (or control logic) 1406 generally grasps the drain current of the GaN • GIT device 1405. For example, it is assumed that a motor is connected to the GaN / GIT device 1405.
  • the drain current flowing through the drain terminal of the GaN / GIT device 1405 when the motor to which the GaN / GIT device 1405 is connected is operating at maximum rotation is 50 A, and the drain current when operating at the minimum rotation is 1 A.
  • the gate current required to flow the drain current 50A to the GaN / GIT device 1405 is, for example, 50 mA
  • the gate current required to flow the drain current 1A is, for example, 1 mA.
  • the photocoupler driver 1403 generates a 50 mA gate current during the maximum rotation of the motor.
  • the CPU (or control logic) 1406 outputs a signal to the control terminal 1416 of the isolated variable DCDC converter 1407 so that a voltage of 10 V is output to the isolated variable DCDC converter 1407.
  • the photocoupler driver 1403 generates a 1 mA gate current during the minimum rotation operation of the motor.
  • the CPU (or control logic) 1406 outputs a signal to the control terminal 1416 of the isolated variable DCDC converter 1407 so that a voltage of 5 V is output to the isolated variable DCDC converter 1407.
  • the power device device 14 according to the fourth embodiment of the present invention can set an optimum gate current in accordance with the drain current of the GaN • GIT device 1405, which is a conventional simple device. With a simple configuration, the problem that fine gate current setting is difficult can be solved.
  • the power device device 14 of the present invention performs the same operation as described above. Further, even if the photocoupler driver 1403 in FIG. 14 is replaced with a level shift circuit composed of a high breakdown voltage transistor or the like, the power device device of the present invention performs the same operation as described above.
  • FIG. 15 is a configuration diagram of a power device device according to a comparative example of the embodiment of the present invention.
  • the secondary positive power supply terminal 1500 of the photocoupler 1503 and the secondary positive power supply terminal 1500 of the photocoupler 1508 are connected to the positive power supply terminal of the isolated DCDC converter 1507. .
  • the secondary negative power supply terminal 1502 of the photocoupler 1503, the secondary negative power supply terminal 1502 of the photocoupler 1508, the source terminal of the GaN GIT device 1505, and the negative of the isolated DCDC converter 1507 The power supply terminal is connected to the node 1510.
  • the secondary output terminal 1501 of the photocoupler 1503 and one end of the gate current setting resistor (R 1 ) 1504 are connected, and the secondary output terminal 1517 of the photocoupler 1508 and the gate current setting resistor (R 2 )
  • One end of 1512 is connected, and the other end of the gate current setting resistor (R 1 ) 1504, the other end of the gate current setting resistor (R 2 ) 1512, and the gate terminal 1511 of the GaN GIT device 1505 are connected.
  • the drain terminal of the GaN / GIT device 1505 is connected to the main circuit positive power supply voltage terminal 1509, and the CPU (or control logic) 1506 is connected to the primary-side anode terminal 1513 and cathode terminal 1514 of the photocoupler 1503.
  • a CPU (or control logic) 1506 is connected to an anode terminal 1516 and a cathode terminal 1515 on the primary side of the photocoupler 1508, respectively.
  • a CPU (or control logic) 1506 uses PWM modulation to turn on and off a power device, thereby reducing drive loss without using a linear operation region. Specifically, a current on / off signal is sent to the anode terminal 1513 and the cathode terminal 1514 of the photocoupler 1503, and a current on / off signal is sent to the anode terminal 1516 and the cathode terminal 1515 of the photocoupler 1508. A voltage floated from the main circuit negative power supply (main circuit ground) can be generated at the secondary output terminal of the coupler 1508.
  • the gate current setting resistor (R 2 ) 1512 has a resistance value twice that of the gate current setting resistor (R 1 ) 1504.
  • the gate current I (V CC ) is expressed by the following (Equation 7).
  • V F of (Expression 7) is V GS of the GaN • GIT device 1505, and can be expressed equivalently by the same expression as that in which a diode is connected between the gate and the source. Therefore, V F representing the forward voltage is expressed. It is written.
  • the gate setting resistor R is a parallel combined resistance value of the gate current setting resistor (R 1 ) 1504 and the gate current setting resistor (R 2 ) 1512. The following ( It has the value shown in equation 8).
  • V F 3V
  • the CPU (or control logic) 1506 knows the drain current of the GaN GIT device 1505. For example, when a motor is connected to the GaN ⁇ GIT device 1505, the drain current flowing through the drain terminal of the GaN ⁇ GIT device 1505 when the motor connected to the GaN ⁇ GIT device 1505 is operating at maximum rotation is 50A, The drain current during the minimum rotation operation is 1A. At this time, the gate current required to flow the drain current 50A to the GaN / GIT device 1505 is, for example, 50 mA, and the gate current required to flow the drain current 1A is 1 mA.
  • the CPU (or control logic) 1506 is connected to the anode terminal 1513 and the cathode terminal 1514 of the photocoupler 1503 so that the gate current setting resistor 1504 and the gate current setting resistor 1512 generate these gate currents during the maximum rotation operation of the motor.
  • a current-on signal is sent, and a current-on signal is sent to the anode terminal 1516 and the cathode terminal 1515 of the photocoupler 1508.
  • the power device device requires two systems of photocouplers 1503 and 1508, which increases complexity, increases cost, and reliability. The problem of falling.
  • n photocouplers level shift circuits 1503 and 1508
  • the gate current becomes one fixed value, and there is a problem that fine current setting is difficult if cost is prioritized.
  • the insulating variable DCDC converter may be replaced with a bootstrap power supply circuit.
  • the photocoupler may be replaced with a level shift circuit configured with a high voltage transistor or the like.
  • the power device device according to the present invention includes other embodiments realized by combining arbitrary components in the above embodiments, and those skilled in the art without departing from the gist of the present invention with respect to the embodiments. Modifications obtained by various modifications that can be conceived and various devices including the power device device according to the present invention are also included in the present invention.
  • an inverter system such as an air conditioner provided with the power device device according to the present invention is also included in the present invention.
  • the present invention is a power device device that can significantly reduce power consumption at low output in an inverter system such as an air conditioner, a half-bridge circuit, and a full-bridge circuit, and can greatly contribute to improvement of energy saving performance.

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  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

La présente invention concerne un appareil électrique capable de commander avec précision un courant de grille et présentant une configuration de circuit simple. Un appareil électrique (1) est pourvu d'une borne de source, d'une borne de drain et d'une borne de gâchette, et l'appareil électrique est également pourvu d'un dispositif de commande (105) effectuant des opérations de marche/arrêt avec un courant de grille appliqué sur la borne de gâchette. L'appareil électrique est pourvu : d'une source de tension variable (107) produisant une tension variable ; une unité de réglage de courant de grille (108) modifiant le courant de grille en fonction de la tension produite par la source de tension variable (107) ; d'un pilote de grille de courant (104) délivrant un courant en fonction d'un courant de sortie de l'unité de réglage de courant de grille ; et d'un circuit de déplacement de niveau (103) garantissant l'isolation et mettant en marche et à l'arrêt le courant de grille.
PCT/JP2012/000757 2011-02-18 2012-02-06 Appareil électrique WO2012111273A1 (fr)

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JP2011-033802 2011-02-18
JP2011033802A JP2014089487A (ja) 2011-02-18 2011-02-18 パワーデバイス装置

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Cited By (3)

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Publication number Priority date Publication date Assignee Title
JP2016144255A (ja) * 2015-01-30 2016-08-08 株式会社デンソー 半導体スイッチング素子の駆動装置
WO2016181597A1 (fr) * 2015-05-13 2016-11-17 パナソニックＩｐマネジメント株式会社 Circuit d'attaque, circuit de commande de commutation et dispositif de commutation
CN111522384A (zh) * 2020-05-29 2020-08-11 杰创智能科技股份有限公司 一种采样保持的超低功耗带隙基准电路

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JPS57133705A (en) * 1981-02-12 1982-08-18 Toshiba Corp Variable frequency oscillating circuit
JPS61247270A (ja) * 1985-04-23 1986-11-04 Fuji Electric Co Ltd ゲ−トタ−ンオフサイリスタの制御回路
JP2004088886A (ja) * 2002-08-26 2004-03-18 Toshiba Corp 半導体装置

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
JPS57133705A (en) * 1981-02-12 1982-08-18 Toshiba Corp Variable frequency oscillating circuit
JPS61247270A (ja) * 1985-04-23 1986-11-04 Fuji Electric Co Ltd ゲ−トタ−ンオフサイリスタの制御回路
JP2004088886A (ja) * 2002-08-26 2004-03-18 Toshiba Corp 半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016144255A (ja) * 2015-01-30 2016-08-08 株式会社デンソー 半導体スイッチング素子の駆動装置
US10081253B2 (en) 2015-01-30 2018-09-25 Denso Corporation Driving device for semiconductor switching element and control system for power converter
WO2016181597A1 (fr) * 2015-05-13 2016-11-17 パナソニックＩｐマネジメント株式会社 Circuit d'attaque, circuit de commande de commutation et dispositif de commutation
JPWO2016181597A1 (ja) * 2015-05-13 2018-03-01 パナソニックＩｐマネジメント株式会社 駆動回路、スイッチング制御回路およびスイッチング装置
US10848145B2 (en) 2015-05-13 2020-11-24 Panasonic Semiconductor Solutions Co., Ltd. Driver circuit, switching control circuit, and switching device
CN111522384A (zh) * 2020-05-29 2020-08-11 杰创智能科技股份有限公司 一种采样保持的超低功耗带隙基准电路

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