WO2012108041A1 - Image display device and display image inspection method - Google Patents

Image display device and display image inspection method Download PDF

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Publication number
WO2012108041A1
WO2012108041A1 PCT/JP2011/052900 JP2011052900W WO2012108041A1 WO 2012108041 A1 WO2012108041 A1 WO 2012108041A1 JP 2011052900 W JP2011052900 W JP 2011052900W WO 2012108041 A1 WO2012108041 A1 WO 2012108041A1
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WIPO (PCT)
Prior art keywords
test
region
signal
display element
elements
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PCT/JP2011/052900
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French (fr)
Japanese (ja)
Inventor
荒井　豊
Original Assignee
Ｎｅｃディスプレイソリューションズ株式会社
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Priority to JP2012556717A priority Critical patent/JP5574460B2/en
Priority to PCT/JP2011/052900 priority patent/WO2012108041A1/en
Publication of WO2012108041A1 publication Critical patent/WO2012108041A1/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • the present invention relates to an image display device and a display image inspection method for displaying high-quality and high-definition images such as medical images.
  • DICOM Digital Imaging and Communication in Medicine
  • the DICOM standard defines the gray scale reproducibility of the display device, and specifies a standard display function for displaying a gray scale image. Since the human eye has a characteristic of relatively higher sensitivity in a dark area than in a bright area of an image, this standard display function is non-linear. Therefore, DICOM measures the relationship between the JND (Just Notifiable Difference) index, which represents the minimum luminance difference that can be identified by the average observer, and the luminance value, and this standard display function.
  • JND Just Notifiable Difference
  • the gray scale standard display function is obtained from the luminance value at the time of black display (black luminance) and the luminance value at the time of white display (white luminance), and the gray scale corresponding to DICOM is obtained. Reproducibility is realized.
  • a technique for obtaining a LUT (Look Up Table) according to JND or DICOM gamma characteristics has been proposed (for example, see Patent Document 1).
  • FIG. 5 is a block diagram showing a configuration of an image display device that realizes gray scale reproducibility that conforms to the above-mentioned DICOM standard.
  • the image display device 1A shown in FIG. 5 is an active matrix drive type liquid crystal display device.
  • the image display device 1A includes a video signal processing unit 11, a control unit 12, a test signal generation unit 13, and a drive unit. 15, a test area driving unit 16, a backlight driving unit 17, and a display unit 21 ⁇ / b> A.
  • the video signal processing unit 11 is supplied with a video signal from an externally connected video signal generator or the like (not shown), and a necessary signal for the supplied video signal. Processing is performed and output to the display unit 21A.
  • the video signal processing unit 11 converts the video level of the supplied video signal according to the DICOM gamma characteristic.
  • the display unit 21A also displays a display element region 22A for displaying a normal image signal (an image signal for comparison with a test signal for image quality inspection), and a test region 23B for displaying a test signal for image quality management described later. And a backlight 24 and a sensor unit 25 provided in front of the test area 23B.
  • the display element region 22A in the display unit 21A and the elements (pixels) in the test region 23B are display-driven by a driving unit 15 and a test region driving unit 16 described later.
  • the test area 23B is an area formed by a predetermined number of elements (pixels) arranged in a lattice (matrix) outside the display element area 22A, and a test signal is displayed on the pixels in the test area 23B.
  • the sensor unit 25 is a front sensor provided in front of the test area 23 ⁇ / b> B.
  • the sensor unit 25 detects an image of a test signal displayed in the test area 23 ⁇ / b> B and outputs the detection signal to the control unit 12.
  • the test area 23B and the sensor unit 25 are arranged so as to be hidden in the outer frame of the display element area 22A, and are arranged so as not to be seen from the front side (user side) of the display screen.
  • the test signal displayed in the test area 23B is a signal generated by the test signal generation unit 13, and is, for example, an all white signal, an intermediate gradation signal (grayscale signal), or the like.
  • This test signal is displayed in the test area 23B, and an image displayed in the test area 23B is detected by the sensor unit 25, thereby detecting whether or not the supplied video signal is correctly converted according to the DICOM gamma characteristics. .
  • a signal detected by the sensor unit 25 is output toward the control unit 12.
  • the control unit 12 is supplied with the detection signal of the image of the test area 23B from the sensor unit 25, and based on this detection signal, the video signal processing unit 11 converts the video signal so that the video signal is correctly converted according to the DICOM gamma characteristic.
  • the conversion operation in the signal processing unit 11 is controlled.
  • the image display apparatus 1A can ensure the reproducibility of the gray scale that conforms to the DICOM standard when displaying the image on the display unit 21A. Further, the image display device 1 ⁇ / b> A can correct the secular change in luminance in the backlight 24.
  • FIG. 6 is a diagram showing the configuration of the display element region 22A and the test region 23B.
  • the test area 23B is provided outside the display element area 22A for displaying a normal image signal (in this example, the uppermost part) so as to be adjacent to the display element area 22A.
  • the display element region 22A is configured by arranging n elements in the row direction and m elements (hereinafter also referred to as “pixels”) in the column direction in a lattice (matrix) form.
  • gate control lines GL1 to GLn connected to the gates of the switching elements (TFTs), and source lines (signal lines) SL1 arranged in the column direction so as to intersect the gate control lines GL1 to GLn N ⁇ m pixels PD (and switching elements (TFTs)) are arranged at respective intersections with .about.SLm.
  • Each pixel PD in the display element region 22A is driven by the drive unit 15 through the gate control lines GL1 to GLn and the source lines SL1 to SLm.
  • the drive unit 15 includes a gate drive circuit 15A and a source drive circuit 15B.
  • the gate drive circuit 15A is a circuit that outputs a gate control signal (gate line selection signal) to the gate control lines GL1 to GLn.
  • the source drive circuit 15B is a circuit that outputs an image display signal (normal image signal or test signal) to the source lines (signal lines) SL1 to SLm.
  • the gate driving circuit 15A and the source driving circuit 15B select switching elements (TFTs) arranged at the intersections of the gate control lines GL1 to GLn and the source lines SL1 to SLm, and select the switching elements (TFTs). An image display signal is supplied to the connected pixel PD.
  • the test area 23B is composed of four pixels PDt1, PDt2, PDt3, and PDt4. More specifically, switching elements (TFTs) and pixels PDt1 to PDt4 are arranged at the intersections of the gate control lines GLx1 and GLx2 and the source lines SLr and SLr + 1.
  • the test area drive unit 16 is a drive circuit for driving the pixels PDt1 to PDt4 in the test area 23B.
  • the test area gate drive circuit 16A in the test area drive unit 16 applies the gate control lines GLx1 and GLx2. An output gate control signal is generated.
  • gate control signals are sent from the test area drive unit 16 through the gate control lines GLx1 and GLx2 to the pixels PDt1 to PDt4 in the test area 23B, and the source A test signal is sent from drive circuit 15B through source lines SLr and SLr + 1.
  • the test area 23B is provided, and images displayed on the pixels PDt1 to PDt4 in the test area 23B are detected by the sensor unit 25.
  • the control unit 12 is supplied with the detection signal of the image of the test area 23B from the sensor unit 25, and based on this detection signal, the video signal processing unit 11 converts the video signal so that the video signal is correctly converted according to the DICOM gamma characteristic. The conversion operation in the signal processing unit 11 is controlled.
  • a test region driving unit 16 for driving the test region 23B in addition to the driving unit 15 for driving the display element region 22A. That is, a test area gate drive circuit 16A for driving the pixels PDt1 to PDt4 in the test area 23B is required. Further, the gate control lines GLx1 and GLx2 (signal lines from the test area driving unit 16 to the test area 23B) for driving the switching elements (TFTs) in the test area 23B are displayed on the display unit 21 (more precisely, On the LCD panel). This complicates the circuit configuration in the image display device 1A, and complicates the control for driving the pixels PDt1 to PDt4 in the test area 23B. For this reason, there has been a problem that the manufacturing cost of the image display device 1A increases.
  • the problem to be solved is that when a test region for display image inspection is arranged outside the display element region, a dedicated drive unit for driving the pixels in the test region is unnecessary, and the image display device It is possible to provide an image display apparatus and a display image inspection method capable of simplifying the circuit configuration of the apparatus and simplifying control when displaying a test signal in a test area.
  • the image display device includes a display element region for displaying an image on a plurality of elements arranged in a grid pattern, and the display element area arranged in the grid pattern from the display element area outside the display element area.
  • a test region including a predetermined number of elements provided side by side along one arrangement direction of the elements, and the elements in the test area include elements in the display element area provided in parallel with the test areas.
  • the same control signal as the supplied control signal is supplied from a first drive unit that drives both the test area and the display element area, and is supplied to the elements in the display element area provided side by side with the test area.
  • the same test signal as the test signal to be generated is supplied from a second driving unit that drives both the test area and the display element area.
  • a predetermined number of elements are provided outside the display element region in which a plurality of elements for displaying an image are arranged in a lattice pattern along one direction of the display element region.
  • a test area is provided.
  • the same control signal as the control signal supplied to the elements in the display element area provided in parallel with the test area is supplied to the elements in the test area, and the elements in the test area are aligned with the test area.
  • the same test signal as the test signal supplied to the element in the provided display element region is supplied.
  • FIG. 1 is a block diagram showing a configuration of an image display apparatus according to an embodiment of the present invention.
  • An image display device 1 shown in FIG. 1 is an active matrix drive type liquid crystal display device that realizes gray scale reproducibility in conformity with the above-mentioned DICOM standard.
  • the image display device 1 includes a video signal processing unit 11, a control unit 12, a test signal generation unit 13, a signal switching unit 14, a driving unit 15, a backlight driving unit 17, And a display unit 21.
  • the display unit 21 is a liquid crystal display panel, and includes a display element region 22 that displays a normal image signal (an image signal in a sense that contrasts with a test signal for image quality inspection), and a test region 23 that displays a test signal. And a backlight 24 and a sensor unit 25.
  • the image display device 1 shown in FIG. 1 has a signal switching unit 14 shown in FIG. 1 newly added as compared with the image display device 1A shown in FIG. 5, and the test area driving unit 16 shown in FIG. The point that was deleted is different. Further, the driving method of the pixels in the test area 23 shown in FIG. 1 is different from the driving method of the pixels in the test area 23B shown in FIG. Regarding other configurations, the image display device 1 shown in FIG. 1 and the image display device 1A shown in FIG. 5 have the same configuration, and therefore, the same components are denoted by the same reference numerals. .
  • the video signal processing unit 11 is supplied with a video signal from an externally connected video signal generator or the like (not shown), and a signal required for the supplied video signal. Processing (for example, data format conversion, color conversion, etc.) is performed.
  • the video signal processing unit 11 converts the video level of the supplied video signal according to the DICOM gamma characteristic and outputs the converted video level to the driving unit 15.
  • the video signal processing unit 11 uses an output luminance value according to the DICOM gamma characteristic and an input luminance value of the input image as original data for converting the input image data based on the supplied video signal according to the DICOM gamma characteristic.
  • An associated LUT (lookup table) 11A is provided, and the video level of the supplied video signal is converted with reference to the LUT (lookup table) 11A.
  • the control unit 12 controls each processing unit in the image display device 1 in an integrated manner, and realizes processing functions required for the image display device 1.
  • the test signal generation unit 13 is controlled by the control unit 12 and generates a test signal (for example, a gray scale signal) that causes an image to be displayed in the test area 23.
  • the signal switching unit 14 selects any one of the supplied video signal and test signal, and outputs the selected signal to the driving unit 15.
  • the signal switching unit 14 selects a video signal at a timing at which a normal image signal is displayed on the display element region 22 in the display unit 21, and at a timing at which a test signal is displayed on the test region 23 in the display unit 21.
  • a test signal is selected and output to the drive unit 15.
  • the drive unit 15 includes a gate drive circuit 15A and a source drive circuit 15B.
  • the gate drive circuit 15A outputs a gate control signal to the pixels in the display element region 22 and the test region 23, thereby driving the source.
  • the circuit 15B outputs source signals (signals displayed on the pixels) to the pixels in the display element region 22 and the test region 23.
  • the display unit 21 includes a display element region 22 that displays a normal image signal, a test region 23 that displays a test signal for image quality inspection, a backlight 24, and a sensor unit 25 that serves as a front sensor.
  • the display element region 22 is a pixel region configured by arranging n ⁇ m pixels in a lattice (matrix) shape, and is a pixel region where a normal image signal is displayed. More precisely, a test signal is displayed on some pixels as will be described later.
  • a predetermined number (for example, four, sixteen, etc.) of test regions 23 are arranged outside the display element region 22 in a lattice shape along one direction (for example, the X (row) direction shown in FIG. 2). ), A test signal is displayed on the pixels in the test area 23.
  • a sensor unit 25 is provided in front of the test area 23, and an image (an image corresponding to the test signal) displayed in the test area 23 is detected by the sensor unit 25. The sensor unit 25 detects the detection signal. Output to the control unit 12.
  • the pixels in the test area 23 (more precisely, some pixels in the display element area 22 are included) and the sensor unit 25 are included in a housing provided to cover the outer periphery of the display element area 22. It is arranged inside the outer frame. Therefore, the pixels in the test area 23, some of the pixels in the display element area 22, and the sensor unit 25 can be seen from the front side of the display unit 21, that is, the user side located on the side where the display screen is displayed. Hidden so as not to.
  • the backlight 24 is driven by a backlight drive unit 17 controlled by the control unit 12, and the backlight drive unit 17 drives the backlight 24 so as to emit light with luminance according to an instruction from the control unit 12.
  • the control unit 12 sends a control command to the test signal generation unit 13 and causes the test signal generation unit 13 to generate a test signal.
  • This test signal is, for example, an all-white signal, a multi-stage gray scale signal, or the like.
  • the test signal is displayed as an image in the test area 23, the test signal is displayed in the test area 23 in a scanning period in which an image for one screen (one frame) is displayed.
  • the signal switching unit 14 selects the test signal generated by the test signal generation unit 13.
  • the signal switching unit 14 outputs the selected test signal to the driving unit 15, and the driving unit 15 displays the test signal in the test area 23.
  • the sensor unit 25 detects an image of a test signal (for example, the brightness of a gray scale image) displayed in the test area 23, and the sensor unit 25 outputs a detection signal of this image to the control unit 12.
  • the control unit 12 is supplied with the detection signal of the image displayed in the test area 23 from the sensor unit 25, and based on this detection signal, is the video signal displayed on the display unit 21 converted correctly according to the DICOM gamma characteristic? Determine whether or not. If the video signal is not correctly converted according to the DICOM gamma characteristic, the table value held in the LUT 11A so that the video signal is correctly converted according to the DICOM gamma characteristic, that is, the gray scale reproducibility is ensured. Correct.
  • the image display apparatus 1 can control the operation of the video signal processing unit 11 so that the gray scale reproducibility conforming to the DICOM standard is ensured. Further, the image display device 1 can correct the secular change of the luminance in the backlight 24 based on the detection signal supplied from the sensor unit 25.
  • the image display device 1 includes a microcontroller, a microcomputer, and the like having a CPU, a ROM, a RAM, a timer, a counter, and the like.
  • the process performed in the image display device 1 is in the form of a program.
  • Processing functions necessary for the image display apparatus 1 are realized by the CPU reading and executing the program stored in the ROM or the like. That is, all or one part of each processing performed in the video signal processing unit 11, the control unit 12, the test signal generation unit 13, the signal switching unit 14, the driving unit 15, the backlight driving unit 17, the display unit 21, and the like. Is realized by the CPU reading the program from a ROM or the like and executing information processing and arithmetic processing.
  • FIG. 2 is a diagram showing the configuration of the display element area and the test area.
  • the test area 23 is formed in a shape added to the uppermost side (Y direction side) of the display element area 22 for displaying a normal image signal.
  • the display element region 22 is formed by arranging n pixels PD in the row direction and m pixels PD (total of n ⁇ m pixels PD) in the column direction. That is, the display element region 22 includes pixels at intersections of the gate control lines GL1 to GLn and source lines (signal lines) SL1 to SLm arranged in the column direction so as to intersect the gate control lines GL1 to GLn. It is formed by arranging PD.
  • the gate drive circuit 15A is a circuit that outputs a gate control signal (gate selection signal) to the gate control lines GL1 to GLn.
  • the source drive circuit 15B is a circuit that outputs an image display signal (normal image signal or test signal) to the source lines SL1 to SLm.
  • the gate driving circuit 15A and the source driving circuit 15B select a switching element (TFT) arranged at each intersection of the gate control lines GL1 to GLn and the source lines SL1 to SLm, and select the switching element (TFT).
  • An image display signal (normal image signal or test signal) is supplied to the connected pixel PD.
  • the test area 23 is configured by arranging four pixels PDt1, PDt2, PDt3, and PDt4 in a grid pattern.
  • the gates of the switching elements (TFTs) of the pixels PDt1, PDt2, PDt3, and PDt4 are connected in common and connected to the gate control line GL1 in the display element region 22. That is, the gate control lines of the pixels PDt1, PDt2, PDt3, and PDt4 are commonly connected to the gate control lines GL1 of the pixels PDx1 and PDx2 adjacent to the test region 23.
  • the source lines of the two pixels PDt1 and PDt2 arranged in the same column (Y direction) are connected in common and connected to the source line SLr in the display element region 22. That is, the source lines of the two pixels PDt1 and PDt2 are commonly connected to the source line of the pixel PDx1 in the display element region 22 adjacent to the test region 23.
  • the source lines of the two pixels PDt3 and PDt4 arranged in the same column (Y direction) are connected in common and connected to the source line SLr + 1 in the display element region 22. That is, the source lines of the pixels PDt3 and PDt4 are commonly connected to the source line of the pixel PDx2 in the display element region 22 adjacent to the test region 23.
  • the pixels PDt1 and PDt2 arranged in the same column (Y direction) in the test region 23 and the pixels PDx1 in the display element region 22 arranged in the same column (Y direction) as the pixels PDt1 and PDt2 are the same gate control line.
  • a switching element (TFT) is controlled by a signal from GL1, and an image display signal (here, a test signal) is supplied by the same source line SLr. That is, the same test signal as that of the pixel PDx1 in the display element region 22 is displayed on the pixels PDt1 and PDt2 in the test region 23.
  • the pixels PDt3 and PDt4 arranged in the same column (Y direction) in the test region 23 and the pixel PDx2 in the display element region 22 arranged in the same column as the pixels PDt3 and PDt4 are connected from the same gate control line GL1.
  • the switching element (TFT) is controlled by the above signal, and an image display signal (here, a test signal) is supplied by the same source line SLr + 1. That is, the same test signal as that of the pixel PDx2 in the display element region 22 is displayed on the pixels PDt3 and PDt4 in the test region 23.
  • the test signal generated by the test signal generation unit 13 is displayed as an image in the test area 23
  • the pixels in the display element area 22 are displayed during a scanning period in which one screen is displayed (one frame image is displayed).
  • the same test signal can be displayed as an image on the pixels in the test area 23. That is, the test signals can be displayed on the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 by using the uppermost two pixels PDx1 and PDx2 in the display element region 22.
  • a dedicated drive unit for example, the test region drive unit 16 shown in FIG. 5 for driving the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 becomes unnecessary, and the circuit configuration can be simplified.
  • signal lines (gate control lines and source lines) for driving the pixels PDt1, PDt2, PDt3, and PDt4 can be shared with the signal lines of the pixels PDx1 and PDx2 in the display element region 22, and the pixel PDt1 in the test region 23 is used.
  • PDt2, PDt3, and PDt4 can be simplified, and control when displaying the test signal on the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 is simplified.
  • the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23, the pixels PDx1, PDx2, and the sensor unit 25 in the display element region 22 are provided to cover the outer periphery of the display element region 22. It is arranged inside the body (hereinafter referred to as “inside the outer frame of the display element region 22”) and is arranged so as to be hidden from the front side (user) of the display screen. That is, in the mode shown in FIG. 2, the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 and the pixels PDx1 and PDx2 in the display element region 22 are hidden so that they cannot be seen. In the embodiment shown in FIG.
  • 16 pixels can be arranged in a grid, and for example, 16 ⁇ 16 pixels can be arranged in a grid.
  • FIG. 3 is a diagram showing a display mode of the test signal in the test area and the display element area.
  • a scanning period T a scanning period defined by a vertical synchronization signal for displaying one screen (displaying an image of one frame).
  • An image of the test signal is displayed in the test area 23 at a timing when each of the pixels in the display element area 22 (pixels used for displaying the test signal) is selected.
  • FIG. 3B is an enlarged view of a portion of the test area 23 shown in FIG.
  • FIG. 3B shows an example in which 4 ⁇ 4 pixels (a total of 16 pixels) are arranged in a grid pattern in the test area 23.
  • the test signal is displayed on the pixels (displaying the test signals in order from the left element in the broken line a)
  • the test signals are displayed on the 16 pixels in the test area 23 accordingly (from the left column).
  • Test signals can be displayed in order of four).
  • the pixels in the test area 23 and the pixels in the display element area 22 are arranged so as to be hidden in the outer frame of the display element area 22.
  • a total of 20 pixels and the sensor unit 25 are hidden in the outer frame.
  • FIG. 4 is a diagram showing another embodiment of the test area.
  • the example in which the test region 23 is arranged on the uppermost side (Y direction side) of the display element region 22 has been shown.
  • the test area 23A can also be arranged on the side (X direction side).
  • the test area 23A is formed in a shape added to the endmost side (X direction side) of the display element area 22 for displaying a normal image signal.
  • the test area 23A is configured by arranging four pixels PDt1, PDt2, PDt3, and PDt4 in a grid pattern.
  • the source lines of the pixels PDt1, PDt2, PDt3, and PDt4 are connected in common and also connected to the source line SLm in the display element region 22.
  • the gates of the switching elements (TFTs) of the two pixels PDt1 and PDt2 arranged in the same row (X direction) are connected in common and connected to the gate control line GLr in the display element region 22.
  • the gates of the switching elements (TFTs) of the two pixels PDt3 and PDt4 arranged in the same row (X direction) are connected in common and connected to the gate control line GLr + 1.
  • the pixels PDt1 and PDt2 arranged in the same row (X direction) in the test region 23A and the pixel PDx1 in the display element region 22 arranged in the same row (X direction) are switched by the same gate control line GLr. ) Is controlled, and an image display signal (here, a test signal) is given by the same source line SLm. That is, the same test signal as the pixel PDx1 is displayed on the pixels PDt1 and PDt2 in the test region 23A at the timing when the pixel PDx1 in the display element region 22 is driven.
  • the pixels PDt3 and PDt4 arranged in the same row (X direction) in the test region 23A and the pixel PDx2 in the display element region 22 arranged in the same row (X direction) are supplied by the same gate control line GLr + 1.
  • the switching element (TFT) is controlled by the control signal, and an image display signal (here, a test signal) is supplied by the same source line SLm. That is, the same test signal as the pixel PDx2 is displayed on the pixels PDt3 and PDt4 in the test region 23A at the timing when the pixel PDx2 in the display element region 22 is driven.
  • each of the pixels PDx1 and PDx2 in the display element area 22 is selected during a scanning period in which one screen is displayed (one frame image is displayed).
  • the same test signal image can be displayed on the pixels PDt1, PDt2, PDt3, and PDt4 in the test area 23A.
  • the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23A, the pixels PDx1, PDx2, and the sensor unit 25 in the display element region 22 are disposed within the outer frame of the display element region 22, and display It is hidden from the front side (user) of the element region 22 so that it cannot be seen.
  • the pixels in the test area are arranged outside the display element area 22.
  • a dedicated drive circuit for example, the test area drive unit 16 shown in FIG. 5 for driving PDt1, PDt2, PDt3, and PDt4 can be omitted, and the circuit configuration can be simplified.
  • signal lines gate control lines and source lines
  • the pixels in the display element region 22 (adjacent to the test region 23 and used for displaying test signals).
  • the image display device according to the present invention corresponds to the image display device 1.
  • the display element region in the present invention corresponds to the display element region 22 in the display unit 21.
  • the test area in the present invention corresponds to the test area 23 and the test area 23A in the display unit 21.
  • the first drive unit in the present invention corresponds to the gate drive circuit 15A in the drive unit 15, and the second drive unit in the present invention corresponds to the source drive circuit 15B.
  • test signal generation unit in the present invention corresponds to the test signal generation unit 13
  • the signal switching unit in the present invention corresponds to the signal switching unit 14
  • the control unit in the present invention corresponds to the control unit 12.
  • an element that displays an image in the display element area according to the present invention corresponds to a pixel (pixel PD, pixel PDx1, PDx2) in the display element area 22, and the elements in the test area according to the present invention include the test area 23 and The pixels within 23A (pixels PDt1, PDt2, PDt3, and PDt4) correspond.
  • the elements in the display element region in the present invention correspond to the pixels (pixels PD, PDx1, PDx2) in the display element region 22.
  • the image display device 1 of the present invention includes a display element region 22 that displays an image on a plurality of elements arranged in a lattice pattern, and a display element region 22 outside the display element region 22.
  • a test region 23 having a predetermined number of elements arranged along one array direction (for example, the X direction shown in FIG. 2) of the elements of the display element region 22 arrayed in the above-mentioned grid pattern,
  • the same control signals as the control signals supplied to the elements (pixels PDx1, PDx2) in the display element region 22 provided side by side with the test area 23 are applied to the elements (pixels PDt1, PDt2, PDt3, PDt4) in the region 23.
  • Gate control signal is supplied from a first drive unit (gate drive circuit 15A) that drives both the test region 23 and the display element region 22, and is arranged side by side with the test region 23.
  • the second drive unit that drives the test area 23 and the display element area 22 together with the same test signal as the test signal supplied to the elements (pixels PDx1, PDx2) in the display element area 22 15B).
  • a predetermined number of elements (pixels PDt1, PDt2, PDt3, and PDt4) along one arrangement direction (for example, the X direction shown in FIG. 2) outside the display element region 22.
  • the elements (pixels PDt1 to PDt4) in the test area 23 are connected to the elements (pixels PDx1 and PDx2) in the display element area 22 provided side by side with the elements (pixels PDt1 to PDt4) in the test area 23.
  • the same control signal (gate signal) as the supplied control signal is supplied, and the test signal supplied to the elements (pixels PDx1, PDx2) in the same display element region 22 (the test signal as the display signal of the pixels PDx1, PDx) Is supplied with the same test signal as that of the test signal).
  • test area 23 for inspecting the display image is arranged outside the display element area 22
  • a dedicated drive unit for example, for driving the elements (pixels PDt1 to PDt4) in the test area 23
  • the test area driving unit 16 shown in FIG. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used.
  • Line and signal line source line can be used, so that signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified, and the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified. It is possible to simplify the control when displaying the test signal.
  • the image display device 1 of the present invention includes the test signal generation unit 13 that generates a test signal to be displayed on the elements (pixels PDt1 to PDt4) in the test area 23, and the elements in the test area 23.
  • a control unit 12 that controls the signal switching unit 14 so as to supply test signals to the elements (pixels PDx1, PDx2) in the display element region 22 to which.
  • the test signal generation unit 13 In the image display device 1 having such a configuration, the test signal generation unit 13 generates a test signal to be displayed in the test area 23.
  • This test signal is, for example, an all-white signal, a multi-stage gray scale signal, or the like.
  • the control unit 12 selects the elements (display elements 22) of the display element region 22 at the timing when the elements (pixels PDx1 and PDx2) of the display element region 22 are selected during the scanning period of one screen display (screen display of one frame).
  • the signal switching unit 14 is controlled to display the test signal on the pixels PDx1 and PDx2).
  • test signals can be displayed on the elements (pixels PDt1 to PDt4) in the test region 23 at the same time.
  • the elements in the test region 23 are arranged in one array direction of the elements in the display element region 22 arranged in a lattice pattern (for example, the X direction shown in FIG. 2).
  • the source line for supplying the test signal to be used is shared with the elements (pixels PDx1, PDx2) in the display element region 22 to which the same control signal and the same test signal are supplied.
  • the elements (pixels PDt1 to PDt4) in the test region 23 have the same gate control signal for the gate control line for supplying the gate control signal and the source line for supplying the test signal.
  • the elements (pixels PDx1, PDx2) in the display element region 22 are shared with the elements (pixels PDx1, PDx2) in the display element region 22 to which the same test signal is supplied.
  • signal lines (gates for driving the elements (pixels PDx1, PDx2) in the display element region 22 are used as signal lines (gate control lines and source lines) for driving the elements (pixels PDt1 to PDt4) in the test region 23. Control lines and source lines). For this reason, the wiring of the signal lines to the elements (pixels PDt1 to PDt4) in the test area 23 can be simplified.
  • the test signal is a signal for switching the luminance to be displayed on the elements (pixels PDt1 to PDt4) in the test area 23.
  • the test signal is a signal for switching the luminance such as an all white signal or a gray scale signal
  • the image displayed by the test signal is detected by the sensor unit 25, so that the control unit 12 can detect the video signal processing unit.
  • the video signal processing unit 11 can be controlled so that the video signal is correctly converted in accordance with the DICOM gamma characteristic. For this reason, the image display apparatus 1 can ensure the gray scale reproducibility conforming to the DICOM standard when displaying the supplied video signal on the display unit.
  • the test region 23 is disposed adjacent to the display element region 22 and has a predetermined number of elements along the row direction (X direction shown in FIG. 2) of the display element region 22.
  • (Pixels PDt1 to PDt4) are arranged in a grid, and the gate control lines of the elements (pixels PDt1 to PDt4) in the test area 23 are elements in the display element area 22 and elements in the test area 23 (pixels PDt1 to PDt1 to PDt1 to PDt4).
  • the test area 23 for inspecting the display image is arranged outside the display element area 22 in the row direction (X direction shown in FIG. 2), the elements (pixels PDt1 to PDt4) in the test area 23 are arranged. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used.
  • the signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified and the elements (pixels PDt1 to PDt4) in the test region 23 can be tested. Control at the time of displaying a signal can be simplified.
  • the test region 23A is disposed adjacent to the display element region 22, and a predetermined number of elements are arranged along the column direction of the display element region 22 (Y direction shown in FIG. 4).
  • (Pixels PDt1 to PDt4) are arranged in a grid, and the gate control lines of the elements (pixels PDt1 to PDt4) in the test area 23A are adjacent to the elements (pixels PDt1 to PDt4) in the test area 23A and
  • the source lines of the elements (pixels PDt1 to PDt4) in the test area 23A are connected to the gate control lines of the elements (pixels PDx1 and PDx2) in the display element region 22 arranged in the same row as the elements (pixels PDt1 to PDt4).
  • PDXl it is connected to a source line of pdx2).
  • the test area 23A for inspecting the display image is arranged outside the display element area 22 in the column direction (Y direction shown in FIG. 4), the elements (pixels PDt1 to PDt4) in the test area 23A are arranged. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23A, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used.
  • the signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23A can be simplified and the elements (pixels PDt1 to PDt4) in the test area 23A can be tested. Control at the time of displaying a signal can be simplified.
  • the image display apparatus of the present invention is not limited to the above illustrated example, and various modifications can be made without departing from the gist of the present invention. Of course.

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Abstract

The present invention provides an image display device that, when a test region for display image inspection is arranged outside a display element region, obviates the need for a dedicated driving unit for driving pixels within the test region, makes it possible to simplify the circuit configuration in the image display device, and makes it possible to simplify control performed when a test signal is displayed in the test region. In this image display device, a test region (pixels PDt1-PDt4) (23) is provided outside a display element region (22), and the gate of each of the pixels (PDt1-PDt4) is connected in common to a gate control line (GL1). The source lines of pixels (PDt1 and PDt2) in the same column are connected in common to a source line (SLr), and the source lines of pixels (PDt3 and PDt4) in the same column are connected in common to a source line (SLr + 1).

Description

画像表示装置及び表示画像検査方法Image display device and display image inspection method
　本発明は、医療用画像等の高画質・高精細な画像を表示する画像表示装置及び表示画像検査方法に関する。 The present invention relates to an image display device and a display image inspection method for displaying high-quality and high-definition images such as medical images.
　医療機関でＸ線写真の画像を表示する場合など、患者の病巣などを識別するに当たり、微妙な輝度の違いを表示させて、読み取る必要がある。このため、医療用の画像表示装置においては、優れたグレースケール再現性が要求されている。医用画像と通信の標準規格としてＤＩＣＯＭ（Ｄｉｇｔａｌ　Ｉｍａｇｉｎｇ　ａｎｄ　Ｃｏｍｍｕｎｉｃａｔｉｏｎ　ｉｎ　Ｍｅｄｉｃｉｎｅ）が定められている。病院内外で異なる製造業者の、異なる種類のデジタル画像機器を、ネットワークや、画像記録媒体を介して相互に接続して、医用画像情報のやり取りや、データ伝送を可能とすることを目的としている。すなわち、ＤＩＣＯＭ規格に沿った表示装置では、どの装置で見ても医用画像の整合性を取ることが可能となる。 When displaying an X-ray photograph image in a medical institution, it is necessary to display and read a subtle difference in luminance when identifying a patient's lesion. For this reason, excellent gray scale reproducibility is required in medical image display devices. DICOM (Digital Imaging and Communication in Medicine) is defined as a standard for medical images and communication. It is an object to enable exchange of medical image information and data transmission by connecting different types of digital image devices of different manufacturers inside and outside the hospital via a network or an image recording medium. That is, in a display device that complies with the DICOM standard, it is possible to maintain the consistency of medical images when viewed with any device.
　ＤＩＣＯＭ規格では、表示装置のグレースケール再現性について定められており、グレースケール画像の表示のための標準表示関数が明記されている。人間の目は、画像の明るい領域よりも、暗い領域において相対的に高い感度を示す特性を持つため、この標準表示関数は非線形となる。そこで、ＤＩＣＯＭでは、平均的な観察者が識別可能な最小の輝度差を表すＪＮＤ（Ｊｕｓｔ　Ｎｏｔｉｃｅａｂｌｅ　Ｄｉｆｆｅｒｅｎｃｅ、最小弁別閥と呼ばれている）インデックスと輝度値との関係を測定し、この標準表示関数をグレースケール標準表示関数として定めている。このため、医用画像表示装置では、表示できる黒表示時の輝度値（黒輝度）と白表示時の輝度値（白輝度）とから、このグレースケール標準表示関数を求め、ＤＩＣＯＭに対応したグレースケール再現性を実現している。このＤＩＣＯＭに対応した表示装置として、ＪＮＤや、ＤＩＣＯＭガンマ特性に応じてＬＵＴ（Ｌｏｏｋ　Ｕｐ　Ｔａｂｌｅ）を求める技術が提案されている（例えば、特許文献1参照）。 The DICOM standard defines the gray scale reproducibility of the display device, and specifies a standard display function for displaying a gray scale image. Since the human eye has a characteristic of relatively higher sensitivity in a dark area than in a bright area of an image, this standard display function is non-linear. Therefore, DICOM measures the relationship between the JND (Just Notifiable Difference) index, which represents the minimum luminance difference that can be identified by the average observer, and the luminance value, and this standard display function. Are defined as gray scale standard display functions. Therefore, in the medical image display device, the gray scale standard display function is obtained from the luminance value at the time of black display (black luminance) and the luminance value at the time of white display (white luminance), and the gray scale corresponding to DICOM is obtained. Reproducibility is realized. As a display device compatible with DICOM, a technique for obtaining a LUT (Look Up Table) according to JND or DICOM gamma characteristics has been proposed (for example, see Patent Document 1).
　図５は、上述したＤＩＣＯＭ規格に合致したグレースケール再現性を実現する画像表示装置の構成を示すブロック図である。この図５に示す画像表示装置１Ａは、アクティブマトリクス駆動型の液晶表示装置であり、この画像表示装置１Ａは、映像信号処理部１１と、制御部１２と、テスト信号生成部１３と、駆動部１５と、テスト領域駆動部１６と、バックライト駆動部１７と、表示部２１Ａと、を有して構成される。 FIG. 5 is a block diagram showing a configuration of an image display device that realizes gray scale reproducibility that conforms to the above-mentioned DICOM standard. The image display device 1A shown in FIG. 5 is an active matrix drive type liquid crystal display device. The image display device 1A includes a video signal processing unit 11, a control unit 12, a test signal generation unit 13, and a drive unit. 15, a test area driving unit 16, a backlight driving unit 17, and a display unit 21 </ b> A.
　図５に示す画像表示装置１Ａにおいて、映像信号処理部１１は、外部接続された映像信号発生装置等（図示せず）から映像信号が供給され、この供給された映像信号に対して必要な信号処理を施し、表示部２１Ａに出力する。また、この映像信号処理部１１では、ＤＩＣＯＭガンマ特性に従って、供給された映像信号のビデオレベルを変換する。また、表示部２１Ａは、通常の画像信号（画質検査用のテスト信号と対比する意味での画像信号）を表示する表示素子領域２２Ａと、後述する画質管理用のテスト信号を表示するテスト領域２３Ｂと、バックライト２４と、テスト領域２３Ｂの前面に設けられるセンサ部２５とを有している。表示部２１Ａ内の表示素子領域２２Ａ及びテスト領域２３Ｂ内の素子（画素）は、後述する駆動部１５及びテスト領域駆動部１６により表示駆動される。 In the image display device 1A shown in FIG. 5, the video signal processing unit 11 is supplied with a video signal from an externally connected video signal generator or the like (not shown), and a necessary signal for the supplied video signal. Processing is performed and output to the display unit 21A. The video signal processing unit 11 converts the video level of the supplied video signal according to the DICOM gamma characteristic. The display unit 21A also displays a display element region 22A for displaying a normal image signal (an image signal for comparison with a test signal for image quality inspection), and a test region 23B for displaying a test signal for image quality management described later. And a backlight 24 and a sensor unit 25 provided in front of the test area 23B. The display element region 22A in the display unit 21A and the elements (pixels) in the test region 23B are display-driven by a driving unit 15 and a test region driving unit 16 described later.
　上記テスト領域２３Ｂは、表示素子領域２２Ａの外側に格子（マトリクス）状に配置される所定個数の素子（画素）で形成される領域であり、このテスト領域２３Ｂ内の画素にテスト信号が表示される。センサ部２５は、テスト領域２３Ｂの前面に設けられるフロントセンサであり、このセンサ部２５によりテスト領域２３Ｂ内に表示されるテスト信号の画像を検出し、その検出信号を制御部１２に出力する。なお、テスト領域２３Ｂとセンサ部２５とは、表示素子領域２２Ａの外枠内に隠されるようにして配置され、表示画面の前面側（ユーザ側）からは見えないようにして配置されている。 The test area 23B is an area formed by a predetermined number of elements (pixels) arranged in a lattice (matrix) outside the display element area 22A, and a test signal is displayed on the pixels in the test area 23B. The The sensor unit 25 is a front sensor provided in front of the test area 23 </ b> B. The sensor unit 25 detects an image of a test signal displayed in the test area 23 </ b> B and outputs the detection signal to the control unit 12. The test area 23B and the sensor unit 25 are arranged so as to be hidden in the outer frame of the display element area 22A, and are arranged so as not to be seen from the front side (user side) of the display screen.
　テスト領域２３Ｂに表示されるテスト信号は、テスト信号生成部１３により生成される信号であり、例えば、全白信号や、中間階調信号（グレースケール信号）等である。このテスト信号をテスト領域２３Ｂに表示し、このテスト領域２３Ｂに表示された画像をセンサ部２５により検出することにより、供給される映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されているか否かを検出する。このセンサ部２５で検出された信号は制御部１２に向けて出力される。 The test signal displayed in the test area 23B is a signal generated by the test signal generation unit 13, and is, for example, an all white signal, an intermediate gradation signal (grayscale signal), or the like. This test signal is displayed in the test area 23B, and an image displayed in the test area 23B is detected by the sensor unit 25, thereby detecting whether or not the supplied video signal is correctly converted according to the DICOM gamma characteristics. . A signal detected by the sensor unit 25 is output toward the control unit 12.
　制御部１２は、センサ部２５からテスト領域２３Ｂの画像の検出信号が供給され、この検出信号を基に、映像信号処理部１１において映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されるように、当該映像信号処理部１１における変換動作を制御する。
　これにより、画像表示装置１Ａは、表示部２１Ａに画像を表示する際に、ＤＩＣＯＭ規格に合致したグレースケールの再現性を確保することができる。また、画像表示装置１Ａは、バックライト２４における輝度の経年変化を補正することができる。 The control unit 12 is supplied with the detection signal of the image of the test area 23B from the sensor unit 25, and based on this detection signal, the video signal processing unit 11 converts the video signal so that the video signal is correctly converted according to the DICOM gamma characteristic. The conversion operation in the signal processing unit 11 is controlled.
Thereby, the image display apparatus 1A can ensure the reproducibility of the gray scale that conforms to the DICOM standard when displaying the image on the display unit 21A. Further, the image display device 1 </ b> A can correct the secular change in luminance in the backlight 24.
特開２００７－１１４４２７号公報JP 2007-114427 A
　図６は、表示素子領域２２Ａとテスト領域２３Ｂの構成について示す図である。この図６に示すように、テスト領域２３Ｂは、通常の画像信号を表示する表示素子領域２２Ａの外側（この例では最上部）に、この表示素子領域２２Ａに隣接するようにして設けられている。この図に示すように、表示素子領域２２Ａは、行方向にｎ個、列方向にｍ個の素子（以下「画素」とも呼ぶ）を格子（マトリクス）状に配置して構成される。より具体的には、スイッチング素子（ＴＦＴ）のゲートに接続されるゲート制御線ＧＬ１～ＧＬｎと、このゲート制御線ＧＬ１～ＧＬｎに交差するように列方向に配列されたソース線（信号線）ＳＬ１～ＳＬｍと、のそれぞれの交点にｎ×ｍ個の画素ＰＤ（及びスイッチング素子（ＴＦＴ））が配置される。この表示素子領域２２Ａ内の各画素ＰＤは、ゲート制御線ＧＬ１～ＧＬｎと、ソース線ＳＬ１～ＳＬｍを通して、駆動部１５により駆動される。この駆動部１５には、ゲート駆動回路１５Ａと、ソース駆動回路１５Ｂとが含まれる。 FIG. 6 is a diagram showing the configuration of the display element region 22A and the test region 23B. As shown in FIG. 6, the test area 23B is provided outside the display element area 22A for displaying a normal image signal (in this example, the uppermost part) so as to be adjacent to the display element area 22A. . As shown in this figure, the display element region 22A is configured by arranging n elements in the row direction and m elements (hereinafter also referred to as “pixels”) in the column direction in a lattice (matrix) form. More specifically, gate control lines GL1 to GLn connected to the gates of the switching elements (TFTs), and source lines (signal lines) SL1 arranged in the column direction so as to intersect the gate control lines GL1 to GLn N × m pixels PD (and switching elements (TFTs)) are arranged at respective intersections with .about.SLm. Each pixel PD in the display element region 22A is driven by the drive unit 15 through the gate control lines GL1 to GLn and the source lines SL1 to SLm. The drive unit 15 includes a gate drive circuit 15A and a source drive circuit 15B.
　ゲート駆動回路１５Ａは、ゲート制御線ＧＬ１～ＧＬｎにゲート制御信号（ゲート線選択信号）を出力する回路である。また、ソース駆動回路１５Ｂは、ソース線（信号線）ＳＬ１～ＳＬｍに画像の表示信号（通常の画像信号或いはテスト信号）を出力する回路である。このゲート駆動回路１５Ａとソース駆動回路１５Ｂにより、ゲート制御線ＧＬ１～ＧＬｎとソース線ＳＬ１～ＳＬｍとの各交点に配されたスイッチング素子（ＴＦＴ）を選択し、この選択したスイッチング素子（ＴＦＴ）に繋がる画素ＰＤに画像の表示信号を供給する。 The gate drive circuit 15A is a circuit that outputs a gate control signal (gate line selection signal) to the gate control lines GL1 to GLn. The source drive circuit 15B is a circuit that outputs an image display signal (normal image signal or test signal) to the source lines (signal lines) SL1 to SLm. The gate driving circuit 15A and the source driving circuit 15B select switching elements (TFTs) arranged at the intersections of the gate control lines GL1 to GLn and the source lines SL1 to SLm, and select the switching elements (TFTs). An image display signal is supplied to the connected pixel PD.
　また、テスト領域２３Ｂは４つの画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４で構成されている。より具体的には、ゲート制御線ＧＬｘ１及びＧＬｘ２と、ソース線ＳＬｒ及びＳＬｒ＋１とのそれぞれの交点に、スイッチング素子（ＴＦＴ）及び画素ＰＤｔ１～ＰＤｔ４とが配置されている。そして、テスト領域駆動部１６は、テスト領域２３Ｂ内の画素ＰＤｔ１～ＰＤｔ４を駆動するための駆動回路であり、このテスト領域駆動部１６内のテスト領域ゲート駆動回路１６Ａによりゲート制御線ＧＬｘ１及びＧＬｘ２に出力されるゲート制御信号が生成される。このテスト領域２３Ｂとテスト領域駆動部１６の構成により、テスト領域２３Ｂ内の画素ＰＤｔ１～ＰＤｔ４に対して、テスト領域駆動部１６からゲート制御線ＧＬｘ１及びＧＬｘ２を通してゲート制御信号が送られ、また、ソース駆動回路１５Ｂからソース線ＳＬｒ及びＳＬｒ＋１を通してテスト信号が送られる。 The test area 23B is composed of four pixels PDt1, PDt2, PDt3, and PDt4. More specifically, switching elements (TFTs) and pixels PDt1 to PDt4 are arranged at the intersections of the gate control lines GLx1 and GLx2 and the source lines SLr and SLr + 1. The test area drive unit 16 is a drive circuit for driving the pixels PDt1 to PDt4 in the test area 23B. The test area gate drive circuit 16A in the test area drive unit 16 applies the gate control lines GLx1 and GLx2. An output gate control signal is generated. With the configuration of the test area 23B and the test area drive unit 16, gate control signals are sent from the test area drive unit 16 through the gate control lines GLx1 and GLx2 to the pixels PDt1 to PDt4 in the test area 23B, and the source A test signal is sent from drive circuit 15B through source lines SLr and SLr + 1.
　以上説明したように、画像表示装置１Ａにおいては、テスト領域２３Ｂを設けるとともに、このテスト領域２３Ｂ内の画素ＰＤｔ１～ＰＤｔ４に表示される画像をセンサ部２５により検出する。制御部１２は、センサ部２５からテスト領域２３Ｂの画像の検出信号が供給され、この検出信号を基に、映像信号処理部１１において映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されるように、当該映像信号処理部１１における変換動作を制御する。 As described above, in the image display device 1A, the test area 23B is provided, and images displayed on the pixels PDt1 to PDt4 in the test area 23B are detected by the sensor unit 25. The control unit 12 is supplied with the detection signal of the image of the test area 23B from the sensor unit 25, and based on this detection signal, the video signal processing unit 11 converts the video signal so that the video signal is correctly converted according to the DICOM gamma characteristic. The conversion operation in the signal processing unit 11 is controlled.
　しかしながら、画像表示装置１Ａにおいては、表示素子領域２２Ａを駆動する駆動部１５に加えて、さらにテスト領域２３Ｂを駆動するためのテスト領域駆動部１６を追加する必要がある。すなわち、テスト領域２３Ｂ内の画素ＰＤｔ１～ＰＤｔ４を駆動するためのテスト領域ゲート駆動回路１６Ａ等が必要になる。さらには、テスト領域２３Ｂ内のスイッチング素子（ＴＦＴ）を駆動するためのゲート制御線ＧＬｘ１及びＧＬｘ２（テスト領域駆動部１６からテスト領域２３Ｂに至るまでの信号線）を表示部２１（より正確には液晶パネル上）に追加する必要がある。このため、画像表示装置１Ａにおける回路構成が複雑化し、また、テスト領域２３Ｂ内の画素ＰＤｔ１～ＰＤｔ４を駆動するための制御が複雑化する。このため、画像表示装置１Ａの製造コストが上昇するという問題があった。 However, in the image display device 1A, it is necessary to add a test region driving unit 16 for driving the test region 23B in addition to the driving unit 15 for driving the display element region 22A. That is, a test area gate drive circuit 16A for driving the pixels PDt1 to PDt4 in the test area 23B is required. Further, the gate control lines GLx1 and GLx2 (signal lines from the test area driving unit 16 to the test area 23B) for driving the switching elements (TFTs) in the test area 23B are displayed on the display unit 21 (more precisely, On the LCD panel). This complicates the circuit configuration in the image display device 1A, and complicates the control for driving the pixels PDt1 to PDt4 in the test area 23B. For this reason, there has been a problem that the manufacturing cost of the image display device 1A increases.
　このように、解決する課題は、表示素子領域の外側に表示画像検査用のテスト領域を配置する際に、このテスト領域内の画素を駆動するための専用の駆動部を不要とし、画像表示装置における回路構成を簡略化することができるとともに、テスト領域にテスト信号を表示する際の制御を簡略化できる、画像表示装置、及び表示画像検査方法を提供することにある。 Thus, the problem to be solved is that when a test region for display image inspection is arranged outside the display element region, a dedicated drive unit for driving the pixels in the test region is unnecessary, and the image display device It is possible to provide an image display apparatus and a display image inspection method capable of simplifying the circuit configuration of the apparatus and simplifying control when displaying a test signal in a test area.
　本発明の画像表示装置は、格子状に配置された複数の素子に画像を表示する表示素子領域と、前記表示素子領域外に前記表示素子領域から、前記格子状に配列された前記表示素子領域の素子の一の配列方向に沿って並べて設けられる所定数の素子を備えるテスト領域と、を備え、前記テスト領域の素子には、前記テスト領域と並べて設けられている前記表示素子領域の素子に供給される制御信号と同じ制御信号が、前記テスト領域と前記表示素子領域とをともに駆動する第１の駆動部から供給され、前記テスト領域と並べて設けられている前記表示素子領域の素子に供給されるテスト信号と同じテスト信号が、前記テスト領域と前記表示素子領域とをともに駆動する第２の駆動部から供給されることを特徴とする。 The image display device according to the present invention includes a display element region for displaying an image on a plurality of elements arranged in a grid pattern, and the display element area arranged in the grid pattern from the display element area outside the display element area. A test region including a predetermined number of elements provided side by side along one arrangement direction of the elements, and the elements in the test area include elements in the display element area provided in parallel with the test areas. The same control signal as the supplied control signal is supplied from a first drive unit that drives both the test area and the display element area, and is supplied to the elements in the display element area provided side by side with the test area. The same test signal as the test signal to be generated is supplied from a second driving unit that drives both the test area and the display element area.
　本発明の画像表示装置においては、画像を表示する複数の素子が格子状に配列された表示素子領域の外側に、この表示素子領域の一の方向に沿って並べて設けられる所定数の素子を備えるテスト領域を設ける。このテスト領域の素子には、このテスト領域と並べて設けられている表示素子領域の素子に供給される制御信号と同じ制御信号を供給し、また、テスト領域の素子には、このテスト領域と並べて設けられている表示素子領域の素子に供給されるテスト信号と同じテスト信号を供給する。
  これにより、表示素子領域の外側に表示画像の検査用のテスト領域を配置する際に、このテスト領域の素子を駆動するための専用の駆動部を省略することができ、回路構成を簡略化することができる。また、テスト領域にテスト信号を表示する際の制御を簡略化できる。 In the image display device of the present invention, a predetermined number of elements are provided outside the display element region in which a plurality of elements for displaying an image are arranged in a lattice pattern along one direction of the display element region. A test area is provided. The same control signal as the control signal supplied to the elements in the display element area provided in parallel with the test area is supplied to the elements in the test area, and the elements in the test area are aligned with the test area. The same test signal as the test signal supplied to the element in the provided display element region is supplied.
Thus, when a test area for inspecting a display image is arranged outside the display element area, a dedicated drive unit for driving elements in the test area can be omitted, and the circuit configuration is simplified. be able to. Further, it is possible to simplify the control when displaying the test signal in the test area.
本発明の実施形態に係わる画像表示装置の構成を示すブロック図である。It is a block diagram which shows the structure of the image display apparatus concerning embodiment of this invention. 表示素子領域とテスト領域の構成を示す図である。It is a figure which shows the structure of a display element area | region and a test area | region. テスト領域及び表示素子領域におけるテスト信号の表示態様を示す図である。It is a figure which shows the display mode of the test signal in a test area | region and a display element area | region. テスト領域の他の実施態様を示す図である。It is a figure which shows the other embodiment of a test area | region. 従来技術における画像表示装置の構成を示すブロック図である。It is a block diagram which shows the structure of the image display apparatus in a prior art. 従来技術におけるテスト領域の構成を示す図である。It is a figure which shows the structure of the test area | region in a prior art.
　以下、本発明の実施の形態を、添付図面を参照して説明する。
　図１は、本発明の実施形態に係わる画像表示装置の構成を示すブロック図である。図１に示す画像表示装置１は、上述したＤＩＣＯＭ規格に合致したグレースケール再現性を実現するアクティブマトリクス駆動型の液晶表示装置である。図１に示すように、画像表示装置１は、映像信号処理部１１と、制御部１２と、テスト信号生成部１３と、信号切替部１４と、駆動部１５と、バックライト駆動部１７と、表示部２１と、を有して構成される。この表示部２１は、液晶表示パネルであり、通常の画像信号（画質検査用のテスト信号と対比する意味での画像信号）を表示する表示素子領域２２と、テスト信号を表示するテスト領域２３と、バックライト２４と、センサ部２５と、を有している。 Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
FIG. 1 is a block diagram showing a configuration of an image display apparatus according to an embodiment of the present invention. An image display device 1 shown in FIG. 1 is an active matrix drive type liquid crystal display device that realizes gray scale reproducibility in conformity with the above-mentioned DICOM standard. As shown in FIG. 1, the image display device 1 includes a video signal processing unit 11, a control unit 12, a test signal generation unit 13, a signal switching unit 14, a driving unit 15, a backlight driving unit 17, And a display unit 21. The display unit 21 is a liquid crystal display panel, and includes a display element region 22 that displays a normal image signal (an image signal in a sense that contrasts with a test signal for image quality inspection), and a test region 23 that displays a test signal. And a backlight 24 and a sensor unit 25.
　なお、図１に示す画像表示装置１は、図５に示す画像表示装置１Ａと比較して、図１に示す信号切替部１４が新たに追加され、また、図５に示すテスト領域駆動部１６を削除した点が異なる。また、図１に示すテスト領域２３内の画素の駆動方法が、図５に示すテスト領域２３Ｂ内の画素の駆動方法と異なる。他の構成については、図１に示す画像表示装置１と図５に示す画像表示装置１Ａとは同様な構成のものであり、このため、同一の構成部分には同一の符号を付している。 In addition, the image display device 1 shown in FIG. 1 has a signal switching unit 14 shown in FIG. 1 newly added as compared with the image display device 1A shown in FIG. 5, and the test area driving unit 16 shown in FIG. The point that was deleted is different. Further, the driving method of the pixels in the test area 23 shown in FIG. 1 is different from the driving method of the pixels in the test area 23B shown in FIG. Regarding other configurations, the image display device 1 shown in FIG. 1 and the image display device 1A shown in FIG. 5 have the same configuration, and therefore, the same components are denoted by the same reference numerals. .
　図１に示す画像表示装置１において、映像信号処理部１１は、外部接続された映像信号発生装置等（図示せず）から映像信号が供給され、この供給された映像信号に対して必要な信号処理（例えば、データフォーマット変換や、色変換等）を施す。また、この映像信号処理部１１は、ＤＩＣＯＭガンマ特性に従って、供給された映像信号のビデオレベルを変換して駆動部１５に出力する。この映像信号処理部１１は、供給された映像信号による入力画像のデータをＤＩＣＯＭガンマ特性に準じて変換させる元データとして、ＤＩＣＯＭガンマ特性に準じた出力輝度値と、入力画像の入力輝度値とを対応付けたＬＵＴ（ルックアップテーブル）１１Ａを有しており、このＬＵＴ（ルックアップテーブル）１１Ａを参照して、供給された映像信号のビデオレベルを変換する。 In the image display device 1 shown in FIG. 1, the video signal processing unit 11 is supplied with a video signal from an externally connected video signal generator or the like (not shown), and a signal required for the supplied video signal. Processing (for example, data format conversion, color conversion, etc.) is performed. The video signal processing unit 11 converts the video level of the supplied video signal according to the DICOM gamma characteristic and outputs the converted video level to the driving unit 15. The video signal processing unit 11 uses an output luminance value according to the DICOM gamma characteristic and an input luminance value of the input image as original data for converting the input image data based on the supplied video signal according to the DICOM gamma characteristic. An associated LUT (lookup table) 11A is provided, and the video level of the supplied video signal is converted with reference to the LUT (lookup table) 11A.
　制御部１２は、画像表示装置１内の各処理部を統括して制御し、画像表示装置１に必要とされる処理機能を実現する。テスト信号生成部１３は、制御部１２により制御され、テスト領域２３に画像表示させるテスト信号（例えば、グレースケール信号等）を生成する。信号切替部１４は、供給される映像信号とテスト信号とのいずれかの信号を選択し、この選択した信号を駆動部１５に出力する。この信号切替部１４は、表示部２１内の表示素子領域２２に通常の画像信号を表示するタイミングにおいては映像信号を選択し、表示部２１内のテスト領域２３にテスト信号を表示するタイミングにおいてはテスト信号を選択して駆動部１５に出力する。駆動部１５は、ゲート駆動回路１５Ａと、ソース駆動回路１５Ｂを有しており、ゲート駆動回路１５Ａにより、表示素子領域２２及びテスト領域２３内の画素に対してゲート制御信号を出力し、ソース駆動回路１５Ｂにより、表示素子領域２２及びテスト領域２３内の画素に対してソース信号（画素に表示する信号）を出力する。 The control unit 12 controls each processing unit in the image display device 1 in an integrated manner, and realizes processing functions required for the image display device 1. The test signal generation unit 13 is controlled by the control unit 12 and generates a test signal (for example, a gray scale signal) that causes an image to be displayed in the test area 23. The signal switching unit 14 selects any one of the supplied video signal and test signal, and outputs the selected signal to the driving unit 15. The signal switching unit 14 selects a video signal at a timing at which a normal image signal is displayed on the display element region 22 in the display unit 21, and at a timing at which a test signal is displayed on the test region 23 in the display unit 21. A test signal is selected and output to the drive unit 15. The drive unit 15 includes a gate drive circuit 15A and a source drive circuit 15B. The gate drive circuit 15A outputs a gate control signal to the pixels in the display element region 22 and the test region 23, thereby driving the source. The circuit 15B outputs source signals (signals displayed on the pixels) to the pixels in the display element region 22 and the test region 23.
　表示部２１は、通常の画像信号を表示する表示素子領域２２と、画質検査用のテスト信号を表示するテスト領域２３と、バックライト２４と、フロントセンサとなるセンサ部２５とを有している。表示素子領域２２は、図２に示すように、ｎ×ｍ個の画素が格子（マトリクス）状に配列されて構成される画素領域であり、通常の画像信号が表示される画素領域である。なお、より正確には、後述するように一部の画素にテスト信号が表示される。 The display unit 21 includes a display element region 22 that displays a normal image signal, a test region 23 that displays a test signal for image quality inspection, a backlight 24, and a sensor unit 25 that serves as a front sensor. . As shown in FIG. 2, the display element region 22 is a pixel region configured by arranging n × m pixels in a lattice (matrix) shape, and is a pixel region where a normal image signal is displayed. More precisely, a test signal is displayed on some pixels as will be described later.
　テスト領域２３は、表示素子領域２２の外側に、一の方向（例えば、図２に示すＸ（行）方向）に沿って格子状に配置される所定個数（例えば、４個や、１６個等）の素子で形成される画素領域であり、このテスト領域２３内の画素にはテスト信号が表示される。また、センサ部２５がテスト領域２３の前面に設けられ、このセンサ部２５によりテスト領域２３内に表示される画像（テスト信号に対応する画像）を検出し、センサ部２５は、この検出信号を制御部１２に出力する。 A predetermined number (for example, four, sixteen, etc.) of test regions 23 are arranged outside the display element region 22 in a lattice shape along one direction (for example, the X (row) direction shown in FIG. 2). ), A test signal is displayed on the pixels in the test area 23. A sensor unit 25 is provided in front of the test area 23, and an image (an image corresponding to the test signal) displayed in the test area 23 is detected by the sensor unit 25. The sensor unit 25 detects the detection signal. Output to the control unit 12.
　なお、テスト領域２３内の画素（より正確には表示素子領域２２内の一部の画素を含む）とセンサ部２５とは、表示素子領域２２の外周部を覆うように設けられた筐体の外枠の内部に配置されている。それゆえ、テスト領域２３内の画素と表示素子領域２２内の一部の画素とセンサ部２５とは、表示部２１の正面、すなわち表示画面が表示されている側に位置するユーザ側からは見えないように隠されている。バックライト２４は、制御部１２により制御されるバックライト駆動部１７により駆動され、このバックライト駆動部１７は、制御部１２の指示に応じた輝度で発光するようにバックライト２４を駆動する。 It should be noted that the pixels in the test area 23 (more precisely, some pixels in the display element area 22 are included) and the sensor unit 25 are included in a housing provided to cover the outer periphery of the display element area 22. It is arranged inside the outer frame. Therefore, the pixels in the test area 23, some of the pixels in the display element area 22, and the sensor unit 25 can be seen from the front side of the display unit 21, that is, the user side located on the side where the display screen is displayed. Hidden so as not to. The backlight 24 is driven by a backlight drive unit 17 controlled by the control unit 12, and the backlight drive unit 17 drives the backlight 24 so as to emit light with luminance according to an instruction from the control unit 12.
　上記構成において、制御部１２は、テスト信号生成部１３に制御指令を送り、このテスト信号生成部１３によりテスト信号を生成させる。このテスト信号は、例えば、全白信号や、複数段階のグレースケール信号等である。そして、このテスト信号をテスト領域２３に画像として表示させる際には、１画面分（１フレーム）の画像を表示する走査期間中において、このテスト領域２３にテスト信号を表示するタイミングに合わせて、信号切替部１４が、テスト信号生成部１３により生成されたテスト信号を選択する。信号切替部１４は、この選択したテスト信号を駆動部１５に出力し、駆動部１５は、このテスト信号をテスト領域２３に表示する。 In the above configuration, the control unit 12 sends a control command to the test signal generation unit 13 and causes the test signal generation unit 13 to generate a test signal. This test signal is, for example, an all-white signal, a multi-stage gray scale signal, or the like. When the test signal is displayed as an image in the test area 23, the test signal is displayed in the test area 23 in a scanning period in which an image for one screen (one frame) is displayed. The signal switching unit 14 selects the test signal generated by the test signal generation unit 13. The signal switching unit 14 outputs the selected test signal to the driving unit 15, and the driving unit 15 displays the test signal in the test area 23.
　センサ部２５は、テスト領域２３に表示されたテスト信号の画像（例えば、グレースケール画像の輝度）を検出し、センサ部２５は、この画像の検出信号を制御部１２に出力する。制御部１２は、センサ部２５からテスト領域２３に表示された画像の検出信号が供給され、この検出信号を基に、表示部２１に表示された映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されているか否かを判定する。そして、その映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されていない場合は、映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されるように、すなわちグレースケール再現性が確保されるようにＬＵＴ１１Ａに保持されるテーブル値を補正する。これにより、画像表示装置１は、ＤＩＣＯＭ規格に合致したグレースケール再現性が確保されるように、映像信号処理部１１の動作を制御することができる。また、画像表示装置１は、センサ部２５から供給された検出信号を基に、バックライト２４における輝度の経年変化についても補正することができる。 The sensor unit 25 detects an image of a test signal (for example, the brightness of a gray scale image) displayed in the test area 23, and the sensor unit 25 outputs a detection signal of this image to the control unit 12. The control unit 12 is supplied with the detection signal of the image displayed in the test area 23 from the sensor unit 25, and based on this detection signal, is the video signal displayed on the display unit 21 converted correctly according to the DICOM gamma characteristic? Determine whether or not. If the video signal is not correctly converted according to the DICOM gamma characteristic, the table value held in the LUT 11A so that the video signal is correctly converted according to the DICOM gamma characteristic, that is, the gray scale reproducibility is ensured. Correct. As a result, the image display apparatus 1 can control the operation of the video signal processing unit 11 so that the gray scale reproducibility conforming to the DICOM standard is ensured. Further, the image display device 1 can correct the secular change of the luminance in the backlight 24 based on the detection signal supplied from the sensor unit 25.
　なお、画像表示装置１は、ＣＰＵ、ＲＯＭ、ＲＡＭ、タイマ、及びカウンタ等を有するマイクロコントローラやマイクロコンピュータ等を有しており、この画像表示装置１において行われる処理の過程は、プログラムの形式でＲＯＭ等に記憶されており、このプログラムをＣＰＵが読み出して実行することによって、画像表示装置１に必要な処理機能が実現される。すなわち、映像信号処理部１１、制御部１２、テスト信号生成部１３、信号切替部１４、駆動部１５、バックライト駆動部１７、及び表示部２１等において行われる各処理の全部または１部の処理は、ＣＰＵがＲＯＭ等から上記プログラムを読み出して、情報の加工、演算処理を実行することにより、実現されるものである。 The image display device 1 includes a microcontroller, a microcomputer, and the like having a CPU, a ROM, a RAM, a timer, a counter, and the like. The process performed in the image display device 1 is in the form of a program. Processing functions necessary for the image display apparatus 1 are realized by the CPU reading and executing the program stored in the ROM or the like. That is, all or one part of each processing performed in the video signal processing unit 11, the control unit 12, the test signal generation unit 13, the signal switching unit 14, the driving unit 15, the backlight driving unit 17, the display unit 21, and the like. Is realized by the CPU reading the program from a ROM or the like and executing information processing and arithmetic processing.
　また、図２は、表示素子領域とテスト領域の構成を示す図である。この図２に示すように、テスト領域２３は、通常の画像信号を表示する表示素子領域２２の最上部側（Ｙ方向側）に付加された形状で形成される。表示素子領域２２は、行方向にｎ個、列方向にｍ個の画素ＰＤ（合計ｎ×ｍ個の画素ＰＤ）を格子状に配置して形成される。すなわち、表示素子領域２２は、ゲート制御線ＧＬ１～ＧＬｎと、このゲート制御線ＧＬ１～ＧＬｎに交差するように列方向に配列されたソース線（信号線）ＳＬ１～ＳＬｍとのそれぞれの交点に画素ＰＤを配置して形成される。 FIG. 2 is a diagram showing the configuration of the display element area and the test area. As shown in FIG. 2, the test area 23 is formed in a shape added to the uppermost side (Y direction side) of the display element area 22 for displaying a normal image signal. The display element region 22 is formed by arranging n pixels PD in the row direction and m pixels PD (total of n × m pixels PD) in the column direction. That is, the display element region 22 includes pixels at intersections of the gate control lines GL1 to GLn and source lines (signal lines) SL1 to SLm arranged in the column direction so as to intersect the gate control lines GL1 to GLn. It is formed by arranging PD.
　ゲート駆動回路１５Ａは、ゲート制御線ＧＬ１～ＧＬｎにゲート制御信号（ゲート選択信号）を出力する回路である。また、ソース駆動回路１５Ｂは、ソース線ＳＬ１～ＳＬｍに画像の表示信号（通常の画像信号或いはテスト信号）を出力する回路である。このゲート駆動回路１５Ａとソース駆動回路１５Ｂとにより、ゲート制御線ＧＬ１～ＧＬｎとソース線ＳＬ１～ＳＬｍの各交点に配されたスイッチング素子（ＴＦＴ）を選択し、この選択したスイッチング素子（ＴＦＴ）に繋がる画素ＰＤに画像の表示信号（通常の画像信号或いはテスト信号）を供給する。 The gate drive circuit 15A is a circuit that outputs a gate control signal (gate selection signal) to the gate control lines GL1 to GLn. The source drive circuit 15B is a circuit that outputs an image display signal (normal image signal or test signal) to the source lines SL1 to SLm. The gate driving circuit 15A and the source driving circuit 15B select a switching element (TFT) arranged at each intersection of the gate control lines GL1 to GLn and the source lines SL1 to SLm, and select the switching element (TFT). An image display signal (normal image signal or test signal) is supplied to the connected pixel PD.
　また、テスト領域２３は、４つの画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を格子状に配列して構成されている。このテスト領域２３内において、各画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４のスイッチング素子（ＴＦＴ）のゲートは共通接続されるとともに、表示素子領域２２内のゲート制御線ＧＬ１に接続されている。すなわち、各画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４のゲート制御線は、テスト領域２３に隣接する画素ＰＤｘ１、ＰＤｘ２のゲート制御線ＧＬ１に共通接続されている。 Further, the test area 23 is configured by arranging four pixels PDt1, PDt2, PDt3, and PDt4 in a grid pattern. In the test region 23, the gates of the switching elements (TFTs) of the pixels PDt1, PDt2, PDt3, and PDt4 are connected in common and connected to the gate control line GL1 in the display element region 22. That is, the gate control lines of the pixels PDt1, PDt2, PDt3, and PDt4 are commonly connected to the gate control lines GL1 of the pixels PDx1 and PDx2 adjacent to the test region 23.
　また、同じ列（Ｙ方向）に並ぶ２つの画素ＰＤｔ１及びＰＤｔ２のソース線は共通接続されるとともに、表示素子領域２２内のソース線ＳＬｒに接続されている。すなわち、２つの画素ＰＤｔ１及びＰＤｔ２のソース線は、テスト領域２３に隣接する表示素子領域２２内の画素ＰＤｘ１のソース線に共通接続されている。また、同じ列（Ｙ方向）に並ぶ２つの画素ＰＤｔ３及びＰＤｔ４のソース線は共通接続されるとともに、表示素子領域２２内のソース線ＳＬｒ＋１に接続される。すなわち、画素ＰＤｔ３及びＰＤｔ４のソース線は、テスト領域２３に隣接する表示素子領域２２内の画素ＰＤｘ２のソース線に共通接続されている。 The source lines of the two pixels PDt1 and PDt2 arranged in the same column (Y direction) are connected in common and connected to the source line SLr in the display element region 22. That is, the source lines of the two pixels PDt1 and PDt2 are commonly connected to the source line of the pixel PDx1 in the display element region 22 adjacent to the test region 23. The source lines of the two pixels PDt3 and PDt4 arranged in the same column (Y direction) are connected in common and connected to the source line SLr + 1 in the display element region 22. That is, the source lines of the pixels PDt3 and PDt4 are commonly connected to the source line of the pixel PDx2 in the display element region 22 adjacent to the test region 23.
　従って、テスト領域２３内の同じ列（Ｙ方向）に並ぶ画素ＰＤｔ１及びＰＤｔ２と、この画素ＰＤｔ１及びＰＤｔ２と同じ列（Ｙ方向）に並ぶ表示素子領域２２内の画素ＰＤｘ１とは、同じゲート制御線ＧＬ１からの信号によりスイッチング素子（ＴＦＴ）が制御され、また同じソース線ＳＬｒにより画像の表示信号（ここではテスト信号）が供給される。すなわち、テスト領域２３内の画素ＰＤｔ１及びＰＤｔ２には、表示素子領域２２内の画素ＰＤｘ１と同じテスト信号が表示される。 Accordingly, the pixels PDt1 and PDt2 arranged in the same column (Y direction) in the test region 23 and the pixels PDx1 in the display element region 22 arranged in the same column (Y direction) as the pixels PDt1 and PDt2 are the same gate control line. A switching element (TFT) is controlled by a signal from GL1, and an image display signal (here, a test signal) is supplied by the same source line SLr. That is, the same test signal as that of the pixel PDx1 in the display element region 22 is displayed on the pixels PDt1 and PDt2 in the test region 23.
　同様にして、テスト領域２３内の同じ列（Ｙ方向）に並ぶ画素ＰＤｔ３及びＰＤｔ４と、この画素ＰＤｔ３及びＰＤｔ４と同じ列に並ぶ表示素子領域２２内の画素ＰＤｘ２とは、同じゲート制御線ＧＬ１からの信号によりスイッチング素子（ＴＦＴ）が制御され、また同じソース線ＳＬｒ＋１により画像の表示信号（ここではテスト信号）が供給される。すなわち、テスト領域２３内の画素ＰＤｔ３及びＰＤｔ４には、表示素子領域２２内の画素ＰＤｘ２と同じテスト信号が表示される。 Similarly, the pixels PDt3 and PDt4 arranged in the same column (Y direction) in the test region 23 and the pixel PDx2 in the display element region 22 arranged in the same column as the pixels PDt3 and PDt4 are connected from the same gate control line GL1. The switching element (TFT) is controlled by the above signal, and an image display signal (here, a test signal) is supplied by the same source line SLr + 1. That is, the same test signal as that of the pixel PDx2 in the display element region 22 is displayed on the pixels PDt3 and PDt4 in the test region 23.
　従って、テスト信号生成部１３により生成されたテスト信号をテスト領域２３に画像として表示させる際には、１画面表示（１フレームの画像を表示）する走査期間中において、表示素子領域２２内の画素ＰＤｘ１及びＰＤｘ２のそれぞれが選択されるタイミングにおいて、当該画素ＰＤｘ１及びＰＤｘ２にテスト信号を画像として表示させることにより、テスト領域２３内の画素に同じテスト信号を画像として表示させることができる。すなわち、表示素子領域２２内の最上部の２つの画素ＰＤｘ１、ＰＤｘ２を利用して、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４にテスト信号を表示することができる。 Accordingly, when the test signal generated by the test signal generation unit 13 is displayed as an image in the test area 23, the pixels in the display element area 22 are displayed during a scanning period in which one screen is displayed (one frame image is displayed). By displaying the test signal as an image on the pixels PDx1 and PDx2 at the timing when each of PDx1 and PDx2 is selected, the same test signal can be displayed as an image on the pixels in the test area 23. That is, the test signals can be displayed on the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 by using the uppermost two pixels PDx1 and PDx2 in the display element region 22.
　これにより、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を駆動するための専用の駆動部（例えば、図５に示すテスト領域駆動部１６）が不要になり、回路構成を簡略化できる。また、画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を駆動する信号線（ゲート制御線及びソース線）を、表示素子領域２２内の画素ＰＤｘ１、ＰＤｘ２の信号線と共用化でき、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４に接続される信号配線を簡略化できるとともに、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４にテスト信号を表示させる際の制御が簡単になる。 Thereby, a dedicated drive unit (for example, the test region drive unit 16 shown in FIG. 5) for driving the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 becomes unnecessary, and the circuit configuration can be simplified. Further, signal lines (gate control lines and source lines) for driving the pixels PDt1, PDt2, PDt3, and PDt4 can be shared with the signal lines of the pixels PDx1 and PDx2 in the display element region 22, and the pixel PDt1 in the test region 23 is used. , PDt2, PDt3, and PDt4 can be simplified, and control when displaying the test signal on the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 is simplified.
　なお、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４と、表示素子領域２２内の画素ＰＤｘ１、ＰＤｘ２と、センサ部２５とは、表示素子領域２２の外周部を覆うように設けられた筐体の内部（以下「表示素子領域２２の外枠内」という。）に配置されており、表示画面の前面側（ユーザ）からは隠されて見えないようにして配置されている。すなわち、図２に示す態様では、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４と、表示素子領域２２内の画素ＰＤｘ１、ＰＤｘ２との合計６個の画素が見えないように隠される。また、図２に示す態様では、テスト領域２３内に配置される画素が４つの場合を示しているが、より多数の画素を配置することができる。例えば、後述する図３に示すように１６個の画素を格子状に配置することができ、また、例えば、１６×１６個の画素を格子状に配置することもできる。 The pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23, the pixels PDx1, PDx2, and the sensor unit 25 in the display element region 22 are provided to cover the outer periphery of the display element region 22. It is arranged inside the body (hereinafter referred to as “inside the outer frame of the display element region 22”) and is arranged so as to be hidden from the front side (user) of the display screen. That is, in the mode shown in FIG. 2, the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23 and the pixels PDx1 and PDx2 in the display element region 22 are hidden so that they cannot be seen. In the embodiment shown in FIG. 2, the case where four pixels are arranged in the test area 23 is shown, but a larger number of pixels can be arranged. For example, as shown in FIG. 3 to be described later, 16 pixels can be arranged in a grid, and for example, 16 × 16 pixels can be arranged in a grid.
　また、図３は、テスト領域及び表示素子領域におけるテスト信号の表示態様を示す図である。図３（Ａ）に示すように、テスト信号をテスト領域２３に画像として表示させる際には、１画面表示（１フレームの画像を表示）する走査期間Ｔ（垂直同期信号により規定される走査期間）おいて、前述の表示素子領域２２内の画素（テスト信号の表示に利用される画素）のそれぞれの画素が選択されるタイミングにおいて、テスト領域２３にテスト信号の画像を表示させる。 FIG. 3 is a diagram showing a display mode of the test signal in the test area and the display element area. As shown in FIG. 3A, when a test signal is displayed as an image in the test area 23, a scanning period T (a scanning period defined by a vertical synchronization signal) for displaying one screen (displaying an image of one frame). ), An image of the test signal is displayed in the test area 23 at a timing when each of the pixels in the display element area 22 (pixels used for displaying the test signal) is selected.
　また、図３（Ｂ）は、図３（Ａ）に示すテスト領域２３の部分を拡大して示した図である。但し、この図３（Ｂ）では、テスト領域２３内に４×４個の画素（合計１６個の画素）を格子状に配置した例を示している。この図３（Ｂ）に示すように、テスト信号の表示に使用される表示素子領域２２内の画素（破線ａで囲まれる画素）のそれぞれが選択されるタイミングにおいて、当該表示素子領域２２内の画素にテスト信号を表示（破線ａ内の左側の素子から順番にテスト信号を表示）することにより、これに合わせて、テスト領域２３内の１６個の画素にテスト信号を表示（左側の列から４個ずつ順番にテスト信号を表示）することができる。
　なお、前述したように、テスト領域２３内の画素と、表示素子領域２２内の画素（破線ａで囲まれる画素）とは、表示素子領域２２の外枠内に隠れるようにして配置されており、図３に示す例では、合計２０個の画素とセンサ部２５とが外枠内に隠される。 FIG. 3B is an enlarged view of a portion of the test area 23 shown in FIG. However, FIG. 3B shows an example in which 4 × 4 pixels (a total of 16 pixels) are arranged in a grid pattern in the test area 23. As shown in FIG. 3B, at the timing when each of the pixels (pixels surrounded by the broken line a) in the display element region 22 used for displaying the test signal is selected, By displaying the test signal on the pixels (displaying the test signals in order from the left element in the broken line a), the test signals are displayed on the 16 pixels in the test area 23 accordingly (from the left column). Test signals can be displayed in order of four).
As described above, the pixels in the test area 23 and the pixels in the display element area 22 (pixels surrounded by the broken line a) are arranged so as to be hidden in the outer frame of the display element area 22. In the example shown in FIG. 3, a total of 20 pixels and the sensor unit 25 are hidden in the outer frame.
　また、図４は、テスト領域の他の実施態様を示す図である。前述した図２に示す例では、表示素子領域２２の最上部側（Ｙ方向側）にテスト領域２３を配置する例を示したが、図４に示すように、表示素子領域２２の最端部側（Ｘ方向側）にテスト領域２３Ａを配置することもできる。 FIG. 4 is a diagram showing another embodiment of the test area. In the example shown in FIG. 2 described above, the example in which the test region 23 is arranged on the uppermost side (Y direction side) of the display element region 22 has been shown. However, as shown in FIG. The test area 23A can also be arranged on the side (X direction side).
　この図４に示すように、テスト領域２３Ａは、通常の画像信号を表示する表示素子領域２２の最端部側（Ｘ方向側）に付加された形状で形成される。このテスト領域２３Ａは、４つの画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を格子状に配列して構成されている。このテスト領域２３内において、各画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４のソース線は共通接続されるとともに、表示素子領域２２内のソース線ＳＬｍに接続される。そして、同じ行（Ｘ方向）に並ぶ２つの画素ＰＤｔ１及びＰＤｔ２のスイッチング素子（ＴＦＴ）のゲートは共通接続されるとともに、表示素子領域２２内のゲート制御線ＧＬｒに接続される。また、同じ行（Ｘ方向）に並ぶ２つの画素ＰＤｔ３及びＰＤｔ４のスイッチング素子（ＴＦＴ）のゲートは共通接続されるとともに、ゲート制御線ＧＬｒ＋１に接続される。 As shown in FIG. 4, the test area 23A is formed in a shape added to the endmost side (X direction side) of the display element area 22 for displaying a normal image signal. The test area 23A is configured by arranging four pixels PDt1, PDt2, PDt3, and PDt4 in a grid pattern. In the test region 23, the source lines of the pixels PDt1, PDt2, PDt3, and PDt4 are connected in common and also connected to the source line SLm in the display element region 22. The gates of the switching elements (TFTs) of the two pixels PDt1 and PDt2 arranged in the same row (X direction) are connected in common and connected to the gate control line GLr in the display element region 22. The gates of the switching elements (TFTs) of the two pixels PDt3 and PDt4 arranged in the same row (X direction) are connected in common and connected to the gate control line GLr + 1.
　従って、テスト領域２３Ａ内の同じ行（Ｘ方向）に並ぶ画素ＰＤｔ１及びＰＤｔ２と、同じ行（Ｘ方向）に並ぶ表示素子領域２２内の画素ＰＤｘ１とは、同じゲート制御線ＧＬｒでスイッチング素子（ＴＦＴ）が制御され、また同じソース線ＳＬｍにより画像の表示信号（ここではテスト信号）が与えられる。すなわち、テスト領域２３Ａ内の画素ＰＤｔ１及びＰＤｔ２には、表示素子領域２２内の画素ＰＤｘ１が駆動されるタイミングにおいて、この画素ＰＤｘ１と同じテスト信号が表示される。 Accordingly, the pixels PDt1 and PDt2 arranged in the same row (X direction) in the test region 23A and the pixel PDx1 in the display element region 22 arranged in the same row (X direction) are switched by the same gate control line GLr. ) Is controlled, and an image display signal (here, a test signal) is given by the same source line SLm. That is, the same test signal as the pixel PDx1 is displayed on the pixels PDt1 and PDt2 in the test region 23A at the timing when the pixel PDx1 in the display element region 22 is driven.
　同様にして、テスト領域２３Ａ内の同じ行（Ｘ方向）に並ぶ画素ＰＤｔ３及びＰＤｔ４と、同じ行（Ｘ方向）に並ぶ表示素子領域２２内の画素ＰＤｘ２とは、同じゲート制御線ＧＬｒ＋１により供給される制御信号によりスイッチング素子（ＴＦＴ）が制御され、また同じソース線ＳＬｍにより画像の表示信号（ここではテスト信号）が供給される。すなわち、テスト領域２３Ａ内の画素ＰＤｔ３及びＰＤｔ４には、表示素子領域２２内の画素ＰＤｘ２が駆動されるタイミングにおいて、この画素ＰＤｘ２と同じテスト信号が表示される。 Similarly, the pixels PDt3 and PDt4 arranged in the same row (X direction) in the test region 23A and the pixel PDx2 in the display element region 22 arranged in the same row (X direction) are supplied by the same gate control line GLr + 1. The switching element (TFT) is controlled by the control signal, and an image display signal (here, a test signal) is supplied by the same source line SLm. That is, the same test signal as the pixel PDx2 is displayed on the pixels PDt3 and PDt4 in the test region 23A at the timing when the pixel PDx2 in the display element region 22 is driven.
　従って、テスト信号をテスト領域２３Ａに画像として表示させる際には、１画面表示（１フレームの画像を表示）する走査期間中において、表示素子領域２２内の画素ＰＤｘ１及びＰＤｘ２のそれぞれが選択されるタイミングにおいて、当該画素ＰＤｘ１及びＰＤｘ２にテスト信号の画像を表示させることにより、テスト領域２３Ａ内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４についても同じテスト信号の画像を表示させることができる。 Accordingly, when the test signal is displayed as an image in the test area 23A, each of the pixels PDx1 and PDx2 in the display element area 22 is selected during a scanning period in which one screen is displayed (one frame image is displayed). By displaying the test signal image on the pixels PDx1 and PDx2 at the timing, the same test signal image can be displayed on the pixels PDt1, PDt2, PDt3, and PDt4 in the test area 23A.
　なお、テスト領域２３Ａ内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４と、表示素子領域２２内の画素ＰＤｘ１、ＰＤｘ２と、センサ部２５とは、表示素子領域２２の外枠内に配置されており、表示素子領域２２の前面側（ユーザ）からは隠れて見えないようにされている。 Note that the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23A, the pixels PDx1, PDx2, and the sensor unit 25 in the display element region 22 are disposed within the outer frame of the display element region 22, and display It is hidden from the front side (user) of the element region 22 so that it cannot be seen.
　以上説明したように、上記実施形態の画像表示装置１においては、表示素子領域２２の外側に表示画像の画質を検査するためのテスト領域２３または２３Ａを配置する際に、このテスト領域内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を駆動するための専用の駆動回路（例えば、図５に示すテスト領域駆動部１６）を省略することができ、回路構成を簡略化することができる。また、テスト領域２３内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４を駆動する信号線（ゲート制御線およびソース線）として、表示素子領域２２内の画素（テスト領域２３に隣接し、テスト信号の表示に利用される画素ＰＤｘ１、ＰＤｘ２）を駆動する信号線（ゲート制御線およびソース線）を用いることができるため、テスト領域２３内の画素に接続される信号配線を簡略化できる。また、テスト領域２３及び２３Ａ内の画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４にテスト信号を表示させる際の制御を簡略化できる。 As described above, in the image display device 1 of the above embodiment, when the test area 23 or 23A for inspecting the image quality of the display image is arranged outside the display element area 22, the pixels in the test area are arranged. A dedicated drive circuit (for example, the test area drive unit 16 shown in FIG. 5) for driving PDt1, PDt2, PDt3, and PDt4 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving the pixels PDt1, PDt2, PDt3, and PDt4 in the test region 23, the pixels in the display element region 22 (adjacent to the test region 23 and used for displaying test signals). Since signal lines (gate control lines and source lines) for driving the pixels PDx1, PDx2) to be used can be used, signal wirings connected to the pixels in the test region 23 can be simplified. Further, it is possible to simplify the control when displaying the test signal on the pixels PDt1, PDt2, PDt3, and PDt4 in the test regions 23 and 23A.
　なお、ここで、本発明と上述した実施形態との対応関係について補足して説明しておく。上記実施形態において、本発明における画像表示装置は、画像表示装置１が対応する。また、本発明における表示素子領域は、表示部２１内の表示素子領域２２が対応する。また、本発明におけるテスト領域は、表示部２１内のテスト領域２３及びテスト領域２３Ａが対応する。また、本発明における第１の駆動部は、駆動部１５内のゲート駆動回路１５Ａが対応し、本発明における第２の駆動部は、ソース駆動回路１５Ｂが対応する。 Note that here, the correspondence between the present invention and the above-described embodiment will be supplementarily described. In the above embodiment, the image display device according to the present invention corresponds to the image display device 1. Further, the display element region in the present invention corresponds to the display element region 22 in the display unit 21. The test area in the present invention corresponds to the test area 23 and the test area 23A in the display unit 21. Further, the first drive unit in the present invention corresponds to the gate drive circuit 15A in the drive unit 15, and the second drive unit in the present invention corresponds to the source drive circuit 15B.
　また、本発明におけるテスト信号生成部は、テスト信号生成部１３が対応し、本発明における信号切替部は、信号切替部１４が対応し、また、本発明における制御部は、制御部１２が対応する。また、本発明における表示素子領域内の画像を表示する素子は、表示素子領域２２内の画素（画素ＰＤ、画素ＰＤｘ１、ＰＤｘ２）が対応し、本発明におけるテスト領域の素子は、テスト領域２３及び２３Ａ内の画素（画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４）が対応する。また、本発明における表示素子領域の素子は、表示素子領域２２内の画素（画素ＰＤ、ＰＤｘ１、ＰＤｘ２）が対応する。 Further, the test signal generation unit in the present invention corresponds to the test signal generation unit 13, the signal switching unit in the present invention corresponds to the signal switching unit 14, and the control unit in the present invention corresponds to the control unit 12. To do. In addition, an element that displays an image in the display element area according to the present invention corresponds to a pixel (pixel PD, pixel PDx1, PDx2) in the display element area 22, and the elements in the test area according to the present invention include the test area 23 and The pixels within 23A (pixels PDt1, PDt2, PDt3, and PDt4) correspond. Further, the elements in the display element region in the present invention correspond to the pixels (pixels PD, PDx1, PDx2) in the display element region 22.
　（１）そして、上記実施形態において、本発明の画像表示装置１は、格子状に配置された複数の素子に画像を表示する表示素子領域２２と、表示素子領域２２外に表示素子領域２２から、上記格子状に配列された表示素子領域２２の素子の一の配列方向（例えば、図２に示すＸ方向）に沿って並べて設けられる所定数の素子を備えるテスト領域２３と、を備え、テスト領域２３の素子（画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４）には、テスト領域２３と並べて設けられている上記表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）に供給される制御信号と同じ制御信号（ゲート制御信号）が、テスト領域２３と表示素子領域２２とをともに駆動する第１の駆動部（ゲート駆動回路１５Ａ）から供給され、テスト領域２３と並べて設けられている上記表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）に供給されるテスト信号と同じテスト信号が、テスト領域２３と表示素子領域２２とをともに駆動する第２の駆動部（ソース駆動回路１５Ｂ）から供給される。 (1) In the above embodiment, the image display device 1 of the present invention includes a display element region 22 that displays an image on a plurality of elements arranged in a lattice pattern, and a display element region 22 outside the display element region 22. A test region 23 having a predetermined number of elements arranged along one array direction (for example, the X direction shown in FIG. 2) of the elements of the display element region 22 arrayed in the above-mentioned grid pattern, The same control signals as the control signals supplied to the elements (pixels PDx1, PDx2) in the display element region 22 provided side by side with the test area 23 are applied to the elements (pixels PDt1, PDt2, PDt3, PDt4) in the region 23. Gate control signal) is supplied from a first drive unit (gate drive circuit 15A) that drives both the test region 23 and the display element region 22, and is arranged side by side with the test region 23. The second drive unit (source drive circuit) that drives the test area 23 and the display element area 22 together with the same test signal as the test signal supplied to the elements (pixels PDx1, PDx2) in the display element area 22 15B).
　このような構成の画像表示装置１においては、表示素子領域２２の外側に一の配列方向（例えば、図２に示すＸ方向）に沿って所定数の素子（画素ＰＤｔ１、ＰＤｔ２、ＰＤｔ３、ＰＤｔ４）が配列されるテスト領域２３を設ける。そして、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）には、このテスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）と並べて設けられている表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）に供給される制御信号と同じ制御信号（ゲート信号）を供給し、また、同じ表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）に供給されるテスト信号（画素ＰＤｘ１、ＰＤｘの表示信号としてテスト信号を与える場合の当該テスト信号）と同じテスト信号を供給する。 In the image display device 1 having such a configuration, a predetermined number of elements (pixels PDt1, PDt2, PDt3, and PDt4) along one arrangement direction (for example, the X direction shown in FIG. 2) outside the display element region 22. Is provided. The elements (pixels PDt1 to PDt4) in the test area 23 are connected to the elements (pixels PDx1 and PDx2) in the display element area 22 provided side by side with the elements (pixels PDt1 to PDt4) in the test area 23. The same control signal (gate signal) as the supplied control signal is supplied, and the test signal supplied to the elements (pixels PDx1, PDx2) in the same display element region 22 (the test signal as the display signal of the pixels PDx1, PDx) Is supplied with the same test signal as that of the test signal).
　これにより、表示素子領域２２の外側に表示画像の検査用のテスト領域２３を配置する際に、このテスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動するための専用の駆動部（例えば、図５に示すテスト領域駆動部１６）を省略することができ、回路構成を簡略化することができる。また、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動する信号線（ゲート制御線およびソース線）として、表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）を駆動する信号線（ゲート制御線および信号線ソース線）を用いることができるため、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）に接続される信号配線を簡略化できるとともに、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）にテスト信号を表示する際の制御を簡略化できる。 As a result, when the test area 23 for inspecting the display image is arranged outside the display element area 22, a dedicated drive unit (for example, for driving the elements (pixels PDt1 to PDt4) in the test area 23) The test area driving unit 16) shown in FIG. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used. Line and signal line source line) can be used, so that signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified, and the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified. It is possible to simplify the control when displaying the test signal.
　（２）また、上記実施形態において、本発明の画像表示装置１は、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）に表示するテスト信号を生成するテスト信号生成部１３と、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）に表示するテスト信号と、表示素子領域２２に表示する画像信号とを切り替える信号切替部１４と、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）と同じ制御信号（ゲート信号）が供給される表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）に、テスト信号を供給するように信号切替部１４を制御する制御部１２と、を備える。 (2) In the above embodiment, the image display device 1 of the present invention includes the test signal generation unit 13 that generates a test signal to be displayed on the elements (pixels PDt1 to PDt4) in the test area 23, and the elements in the test area 23. A signal switching unit 14 for switching between a test signal to be displayed on the (pixels PDt1 to PDt4) and an image signal to be displayed on the display element region 22, and the same control signal (gate signal) as the elements (pixels PDt1 to PDt4) in the test region 23 And a control unit 12 that controls the signal switching unit 14 so as to supply test signals to the elements (pixels PDx1, PDx2) in the display element region 22 to which.
　このような構成の画像表示装置１においては、テスト信号生成部１３により、テスト領域２３に表示するテスト信号を生成する。このテスト信号は、例えば、全白信号や、複数段階のグレースケール信号等である。そして、制御部１２は、１画面表示（１フレームの画面表示）の走査期間中に、表示素子領域２２の素子（画素ＰＤｘ１及びＰＤｘ２）が選択されるタイミングにおいて、当該表示素子領域２２の素子（画素ＰＤｘ１及びＰＤｘ２）にテスト信号を表示させるように信号切替部１４を制御する。 In the image display device 1 having such a configuration, the test signal generation unit 13 generates a test signal to be displayed in the test area 23. This test signal is, for example, an all-white signal, a multi-stage gray scale signal, or the like. The control unit 12 then selects the elements (display elements 22) of the display element region 22 at the timing when the elements (pixels PDx1 and PDx2) of the display element region 22 are selected during the scanning period of one screen display (screen display of one frame). The signal switching unit 14 is controlled to display the test signal on the pixels PDx1 and PDx2).
　これにより、表示素子領域２２の素子（画素ＰＤｘ１及びＰＤｘ２）にテスト信号を表示させることにより、同時にテスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）にテスト信号を表示させることができる。 Thus, by displaying the test signal on the elements (pixels PDx1 and PDx2) in the display element region 22, the test signals can be displayed on the elements (pixels PDt1 to PDt4) in the test region 23 at the same time.
　（３）また、上記実施形態において、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）は、格子状に配列された表示素子領域２２の素子の一の配列方向（例えば、図２に示すＸ方向）に沿って素子（画素ＰＤｔ１～ＰＤｔ４）のゲート（スイッチング素子（ＴＦＴ））を制御するゲート制御信号を供給するゲート制御線と、このゲート制御線と直交し、素子（画素ＰＤｔ１～ＰＤｔ４）に表示するテスト信号を供給するソース線とを、同じ制御信号と同じテスト信号が供給される表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）と共用する。 (3) In the above embodiment, the elements in the test region 23 (pixels PDt1 to PDt4) are arranged in one array direction of the elements in the display element region 22 arranged in a lattice pattern (for example, the X direction shown in FIG. 2). A gate control line for supplying a gate control signal for controlling the gates (switching elements (TFTs)) of the elements (pixels PDt1 to PDt4) along the line, and orthogonal to the gate control lines, and displayed on the elements (pixels PDt1 to PDt4) The source line for supplying the test signal to be used is shared with the elements (pixels PDx1, PDx2) in the display element region 22 to which the same control signal and the same test signal are supplied.
　このような構成の画像表示装置１においては、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）は、ゲート制御信号を供給するゲート制御線と、テスト信号を供給するソース線とを、同じゲート制御信号と同じテスト信号が供給される表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）と共用する。
  これにより、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動する信号線（ゲート制御線およびソース線）として、表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）を駆動する信号線（ゲート制御線およびソース線）を用いることができる。このため、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）への信号線の配線を簡略化できる。 In the image display device 1 having such a configuration, the elements (pixels PDt1 to PDt4) in the test region 23 have the same gate control signal for the gate control line for supplying the gate control signal and the source line for supplying the test signal. Are shared with the elements (pixels PDx1, PDx2) in the display element region 22 to which the same test signal is supplied.
As a result, signal lines (gates for driving the elements (pixels PDx1, PDx2) in the display element region 22 are used as signal lines (gate control lines and source lines) for driving the elements (pixels PDt1 to PDt4) in the test region 23. Control lines and source lines). For this reason, the wiring of the signal lines to the elements (pixels PDt1 to PDt4) in the test area 23 can be simplified.
　（４）また、上記実施形態において、上記テスト信号は、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）に表示する輝度を切り替える信号である。
  これにより、テスト信号を、全白信号や、グレースケール信号等の輝度を切り替える信号とし、このテスト信号により表示される画像をセンサ部２５により検出することにより、制御部１２は、映像信号処理部１１において映像信号がＤＩＣＯＭガンマ特性に従って正しく変換されるように、当該映像信号処理部１１を制御することができる。このため、画像表示装置１は、供給される映像信号を表示部に表示する際に、ＤＩＣＯＭ規格に合致したグレースケール再現性を確保することができる。 (4) In the above embodiment, the test signal is a signal for switching the luminance to be displayed on the elements (pixels PDt1 to PDt4) in the test area 23.
As a result, the test signal is a signal for switching the luminance such as an all white signal or a gray scale signal, and the image displayed by the test signal is detected by the sensor unit 25, so that the control unit 12 can detect the video signal processing unit. 11, the video signal processing unit 11 can be controlled so that the video signal is correctly converted in accordance with the DICOM gamma characteristic. For this reason, the image display apparatus 1 can ensure the gray scale reproducibility conforming to the DICOM standard when displaying the supplied video signal on the display unit.
　（５）また、上記実施形態において、テスト領域２３は、表示素子領域２２に隣接するように配置されるとともに表示素子領域２２の行方向（図２に示すＸ方向）に沿って所定数の素子（画素ＰＤｔ１～ＰＤｔ４）が格子状に並べて設けられ、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）のゲート制御線は、表示素子領域２２内の素子であってテスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）に隣接する素子（画素ＰＤｘ１、ＰＤｘ２）のゲート制御線に接続され、テスト領域２３の素子（画素ＰＤｔ１～ＰＤｔ４）のソース線は、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）に隣接するとともに同じ列に並べて配置されている表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）のソース線に接続される。 (5) In the above embodiment, the test region 23 is disposed adjacent to the display element region 22 and has a predetermined number of elements along the row direction (X direction shown in FIG. 2) of the display element region 22. (Pixels PDt1 to PDt4) are arranged in a grid, and the gate control lines of the elements (pixels PDt1 to PDt4) in the test area 23 are elements in the display element area 22 and elements in the test area 23 (pixels PDt1 to PDt1 to PDt1 to PDt4). Connected to the gate control lines of the elements (pixels PDx1, PDx2) adjacent to PDt4), and the source lines of the elements (pixels PDt1 to PDt4) in the test region 23 are adjacent to the elements (pixels PDt1 to PDt4) in the test region 23 And connected to the source lines of the elements (pixels PDx1, PDx2) in the display element region 22 arranged in the same column.
　これにより、表示素子領域２２の外側に表示画像の検査用のテスト領域２３を行方向（図２に示すＸ方向）に並べて配置する際に、このテスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動するための専用の駆動部（例えば、図５に示すテスト領域駆動部１６）を省略することができ、回路構成を簡略化することができる。また、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動する信号線（ゲート制御線およびソース線）として、表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）を駆動する信号線（ゲート制御線をソース線）を用いることができるため、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）に接続される信号配線を簡略化できるとともに、テスト領域２３内の素子（画素ＰＤｔ１～ＰＤｔ４）にテスト信号を表示する際の制御を簡略化できる。 Thus, when the test area 23 for inspecting the display image is arranged outside the display element area 22 in the row direction (X direction shown in FIG. 2), the elements (pixels PDt1 to PDt4) in the test area 23 are arranged. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used. Since a line can be used as a source line, the signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23 can be simplified and the elements (pixels PDt1 to PDt4) in the test region 23 can be tested. Control at the time of displaying a signal can be simplified.
　（６）また、上記実施形態において、テスト領域２３Ａは、表示素子領域２２に隣接するように配置されるとともに表示素子領域２２の列方向（図４に示すＹ方向）に沿って所定数の素子（画素ＰＤｔ１～ＰＤｔ４）が格子状に並べて設けられ、テスト領域２３Ａの素子（画素ＰＤｔ１～ＰＤｔ４）のゲート制御線は、テスト領域２３Ａの素子（画素ＰＤｔ１～ＰＤｔ４）に隣接するとともにテスト領域２３Ａの素子（画素ＰＤｔ１～ＰＤｔ４）と同じ行に並べて配置されている表示素子領域２２の素子（画素ＰＤｘ１、ＰＤｘ２）のゲート制御線に接続され、テスト領域２３Ａの素子（画素ＰＤｔ１～ＰＤｔ４）のソース線は、表示素子領域２２内の素子であってテスト領域２３Ａの素子（画素ＰＤｔ１～ＰＤｔ４）に隣接する素子（画素ＰＤｘ１、ＰＤｘ２）のソース線に接続される。 (6) In the above embodiment, the test region 23A is disposed adjacent to the display element region 22, and a predetermined number of elements are arranged along the column direction of the display element region 22 (Y direction shown in FIG. 4). (Pixels PDt1 to PDt4) are arranged in a grid, and the gate control lines of the elements (pixels PDt1 to PDt4) in the test area 23A are adjacent to the elements (pixels PDt1 to PDt4) in the test area 23A and The source lines of the elements (pixels PDt1 to PDt4) in the test area 23A are connected to the gate control lines of the elements (pixels PDx1 and PDx2) in the display element region 22 arranged in the same row as the elements (pixels PDt1 to PDt4). Are elements in the display element region 22 and adjacent to the elements (pixels PDt1 to PDt4) in the test area 23A (image PDt4). PDXl, it is connected to a source line of pdx2).
　これにより、表示素子領域２２の外側に表示画像の検査用のテスト領域２３Ａを列方向（図４に示すＹ方向）に並べて配置する際に、このテスト領域２３Ａ内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動するための専用の駆動部（例えば、図５に示すテスト領域駆動部１６）を省略することができ、回路構成を簡略化することができる。また、テスト領域２３Ａ内の素子（画素ＰＤｔ１～ＰＤｔ４）を駆動する信号線（ゲート制御線およびソース線）として、表示素子領域２２内の素子（画素ＰＤｘ１、ＰＤｘ２）を駆動する信号線（ゲート制御線をソース線）を用いることができるため、テスト領域２３Ａ内の素子（画素ＰＤｔ１～ＰＤｔ４）に接続される信号配線を簡略化できるとともに、テスト領域２３Ａ内の素子（画素ＰＤｔ１～ＰＤｔ４）にテスト信号を表示する際の制御を簡略化できる。 Thus, when the test area 23A for inspecting the display image is arranged outside the display element area 22 in the column direction (Y direction shown in FIG. 4), the elements (pixels PDt1 to PDt4) in the test area 23A are arranged. 5 can be omitted, and the circuit configuration can be simplified. Further, as signal lines (gate control lines and source lines) for driving elements (pixels PDt1 to PDt4) in the test area 23A, signal lines (gate control) for driving elements (pixels PDx1, PDx2) in the display element area 22 are used. Since a line can be used as a source line, the signal wiring connected to the elements (pixels PDt1 to PDt4) in the test region 23A can be simplified and the elements (pixels PDt1 to PDt4) in the test area 23A can be tested. Control at the time of displaying a signal can be simplified.
　以上、本発明の実施の形態について説明したが、本発明の画像表示装置は、上述の図示例にのみ限定されるものではなく、本発明の要旨を逸脱しない範囲内において種々変更を加え得ることは勿論である。 Although the embodiment of the present invention has been described above, the image display apparatus of the present invention is not limited to the above illustrated example, and various modifications can be made without departing from the gist of the present invention. Of course.
１，１Ａ…画像表示装置
１１…映像信号処理部
１１Ａ…ＬＵＴ
１２…制御部
１３…テスト信号生成部
１４…信号切替部
１５…駆動部
１５Ａ…ゲート駆動回路
１５Ｂ…ソース駆動回路
１６…テスト領域駆動部
１７…バックライト駆動部
２１，２１Ａ…表示部
２２，２２Ａ…表示素子領域
２３，２３Ａ，２３Ｂ…テスト領域
２４…バックライト
２５…センサ部
ＧＬ１～ＧＬｎ…ゲート制御線
ＳＬ１～ＳＬｍ…ソース線
ＰＤ，ＰＤｔ１，ＰＤｔ２，ＰＤｔ３，ＰＤｔ４，ＰＤｘ１，ＰＤｘ２…画素（素子） DESCRIPTION OF SYMBOLS 1,1A ... Image display apparatus 11 ... Video signal processing part 11A ... LUT
DESCRIPTION OF SYMBOLS 12 ... Control part 13 ... Test signal generation part 14 ... Signal switching part 15 ... Drive part 15A ... Gate drive circuit 15B ... Source drive circuit 16 ... Test area drive part 17 ... Backlight drive part 21, 21A ... Display part 22, 22A Display element regions 23, 23A, 23B Test area 24 Backlight 25 Sensor portions GL1 to GLn Gate control lines SL1 to SLm Source lines PD, PDt1, PDt2, PDt3, PDt4, PDx1, PDx2 Pixel (element )

Claims (7)

  1. 　格子状に配置された複数の素子に画像を表示する表示素子領域と、
    　前記表示素子領域外に前記表示素子領域から、前記格子状に配列された前記表示素子領域の素子の一の配列方向に沿って並べて設けられる所定数の素子を備えるテスト領域と、
    　を備え、
    　前記テスト領域の素子には、
    　前記テスト領域と並べて設けられている前記表示素子領域の素子に供給される制御信号と同じ制御信号が、前記テスト領域と前記表示素子領域とをともに駆動する第１の駆動部から供給され、
    　前記テスト領域と並べて設けられている前記表示素子領域の素子に供給されるテスト信号と同じテスト信号が、前記テスト領域と前記表示素子領域とをともに駆動する第２の駆動部から供給される
    　ことを特徴とする画像表示装置。     A display element region for displaying an image on a plurality of elements arranged in a grid pattern;
    A test region comprising a predetermined number of elements arranged side by side along one array direction of the elements of the display element region arranged in a lattice form from the display element region outside the display element region;
    With
    The elements in the test area include
    The same control signal as the control signal supplied to the elements in the display element region provided side by side with the test region is supplied from a first drive unit that drives both the test region and the display element region,
    The same test signal as the test signal supplied to the elements in the display element region provided side by side with the test region is supplied from a second drive unit that drives both the test region and the display element region. An image display device characterized by the above.
  2. 　前記テスト領域の素子に表示する前記テスト信号を生成するテスト信号生成部と、
    　前記テスト領域の素子に表示する前記テスト信号と、前記表示素子領域に表示する画像信号とを切り替える信号切替部と、
    　前記テスト領域の素子と前記同じ制御信号が供給される前記表示素子領域の素子に、前記テスト信号を供給するように前記信号切替部を制御する制御部と、
    　を備えることを特徴とする請求項１に記載の画像表示装置。     A test signal generator for generating the test signal to be displayed on the elements in the test area;
    A signal switching unit that switches between the test signal to be displayed on the element in the test area and the image signal to be displayed in the display element area;
    A control unit that controls the signal switching unit to supply the test signal to an element in the display element region to which the same control signal as the element in the test region is supplied;
    The image display apparatus according to claim 1, further comprising:
  3. 　前記テスト領域の素子は、
    　前記格子状に配列された前記表示素子領域の素子の一の配列方向に沿って前記素子のゲートを制御するゲート制御信号を供給するゲート制御線と、
    　前記ゲート制御線と直交し、前記素子に表示するテスト信号を供給するソース線とを、
    　前記同じ制御信号と前記同じテスト信号が供給される前記表示素子領域の素子と共用する
    　ことを特徴とする請求項２に記載の画像表示装置。     The elements in the test area are
    A gate control line for supplying a gate control signal for controlling a gate of the element along one arrangement direction of the elements in the display element region arranged in the lattice pattern;
    A source line orthogonal to the gate control line and supplying a test signal to be displayed on the element;
    The image display apparatus according to claim 2, wherein the image display apparatus is shared with an element in the display element region to which the same control signal and the same test signal are supplied.
  4. 　前記テスト信号は、
    　前記テスト領域の素子に表示する輝度を切り替える信号である
    　ことを特徴とする請求項１から請求項３のいずれか１項に記載の画像表示装置。     The test signal is
    The image display device according to any one of claims 1 to 3, wherein the image display device is a signal for switching a luminance to be displayed on an element in the test area.
  5. 　前記テスト領域は、前記表示素子領域に隣接するように配置されるとともに前記表示素子領域の行方向に沿って所定数の素子が格子状に並べて設けられ、
    　前記テスト領域の素子のゲート制御線は、
    　前記表示素子領域内の素子であって前記テスト領域の素子に隣接する素子のゲート制御線に接続され、
    　前記テスト領域の素子のソース線は、
    　前記テスト領域内の素子に隣接するとともに同じ列に並べて配置されている前記表示素子領域の素子のソース線に接続される
    　ことを特徴とする請求項１から請求項４のいずれか１項に記載の画像表示装置。     The test area is arranged adjacent to the display element area and a predetermined number of elements are arranged in a grid along the row direction of the display element area.
    The gate control line of the element in the test region is
    Connected to a gate control line of an element in the display element region and adjacent to the element in the test region;
    The source line of the element in the test region is
    5. The device according to claim 1, wherein the device is connected to a source line of an element in the display element region which is adjacent to the element in the test region and arranged in the same column. Image display device.
  6. 　前記テスト領域は、前記表示素子領域に隣接するように配置されるとともに前記表示素子領域の列方向に沿って所定数の素子が格子状に並べて設けられ、
    　前記テスト領域の素子のゲート制御線は、
    　前記テスト領域の素子に隣接するとともに前記テスト領域の素子と同じ行に並べて配置されている前記表示素子領域の素子のゲート制御線に接続され、
    　前記テスト領域の素子のソース線は、
    　前記表示素子領域内の素子であって前記テスト領域の素子に隣接する素子のソース線に接続される
    　ことを特徴とする請求項１から請求項４のいずれか１項に記載の画像表示装置。     The test area is arranged adjacent to the display element area and a predetermined number of elements are arranged in a grid along the column direction of the display element area,
    The gate control line of the element in the test region is
    Connected to the gate control line of the element of the display element region adjacent to the element of the test region and arranged in the same row as the element of the test region;
    The source line of the element in the test region is
    5. The image display device according to claim 1, wherein the image display device is connected to a source line of an element in the display element region and adjacent to an element in the test region.
  7. 　表示素子領域が格子状に配置された複数の素子に画像を表示する過程と、
    　テスト領域が前記表示素子領域外に前記表示素子領域から、前記格子状に配列された前記表示素子領域の素子の一の配列方向に沿って並べて設けられる所定数の素子を備える過程と、
    　を含み、
    　前記テスト領域の素子には、
    　前記テスト領域と並べて設けられている前記表示素子領域の素子に供給される制御信号と同じ制御信号が、前記テスト領域と前記表示素子領域とをともに駆動する第１の駆動部から供給され、
    　前記テスト領域と並べて設けられている前記表示素子領域の素子に供給されるテスト信号と同じテスト信号が、前記テスト領域と前記表示素子領域とをともに駆動する第２の駆動部から供給される過程
    　を含むことを特徴とする表示画像検査方法。     A process of displaying an image on a plurality of elements in which display element regions are arranged in a grid pattern;
    A process in which a test region includes a predetermined number of elements provided side by side along one array direction of the elements of the display element region arranged in a lattice form from the display element region outside the display element region;
    Including
    The elements in the test area include
    The same control signal as the control signal supplied to the elements in the display element region provided side by side with the test region is supplied from a first drive unit that drives both the test region and the display element region,
    A process in which the same test signal as the test signal supplied to the elements in the display element area provided side by side with the test area is supplied from a second drive unit that drives both the test area and the display element area A display image inspection method comprising:
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