WO2012065425A1

WO2012065425A1 - Data stream framing method and apparatus

Info

Publication number: WO2012065425A1
Application number: PCT/CN2011/075059
Authority: WO
Inventors: 孙巨揆
Original assignee: 中兴通讯股份有限公司
Priority date: 2010-11-17
Filing date: 2011-05-31
Publication date: 2012-05-24
Also published as: CN101990140B; CN101990140A

Abstract

The present invention discloses a data stream framing method and apparatus. The data stream framing method includes: performing bit-shifting on the input data stream, wherein the data frame header of the data stream is not detected in a complete optical transport network data frame period; judging whether the data frame headers and the data frame periods of at least two continual data frames are correct in the shifted data stream; if they are correct, entering the framing state, and performing framing processing on the shifted data stream. In the background of the large capacity transmission, applying the present invention avoids that the needed programmable logic resources linearly increase with the enlargement of service capacity, and reduces the programmable logic resources and the design cost.

Description

The present invention relates to the field of communications, and in particular to a data stream framing method and apparatus. BACKGROUND OF THE INVENTION A bearer network plays a role in the telecommunications network. It directs each service information flow from the source end to the destination end according to the requirements of the service layer, due to the explosion of IP services and other packet-based data transmission services transmitted over the network. Growth, the demand for transmission capacity is increasing rapidly. An optical transport network based on OTN (Optical Transport Network) has emerged to meet the requirement of transmitting a large amount of business capacity. In the course of its development, since the transmitted traffic capacity is much larger than before, higher requirements are placed on the hardware and programmable logic resources in terms of high-speed interfaces and processing capabilities. Usually in the high-speed domain, the signals are transmitted serially, and the electrical layer processing usually deals with parallel data streams. This requires first framing the received signal by detecting the frame header of the traffic stream. , byte alignment of business flow data, and then further processing such as business mapping, scheduling, and overhead management. Due to the increasing service capacity of OTN transmission, more parallel signals are usually processed in the programmable logic processing, that is, the method of increasing the bit width to handle more services, correspondingly causing programmable logic resources. The increase, and this increase usually rises several times, it will cause a lot of resource pressure on the programmable logic device, and will also bring great cost pressure to the design. SUMMARY OF THE INVENTION A primary object of the present invention is to provide a data stream framing method and apparatus for solving at least the above-mentioned problems of resource pressure and cost pressure caused by increasing programmable logic resources. According to an aspect of the present invention, a data stream framing method is provided, comprising: bit shifting an input data stream that is not detected in a complete optical transport network data frame period; The data stream of the header; determining whether the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct; if yes, entering a fixed frame state, and performing frame processing on the shifted data stream . Preferably, the framing processing of the shifted data stream includes: first outputting a frame header indication of the data frame in the shifted data stream; and performing data in the data frame corresponding to the frame header indication and the frame header indication Frame boundary alignment processing. Preferably, the method further comprises: if the determination result is no, continuing to bit shift the input data stream until the data frame header and the data frame period of at least two consecutive data frames are correct. Preferably, the method further comprises: if the frame of the normal normal data frame is greater than or equal to 5 frames in the frame-fixing state, maintaining the frame-fixing state and performing the frame-fixing process; if the consecutive normal data frame frame header is smaller than 5 frames, then go to the frame out of sync state. Preferably, the method further comprises: when the frame is out of synchronization, the timer is started to count the duration of the frame out-of-synchronization state; if the duration is equal to or greater than 3 milliseconds, the frame is lost to the lost state. Preferably, the method further comprises: searching for a data frame frame header in the shifted data stream in a frame loss state; if the correct data frame frame header is continuously found, and the data frame period is correct, and the duration is greater than or Equal to 3 milliseconds, then go to the fixed frame state; otherwise, keep the frame lost state, and continue bit shifting and frame boundary alignment on the data stream. According to another aspect of the present invention, a data stream framing apparatus is provided, including: a shift control module, configured to perform bit shifting on an input data stream, the data stream being a data frame in a complete optical transport network The data stream of the data frame header is not detected in the period; the framing module is configured to determine whether the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct; if yes, enter The frame state, the framed processing of the shifted data stream. Preferably, the framing module comprises: a data aligning module, configured to output a frame header indication of the data frame in the shifted data stream after the framing module enters the framing state; and the frame header indication and the frame header indication The data in the corresponding data frame is frame boundary alignment processing. Preferably, the framing module is further configured to continue bit shifting the input data stream if the determination result is no until at least two consecutive data frames have the correct data frame header and data frame period. Preferably, the apparatus further includes: a first determining module, configured to maintain a framing state and perform framing processing if a continuous normal data frame frame header is greater than or equal to 5 frames in a framed state; If the normal data frame frame header is less than 5 frames, the frame is lost to the frame out-of-synchronization state; the second determining module is configured to start the timer to count the duration of the frame out-of-synchronization state when the frame is out of synchronization state; When the time is equal to or greater than 3 milliseconds, the frame is lost to the frame loss state; the third determination module is set to be in the frame loss state. In the state, the data frame header in the shifted data stream is searched; if the correct data frame header is continuously found, and the data frame period is correct, and the duration is greater than or equal to 3 milliseconds, the frame is transferred to the fixed frame state; Otherwise, the frame loss state is maintained and the data stream continues to be bit shifted and frame boundary aligned. With the present invention, when the data frame frame in the input data stream is out of step and the data frame frame header is not detected within a complete OTN period, the input data stream is bit shifted. Compared with the prior art, in the prior art, when data framing is performed, due to the lack of bit bit shift feedback control mechanism, for the input unaligned data stream, each alignment is designed with a set for framing and Data-aligned programmable logic, but in fact once the system is stable, the data is aligned in only one way, except for the set of programmable logic used to determine the frame, the remaining programmable logic blocks are redundant, and By designing the Bit shift control mechanism, the present invention can ensure that a set of programmable logic modules for framing is used to traverse all the alignment modes, thereby saving programmable logic resources and solving the prior art problem of increasing programmable logic resources. The problem of resource pressure and cost pressure has caused the contradiction between programmable logic and linear growth of service capacity under the background of large-capacity transmission, saving the effect of programmable logic resources and design cost. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart showing the steps of a data stream framing method according to a first embodiment of the present invention; FIG. 2 is a schematic diagram showing bit shift of a data stream according to an embodiment of the present invention; FIG. 4 is a flow chart of steps of a data stream framing method according to Embodiment 3 of the present invention; FIG. 5 is a flowchart of a method according to Embodiment 4 of the present invention; FIG. 6 is a schematic structural diagram of a data stream framing apparatus according to Embodiment 5 of the present invention; FIG. 7 is a state transition of a framing module in the data stream framing apparatus shown in FIG. Figure. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. Referring to FIG. 1, a flow chart of a data stream framing method according to a first embodiment of the present invention is shown, which includes the following steps: Step S102: bit shifting an input data stream; The input data stream is in a frame out-of-synchronization state, and the data stream of the data frame frame header is not detected in a complete optical transport network data frame period. In this step, the system does not detect the data frame header of the input data stream in a complete optical transport network data frame period, determines that the input data stream is in a frame out-of-synchronization state, and performs bit (bit) on the data stream. Shift, as shown in Figure 2. Step S104: determining whether the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct; if yes, executing step S106; if not, returning to step S102. If the system detects that the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct, it is considered that the frame processing can be performed; otherwise, other processing is performed, such as continuing to bit shift the data stream. Or, a person skilled in the art can appropriately process the data stream by referring to the method in the related art. Step S106: If the result of the determination is YES, the framing state is entered, and the shifted data stream is subjected to framing processing. In the related art, when data framing is performed, a bit shift feedback control mechanism is lacking, and for the input unaligned data stream, each alignment design a set of programmable logic for framing and data alignment, and Once the system is stable, the data is aligned in only one way, except for the set of programmable logic used to determine the frame, and the remaining programmable logic blocks are redundant. By the present invention, the data stream bit shifting mechanism is used, when the data frame frame in the input data stream is out of step, and the data frame frame header is not detected in a complete OTN period, the input data stream is Perform bit shifting. Compared with the related art, the invention can ensure that a set of programmable logic modules for framing is used to traverse all the alignment modes by designing a bit shift control mechanism, thereby saving programmable logic resources and solving the prior art. The problem of resource pressure and cost pressure caused by increasing programmable logic resources Under the background condition of large-capacity transmission, the contradiction between programmable logic and linear growth of service capacity is alleviated, which saves the effect of programmable logic resources and design cost. Referring to FIG. 3, a flow chart of a data stream framing method according to a second embodiment of the present invention is shown, which includes the following steps: Step S302: Perform a bit shift on the input unaligned data stream. Bit; In this step, the unaligned data is in the frame out-of-synchronization state, and the data stream of the data frame header is not detected in a complete optical transport network data frame period. The bit shift for the unaligned data stream can be as shown in Figure 2. Step S304: Detecting a frame header byte and a frame period of the data frame in the shifted data stream; Step S306: determining whether a normal frame header byte can be detected for at least two consecutive frames in an OTN frame period and The frame period is correct, if yes, step S308 is performed; otherwise, the frame out-of-synchronization state is maintained, the frame out-of-synchronization indication is output, and step S302 is continued; if the normal frame header byte is not detected in the frame header position for at least 2 consecutive frames, If there is still a frame out-of-synchronization indication signal output, the frame-ending process cannot be entered, the frame out-of-synchronization state is continued, the frame out-of-synchronization indication is output, and step S302 is performed; otherwise, step S308 is performed to enter the frame-fixing state. Step 4: S308: If a normal frame header byte is detected for at least 2 consecutive frames and the frame period is correct, the frame state is transferred to the framing process. Referring to FIG. 4, a flow chart of a data stream framing method according to a third embodiment of the present invention is shown, which includes the following steps: Step S402: Perform a bit shift on the input unaligned data stream. Bit. In this step, the unaligned data is in the frame out-of-synchronization state, and the data stream of the data frame header is not detected in a complete optical transport network data frame period. The bit shift for the unaligned data stream can be as shown in Figure 2. Step S404: If the normal frame header byte is not detected in the frame header position for at least 2 consecutive frames, and the frame out-of-synchronization indication signal output is still available, the frame-fixing process cannot be entered, and the frame out-of-synchronization state is continued, and the output frame is out of synchronization. If yes, go to step S402; otherwise, go to step S406 to enter the framing state. If within a frame period of an OTN, a normal frame header byte cannot be detected for 2 consecutive frames and the frame period is correct, the framing process cannot be entered, and bit shifting is continued; if two consecutive frames detect a normal frame header If the byte and the frame period are correct, step S406 is executed to enter the framing state. Step 4: S406: If a normal frame header byte is detected for at least 2 consecutive frames and the frame period is correct, then the framing state is entered. Step S408: In the framing state, if the consecutive abnormal frame header bytes are less than 5 frames, the framing state is maintained; if the consecutive abnormal frame header bytes are greater than or equal to 5 frames, then the frame is lost. Go to step S402. By determining whether consecutive abnormal header bytes are less than 5 frames, the stability of the fixed frame state is maintained. Step S410: In the framed state, the data in the shifted data stream is aligned, and the frame header indication of the data frame is output in advance (priority). Step S412: Then, the data frame frame header is aligned with the data in the data frame corresponding to the frame header to complete the entire framing process. In this embodiment, the register resource occupied by the input data delay is reduced by the method of outputting the frame header in advance. In the process of framing, the data processing will have several cycles of delay to get the frame header of the data frame. The traditional framing method is to delay the input data by some period to align with the frame header indication, which is relatively simple to process. However, the data delay register will occupy more programmable logic resources. If the bit width is wider, the logical resource occupancy of this part is also large. In this embodiment, the method of outputting the frame header in advance after the frame is used to minimize the delay register of the input data, thereby effectively reducing the occupation of the programmable logic resources. 5 is a block diagram showing a structure of a data stream framing apparatus according to Embodiment 4 of the present invention, including: a shift control module 502 configured to perform bit shifting on an input data stream, where the data stream is The data stream of the data frame header is not detected in a complete optical transport network data frame period; the framing module 504 is configured to determine whether the data frame header of at least two consecutive data frames in the shifted data stream is The data frame period is correct; if yes, the frame state is entered, and the shifted data stream is framed. Preferably, the framing module 504 includes: a data aligning module 5042, configured to output a frame header indication of the data frame in the shifted data stream after the framing module 504 enters the framing state; The frame header indicates that the data in the corresponding data frame is frame boundary alignment processing. Preferably, the framing module 504 is further configured to continue to bit shift the input data stream until the data frame header and the data frame period of at least two consecutive data frames are correct, if the determination result is no. Preferably, the data stream framing apparatus of this embodiment further includes: a first determining module, configured to maintain a framing state if a continuous normal data frame frame header is greater than or equal to 5 frames in a fixed frame state Fixed frame processing; if the consecutive normal data frame frame header is less than 5 frames, then the frame is out of synchronization state; the second determination module is set to start the timer to the frame out of synchronization state when the frame is out of synchronization The duration is timed; if the duration is equal to or greater than 3 milliseconds, the frame is lost to the frame loss state; the third determining module is configured to find the data frame frame header in the shifted data stream in the frame loss state; Find the correct data frame header, and the data frame period is correct, and the duration is greater than or equal to 3 milliseconds, then go to the fixed frame state; otherwise, keep the frame lost state, and continue bit shifting and frame boundary on the data stream Align. Referring to FIG. 6, a schematic diagram of a data stream framing apparatus according to a fifth embodiment of the present invention is shown, including: a shift control module 602, a framing module 604, wherein the framing module 604 includes a data alignment module 6042. The towel, shift control module 602 is configured to perform bit shift control on the high speed data stream. In the state of frame out of synchronization, if the frame header is not detected after a complete OTN frame period, the module Control the input data to make a bit shift, and then detect the data frame header; if the data frame header can be detected, then the Bit shift is not caused. The framing module 604 is configured to perform framing processing on the shifted input data, and the function is relatively complicated, and its state transition relationship is as shown in FIG. 7. After the system is reset, it is in the frame out-of-synchronization state; after the bit shift processing is performed on the input data stream, if the frame header module 604 detects the normal frame header byte for two consecutive frames and the frame period is correct, the frame state is transferred to the fixed frame state; If the consecutive correct frame header bytes are less than 2 frames, the frame out-of-synchronization state is maintained, the shift control module 602 of the restart system performs bit shifting of the data stream, and the frame boundary alignment module (not shown) performs frame boundaries. Align. In the frame out-of-synchronization state, the framing module 604 can start a timer to time the frame out-of-synchronization state duration (or start a counter to count), and if the frame is out of synchronization for 3 ms, the frame is lost. . In the frame loss state, the frame header flag byte is searched. If the normal frame header byte is found continuously, and the frame period is also correct, and the duration is greater than or equal to 3 ms, then the transfer is performed. The frame state is maintained; otherwise, the frame loss state is maintained, and the shift control module 602 of the system is restarted to perform bit shifting of the data stream, and the frame boundary alignment module of the system performs frame boundary alignment of the data frame in the data stream. The framing module 604 keeps the framing state if the consecutive abnormal frame header bytes are less than 5 frames in the framing state; if the consecutive abnormal frame header bytes are greater than or equal to 5 frames, the entangled frame is out of step status. The data alignment module 6042 is configured to, after the framing module 604 enters the framing state, align the input data stream to the low-speed parallel data stream, and ensure that the frame header is placed at the upper bit of the output data, ie: output first a frame header indication of the data frame in the shifted data stream; and then performing frame boundary alignment processing on the data in the data frame corresponding to the frame header indication and the frame header indication. For example, the shift control module 602 shifts a bit of the input unaligned data stream and then outputs the data stream to the framing module 604; if the framing module 604 does not enter the framing process during an OTN frame period, If there is still a frame out-of-synchronization indication signal output, the frame out-of-synchronization state is maintained, the output frame out-of-synchronization indication is continued, and the data stream bit shift is continued using the shift control module 602. Otherwise, if the frame-fixing module 604 detects the normal 2 consecutive frames. If the frame header byte is correct and the frame period is correct, it is transferred to the fixed frame state; in the fixed frame state, if the consecutive abnormal frame header bytes are less than 5 frames, the fixed frame state is maintained; if consecutive abnormal frame header words are continued If the node is greater than or equal to 5 frames, the frame is out of synchronization. In the framed state, the data alignment module 6042 performs alignment processing on the input data, and associates the output data with the output frame header, that is, in the framed state, in advance The frame header is output, and then aligned with the bit shifted data to complete the entire framing process. In this embodiment, (1) a shift control module is designed. The traditional framing process has no shift control module. Due to the lack of bit shift feedback control mechanism, for the input unaligned data stream, each alignment design has a set of framing and data alignment logic, but in fact once The system works stably, and the data is aligned only in one way. Except for the logic that is determining the frame, the remaining logic modules are redundant. In this embodiment, a set of fixed frames can be guaranteed by designing a bit shift control mechanism. Modules traverse all alignments to save logic resources. (2) In the embodiment, the method of outputting the frame header in advance reduces the register resources occupied by the input data delay. In the process of framing, there will be several cycles of delay in data processing to get the frame header of the data. The traditional framing method is to delay the input data by some period to align with the frame header indication, which is relatively simple to process. However, the data delay register will occupy some logic resources. If the bit width is wider, the logical resource occupancy of this part is also large. In this embodiment, the method of outputting the frame header in advance after the frame is used, the delay register of the input data is minimized, and the occupation of the logic resources is reduced. The present invention achieves framing of high speed data streams by using a small amount of programmable logic resources. Compared with the prior art, the logic resources are greatly reduced. Taking Altera's Stratix4GX180K as an example, it saves about 75% of the programmable logic resources compared with the conventional design, and saves the design cost. The specific saving logic resources are shown in Table 1. Table 1

It can be seen from Table 1 that in order to solve the resource pressure caused by the programmable logic processing after the increase of the service capacity, the present invention proposes a data stream framing method and device, which can effectively save programmable logic resources and adopt a new scheme. After that, it can save 75% of the logic resources, and the savings in design cost are also obvious. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein. The steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps are fabricated as a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software. The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the scope of the present invention are intended to be included within the scope of the present invention.

Claims

Claims A data stream framing method, including:

Performing bit shifting on the input data stream, the data stream being a data stream in which no data frame header is detected within a complete optical transport network data frame period;

Determining whether the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct;

If yes, the framing state is entered, and the shifted data stream is subjected to framing processing. The method according to claim 1, wherein the framing processing of the shifted data stream comprises:

First outputting a frame header indication of the data frame in the shifted data stream;

Performing frame boundary alignment processing on the data in the data frame corresponding to the frame header indication and the frame header indication. The method according to claim 1, wherein the method further comprises:

If the result of the determination is no, the bit stream of the input data stream is continuously shifted until the data frame header and the data frame period of at least two consecutive data frames are correct. The method according to claim 1, 2 or 3, wherein the method further comprises:

In the framing state, if the consecutive normal data frame frame header is greater than or equal to 5 frames, the framing state is maintained, and the framing process is performed; if consecutive normal data frame frame headers are less than 5 frames , then go to the frame out of sync state. The method according to claim 4, wherein the method further comprises:

When transitioning to the frame out-of-synchronization state, the start timer counts the duration of the frame out-of-synchronization state;

If the duration is equal to or greater than 3 milliseconds, the frame is lost. The method according to claim 5, wherein the method further comprises:

Searching, in the frame loss state, a data frame header in the shifted data stream; If the correct data frame header is continuously found, and the data frame period is correct, and the duration is greater than or equal to 3 milliseconds, then the frame state is transferred; otherwise, the frame loss state is maintained, and The data stream continues with the bit shift and frame boundary alignment.

7. A data stream framing apparatus comprising:

a shift control module configured to perform bit shifting on the input data stream, wherein the data stream is a data stream in which no data frame header is detected in a complete optical transport network data frame period; the framing module is set to Determining whether the data frame header and the data frame period of at least two consecutive data frames in the shifted data stream are correct; if yes, entering a framing state, and performing framing processing on the shifted data stream.

8. The apparatus according to claim 7, wherein the framing module comprises:

a data alignment module, configured to: after the framing module enters a framing state, output a frame header indication of the data frame in the shifted data stream; and the frame header indication corresponding to the frame header indication The data in the data frame is frame boundary aligned.

9. The apparatus according to claim 7, wherein the framing module is further configured to: if the determination result is no, continue to bit shift the input data stream until at least two consecutive data frames The data frame header and data frame period are correct.

10. The device of claim 7, 8 or 9, wherein the device further comprises:

a first determining module, configured to: if the consecutive normal data frame headers are greater than or equal to 5 frames in the fixed frame state, maintaining the fixed frame state, performing the framing processing; if continuous normal If the data frame frame header is less than 5 frames, it is transferred to the frame out-of-synchronization state;

a second determining module, configured to: when the frame is out of step, the start timer counts the duration of the frame out-of-synchronization state; if the duration is equal to or greater than 3 milliseconds, the transferred frame is lost State

a third determining module, configured to: in the frame lost state, search for a data frame frame header in the shifted data stream; if the correct data frame frame header is continuously found, and the data frame period If it is correct, and the duration is greater than or equal to 3 milliseconds, then the frame state is transferred; otherwise, the frame loss state is maintained, and the bit shift and frame boundary alignment are continued for the data stream.