WO2012050122A1 - Soi substrate - Google Patents

Soi substrate Download PDF

Info

Publication number
WO2012050122A1
WO2012050122A1 PCT/JP2011/073412 JP2011073412W WO2012050122A1 WO 2012050122 A1 WO2012050122 A1 WO 2012050122A1 JP 2011073412 W JP2011073412 W JP 2011073412W WO 2012050122 A1 WO2012050122 A1 WO 2012050122A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
soi substrate
carbon film
substrate
silicon
Prior art date
Application number
PCT/JP2011/073412
Other languages
French (fr)
Japanese (ja)
Inventor
貴壽 山田
雅考 長谷川
正統 石原
津川 和夫
金 載浩
古賀 義紀
Original Assignee
独立行政法人産業技術総合研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 独立行政法人産業技術総合研究所 filed Critical 独立行政法人産業技術総合研究所
Priority to DE112011103476T priority Critical patent/DE112011103476T5/en
Priority to JP2012538690A priority patent/JP5665202B2/en
Publication of WO2012050122A1 publication Critical patent/WO2012050122A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02277Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition the reactions being activated by other means than plasma or thermal, e.g. photo-CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02422Non-crystalline insulating materials, e.g. glass, polymers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/02444Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02513Microstructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02527Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

Definitions

  • the present invention relates to a silicon-on-insulator (SOI) substrate for use in a power semiconductor device or the like, and more particularly to an SOI substrate having high insulation and high thermal conductivity.
  • SOI silicon-on-insulator
  • the power consumption of the CPU of the computer has been reduced.
  • the insulating property of a silicon oxide film (SiO 2 ) layer used as an insulating layer (hereinafter referred to as “I layer”) of an existing SOI substrate is low, low power consumption for power converters and car electronics and It cannot be used as a low-loss power semiconductor device substrate.
  • Non-Patent Document 1 Non-Patent Document 2
  • MPCVD microwave plasma vapor deposition
  • Patent Document 1 and Patent Document 2 disclose a technique for forming a uniform carbon film in an area of about 30 cm in diameter by surface wave plasma vapor deposition.
  • a field effect transistor intended for an integrated circuit (LSI) application has been prototyped on an SOI substrate created using this method, and its operation has been confirmed (Non-patent Document 3).
  • HFCVD hot filament vapor deposition
  • tungsten (W) or tantalum (Ta) used as a filament during synthesis is mixed into the silicon substrate.
  • the device characteristics may be affected, such as by forming defects at the silicon / diamond interface.
  • a film thickness of 100 ⁇ m or more is required, so cracking or breakage due to thermal stress is a problem due to thick film formation.
  • the carbon film formed by the surface wave plasma vapor deposition method has excellent characteristics such as high thermal conductivity and high insulation, and a power semiconductor device is formed on an SOI substrate using the carbon film as an I layer.
  • a rare metal-free device having no cooling mechanism is realized. Since the carbon film synthesized by the surface wave plasma vapor deposition method is as thin as several hundred nm, the thermal conductivity is several tens W / mK. However, it is not sufficient and is difficult to apply to power semiconductor devices.
  • the present invention has been made in view of the above circumstances, and solves the conventional problem in a SOI substrate using a carbon-based material for the I layer and free of rare metal and having no cooling mechanism. It is an object of the present invention to provide an SOI substrate with high thermal conductivity and high insulation that can be applied to an SOI substrate for devices.
  • the inventors of the present invention have made a hybrid structure of a carbon film and a microcrystalline diamond film as the I layer, whereby an SOI using a carbon film as a conventional I layer. It has been found that an SOI substrate having high thermal conductivity and high insulation can be obtained by simultaneously solving both the problem of the substrate and the problem of diamond synthesis in the HFCVD method.
  • the present invention has been completed based on these findings, and is as follows.
  • An SOI substrate wherein the insulating layer of the SOI substrate has a hybrid structure of a carbon film and a microcrystalline diamond film.
  • the hybrid structure is composed of carbon film / microcrystalline diamond film / carbon film.
  • the microcrystalline diamond film is a film formed by a hot filament vapor deposition method.
  • an SOI substrate having high thermal conductivity and high insulation which is a problem of a conventional SOI substrate, can be obtained, and can be used as a power semiconductor device substrate.
  • FIG. 5 shows current-electric field characteristics of an SOI substrate obtained in Example 1.
  • FIG. 11 shows current-electric field characteristics of an SOI substrate obtained in Example 2.
  • silicone of the SOI substrate obtained by the comparative example 1 The figure which shows the electric current electric field characteristic of the SOI substrate obtained by the comparative example 1
  • the SOI substrate of the present invention is characterized in that the I layer has a hybrid structure composed of a carbon film and a microcrystalline diamond film.
  • 1 to 4 schematically show some embodiments of an SOI substrate of the present invention, in which 1 is a silicon substrate, 2 is a carbon film, and 3 is a microcrystalline diamond film. Reference numerals 4 denote silicon oxide films, respectively. That is, FIG. 1 shows an SOI substrate in which the I layer is composed of the carbon film 2 and the microcrystalline diamond film 3.
  • FIG. 2 shows the SOI substrate shown in FIG. 1 between the silicon substrate 1 and the carbon film 2. 1 having a silicon oxide film 4 is shown.
  • 3 shows an SOI substrate in which the I layer is composed of the carbon film 2, the microcrystalline diamond film 3, and the carbon film 2.
  • FIG. 4 shows the silicon substrate 1 and the carbon film in the SOI substrate shown in FIG. A film having a silicon oxide film 4 between 2 is shown.
  • a carbon film is formed on a silicon substrate having a diameter of 30 cm or more by using the surface wave plasma vapor deposition method in order to adapt to the manufacturing process of an existing silicon semiconductor device.
  • a homogeneous microcrystalline diamond film having a diameter of 30 cm or more on a formed substrate hereinafter, also referred to as “carbon film / silicon substrate”
  • high thermal conductivity is achieved.
  • W tungsten
  • Ta tantalum
  • the film can prevent a defect from being formed in silicon as a device manufacturing layer, and can reduce a leakage current.
  • the microcrystalline diamond film has a thick film structure of 100 ⁇ m or more in order to increase the breakdown voltage.
  • a microcrystalline diamond film is formed by hot filament vapor deposition on a carbon film having a high thermal conductivity and high withstand voltage function formed by surface wave plasma vapor deposition.
  • the carbon film As a film having a function of preventing the filament material from being mixed into silicon and having a high pressure resistance and high thermal conductivity, the carbon film has a flat surface and also has a high pressure resistance and high thermal conductivity function. Although it is the most suitable film, in addition to the carbon film, a silicon oxide film, an aluminum nitride film, a silicon nitride film, or the like can also be used as having the same function.
  • one of the methods for manufacturing an SOI substrate of the present invention is to form a carbon film having a flat surface at an atomic level and a function of preventing entry into silicon, high pressure resistance, and high thermal conductivity on a silicon substrate.
  • This is a method comprising a step of forming a film and a step of forming a microcrystalline diamond on the carbon film / silicon substrate obtained in the previous step by a hot filament vapor phase growth method. (See FIG. 1).
  • the method for forming the silicon oxide film can be selected from the formation by a thermal oxidation method, a known film formation method such as a vapor phase growth method and a sputtering method.
  • a carbon film having a flat surface at the atomic level and a function of high pressure resistance and high thermal conductivity after the above-described microcrystalline diamond film forming step is used.
  • an SOI substrate having a hybrid structure (carbon film / microcrystalline diamond film / carbon film) of a carbon film and a microcrystalline diamond film having a high withstand voltage and high thermal conductivity can be produced (FIGS. 3 and 4). reference).
  • a homogeneous microcrystalline diamond film with a diameter of 30 cm or more is laminated on the silicon / carbon film substrate with a diameter of 30 cm or more. It is also possible by the method.
  • a mechanical polishing method is used to flatten the diamond surface. When this mechanical polishing is used on the carbon film surface of the silicon / carbon film substrate, defects and strains are generated in the silicon substrate for manufacturing the device. For this reason, it is necessary to form a carbon film formed on the silicon substrate by a surface wave plasma vapor deposition method that can form a flat surface at the atomic level in a self-organized manner.
  • the microcrystalline diamond film requires an area of 30 cm or more in diameter
  • synthesis by a hot filament vapor phase growth method can be used.
  • the interface side of the microcrystalline diamond film with the substrate can be used as a bonding surface.
  • an SOI substrate having a hybrid structure of carbon film / microcrystalline diamond film by the bonding method described above will be specifically described.
  • a carbon film having a flat surface at an atomic level is formed on a silicon substrate by surface wave plasma vapor deposition to produce a carbon film / silicon substrate.
  • a microcrystalline diamond film is formed on another silicon substrate by hot filament vapor deposition, and the silicon substrate is removed to form atoms formed at the interface between silicon and microcrystalline diamond. A level microcrystalline diamond surface is obtained.
  • the obtained flat surface at the atomic level is bonded to the carbon film surface of the carbon film / silicon substrate.
  • the carbon film surface and the microcrystalline diamond surface can be cleaned using an ion beam or plasma, and the carbon film surface and the microcrystalline diamond surface can be bonded together by a vacuum pressure bonding method.
  • yet another method for manufacturing an SOI substrate according to the present invention includes (1) a step of first forming a carbon film having a flat surface at an atomic level on a silicon substrate by surface wave plasma vapor deposition.
  • a method comprising a step of bonding a flat surface at an atomic level to the surface of the carbon film, and the method has a hybrid structure of a carbon film / microcrystalline diamond film having a high breakdown voltage and high thermal conductivity.
  • An SOI substrate can be created.
  • a carbon film / silicon substrate is bonded to a silicon substrate and a carbon substrate by bonding a microcrystalline diamond film formed by a hot filament vapor deposition method or a hot filament vapor deposition method.
  • An SOI substrate for power semiconductors having no heat active defects and impurities and having excellent heat dissipation characteristics is produced at the interface of the film.
  • the SOI substrate of the present invention has a hybrid structure of a carbon film and a microcrystalline diamond film.
  • the hybrid structure of the carbon film and the microcrystalline diamond film is a diamond thin film formed by CVD, such as tungsten or tantalum. Therefore, it is possible to combine with power semiconductor devices (silicon carbide, gallium nitride, aluminum gallium nitride) other than silicon semiconductor.
  • power semiconductor devices silicon carbide, gallium nitride, aluminum gallium nitride
  • a hybrid structure of a carbon film and a microcrystalline diamond film can be directly formed on a semiconductor material such as silicon carbide or gallium nitride. As in the case of, it can be realized by a bonding technique used in a semiconductor process.
  • ⁇ Electrical insulation> As a sample used for evaluation of electrical insulation, a sample in which an electrode having a diameter of 30 ⁇ m was formed on a microcrystalline diamond film of an SOI substrate of the present invention was used. The silicon of the SOI substrate was placed in a copper sample holder using a conductive silver paste. The measurement was performed by measuring current-voltage characteristics in a vacuum of 5 ⁇ 10 ⁇ 7 Torr. The value obtained by dividing the applied voltage by the total thickness of the microcrystalline diamond film and the carbon film was defined as the electric field, and the electric insulation was evaluated using the current-electric field characteristics. The larger the electric field where current is observed, the higher the electrical insulation.
  • the thermal conductivity was measured by a thermoreflectance method.
  • the silicon substrate of the SOI substrate was removed with a mixed solution of hydrofluoric acid and nitric acid to produce a self-stereoscopic structure of a microcrystalline diamond film / carbon film.
  • a molybdenum thin film having a thickness of 100 nm was formed on the microcrystalline diamond surface and the carbon film surface by sputtering.
  • the thermal conductivity in the direction perpendicular to the laminating direction and the laminating direction (in-plane direction) of the laminate was evaluated.
  • Example 1 A 4-inch diameter wafer-like silicon substrate was used as the substrate. In order to increase the nucleation density of the carbon particles and form a uniform film, a pretreatment (nanocrystal diamond particle adhesion treatment) was performed on the substrate before the film formation.
  • a colloidal solution (product name: Nanoamand, manufactured by Nano Carbon Laboratory Co., Ltd.) in which nanocrystal diamond particles having an average particle size of 5 nm are dispersed in pure water, or nanocrystal diamond particles having an average particle size of 30 nm or 40 nm (Tomei) Diamond Co., Ltd., product names MD30 and MD40) dispersed in pure water, or cluster diamond particles or graphite cluster diamond particles (Tokyo Diamond Tool Co., Ltd., product names CD and GCD, respectively), or Adamantane or a derivative thereof or a derivative thereof (each made by Idemitsu Kosan Co., Ltd.) solution was used, and the substrate was immersed in an ultrasonic cleaner.
  • nanoamand manufactured by Nano Carbon Laboratory Co., Ltd.
  • the substrate is immersed in ethanol for ultrasonic cleaning and dried, or these solutions are uniformly applied on the substrate by spin coating and dried.
  • the uniformity of this pretreatment affects the uniformity of the carbon film after film formation.
  • the number of diamond particles adhering on the substrate was 10 10 to 10 11 per cm 2 .
  • the source gas a mixed gas of CH 4 , CO 2 and H 2 was used, and the concentrations of CH 4 and CO 2 were each 1 mol%.
  • the gas pressure in the reaction vessel is 1.0 to 1.2 ⁇ 10 2 Pa (1.0 to 1.2 mbar), which is lower than the pressure (10 3 to 10 4 Pa) usually used for CVD synthesis of diamond, and a total of 20 A large area and uniform plasma was generated in a region wider than the substrate area by applying a microwave of ⁇ 24 kW.
  • the substrate temperature during film formation can be maintained at 450 ° C. or less by adjusting the distance between the substrate and the antenna by closely contacting the Mo sample stage and the cooling stage.
  • Film formation was performed for 6 hours under the above film formation conditions. A uniform and transparent carbon film was formed on the glass substrate after film formation. The film thickness was 200 nm.
  • a microcrystalline diamond film was formed on the surface of the carbon film by a hot filament vapor deposition method.
  • a hot filament vapor phase growth apparatus a large-area HFCVD apparatus (Sp3 Model 650) was used. Tungsten (W) was used as the filament, and the film was formed for 6 hours at a filament temperature of 2000 ° C. and a substrate temperature of 800 ° C. The film thickness was about 10 ⁇ m.
  • the SOI substrate obtained in Example 1 has the structure shown in FIG.
  • FIG. 5 shows the evaluation results of impurities in the silicon of the SOI substrate obtained in Example 1. Tungsten was not observed in the carbon film and the silicon substrate, and it was found that the carbon film has a role to prevent tungsten from being mixed during the formation of the microcrystalline diamond film.
  • Example 1 the current-electric field characteristics of the SOI substrate obtained in Example 1 are shown in FIG. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 85 V / ⁇ m. This value is almost the same as the dielectric breakdown electric field (1 MV / cm) of single crystal diamond.
  • the thermal conductivity of the SOI substrate obtained in Example 1 was 250 W / mK in the stacking direction and 110 W / mK in the direction perpendicular to the stacking direction. This value is almost the same as the reported value of microcrystalline diamond, which is one digit higher than the previously reported carbon film.
  • Example 2 An SOI substrate was fabricated in the same manner as in Example 1 except that a silicon substrate on which a silicon oxide film (SiO 2 film) (thickness 20 nm) was formed was used. The structure of the SOI substrate obtained in Example 2 is shown in FIG.
  • FIG. 7 shows the result of evaluating impurities in the silicon of the SOI substrate obtained in Example 2. Tungsten was not observed in the carbon film, silicon oxide film (SiO 2 film), or silicon substrate, and it was found that the carbon film has a role of preventing the entry of tungsten during the formation of the microcrystalline diamond film.
  • Example 2 the current-electric field characteristics of the SOI substrate obtained in Example 2 are shown in FIG. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 92 V / ⁇ m. This value is almost the same as the dielectric breakdown electric field (1 MV / cm) of single crystal diamond.
  • An excellent SOI substrate for power semiconductor devices can be manufactured.
  • FIG. 9 shows the results of impurity evaluation in silicon of the SOI substrate obtained in Comparative Example 1. Tungsten was observed at the interface between the microcrystalline diamond film and the silicon substrate, and was detected in the silicon substrate to a depth of 0.5 ⁇ m from the interface.
  • FIG. 10 shows the current-electric field characteristics of the SOI substrate obtained in Comparative Example 1. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 40 V / ⁇ m. This value was half of the dielectric breakdown electric field (100 V / ⁇ m) of single crystal diamond.
  • the electric field where the leakage current of the SOI substrate of Example 1 is observed is that the SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond hybrid film as an I layer is Comparative Example 1. Compared with SOI using only the microcrystalline diamond film as an insulating layer, the electric field in which leakage current was observed increased twice. Therefore, it can be seen that an SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond film as an I layer can ensure insulation with a thickness half that of a microcrystalline diamond film alone. .
  • Example 3 In Example 1 and Example 2, by forming a similar 200 nm carbon film on the microcrystalline diamond film, the electric field at which leakage current was observed was doubled. That is, it can be seen that by forming the structures of FIGS. 3 and 4, an SOI substrate having a leakage electric field of about 120 V / ⁇ m and about 130 V / ⁇ m can be manufactured. Further, the thermal conductivity was improved by 8 times in the film forming direction of the value of the carbon film and 3 times in the direction perpendicular to the film forming direction (in-plane direction).
  • the SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond film or a film having a hybrid structure of a carbon film and a microcrystalline diamond film according to the present invention has a high insulating property and a high thermal conductivity. This is a very important technology because it can be used for all power semiconductor devices such as electric vehicles, hybrid vehicles, and inverters for motor control.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

The purpose of the invention is to provide an SOI substrate for a power semiconductor device which does not contain rare metals and has no cooling mechanism, by simultaneously solving both the problems relating to conventional SOI substrates in which a carbon film is used as an insulating layer (I layer) and the problems relating to diamond synthesis by the HFCVD method. The SOI substrate for a power semiconductor device can be provided having a high withstand voltage and high thermal conductivity by making the SOI substrate an I layer having a hybrid construction of a carbon film and microcrystalline diamond film, or more preferably by making the SOI substrate an I layer further provided with a silicon oxide film (SiO2 film) between a silicon substrate and the carbon film.

Description

SOI基板SOI substrate
 本発明は、パワー半導体デバイスなどに利用するためのシリコン・オン・インシュレーター(SOI)基板、特に高絶縁性及び高熱伝導性を有するSOI基板に関する。 The present invention relates to a silicon-on-insulator (SOI) substrate for use in a power semiconductor device or the like, and more particularly to an SOI substrate having high insulation and high thermal conductivity.
 電力変換器やカーエレクトロニクスなどに利用される低消費電力かつ低損失なパワー半導体デバイス実現には、半導体デバイスの動作時に自己発熱が生じるために、放熱や冷却を必要とする。放熱には、銅-モリブデン(Cu-Mo)や銅-タングステン(Cu-W)等の金属材料を放熱板として、デバイスに接着して利用している。MoやWは埋蔵量に制限があり、特にWは代替材料開発が不可欠な材料である。そのため、今後需要が高くなることが予測されるパワー半導体デバイスの放熱材として、ユビキタス元素での置き換えが期待されている。また、冷却には空冷や水冷機構を付加するため、デバイスを含むシステム自体の大型化や、空冷や水冷用に電力を導入する必要があるため、パワー半導体デバイスの低消費電力化や低損失化が実現しても、システム全体の電力損失の削減には限界ある。 Realization of low power consumption and low loss power semiconductor devices used in power converters and car electronics requires heat dissipation and cooling because self-heating occurs during operation of the semiconductor devices. For heat dissipation, a metal material such as copper-molybdenum (Cu-Mo) or copper-tungsten (Cu-W) is used as a heat dissipation plate adhered to the device. Mo and W have limited reserves, and in particular, W is an indispensable material for developing alternative materials. Therefore, replacement with ubiquitous elements is expected as a heat dissipation material for power semiconductor devices, for which demand is expected to increase in the future. In addition, since air cooling and water cooling mechanisms are added to the cooling, it is necessary to increase the size of the system including the device itself, and to introduce power for air cooling and water cooling, thereby reducing power consumption and power loss of power semiconductor devices. However, there is a limit to reducing the power loss of the entire system.
 一方、シリコン・オン・インシュレーター(SOI)構造により、コンピューターのCPUの低消費電力化が進んでいる。しかし、既存SOI基板の絶縁層(以下、「I層」という。)として用いられているシリコン酸化膜(SiO)層の絶縁性が低いため、電力変換器やカーエレクトロニクス用の低消費電力かつ低損失なパワー半導体デバイス用基板としては、利用できない。 On the other hand, with the silicon on insulator (SOI) structure, the power consumption of the CPU of the computer has been reduced. However, since the insulating property of a silicon oxide film (SiO 2 ) layer used as an insulating layer (hereinafter referred to as “I layer”) of an existing SOI substrate is low, low power consumption for power converters and car electronics and It cannot be used as a low-loss power semiconductor device substrate.
 高熱伝導性かつ高絶縁性を有するマイクロ結晶ダイヤモンド薄膜をSOI基板のI層として用い、シリコン・オン・ダイヤモンド(SOD)構造を形成することで、冷却機構を有しないパワー半導体デバイス用のSOI基板が提案されている(非特許文献1、非特許文献2)。しかしながら、シリコンデバイスの熱による劣化は抑制されているが、マイクロ結晶ダイヤモンド層の成膜に、マイクロ波プラズマ気相成長(MPCVD)法を利用しているため、直径5cm程度の面積までしか成膜が出来ないため、Siデバイスの実用化の観点からは、量産技術には適さないという問題がある。 By using a microcrystalline diamond thin film having high thermal conductivity and high insulation as the I layer of the SOI substrate, and forming a silicon-on-diamond (SOD) structure, an SOI substrate for power semiconductor devices having no cooling mechanism can be obtained. It has been proposed (Non-Patent Document 1, Non-Patent Document 2). However, although the deterioration of silicon devices due to heat is suppressed, since the microwave plasma vapor deposition (MPCVD) method is used to form the microcrystalline diamond layer, the film is formed only to an area of about 5 cm in diameter. Therefore, there is a problem that it is not suitable for mass production technology from the viewpoint of practical use of Si devices.
 これに対し、熱フィラメント気相成長(HFCVD)法により、直径30cm以上の大面積にマイクロ結晶ダイヤモンド薄膜を成膜することが可能である。
 一方、表面波プラズマ気相成長法により、直径30cm程度の面積に均一な炭素膜を形成する技術が、特許文献1および特許文献2に開示されている。この方法を用いて作成したSOI基板上に、集積回路(LSI)用途を目的とした電界効果トランジスタが試作され、動作が確認されている(非特許文献3)。
On the other hand, a microcrystalline diamond thin film can be formed on a large area having a diameter of 30 cm or more by a hot filament vapor deposition (HFCVD) method.
On the other hand, Patent Document 1 and Patent Document 2 disclose a technique for forming a uniform carbon film in an area of about 30 cm in diameter by surface wave plasma vapor deposition. A field effect transistor intended for an integrated circuit (LSI) application has been prototyped on an SOI substrate created using this method, and its operation has been confirmed (Non-patent Document 3).
国際公開第2005/103326号International Publication No. 2005/103326 国際公開第2007/004647号International Publication No. 2007/004647
 しかしながら、前述の熱フィラメント気相成長(HFCVD)法により成膜したマイクロ結晶ダイヤモンド膜をSOI基板のI層とした場合、合成時にフィラメントとして用いるタングステン(W)やタンタル(Ta)がシリコン基板へ混入したり、シリコン/ダイヤモンド界面に欠陥を形成したり等、デバイス特性に影響があることが懸念される。さらに、高絶縁性かつ高熱伝導性が必要なパワーデバイス用途のためには、100μm以上の膜厚が必要なため、厚膜形成に起因したに熱応力による亀裂や破損が課題である。
 一方、前述の表面波プラズマ気相成長法により形成された炭素膜は高熱伝導性かつ高絶縁性という優れた特性を有するもの、該炭素膜をI層として用いたSOI基板上にパワー半導体デバイスを作製することで、レアメタルフリーで冷却機構を有しないデバイス実現する場合、表面波プラズマ気相成長法で合成した炭素膜の膜厚が数100nmと薄いために熱伝導度が数10W/mKであって充分なものとはいえず、パワー半導体デバイスへの応用は難しいという課題がある。
However, when the microcrystalline diamond film formed by the above-mentioned hot filament vapor deposition (HFCVD) method is used as the I layer of the SOI substrate, tungsten (W) or tantalum (Ta) used as a filament during synthesis is mixed into the silicon substrate. There is a concern that the device characteristics may be affected, such as by forming defects at the silicon / diamond interface. Furthermore, for power device applications that require high insulation and high thermal conductivity, a film thickness of 100 μm or more is required, so cracking or breakage due to thermal stress is a problem due to thick film formation.
On the other hand, the carbon film formed by the surface wave plasma vapor deposition method has excellent characteristics such as high thermal conductivity and high insulation, and a power semiconductor device is formed on an SOI substrate using the carbon film as an I layer. By fabricating the device, a rare metal-free device having no cooling mechanism is realized. Since the carbon film synthesized by the surface wave plasma vapor deposition method is as thin as several hundred nm, the thermal conductivity is several tens W / mK. However, it is not sufficient and is difficult to apply to power semiconductor devices.
 本発明は、以上のような事情に鑑みてなされたものであって、I層に炭素系材料を用いた、レアメタルフリーで冷却機構を有しないSOI基板における従来の課題を解決して、パワー半導体デバイス用SOI基板への応用が可能な、高熱伝導性かつ高絶縁性なSOI基板を提供することを目的とするものである。 The present invention has been made in view of the above circumstances, and solves the conventional problem in a SOI substrate using a carbon-based material for the I layer and free of rare metal and having no cooling mechanism. It is an object of the present invention to provide an SOI substrate with high thermal conductivity and high insulation that can be applied to an SOI substrate for devices.
 本発明者らは、上記目的を達成すべく、鋭意検討を重ねた結果、I層として、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリット構造とすることにより、従来のI層として炭素膜を用いたSOI基板の問題点と、HFCVD法でのダイヤモンド合成の問題点の両方を同時に解決して、高熱伝導および高絶縁性を有するSOI基板が得られることが判明した。
 本発明は、これらの知見に基づいて完成するに至ったものであり、以下のとおりのものである。
As a result of intensive studies to achieve the above object, the inventors of the present invention have made a hybrid structure of a carbon film and a microcrystalline diamond film as the I layer, whereby an SOI using a carbon film as a conventional I layer. It has been found that an SOI substrate having high thermal conductivity and high insulation can be obtained by simultaneously solving both the problem of the substrate and the problem of diamond synthesis in the HFCVD method.
The present invention has been completed based on these findings, and is as follows.
[1]SOI基板の絶縁層が、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリット構造を有することを特徴とするSOI基板。
[2]前記ハイブリット構造が、炭素膜/マイクロ結晶ダイヤモンド膜で構成されていることを特徴とする前記[1]のSOI基板。
[3]前記ハイブリット構造が、炭素膜/マイクロ結晶ダイヤモンド膜/炭素膜で構成されていることを特徴とする前記[1]のSOI基板。
[4]前記炭素膜が、表面波プラズマ気相成長法で形成された膜であることを特徴とする前記[1]~[3]のいずれかのSOI基板。
[5]前記マイクロ結晶ダイヤモンド膜が、熱フィラメント気相成長法で形成された膜であることを特徴とする前記[1]~[4]のいずれかのSOI基板。
[6]前記炭素膜上に、熱フィラメント気相成長法によりマイクロ結晶ダイヤモンド膜が形成されていることを特徴とする前記[1]~[5]のいずれかのSOI基板。
[7]前記炭素膜上に、熱フィラメント気相成長法で形成されたマイクロ結晶ダイヤモンド膜を張り合わせることにより形成されたことを特徴とする前記[5]のSOI基板。
[8]シリコン基板と炭素膜の界面にシリコン酸化膜を有することを特徴とする前記[1]~[7]のいずれかのSOI基板。
[1] An SOI substrate, wherein the insulating layer of the SOI substrate has a hybrid structure of a carbon film and a microcrystalline diamond film.
[2] The SOI substrate according to [1], wherein the hybrid structure is composed of a carbon film / microcrystalline diamond film.
[3] The SOI substrate according to the above [1], wherein the hybrid structure is composed of carbon film / microcrystalline diamond film / carbon film.
[4] The SOI substrate according to any one of [1] to [3], wherein the carbon film is a film formed by a surface wave plasma vapor deposition method.
[5] The SOI substrate according to any one of [1] to [4], wherein the microcrystalline diamond film is a film formed by a hot filament vapor deposition method.
[6] The SOI substrate according to any one of [1] to [5], wherein a microcrystalline diamond film is formed on the carbon film by a hot filament vapor deposition method.
[7] The SOI substrate according to [5], which is formed by bonding a microcrystalline diamond film formed by a hot filament vapor phase growth method on the carbon film.
[8] The SOI substrate according to any one of [1] to [7], wherein a silicon oxide film is provided at an interface between the silicon substrate and the carbon film.
 本発明によれば、従来のSOI基板の課題である、高熱伝導性かつ高絶縁性を有したSOI基板を得ることができ、パワー半導体デバイス用基板として用いることが可能となる。 According to the present invention, an SOI substrate having high thermal conductivity and high insulation, which is a problem of a conventional SOI substrate, can be obtained, and can be used as a power semiconductor device substrate.
本発明のSOI基板の実施形態の1つを模式的に示す図The figure which shows typically one Embodiment of the SOI substrate of this invention 本発明のSOI基板の他の実施形態を模式的に示す図The figure which shows typically other embodiment of the SOI substrate of this invention. 本発明のSOI基板の別の実施形態を模式的に示す図The figure which shows typically another embodiment of the SOI substrate of this invention. 本発明のSOI基板の更に別の実施形態を模式的に示す図The figure which shows typically further another embodiment of the SOI substrate of this invention. 実施例1で得られたSOI基板のシリコン中の不純物の評価結果を示す図The figure which shows the evaluation result of the impurity in the silicon | silicone of the SOI substrate obtained in Example 1 実施例1で得られたSOI基板の電流-電界特性を示す図FIG. 5 shows current-electric field characteristics of an SOI substrate obtained in Example 1. 実施例2で得られたSOI基板のシリコン中の不純物の評価結果を示す図The figure which shows the evaluation result of the impurity in the silicon | silicone of the SOI substrate obtained in Example 2 実施例2で得られたSOI基板の電流-電界特性を示す図FIG. 11 shows current-electric field characteristics of an SOI substrate obtained in Example 2. 比較例1で得られたSOI基板のシリコン中の不純物の評価結果を示す図The figure which shows the evaluation result of the impurity in the silicon | silicone of the SOI substrate obtained by the comparative example 1 比較例1で得られたSOI基板の電流-電界特性を示す図The figure which shows the electric current electric field characteristic of the SOI substrate obtained by the comparative example 1
 本願発明のSOI基板は、I層が、炭素膜とマイクロ結晶ダイヤモンド膜からなるハイブリット構造を有することを特徴とするものである。
 図1~図4は、本発明のSOI基板の実施形態の幾つかを模式的に示すものであって、図中、1は、シリコン基板、2は、炭素膜、3は、マイクロ結晶ダイヤモンド膜、4は、シリコン酸化膜、をそれぞれ示している。
 すなわち、図1は、I層が、炭素膜2及びマイクロ結晶ダイヤモンド膜3からなるSOI基板を示しており、図2は、図1に示すSOI基板において、シリコン基板1と炭素膜2の間に、シリコン酸化膜4を有するものを示している。また、図3は、I層が、炭素膜2、マイクロ結晶ダイヤモンド膜3及び炭素膜2からなるSOI基板を示しており、図4は、図3に示すSOI基板において、シリコン基板1と炭素膜2の間に、シリコン酸化膜4を有するものを示している。
The SOI substrate of the present invention is characterized in that the I layer has a hybrid structure composed of a carbon film and a microcrystalline diamond film.
1 to 4 schematically show some embodiments of an SOI substrate of the present invention, in which 1 is a silicon substrate, 2 is a carbon film, and 3 is a microcrystalline diamond film. Reference numerals 4 denote silicon oxide films, respectively.
That is, FIG. 1 shows an SOI substrate in which the I layer is composed of the carbon film 2 and the microcrystalline diamond film 3. FIG. 2 shows the SOI substrate shown in FIG. 1 between the silicon substrate 1 and the carbon film 2. 1 having a silicon oxide film 4 is shown. 3 shows an SOI substrate in which the I layer is composed of the carbon film 2, the microcrystalline diamond film 3, and the carbon film 2. FIG. 4 shows the silicon substrate 1 and the carbon film in the SOI substrate shown in FIG. A film having a silicon oxide film 4 between 2 is shown.
 パワー半導体デバイス用SOI基板開発において、既存シリコン半導体デバイスの製造工程に適応させるためには、直径30cm以上のシリコン基板上に均質の炭素膜を気相成長法で形成することが必要である。一般的に大面積なダイヤモンド合成に利用されている熱フィラメント気相成長法では、ダイヤモンド成長前に基板表面への傷つけ処理を施す必要があり、デバイスを作製するシリコンに欠陥が生じてしまい、デバイス動作が困難である。そのため、パワー半導体デバイス用SOI基板の炭素膜層の形成には、シリコン基板と炭素膜の界面に欠陥を形成しない、表面波プラズマ気相成長法を用いる必要がある。表面波プラズマ気相成長法による炭素膜の製造方法や表面波プラズマ気相成長装置は、既に特許文献1に開示されている。 In the development of SOI substrates for power semiconductor devices, in order to adapt to the manufacturing process of existing silicon semiconductor devices, it is necessary to form a homogeneous carbon film on a silicon substrate having a diameter of 30 cm or more by vapor phase growth. In the hot filament vapor deposition method, which is generally used for synthesizing large-area diamonds, it is necessary to perform a scratching process on the substrate surface before diamond growth, resulting in defects in the silicon used to fabricate the device. Operation is difficult. Therefore, the formation of the carbon film layer of the SOI substrate for power semiconductor devices requires the use of a surface wave plasma vapor deposition method that does not form defects at the interface between the silicon substrate and the carbon film. A carbon film manufacturing method and a surface wave plasma vapor phase growth apparatus by surface wave plasma vapor phase epitaxy have already been disclosed in Patent Document 1.
 そして、パワー半導体デバイス用SOI基板開発において、既存シリコン半導体デバイスの製造工程に適応させるためには、前記の表面波プラズマ気相成長法を用いて、直径30cm以上のシリコン基板上に炭素膜が形成された基板(以下、「炭素膜/シリコン基板」ということもある。)上に、直径30cm以上の均質のマイクロ結晶ダイヤモンド膜を、熱フィラメント気相成長法で形成することで、高熱伝導性を得ることが可能となる。この場合、熱フィラメント気相成長装置のフィラメントであるタングステン(W)やタンタル(Ta)のシリコン基板への混入や拡散を防ぐことが必要であるが、本発明においては、シリコン基板には前記炭素膜が形成されているため、該炭素膜が、デバイス作製層であるシリコンへの欠陥形成等を防ぎ、リーク電流の低減が可能となる。 In developing an SOI substrate for a power semiconductor device, a carbon film is formed on a silicon substrate having a diameter of 30 cm or more by using the surface wave plasma vapor deposition method in order to adapt to the manufacturing process of an existing silicon semiconductor device. By forming a homogeneous microcrystalline diamond film having a diameter of 30 cm or more on a formed substrate (hereinafter, also referred to as “carbon film / silicon substrate”) by a hot filament vapor phase growth method, high thermal conductivity is achieved. Can be obtained. In this case, it is necessary to prevent tungsten (W) and tantalum (Ta), which are filaments of the hot filament vapor phase growth apparatus, from entering and diffusing into the silicon substrate. Since the film is formed, the carbon film can prevent a defect from being formed in silicon as a device manufacturing layer, and can reduce a leakage current.
 また、熱フィラメント気相成長装置のフィラメントであるタングステン(W)やタンタル(Ta)がダイヤモンド中に取り込まれるため、高耐圧化のためには、マイクロ結晶ダイヤモンド膜を100μm以上の厚膜構造とする必要があるが、本発明では、表面波プラズマ気相成長法により形成した高熱伝導性かつ高耐圧の機能を有する炭素膜上に、熱フィラメント気相成長法でマイクロ結晶ダイヤモンド膜を形成することにより、SOI基板の薄膜化を可能とした、高熱伝導性かつ高耐圧の機能を有する炭素膜とマイクロ結晶ダイヤモンドハイブリット膜のハイブリッド構造を有するSOI基板が作成できる。 Further, since tungsten (W) and tantalum (Ta), which are filaments of a hot filament vapor phase growth apparatus, are taken into diamond, the microcrystalline diamond film has a thick film structure of 100 μm or more in order to increase the breakdown voltage. Although it is necessary, in the present invention, a microcrystalline diamond film is formed by hot filament vapor deposition on a carbon film having a high thermal conductivity and high withstand voltage function formed by surface wave plasma vapor deposition. Thus, an SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond hybrid film having a function of high thermal conductivity and high breakdown voltage, which enables thinning of the SOI substrate, can be produced.
 フィラメント材料のシリコンへの混入防止および高耐圧性および高熱伝導性の機能を有する膜として、前記炭素膜は、平坦な表面を形成し、且つ高耐圧性および高熱伝導性の機能をも有しており、最もふさわしい膜であるが、炭素膜以外に、シリコン酸化膜、窒化アルミニウム膜、窒化シリコン膜なども同様に機能を有するものとして用いることができる。 As a film having a function of preventing the filament material from being mixed into silicon and having a high pressure resistance and high thermal conductivity, the carbon film has a flat surface and also has a high pressure resistance and high thermal conductivity function. Although it is the most suitable film, in addition to the carbon film, a silicon oxide film, an aluminum nitride film, a silicon nitride film, or the like can also be used as having the same function.
 したがって、本発明のSOI基板の作製方法の1つは、シリコン基板に、原子レベルで平坦な表面を有し、かつシリコンへの混入防止、高耐圧性および高熱伝導性の機能を有する炭素膜を成膜する工程と、次に、熱フィラメント気相成長法で、前工程で得られた前記の炭素膜/シリコン基板上にマイクロ結晶ダイヤモンドを成膜する工程とからなる方法である。(図1参照)。 Therefore, one of the methods for manufacturing an SOI substrate of the present invention is to form a carbon film having a flat surface at an atomic level and a function of preventing entry into silicon, high pressure resistance, and high thermal conductivity on a silicon substrate. This is a method comprising a step of forming a film and a step of forming a microcrystalline diamond on the carbon film / silicon substrate obtained in the previous step by a hot filament vapor phase growth method. (See FIG. 1).
 該方法において、デバイス作製層であるシリコンへの欠陥導入をより完全に防ぐには、シリコン基板の表面にシリコン酸化膜を形成した後に、原子レベルで平坦な表面を有しかつシリコンへの混入防止、高耐圧性および高熱伝導性の機能を有する炭素膜を形成することが好ましい(図2、図4参照)。該シリコン酸化膜の形成方法は、熱酸化法による形成や、気相成長法やスパッタリング法等の既知の成膜方法から選択することができる。 In this method, in order to more completely prevent the introduction of defects into silicon, which is a device fabrication layer, after forming a silicon oxide film on the surface of a silicon substrate, it has a flat surface at the atomic level and prevents contamination into silicon. It is preferable to form a carbon film having functions of high pressure resistance and high thermal conductivity (see FIGS. 2 and 4). The method for forming the silicon oxide film can be selected from the formation by a thermal oxidation method, a known film formation method such as a vapor phase growth method and a sputtering method.
 また、絶縁性のさらなる向上には、前記したマイクロ結晶ダイヤモンド成膜の工程の後に、原子レベルで平坦な表面を有しかつ高耐圧性および高熱伝導性の機能を有する炭素膜をマイクロ結晶ダイヤモンド表面上に成膜することで、高耐圧かつ高熱伝導性の炭素膜とマイクロ結晶ダイヤモンド膜のハイブリット構造(炭素膜/マイクロ結晶ダイヤモンド膜/炭素膜)を有するSOI基板が作成できる(図3、図4参照)。 Further, in order to further improve the insulating property, a carbon film having a flat surface at the atomic level and a function of high pressure resistance and high thermal conductivity after the above-described microcrystalline diamond film forming step is used. By forming a film thereon, an SOI substrate having a hybrid structure (carbon film / microcrystalline diamond film / carbon film) of a carbon film and a microcrystalline diamond film having a high withstand voltage and high thermal conductivity can be produced (FIGS. 3 and 4). reference).
 パワー半導体デバイス用SOI基板開発において、既存シリコン半導体デバイスの製造工程に適応させるためには、前記の直径30cm以上のシリコン/炭素膜基板上に、直径30cm以上の均質のマイクロ結晶ダイヤモンド膜を張り合わせる方法によっても可能である。
 炭素膜とマイクロ結晶ダイヤモンド膜を張り合わせるためには、両膜の張り合わせ面が、原子レベルで平坦であることが必要条件である。一般的に、ダイヤモンド表面の平坦化には、機械的な研磨方法が用いられている。
 この機械的研磨を、シリコン/炭素膜基板の炭素膜表面に用いた場合、デバイスを作製するシリコン基板に欠陥やひずみが生じてしまう。このため、原子レベルで平坦な表面が自己組織化的に形成できる表面波プラズマ気相成長法により成膜された炭素膜を、シリコン基板上に形成する必要がある。
In the development of SOI substrates for power semiconductor devices, in order to adapt to the manufacturing process of existing silicon semiconductor devices, a homogeneous microcrystalline diamond film with a diameter of 30 cm or more is laminated on the silicon / carbon film substrate with a diameter of 30 cm or more. It is also possible by the method.
In order to bond the carbon film and the microcrystalline diamond film, it is a necessary condition that the bonding surfaces of the two films are flat at the atomic level. In general, a mechanical polishing method is used to flatten the diamond surface.
When this mechanical polishing is used on the carbon film surface of the silicon / carbon film substrate, defects and strains are generated in the silicon substrate for manufacturing the device. For this reason, it is necessary to form a carbon film formed on the silicon substrate by a surface wave plasma vapor deposition method that can form a flat surface at the atomic level in a self-organized manner.
 一方、マイクロ結晶ダイヤモンド膜は、直径30cm以上の面積が必要なため、熱フィラメント気相成長法での合成を用いることができる。この時、原子レベルで平坦な基板表面にマイクロ結晶ダイヤモンドを合成し、基板を除去することで、該マイクロ結晶ダイヤモンド膜の基板との界面側を張り合わせ面として利用することができる。このような方法で、高耐圧かつ高熱伝導性の炭素膜/マイクロ結晶ダイヤモンド膜のハイブリット構造を有するSOI基板が作成できる。 On the other hand, since the microcrystalline diamond film requires an area of 30 cm or more in diameter, synthesis by a hot filament vapor phase growth method can be used. At this time, by synthesizing microcrystalline diamond on the flat substrate surface at the atomic level and removing the substrate, the interface side of the microcrystalline diamond film with the substrate can be used as a bonding surface. By such a method, an SOI substrate having a hybrid structure of a carbon film / microcrystalline diamond film having a high withstand voltage and high thermal conductivity can be produced.
 以下、上記の張り合わせ法による、炭素膜/マイクロ結晶ダイヤモンド膜のハイブリット構造を有するSOI基板の作成について、具体的に記載する。
(1)まずシリコン基板に表面波プラズマ気相成長法で、原子レベルで平坦な表面を有する炭素膜を成膜し、炭素膜/シリコン基板を製造する。
(2)次に、熱フィラメント気相成長法で、別のシリコン基板上にマイクロ結晶ダイヤモンド膜を成膜し、シリコン基板を除去することで、シリコンとマイクロ結晶ダイヤモンドの界面に形成された、原子レベルで平坦なマイクロ結晶ダイヤモンド表面を得る。
(3)次いで、得られた原子レベルで平坦な表面を、前記炭素膜/シリコン基板の炭素膜表面に張り合わせる。張り合わせには、イオンビームやプラズマを用いて該炭素膜表面およびマイクロ結晶ダイヤモンド表面洗浄を行い、真空加圧貼付け方式で、炭素膜表面とマイクロ結晶ダイヤモンド表面とを張り合わせることができる。
Hereinafter, the production of an SOI substrate having a hybrid structure of carbon film / microcrystalline diamond film by the bonding method described above will be specifically described.
(1) First, a carbon film having a flat surface at an atomic level is formed on a silicon substrate by surface wave plasma vapor deposition to produce a carbon film / silicon substrate.
(2) Next, a microcrystalline diamond film is formed on another silicon substrate by hot filament vapor deposition, and the silicon substrate is removed to form atoms formed at the interface between silicon and microcrystalline diamond. A level microcrystalline diamond surface is obtained.
(3) Next, the obtained flat surface at the atomic level is bonded to the carbon film surface of the carbon film / silicon substrate. For the bonding, the carbon film surface and the microcrystalline diamond surface can be cleaned using an ion beam or plasma, and the carbon film surface and the microcrystalline diamond surface can be bonded together by a vacuum pressure bonding method.
 また、マイクロ結晶ダイヤモンド膜は直径30cm以上の面積が必要なため、熱フィラメント気相成長法での合成を用いることができるが、この時、原子レベルで平坦な基板表面形成には、機械的研磨を用いることができる。
 したがって、本発明のSOI基板の作製方法のさらにもう1つは、(1)まずシリコン基板に表面波プラズマ気相成長法で、原子レベルで平坦な表面を有する炭素膜を成膜する工程と、(2)熱フィラメント気相成長法で、シリコン基板上にマイクロ結晶ダイヤモンド膜を成膜し、機械的研磨方法で、マイクロ結晶ダイヤモンド表面を原子レベルでの平坦化とシリコンの除去を行う工程と、(3)の原子レベルで平坦な表面を、前記炭素膜表面に張り合わせる工程とからなる方法であり、該方法により、高耐圧かつ高熱伝導性の炭素膜/マイクロ結晶ダイヤモンド膜のハイブリット構造を有するSOI基板が作成できる。
In addition, since the microcrystalline diamond film requires an area of 30 cm or more in diameter, synthesis by a hot filament vapor deposition method can be used. At this time, mechanical polishing is used to form a flat substrate surface at an atomic level. Can be used.
Therefore, yet another method for manufacturing an SOI substrate according to the present invention includes (1) a step of first forming a carbon film having a flat surface at an atomic level on a silicon substrate by surface wave plasma vapor deposition. (2) forming a microcrystalline diamond film on a silicon substrate by a hot filament vapor deposition method, planarizing the surface of the microcrystalline diamond at an atomic level and removing silicon by a mechanical polishing method; (3) A method comprising a step of bonding a flat surface at an atomic level to the surface of the carbon film, and the method has a hybrid structure of a carbon film / microcrystalline diamond film having a high breakdown voltage and high thermal conductivity. An SOI substrate can be created.
 以上のとおり、本発明においては、炭素膜/シリコン基板に、熱フィラメント気相成長法により、或いは、熱フィラメント気相成長法で形成されたマイクロ結晶ダイヤモンド膜を張り合わせることにより、シリコン基板と炭素膜の界面には電気的活性な欠陥や不純物がなく、放熱特性の優れたパワー半導体用SOI基板が作製される。 As described above, in the present invention, a carbon film / silicon substrate is bonded to a silicon substrate and a carbon substrate by bonding a microcrystalline diamond film formed by a hot filament vapor deposition method or a hot filament vapor deposition method. An SOI substrate for power semiconductors having no heat active defects and impurities and having excellent heat dissipation characteristics is produced at the interface of the film.
 また、本発明のSOI基板は、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造を有するものであるが、この炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造は、タングステン、タンタル等の、CVD法でダイヤモンド薄膜の形成が可能な全ての金属上に作成可能であるため、シリコン半導体以外のパワー半導体デバイス(シリコンカーバイト、窒化ガリウム、アルミニウム窒化ガリウム)と組み合わせることも可能である。シリコン半導体以外のパワー半導体デバイスとの組み合わせは、シリコンカーバイト、窒化ガリウムなどの半導体材料上に直接、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造を形成することも可能であるが、前記のシリコン基板の場合と同様に、半導体プロセスで利用される張り合わせ技術で実現できる。 The SOI substrate of the present invention has a hybrid structure of a carbon film and a microcrystalline diamond film. The hybrid structure of the carbon film and the microcrystalline diamond film is a diamond thin film formed by CVD, such as tungsten or tantalum. Therefore, it is possible to combine with power semiconductor devices (silicon carbide, gallium nitride, aluminum gallium nitride) other than silicon semiconductor. In combination with a power semiconductor device other than a silicon semiconductor, a hybrid structure of a carbon film and a microcrystalline diamond film can be directly formed on a semiconductor material such as silicon carbide or gallium nitride. As in the case of, it can be realized by a bonding technique used in a semiconductor process.
 以下、本発明を実施例等によりさらに具体的に説明するが、本発明はこれらの実施例等によっては何ら限定されるものではない。
 なお、実施例における炭素膜の製造方法は、特許文献1および特許文献2で開示されている方法を用いた。
EXAMPLES Hereinafter, although an Example etc. demonstrate this invention further more concretely, this invention is not limited at all by these Examples.
In addition, the method currently disclosed by patent document 1 and patent document 2 was used for the manufacturing method of the carbon film in an Example.
 まず、実施例に用いや評価方法を記載する。
 《不純物評価》
 本発明のSOI基板のシリコン基板中のタングステンの評価は、二次イオン質量分析法により行った。測定は、一次イオンにO を用い、加速電圧を3kVとした。測定時の真空度は3×10-9Torrである。
First, use and evaluation methods are described in the examples.
<Evaluation of impurities>
Evaluation of tungsten in the silicon substrate of the SOI substrate of the present invention was performed by secondary ion mass spectrometry. In the measurement, O 2 + was used as the primary ion, and the acceleration voltage was 3 kV. The degree of vacuum during the measurement is 3 × 10 −9 Torr.
 《電気絶縁性》
 電気絶縁性の評価に用いた試料として、本発明のSOI基板のマイクロ結晶ダイヤモンド膜上に直径30μmの電極を形成したものを用いた。SOI基板のシリコンは導電性の銀ペーストを用いて銅製の試料ホルダーに設置した。測定は、5×10-7Torrの真空中で、電流-電圧特性を測定した。印加電圧をマイクロ結晶ダイヤモンドの膜厚と炭素膜の膜厚の合計膜厚で割った値を電界とし、電流-電界特性を用いて、電気絶縁性を評価した。電流が観測される電界が大きい程電気絶縁性が高いことを意味する。
<Electrical insulation>
As a sample used for evaluation of electrical insulation, a sample in which an electrode having a diameter of 30 μm was formed on a microcrystalline diamond film of an SOI substrate of the present invention was used. The silicon of the SOI substrate was placed in a copper sample holder using a conductive silver paste. The measurement was performed by measuring current-voltage characteristics in a vacuum of 5 × 10 −7 Torr. The value obtained by dividing the applied voltage by the total thickness of the microcrystalline diamond film and the carbon film was defined as the electric field, and the electric insulation was evaluated using the current-electric field characteristics. The larger the electric field where current is observed, the higher the electrical insulation.
 《熱伝導度》
 熱伝導度の測定は、サーモリフレクタンス法で評価した。試料は、SOI基板のシリコン基板をフッ酸と硝酸の混合液で除去し、マイクロ結晶ダイヤモンド膜/炭素膜の自立体構造を作製した。このマイクロ結晶ダイヤモンド/炭素膜自立体構造マイクロ結晶ダイヤモンド面と炭素膜面にスパッタリング法で厚さ100nmのモリブデン薄膜を形成した。
 熱伝導度は、積層体の積層方向および積層方向に対して垂直方向(面内方向)の熱伝導度を評価した。
《Thermal conductivity》
The thermal conductivity was measured by a thermoreflectance method. As a sample, the silicon substrate of the SOI substrate was removed with a mixed solution of hydrofluoric acid and nitric acid to produce a self-stereoscopic structure of a microcrystalline diamond film / carbon film. A molybdenum thin film having a thickness of 100 nm was formed on the microcrystalline diamond surface and the carbon film surface by sputtering.
For the thermal conductivity, the thermal conductivity in the direction perpendicular to the laminating direction and the laminating direction (in-plane direction) of the laminate was evaluated.
 (実施例1)
 基板として4インチ径のウェハ状のシリコン基板を用いた。炭素粒子の核形成密度を高め均一な成膜とするために、成膜前の基板に前処理(ナノクリスタルダイヤモンド粒子付着処理)を行った。
 この前処理には平均粒径5nmのナノクリスタルダイヤモンド粒子を純水中に分散させたコロイド溶液(有限会社ナノ炭素研究所製 製品名ナノアマンド)または平均粒径30nm又は40nmのナノクリスタルダイヤモンド粒子(トーメイダイヤ株式会社製 製品名各々MD30およびMD40)を純水中に分散させた溶液、あるいはクラスターダイヤモンド粒子またはグラファイトクラスターダイヤモンド粒子(東京ダイヤモンド工具製作所製 製品名各々CDおよびGCD)を分散させたエタノール、あるいはアダマンタンまたはその誘導体あるいはそれらの誘導体(各々出光興産株式会社製)溶液を用い,これに基板を浸して超音波洗浄器にかけた。
 その後、基板をエタノール中に浸して超音波洗浄を行い、乾燥させるか、またはこれらの溶液をスピンコートによって基板上に均一に塗布し、乾燥させる。この前処理の均一性が成膜後の炭素膜の均一性に影響する。この場合、基板上に付着するダイヤモンド粒子は、1cm当たり、1010~1011個であった。
Example 1
A 4-inch diameter wafer-like silicon substrate was used as the substrate. In order to increase the nucleation density of the carbon particles and form a uniform film, a pretreatment (nanocrystal diamond particle adhesion treatment) was performed on the substrate before the film formation.
For this pretreatment, a colloidal solution (product name: Nanoamand, manufactured by Nano Carbon Laboratory Co., Ltd.) in which nanocrystal diamond particles having an average particle size of 5 nm are dispersed in pure water, or nanocrystal diamond particles having an average particle size of 30 nm or 40 nm (Tomei) Diamond Co., Ltd., product names MD30 and MD40) dispersed in pure water, or cluster diamond particles or graphite cluster diamond particles (Tokyo Diamond Tool Co., Ltd., product names CD and GCD, respectively), or Adamantane or a derivative thereof or a derivative thereof (each made by Idemitsu Kosan Co., Ltd.) solution was used, and the substrate was immersed in an ultrasonic cleaner.
Thereafter, the substrate is immersed in ethanol for ultrasonic cleaning and dried, or these solutions are uniformly applied on the substrate by spin coating and dried. The uniformity of this pretreatment affects the uniformity of the carbon film after film formation. In this case, the number of diamond particles adhering on the substrate was 10 10 to 10 11 per cm 2 .
 原料ガスは、CH、CO及びHの混合ガスを用い、CH及びCOの濃度をそれぞれ1モル%とした。反応容器内ガス圧力は、通常ダイヤモンドのCVD合成で用いられる圧力(10~10Pa)より低い1.0~1.2×10Pa(1.0~1.2mbar)とし、トータル20~24kWのマイクロ波を投入して基板面積より広い領域に大面積かつ均一なプラズマを発生させた。その際、Mo試料台と冷却ステージを密着させ、基板とアンテナの距離を調節することによって、成膜中の基板温度を450℃以下に保つことが可能となった。
 以上の成膜条件の下、6時間成膜を行った。成膜後のガラス基板上には、均一かつ透明な炭素膜が形成された。この膜の膜厚は、200nmであった。
As the source gas, a mixed gas of CH 4 , CO 2 and H 2 was used, and the concentrations of CH 4 and CO 2 were each 1 mol%. The gas pressure in the reaction vessel is 1.0 to 1.2 × 10 2 Pa (1.0 to 1.2 mbar), which is lower than the pressure (10 3 to 10 4 Pa) usually used for CVD synthesis of diamond, and a total of 20 A large area and uniform plasma was generated in a region wider than the substrate area by applying a microwave of ˜24 kW. At that time, the substrate temperature during film formation can be maintained at 450 ° C. or less by adjusting the distance between the substrate and the antenna by closely contacting the Mo sample stage and the cooling stage.
Film formation was performed for 6 hours under the above film formation conditions. A uniform and transparent carbon film was formed on the glass substrate after film formation. The film thickness was 200 nm.
 次に、熱フィラメント気相成長法により、前記の炭素膜表面上に、マイクロ結晶ダイヤモンド膜(MCD)を成膜した。熱フィラメント気相成長装置は、大面積HFCVD装置(sp3社製 Model 650)を用いた。フィラメントにはタングステン(W)を用い、フィラメント温度2000℃、基板温度800℃で、6時間の成膜をおこなった。この膜の膜厚は、約10μmであった。実施例1で得られたSOI基板は図1の構造を有する。 Next, a microcrystalline diamond film (MCD) was formed on the surface of the carbon film by a hot filament vapor deposition method. As the hot filament vapor phase growth apparatus, a large-area HFCVD apparatus (Sp3 Model 650) was used. Tungsten (W) was used as the filament, and the film was formed for 6 hours at a filament temperature of 2000 ° C. and a substrate temperature of 800 ° C. The film thickness was about 10 μm. The SOI substrate obtained in Example 1 has the structure shown in FIG.
 図5に、実施例1で得られたSOI基板のシリコン中の不純物の評価結果を示す。タングステンは、炭素膜、シリコン基板中には観測されず、炭素膜が、マイクロ結晶ダイヤモンド膜の成膜中のタングステンの混入を防ぐ役割を持つことがわかった。 FIG. 5 shows the evaluation results of impurities in the silicon of the SOI substrate obtained in Example 1. Tungsten was not observed in the carbon film and the silicon substrate, and it was found that the carbon film has a role to prevent tungsten from being mixed during the formation of the microcrystalline diamond film.
 次に、実施例1で得られたSOI基板の電流-電界特性を図6に示す。電流が急激に増加する電界を閾電界と仮定すると、閾電界は、85V/μmであった。この値は、単結晶ダイヤモンドの絶縁破壊電界(1MV/cm)とほぼ同じである。 Next, the current-electric field characteristics of the SOI substrate obtained in Example 1 are shown in FIG. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 85 V / μm. This value is almost the same as the dielectric breakdown electric field (1 MV / cm) of single crystal diamond.
 実施例1で得られたSOI基板の熱伝導度は、積層方向は250W/mK、積層方向と垂直方向では110W/mKであった。この値は、マイクロ結晶ダイヤモンドの報告値とほぼ同様であり、既に報告されている炭素膜より1桁高い値である。 The thermal conductivity of the SOI substrate obtained in Example 1 was 250 W / mK in the stacking direction and 110 W / mK in the direction perpendicular to the stacking direction. This value is almost the same as the reported value of microcrystalline diamond, which is one digit higher than the previously reported carbon film.
 以上の結果、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造を形成することで、半導体デバイス作製層であるシリコンへの不純物の混入を防ぐことが可能となったことがわかる。さらに、絶縁性および熱伝導度が向上することがわかった。したがって、本発明の炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造をI層(絶縁層)とするSOI基板を用いることにより、電気絶縁性、放熱性の優れたパワー半導体デバイス用SOI基板が作製できる。 From the above results, it can be seen that by forming a hybrid structure of a carbon film and a microcrystalline diamond film, it is possible to prevent impurities from being mixed into silicon which is a semiconductor device fabrication layer. Furthermore, it has been found that insulation and thermal conductivity are improved. Therefore, by using an SOI substrate having the hybrid structure of the carbon film of the present invention and the microcrystalline diamond film as an I layer (insulating layer), an SOI substrate for a power semiconductor device excellent in electrical insulation and heat dissipation can be manufactured.
 (実施例2)
 基板として、シリコン酸化膜(SiO膜)(厚さ20nm)を形成したシリコン基板を用いた以外は、実施例1と同様にしてSOI基板を作製した。実施例2で得られたSOI基板の構造を図2に示す。
(Example 2)
An SOI substrate was fabricated in the same manner as in Example 1 except that a silicon substrate on which a silicon oxide film (SiO 2 film) (thickness 20 nm) was formed was used. The structure of the SOI substrate obtained in Example 2 is shown in FIG.
 実施例2で得られたSOI基板のシリコン中の不純物評価の結果を図7に示す。タングステンは、炭素膜、シリコン酸化膜(SiO膜)、シリコン基板中には観測されず、炭素膜がマイクロ結晶ダイヤモンド膜の成膜中のタングステンの混入を防ぐ役割を持つことがわかった。 FIG. 7 shows the result of evaluating impurities in the silicon of the SOI substrate obtained in Example 2. Tungsten was not observed in the carbon film, silicon oxide film (SiO 2 film), or silicon substrate, and it was found that the carbon film has a role of preventing the entry of tungsten during the formation of the microcrystalline diamond film.
 次に、実施例2で得られたSOI基板の電流-電界特性を図8に示す。電流が急激に増加する電界を閾電界と仮定すると、閾電界は、92V/μmであった。この値は、単結晶ダイヤモンドの絶縁破壊電界(1MV/cm)とほぼ同じである。 Next, the current-electric field characteristics of the SOI substrate obtained in Example 2 are shown in FIG. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 92 V / μm. This value is almost the same as the dielectric breakdown electric field (1 MV / cm) of single crystal diamond.
 したがって、本発明の炭素膜とマイクロ結晶ダイヤモンドハイブリット膜のハイブリッド構造をI層(絶縁層)としたシリコン酸化膜付きシリコン基板を用いて作製したSOI基板を用いることにより、電気絶縁性、放熱性の優れたパワー半導体デバイス用SOI基板が作製できる。 Therefore, by using an SOI substrate manufactured using a silicon substrate with a silicon oxide film in which the hybrid structure of the carbon film of the present invention and the microcrystalline diamond hybrid film is an I layer (insulating layer), electrical insulation and heat dissipation are achieved. An excellent SOI substrate for power semiconductor devices can be manufactured.
 (比較例1)
 マイクロ結晶ダイヤモンドのみをI層(絶縁層)としたSOI基板を作製した。基板には、シリコン基板を用いた。
 マイクロ結晶ダイヤモンド膜の成膜の前処理として、ダイヤモンド粒子でシリコン基板に傷付け処理をおこなった。熱フィラメント気相成長装置は、大面積HFCVD装置(sp3社製 Model 650)を用いた。フィラメントにはタングステン(W)を用い、フィラメント温度2000℃、基板温度800℃で、6時間の成膜をおこなった。この膜の膜厚は、約10μmであった。
(Comparative Example 1)
An SOI substrate using only microcrystalline diamond as an I layer (insulating layer) was manufactured. A silicon substrate was used as the substrate.
As a pretreatment for forming the microcrystalline diamond film, the silicon substrate was scratched with diamond particles. As the hot filament vapor phase growth apparatus, a large-area HFCVD apparatus (Model 650 manufactured by sp3) was used. Tungsten (W) was used as the filament, and the film was formed for 6 hours at a filament temperature of 2000 ° C. and a substrate temperature of 800 ° C. The film thickness was about 10 μm.
 比較例1で得られたSOI基板のシリコン中の不純物評価の結果を図9に示す。タングステンは、マイクロ結晶ダイヤモンド膜とシリコン基板の界面に観測され、シリコン基板中にも界面から0.5μmの深さまで検出された。 FIG. 9 shows the results of impurity evaluation in silicon of the SOI substrate obtained in Comparative Example 1. Tungsten was observed at the interface between the microcrystalline diamond film and the silicon substrate, and was detected in the silicon substrate to a depth of 0.5 μm from the interface.
 比較例1で得られたSOI基板の電流-電界特性を図10に示す。電流が急激に増加する電界を閾電界と仮定すると、閾電界は、40V/μmであった。この値は、単結晶ダイヤモンドの絶縁破壊電界(100V/μm)の2分の1であった。 FIG. 10 shows the current-electric field characteristics of the SOI substrate obtained in Comparative Example 1. Assuming that the electric field at which the current rapidly increases is the threshold electric field, the threshold electric field was 40 V / μm. This value was half of the dielectric breakdown electric field (100 V / μm) of single crystal diamond.
 実施例1と比較例1を比べると、実施例1のSOI基板のリーク電流が観測される電界は、炭素膜とマイクロ結晶ダイヤモンドハイブリット膜のハイブリッド構造をI層とするSOI基板は、比較例1のマイクロ結晶ダイヤモンド膜のみを絶縁層とするSOIに比べて、リーク電流が観測された電界が2倍増加した。したがって、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造をI層とするSOI基板は、マイクロ結晶ダイヤモンド膜のみの場合の2分の1の厚さで絶縁性を確保することが可能であることがわかる。 Comparing Example 1 and Comparative Example 1, the electric field where the leakage current of the SOI substrate of Example 1 is observed is that the SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond hybrid film as an I layer is Comparative Example 1. Compared with SOI using only the microcrystalline diamond film as an insulating layer, the electric field in which leakage current was observed increased twice. Therefore, it can be seen that an SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond film as an I layer can ensure insulation with a thickness half that of a microcrystalline diamond film alone. .
 (実施例3)
 実施例1及び実施例2において、マイクロ結晶ダイヤモンド膜に、さらに同様の200nmの炭素膜を形成することで、リーク電流が観測される電界が2倍となった。つまり、図3および図4の構造を形成することで、リーク電界が約120V/μmおよび約130V/μmのSOI基板が作製できることがわかる。また、熱伝導性は、炭素膜の値の成膜方向は8倍、成膜方向と垂直方向(面内方向)は3倍と改善された。
Example 3
In Example 1 and Example 2, by forming a similar 200 nm carbon film on the microcrystalline diamond film, the electric field at which leakage current was observed was doubled. That is, it can be seen that by forming the structures of FIGS. 3 and 4, an SOI substrate having a leakage electric field of about 120 V / μm and about 130 V / μm can be manufactured. Further, the thermal conductivity was improved by 8 times in the film forming direction of the value of the carbon film and 3 times in the direction perpendicular to the film forming direction (in-plane direction).
 本発明の、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造を有するSOI基板、或いは炭素膜とマイクロ結晶ダイヤモンド膜のハイブリッド構造を有する膜は、高絶縁性かつ高熱伝導性を有し、半導体デバイス作製層であるシリコンへの不純物混入や欠陥導入がないことから、電気自動車やハイブリッド自動車、モーター制御用インバーターなど、あらゆるパワー半導体デバイスへの利用が可能であり、非常に重要な技術である。 The SOI substrate having a hybrid structure of a carbon film and a microcrystalline diamond film or a film having a hybrid structure of a carbon film and a microcrystalline diamond film according to the present invention has a high insulating property and a high thermal conductivity. This is a very important technology because it can be used for all power semiconductor devices such as electric vehicles, hybrid vehicles, and inverters for motor control.
 1:シリコン基板
 2:炭素膜
 3:マイクロ結晶ダイヤモンド膜
 4:シリコン酸化膜
1: Silicon substrate 2: Carbon film 3: Microcrystalline diamond film 4: Silicon oxide film

Claims (8)

  1.  SOI基板の絶縁層が、炭素膜とマイクロ結晶ダイヤモンド膜のハイブリット構造を有することを特徴とするSOI基板。 An SOI substrate, wherein the insulating layer of the SOI substrate has a hybrid structure of a carbon film and a microcrystalline diamond film.
  2.  前記ハイブリット構造が、炭素膜/マイクロ結晶ダイヤモンド膜で構成されていることを特徴とする請求項1に記載のSOI基板。 2. The SOI substrate according to claim 1, wherein the hybrid structure is composed of a carbon film / microcrystalline diamond film.
  3.  前記ハイブリット構造が、炭素膜/マイクロ結晶ダイヤモンド膜/炭素膜で構成されていることを特徴とする請求項1に記載のSOI基板。 2. The SOI substrate according to claim 1, wherein the hybrid structure is composed of a carbon film / microcrystalline diamond film / carbon film.
  4.  前記炭素膜が、表面波プラズマ気相成長法で形成された膜であることを特徴とする請求項1~3のいずれか1項に記載のSOI基板。 The SOI substrate according to any one of claims 1 to 3, wherein the carbon film is a film formed by a surface wave plasma vapor deposition method.
  5.  前記マイクロ結晶ダイヤモンド膜層が、熱フィラメント気相成長法で形成された膜であることを特徴とする請求項1~4のいずれか1項に記載のSOI基板。 The SOI substrate according to any one of claims 1 to 4, wherein the microcrystalline diamond film layer is a film formed by a hot filament vapor deposition method.
  6.  前記炭素膜上に、熱フィラメント気相成長法によりマイクロ結晶ダイヤモンド膜が形成されていることを特徴とする請求項1~5のいずれか1項に記載のSOI基板。 The SOI substrate according to any one of claims 1 to 5, wherein a microcrystalline diamond film is formed on the carbon film by a hot filament vapor deposition method.
  7.  前記炭素膜上に、熱フィラメント気相成長法で形成されたマイクロ結晶ダイヤモンド膜を張り合わせることにより形成されたことを特徴とする請求項5に記載のSOI基板。 6. The SOI substrate according to claim 5, wherein the SOI substrate is formed by bonding a microcrystalline diamond film formed by a hot filament vapor phase growth method on the carbon film.
  8.  シリコン基板と炭素膜の界面にシリコン酸化膜を有することを特徴とする請求項1~7のいずれか1項に記載のSOI基板。 8. The SOI substrate according to claim 1, further comprising a silicon oxide film at an interface between the silicon substrate and the carbon film.
PCT/JP2011/073412 2010-10-14 2011-10-12 Soi substrate WO2012050122A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE112011103476T DE112011103476T5 (en) 2010-10-14 2011-10-12 SOI substrate
JP2012538690A JP5665202B2 (en) 2010-10-14 2011-10-12 SOI substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010-231041 2010-10-14
JP2010231041 2010-10-14

Publications (1)

Publication Number Publication Date
WO2012050122A1 true WO2012050122A1 (en) 2012-04-19

Family

ID=45938349

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2011/073412 WO2012050122A1 (en) 2010-10-14 2011-10-12 Soi substrate

Country Status (3)

Country Link
JP (1) JP5665202B2 (en)
DE (1) DE112011103476T5 (en)
WO (1) WO2012050122A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020250815A1 (en) * 2019-06-14 2020-12-17 Tdk株式会社 Electronic-component-incorporating substrate and circuit module using the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63150926A (en) * 1986-12-15 1988-06-23 Ricoh Co Ltd Film formation of diamond-shaped carbon film
JP2006228963A (en) * 2005-02-17 2006-08-31 Kobe Steel Ltd Method of manufacturing semiconductor wafer
WO2008057055A1 (en) * 2006-11-10 2008-05-15 Agency For Science, Technology And Research A micromechanical structure and a method of fabricating a micromechanical structure
JP2010202911A (en) * 2009-03-02 2010-09-16 Mitsubishi Materials Corp Carbon film, production method of carbon film, and cmp pad conditioner

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1969058B (en) * 2004-04-19 2010-04-14 独立行政法人产业技术总合研究所 Carbon film
WO2007004647A1 (en) * 2005-07-04 2007-01-11 National Institute Of Advanced Industrial Science And Technology Carbon film
JP2011241463A (en) * 2010-05-20 2011-12-01 Toyota Motor Corp Layer structure having hard carbon film layer, and valve lifter having the layer structure on surface

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63150926A (en) * 1986-12-15 1988-06-23 Ricoh Co Ltd Film formation of diamond-shaped carbon film
JP2006228963A (en) * 2005-02-17 2006-08-31 Kobe Steel Ltd Method of manufacturing semiconductor wafer
WO2008057055A1 (en) * 2006-11-10 2008-05-15 Agency For Science, Technology And Research A micromechanical structure and a method of fabricating a micromechanical structure
JP2010202911A (en) * 2009-03-02 2010-09-16 Mitsubishi Materials Corp Carbon film, production method of carbon film, and cmp pad conditioner

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020250815A1 (en) * 2019-06-14 2020-12-17 Tdk株式会社 Electronic-component-incorporating substrate and circuit module using the same
JPWO2020250815A1 (en) * 2019-06-14 2020-12-17
JP7439833B2 (en) 2019-06-14 2024-02-28 Tdk株式会社 Electronic component built-in board and circuit module using the same

Also Published As

Publication number Publication date
DE112011103476T5 (en) 2013-08-01
JPWO2012050122A1 (en) 2014-02-24
JP5665202B2 (en) 2015-02-04

Similar Documents

Publication Publication Date Title
US7749863B1 (en) Thermal management substrates
CN109722641B (en) Diamond/graphene composite heat conducting film, preparation method thereof and heat dissipation system
US20090297854A1 (en) Aa stacked graphene-diamond hybrid material by high temperature treatment of diamond and the fabrication method thereof
JP5730393B2 (en) Composite substrate and manufacturing method thereof
CN113690298A (en) Semiconductor composite substrate, semiconductor device and preparation method
JP5933188B2 (en) Microcrystalline silicon film, manufacturing method thereof, and semiconductor device
US11139427B2 (en) Bonded body and elastic wave element
Jing et al. Chemical vapor deposition of hexagonal boron nitride on metal-coated wafers and transfer-free fabrication of resistive switching devices
JP2018049868A (en) Semiconductor stacked structure and semiconductor device
Wang et al. Scalable synthesis of graphene on patterned Ni and transfer
JP7191322B2 (en) Semiconductor substrate manufacturing method
US20210111698A1 (en) Bonded body and elastic wave element
KR20140121137A (en) Method and board for growing high quality graphene layer using high pressure annealing
KR101715633B1 (en) Field effect transistor comprising black phosphorusblack and phosphorus reduction and passivation method by transition metal
JP5665202B2 (en) SOI substrate
JP2011529632A (en) Semiconductor-on-insulator substrate coated with intrinsic and doped diamond layers
Serikawa et al. High-mobility poly-Si thin film transistors fabricated on stainless-steel foils by low-temperature processes using sputter-depositions
US7148079B1 (en) Diamond like carbon silicon on insulator substrates and methods of fabrication thereof
CN113355650B (en) AlN-diamond heat sink, preparation method and application thereof, and semiconductor laser packaging part
WO2023162448A1 (en) Radio-frequency device substrate, and method for manufacturing same
TWI743932B (en) Semiconductor substrate and method for manufacturing the same
JPH07172989A (en) Production of diamond substrate
WO2024103727A1 (en) Silicon carbide epitaxial wafer, and preparation method therefor and use thereof
JP2004210559A (en) Diamond laminated film and its manufacturing method
JP2005005615A (en) Method for manufacturing diamond electronic element

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 11832557

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 1120111034768

Country of ref document: DE

Ref document number: 112011103476

Country of ref document: DE

ENP Entry into the national phase

Ref document number: 2012538690

Country of ref document: JP

Kind code of ref document: A

122 Ep: pct application non-entry in european phase

Ref document number: 11832557

Country of ref document: EP

Kind code of ref document: A1