WO2012039200A1

WO2012039200A1 - Load drive device

Info

Publication number: WO2012039200A1
Application number: PCT/JP2011/067866
Authority: WO
Inventors: 圭祐上田; 晃則丸山; 中村　吉秀; 宜範生田
Original assignee: 矢崎総業株式会社
Priority date: 2010-09-21
Filing date: 2011-08-04
Publication date: 2012-03-29
Also published as: JP2012070047A

Abstract

Disclosed is a load drive circuit provided with a plurality of relay circuits between a power source and a load to control the load to drive or stop by activating the respective relay circuits in conjunction with each other, wherein a diagnosis terminal and an input terminal of each relay circuit is connected. Then, during a normal operation, the diagnosis terminal is opened, and an H-level signal is supplied to the input terminal, to activate the relay circuit. When a malfunction occurs in any of the relay circuits, the diagnosis terminal of the relay circuit is made to L-level. Thereby, each input terminal is changed to L-level, and the operation of each relay circuit is blocked. As a result, a load circuit can be protected against overcurrent and overheating.

Description

Load drive device

The present invention relates to a load driving device that controls driving and stopping of a load by arranging a plurality of relay circuits in parallel on a wiring connecting a power source and a load and operating each relay circuit in conjunction with each other. The present invention relates to a technique for protecting a circuit by immediately shutting off all the relay circuits including the relay circuit when an abnormality occurs in one relay circuit.

Loads such as lamps and motors mounted on the vehicle are provided with a MOSFET (hereinafter abbreviated as “FET”) between the battery and the load, and the FET is turned on and off to drive and stop the load. I have control. Further, for example, for a load in which a large current flows during driving, such as a rear defogger, a single semiconductor switch may not be able to withstand the steady current of the load. Therefore, conventionally, two relay circuits connected in parallel to each other are provided between a power source and a load, and a semiconductor switch provided in each relay circuit is operated in conjunction with each other, whereby a load current is supplied to two semiconductors. Distributed to switches.

In such a drive circuit, when an abnormality such as overcurrent or overheating occurs in one relay circuit, the semiconductor switch of the relay circuit that is the source of the abnormality is shut off and the semiconductor switch of another relay circuit It is necessary to shut off. For this reason, as described in Japanese Patent Application Laid-Open No. 2006-238635 (Patent Document 1), when the microcomputer detects that one of the relay circuits is cut off, there is a technique for cutting off the other relay circuit. Proposed.

FIG. 1 is a block diagram showing a configuration of a load driving device having a function of shutting off semiconductor switches of all other relay circuits when an abnormality occurs in one of a plurality of relay circuits using a microcomputer. It is. As shown in FIG. 1, each of the

relay circuits

101 and 102 includes FETs (T1) and (T1a), which are connected in parallel to distribute the current flowing through the load RL.

Each of the

relay circuits

101 and 102 includes

input terminals

111 and 115, and also includes

diagnosis terminals

112 and 116. The

input terminals

111 and 115 are connected to the output terminal 121 of the microcomputer 103, and the diagnosis terminals are connected.

Reference numerals

112 and 116 are connected to an input terminal 122 of the microcomputer 103.

When the drive command signal for the load RL is output from the microcomputer 103, the drive command signal is transmitted to the

relay circuits

101 and 102 via the output terminal 121 and the

input terminals

111 and 115. The FETs (T1) and (T1a) are turned on and off. For example, when an abnormality such as overcurrent or overheating occurs in the relay circuit 101, a diagnosis signal (abnormality detection signal) is output from the diagnosis terminal 112, and the diagnosis signal is output from the microcomputer 103 via the input terminal 122. Is input.

When the microcomputer 103 detects the input of the diagnosis signal, the microcomputer 103 stops outputting the drive command signal, shuts off the FETs (T1) and (T1a) of the

relay circuits

101 and 102, and protects the load circuit from overcurrent or overheating. To do.

JP 2006-238635 A

However, in the conventional load drive circuit, when an abnormality occurs in one relay circuit, a diagnosis signal output from the relay circuit is detected by the microcomputer 103, and a drive command signal is controlled by the microcomputer 103. Since the operation is stopped, the configuration becomes large and complicated.

The present invention has been made in order to solve the above-described conventional problems, and the object of the present invention is to provide a simple apparatus configuration and to detect an abnormality in one relay circuit among a plurality of relay circuits. An object of the present invention is to provide a load driving device capable of protecting a load circuit by immediately stopping all relay circuits when a detection signal is generated.

In order to achieve the above object, a first aspect of the present invention includes a relay circuit group in which a plurality of relay circuits including a semiconductor switch and a control circuit for controlling on / off of the semiconductor switch are connected in parallel. The relay circuit group is arranged in an electric path connecting a power source and a load, and the semiconductor switches are operated in conjunction with each other to drive and stop the load. An input terminal to which a control signal changing at the first level and the second level is input, an abnormality detection terminal connected to the input terminal, and the semiconductor switch when the control signal is at the first level. A drive control circuit that outputs a drive signal; and an abnormality control circuit that sets the abnormality detection terminal to a second level when an abnormality occurs in the relay circuit. The force detection terminals are connected to each other, and the abnormality detection terminals are connected to each other. When the drive signal is output to the semiconductor switch in at least one of the relay circuits, the abnormality detection terminal is When the second level is set, the input terminal is set to the second level, and the drive signals of all the relay circuits are cut off.

Each of the relay circuits further includes a current detection sensor that detects a current flowing through the semiconductor switch, and a current determination unit that detects that a current detected by the current detection sensor has reached a preset threshold current. The abnormality control circuit may set the abnormality detection terminal to the second level when the detected current exceeds the threshold current.

The first level may be one of the H level and the L level, and the second level may be the other of the H level and the L level.

In the overcurrent detection device according to the first aspect of the present invention, when an abnormality occurs in at least one of the plurality of relay circuits, the abnormality detection terminal of the relay circuit that is the source of the abnormality, In addition, the abnormality detection terminals of all other relay circuits are set to the second level (for example, L level). Further, since each abnormality detection terminal is connected to the input terminal of each relay circuit, the input terminal is set to the second level, and the semiconductor switch provided in each relay circuit is shut off. Therefore, the entire load circuit can be protected from overcurrent and overheating with a simple configuration without using a device such as a microcomputer.

FIG. 1 is an explanatory diagram showing a configuration of a conventional load driving device. FIG. 2 is a circuit diagram showing a configuration of a load driving device according to an embodiment of the present invention. FIG. 3 is a timing chart showing a change in current flowing through each semiconductor switch and a change in each signal in the load driving device according to the embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 2 is a block diagram illustrating a configuration of an overcurrent detection device according to an embodiment of the present invention.

As shown in FIG. 2, in this load driving device,

relay circuits

11, 11a connected in parallel to each other are provided between a power source VB and a load RL, and FETs provided in the

relay circuits

11, 11a ( The driving and stopping of the load RL are controlled by operating T1) and (T1a) in an on / off manner. That is, the power supply VB (the output voltage is also indicated by the same reference symbol VB) is connected to the power supply terminals TB3 and TB3a of the

relay circuits

11 and 11a, respectively, and the output terminals TB4 and TB4a are connected to one end of the load RL. The other end of the load RL is grounded. Further, the input terminals TB1 and TB1a of the

relay circuits

11 and 11a are connected to a switch circuit (not shown) for controlling the on / off of the FETs (T1) and (T1a), and a control signal is supplied from the switch circuit. Is done. Further, the input terminals TB1 and TB1a are connected to diagnostic terminals (abnormality detection terminals) TB2 and TB2a of the

relay circuits

11 and 11a, respectively.

The relay circuit 11 shown in FIG. 2 includes an N-type MOSFET (T1) (semiconductor switch, hereinafter abbreviated as “FET”) and a current sensor (current detection sensor) 17 that detects a current flowing through the FET (T1). A series connection circuit is provided, the drain of the FET (T1) is connected to the power supply terminal TB3, and one end of the current sensor 17 is connected to the output terminal TB4.

Furthermore, an input determination circuit 14 connected to the input terminal TB1, a drive circuit (drive control circuit) 12 that outputs a drive signal to the gate of the FET (T1), a charge pump 13 that supplies a drive voltage to the drive circuit 12, and A current determination circuit (current determination means) 15 for determining whether or not the detection current Id detected by the current sensor 17 exceeds a preset threshold current Ith, and a diagnosis signal when the detection current Id exceeds the threshold current Ith A diagnostic control circuit (abnormality control circuit) 16 for outputting (abnormality detection signal) and turned on when a diagnostic signal is output from the diagnostic control circuit 16, and the diagnostic terminal (abnormality detection terminal) TB2 is set to L level. N-type MOSFET (T2) (hereinafter abbreviated as FET (T2)), a NOT circuit NOT1, and an AND circuit AND1.

The current sensor 17 is, for example, a shunt resistor, and the current flowing through the FET (T1) (the current flowing from the power supply terminal TB3 to the output terminal TB4) is not affected even during the OFF operation of the FET (T1). This is the type of sensor to be measured.

When the control signal supplied to the input terminal TB1 is at the H level, the input determination circuit 14 determines that the FET (T1) is to be driven and sends the H level signal to one input terminal of the AND circuit AND1. In addition, an output command signal is transmitted to the charge pump 13.

Since the relay circuit 11a has the same configuration as the relay circuit 11, the description of the configuration is omitted. At this time, the suffix “a” is attached to each component of the relay circuit 11a.

Next, the operation of the load driving device according to the present embodiment configured as described above will be described with reference to the timing chart shown in FIG. When a control signal output from a switch circuit (not shown) is switched from L level (second level) to H level (first level) at time t0 shown in FIG. 3, an H level control signal is applied to input terminal TB1. Supplied. Thereby, the input determination circuit 14 transmits an output command signal to the charge pump 13, and outputs an H level signal to one input terminal of the AND circuit AND1.

At this time, the output signal of the current determination circuit 15 is at L level, the output signal of the NOT circuit NOT1 is at H level, and this is supplied to the other input terminal of the AND circuit AND1, so that the output signal of the AND circuit AND1 Becomes H level, and the H level signal is output to the drive circuit 12.

Thereby, the drive circuit 12 outputs the voltage signal output from the charge pump 13 to the gate of the FET (T1), so that the FET (T1) is turned on. Therefore, the current Id flows through the FET (T1). That is, the current Id flows through the path of the power source VB → the power source terminal TB3 → the FET (T1) → the current sensor 17 → the output terminal TB4 → the load RL → the ground. Similarly, the current Ida flows through the relay circuit 11a, and a current obtained by adding the currents Id and Ida flows through the load RL. In other words, the current flowing through the load RL is distributed to the currents Id and Ida and flows through the

relay circuits

11 and 11a, respectively. The load RL is driven by this load current.

In addition, the currents Id and Ida flowing through the FETs (T1) and (T1a) of the

relay circuits

11 and 11a are not uniform, for example, a large amount of current concentrates on the FET (T1), and the FET (T1) at time t1. Is greater than the threshold current Ith, the current determination circuit 15 detects the occurrence of an overcurrent, and the current determination circuit 15 outputs an H level signal. This H level signal is output to the diagnosis control circuit 16 and also output to the negation circuit NOT1.

Therefore, since the output signal of the NOT circuit NOT1 becomes L level and the output signal of the AND circuit AND1 changes to L level, the drive circuit 12 stops outputting the drive signal. Accordingly, the FET (T1) is turned off and the relay circuit 11 is cut off.

Further, the diagnosis control circuit 16 outputs an H level diagnosis signal to the gate of the FET (T2) when the H level signal is supplied, and turns on the FET (T2). As a result, the diagnostic terminal TB2 is grounded to the L level. As a result, at time t1, all the terminals TB1, TB1a, TB2a connected to the diagnosis terminal TB2 are at the L level. That is, since the control signal supplied to the input terminal TB1a of the relay circuit 11a changes from the H level to the L level, the FET (T1a) of the relay circuit 11a is cut off.

In the above example, the operation when an overcurrent occurs in the relay circuit 11 has been described, but the same operation is performed when an overcurrent occurs in the relay circuit 11a. That is, when an overcurrent is generated in the relay circuit 11a, the diagnosis terminal TB2a of the relay circuit 11a becomes L level. Therefore, all the terminals TB1, TB1a and TB2 connected to the diagnosis terminal TB2a become L level. Thus, the FET (T1) of the relay circuit 11 can be cut off.

Thereafter, the input signal is set to the L level at time t2 shown in FIG. At this time, the input determination circuit 14 is latched at the L level and holds the input terminals TB1 and TB1a of the

relay circuits

11 and 11a at the L level even when the input signal is again set at the H level at time t3. When a reset signal (not shown) is input (time t4), the latch is released and the

relay circuits

11 and 11a can be operated again.

As described above, in the load driving device according to the present embodiment, the FETs (T1) and (T1a) are driven when an H level signal is supplied to the input terminals TB1 and TB1a, and one of the relay circuits is provided. When an abnormality occurs (for example, 11), the diagnosis terminal TB2 is set to L level. At this time, since the input terminals TB1 and TB1a and the diagnostic terminals TB2 and TB2a of the

relay circuits

11 and 11a are all connected, these terminals TB1, TB1a, TB2 and TB2a are all at the L level. Therefore, when an abnormality such as overcurrent or overheating is detected in at least one of the

relay circuits

11 and 11a, the FETs (T1) and (T1a) of both the

relay circuits

11 and 11a are immediately cut off. Can do.

Therefore, it is possible to turn off all the

relay circuits

11 and 11a when an abnormality is detected with a simple configuration without executing control using a microcomputer as in the prior art, and the circuit scale can be reduced. it can.

The load driving device of the present invention has been described based on the illustrated embodiment. However, the present invention is not limited to this, and the configuration of each part is replaced with an arbitrary configuration having the same function. Can do.

For example, in the present embodiment, an example in which two

relay circuits

11 and 11a are provided has been described, but the present invention can also be applied to a case in which three or more relay circuits are provided. In the present embodiment, an example in which a rear defogger or the like mounted on a vehicle is used as a load has been described. However, the present invention is not limited to this, and can be applied to a load circuit other than the vehicle.

Furthermore, in the present embodiment, an example has been described in which the input terminals TB1 and TB1a are set to the H level when the FETs (T1) and (T1a) are turned on, and the diagnosis terminals TB2 and TB2a are set to the L level when an abnormality occurs. It is also possible to reverse the H level and the L level. That is, the input terminals TB1 and TB1a can be set to L level when the FETs (T1) and (T1a) are turned on, and the diagnosis terminals TB2 and TB2a can be set to H level when an abnormality occurs.

In this embodiment, the MOSFET is described as an example of the semiconductor switch. However, the present invention is not limited to this, and other semiconductor switches such as an IGBT can be used.

The present invention can be used when a load is driven by connecting a plurality of semiconductor switches in parallel.

Claims

A relay circuit group having a plurality of relay circuits connected in parallel with a semiconductor switch and a control circuit for controlling on / off of the semiconductor switch, and arranging the relay circuit group in an electric circuit connecting a power source and a load, A load driving device that operates the semiconductor switches in conjunction with each other to control driving and stopping of the load,
Each of the relay circuits is
An input terminal to which a control signal changing at the first level and the second level is input;
An abnormality detection terminal connected to the input terminal;
A drive control circuit for outputting a drive signal to the semiconductor switch when the control signal is at the first level;
An abnormality control circuit that sets the abnormality detection terminal to the second level when an abnormality occurs in the relay circuit;
In each of the relay circuits, the input terminals are connected to each other, and the abnormality detection terminals are connected to each other,
In the at least one relay circuit, when the drive signal is output to the semiconductor switch and the abnormality detection terminal is set to the second level, the input terminal is set to the second level, A load drive device that cuts off the drive signals of all relay circuits.
Each of the relay circuits further includes
A current detection sensor for detecting a current flowing through the semiconductor switch;
Current determination means for detecting that the current detected by the current detection sensor has reached a preset threshold current; and
2. The load driving device according to claim 1, wherein the abnormality control circuit sets the abnormality detection terminal to a second level when the detected current exceeds the threshold current. 3.
3. The load driving apparatus according to claim 1, wherein the first level is one of an H level and an L level, and the second level is the other of the H level and the L level.