WO2012027075A3 - Bumpless build-up layer package with a pre-stacked microelectronic devices - Google Patents

Bumpless build-up layer package with a pre-stacked microelectronic devices Download PDF

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Publication number
WO2012027075A3
WO2012027075A3 PCT/US2011/046287 US2011046287W WO2012027075A3 WO 2012027075 A3 WO2012027075 A3 WO 2012027075A3 US 2011046287 W US2011046287 W US 2011046287W WO 2012027075 A3 WO2012027075 A3 WO 2012027075A3
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WO
WIPO (PCT)
Prior art keywords
bumpless build
layer package
microelectronic devices
stacked microelectronic
layer
Prior art date
Application number
PCT/US2011/046287
Other languages
French (fr)
Other versions
WO2012027075A2 (en
Inventor
Pramod Malatkar
Original Assignee
Intel Corporation
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Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of WO2012027075A2 publication Critical patent/WO2012027075A2/en
Publication of WO2012027075A3 publication Critical patent/WO2012027075A3/en

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    • H01L2924/181—Encapsulation
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    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of fabricating microelectronic packages, wherein a first microelectronic device having through-silicon vias may be stacked with a second microelectronic device and used in a bumpless build-up layer package.
PCT/US2011/046287 2010-08-26 2011-08-02 Bumpless build-up layer package with a pre-stacked microelectronic devices WO2012027075A2 (en)

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US12/868,816 US8754516B2 (en) 2010-08-26 2010-08-26 Bumpless build-up layer package with pre-stacked microelectronic devices
US12/868,816 2010-08-26

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WO2012027075A2 WO2012027075A2 (en) 2012-03-01
WO2012027075A3 true WO2012027075A3 (en) 2012-05-18

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US9362253B2 (en) 2016-06-07
US20160276317A1 (en) 2016-09-22
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US9831213B2 (en) 2017-11-28

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