WO2012016496A1

WO2012016496A1 - Clock control method, device and base station for input having multiple reference sources

Info

Publication number: WO2012016496A1
Application number: PCT/CN2011/077687
Authority: WO
Inventors: 崔文会; 邱文才; 何祎
Original assignee: 中兴通讯股份有限公司
Priority date: 2010-08-02
Filing date: 2011-07-27
Publication date: 2012-02-09
Also published as: CN102348275A; CN102348275B

Abstract

A clock control method, device and base station for input having multiple reference sources are provided by the invention, which relates to the mobile communication field. In the method, device, and base station, a first reference source for local clock synchronization is selected from a plurality of reference sources; and the current clock control parameter of said local clock is obtained; according to the current clock control parameter, a first clock control parameter is calculated using the first reference source; said first clock control parameter is used for local clock synchronization adjustment; the local clock is adjusted step-by-step according to the first clock control parameter, so as to synchronize the local clock with the first reference source. The method, device and base station of the invention ensure that when handover occurs among a plurality of reference sources, the local clock can transition smoothly from the original reference source clock synchronization to the new reference source synchronization.

Description

Clock control method, device and base station for multiple reference source input

The invention belongs to the field of mobile communications, and in particular relates to a clock control method, device and base station for multiple reference source inputs. Background technique

If the base station is working properly, it must synchronize with the clock of the transmission device or the clock of the upper base station. For the base station to complete the clock synchronization with the transmission device, the reference source of the transmission device input to the base station must be received, and the input reference source is used to synchronize with the local clock to complete the tasks and tasks of the subsequent base station.

However, because different countries, different regions, different environments, and different operators use different transmission devices, the reference source that the transmission device can provide to the base station has various forms, for example,

GPS (Global Positioning System) clock reference source, line clock reference source (including line clock, can be divided into external 2Mbps, external 2MHz and transmission line recovery clock, etc.), syncE reference source, support IEEE1588 protocol reference source and microwave signal Reference source, etc. Depending on the actual transmission equipment of each operator of the base station, the operator may provide one or more reference sources for the base station to use, for example, only provide a GPS clock reference source, or provide both a line clock and IEEE1588 reference sources.

Since the local clock is continuously synchronized with the selected reference source, that is, when the reference source changes, the local clock necessarily changes with the reference source. In order to ensure the normal operation of the base station, when the reference source is switched, it is necessary to ensure that the local clock is synchronized from the original reference source clock and smoothly transition to synchronize with the new reference source.

However, there is no related art solution in the prior art for how to control the local clock when switching occurs between multiple reference sources. Summary of the invention

In order to solve the above problems, an object of the present invention is to provide a multi-reference source input clock control method, apparatus and base station, which ensure that when a switchover occurs between multiple reference sources, the local clock is synchronized from the original reference source clock, smoothing Excessively synchronized with the new reference source.

In order to achieve the above object, the technical solution of the present invention is achieved as follows:

A clock control method for multiple reference source inputs, comprising: selecting a first reference source for local clock synchronization from a plurality of reference sources, and acquiring current clock control parameters of the local clock; according to the current clock Controlling parameters, and calculating a first clock control parameter by using the first reference source, and performing step adjustment on the local clock to synchronize the local clock with the first reference source.

The first reference source is: a reference source selected from the plurality of reference sources according to the switching policy when a switching policy between each of the plurality of reference sources set in advance is satisfied.

The switching policy between the reference sources includes: a reference source switching according to a configuration priority switching policy, a reference source switching policy according to a configuration order, a reference source according to a currently available non-switching policy, and a reference source arbitrarily maintaining a switching policy. Or a variety.

When the first reference source is abnormal, the method further includes: activating a second reference source of the multiple reference sources according to a switching policy between the reference sources, and deactivating the first Determining, according to the first clock control parameter, a second clock control parameter for performing synchronous adjustment on the local clock by using the second reference source, and performing step adjustment on the local clock according to the step The local clock is synchronized with the second reference source.

The method further includes: pre-setting a reference source internal processing policy for each of the plurality of reference sources.

The reference source internal processing strategy includes: one or more of a reference source internal abnormal jitter policy, a reference source internal abnormality determination detection strategy, a reference source internal state transition strategy, and a reference source internal control stepping strategy. The method further includes: determining whether a reference source is available among the plurality of reference sources, and if not, the local clock is free to run; if so, selecting the first reference source and acquiring the clock control parameter.

A multi-reference source input clock control device includes:

a main control module, configured to select, from a plurality of reference sources, a first reference source for local clock synchronization, and obtain a current clock control parameter of the local clock;

a clock module, configured to calculate, by using the first reference source, a first clock control parameter according to the current clock control parameter;

a hardware module, configured to generate the local clock;

And an execution module, configured to perform step adjustment on the local clock according to the first clock control parameter, to synchronize the local clock with the first reference source.

The clock module includes:

a reference source configuration interface, configured to receive configuration information of each reference source delivered by the main control module, and a reference source internal processing policy of each reference source;

a reference source state detecting unit, configured to use the reference source internal processing strategy, and the result of the reference source and the local clock synchronization operation to determine whether the current reference source state is normal;

a clock control parameter calculation unit, configured to calculate a clock control parameter used for synchronous adjustment of the local clock;

The state transition processing unit is configured to control the state transition of the local clock during the synchronization of the local clock with the reference source.

The hardware module includes:

a clock circuit, configured to generate the local clock;

a reference source selection unit, configured to select a valid reference source from the plurality of reference sources; a logic processing operation unit, configured to calculate each according to input information of each reference source, input information of the local clock, and configuration information of the reference source Reference source operation related information The subsequent call of the clock module.

The main control module is further configured to: when the first reference source is abnormal, activate a second reference source of the multiple reference sources according to a switching policy between the reference sources, and deactivate the first a reference source;

The clock module is further configured to calculate a second clock control parameter by using the second reference source according to the first clock control parameter; the second clock control parameter is used for synchronously adjusting a local clock;

The execution module is further configured to perform step adjustment on the local clock according to the second clock control parameter, so that the local clock is synchronized with the second reference source.

The device further includes: an acquisition module, configured to collect state information of the reference source, and feed back the collected state information to the main control module.

The device further includes: a configuration module, configured to preset a switching policy between each of the plurality of reference sources, and a reference source internal processing for presetting each of the plurality of reference sources The policy, and the switching policy between the reference source and the reference source internal processing policy are sent to the main control module.

The device is disposed in a base station.

According to the foregoing technical solution, when clock control of the multi-reference source input is performed, the current clock control parameter of the local clock is obtained, and then the clock control is calculated by using the selected reference source (the activated reference source) according to the current clock control parameter. Parameters, and then step-adjust the local clock according to the calculated clock control parameters, so that the local clock is synchronized with the selected reference source, because during the clock control, the activated reference source always puts the previous reference source to the local clock. The relevant clock control parameters are acquired, and the synchronization adjustment is performed on the basis, so that when the reference source is switched, the original reference source clock can be synchronized, smoothed to synchronize with the new reference source, and localized. The output clock of the crystal oscillator of the clock is stable, which effectively ensures the output quality of the local clock. Secondly, the switching policy between each reference source in the multiple reference sources is preset, and the switching policy is applied to the specific reference source switching process, thereby implementing effective management of multiple reference sources, which can enable The reference source switches according to the user's policy requirements;

Finally, the reference source internal processing strategy of each of the multiple reference sources can be set, and the reference source internal processing strategy can be effectively managed by referring to the source internal processing strategy. DRAWINGS

1 is a flowchart of a clock control method for multiple reference source inputs in an embodiment of the present invention; FIG. 2 is a schematic diagram of a state transition in a embodiment of the present invention (transition strategy 1);

3 is a schematic diagram of a state transition in a embodiment of the present invention (transition strategy 2);

4 is a schematic structural diagram of a clock control apparatus for multi-reference source input according to an embodiment of the present invention; and FIG. 5 is a schematic structural diagram of a hardware module according to an embodiment of the present invention. detailed description

In this embodiment, when performing clock control of the multi-reference source input, first acquiring the current clock control parameter of the local clock, and then calculating the clock control parameter according to the current clock control parameter and using the selected reference source, and then according to The calculated clock control parameter adjusts the local clock step by step to synchronize the local clock with the selected reference source. When an abnormality occurs in the selected reference source, it can be from multiple reference sources according to a preset reference source policy. Select a valid reference source to complete the switching process between reference sources.

In this embodiment, in order to effectively manage multiple reference sources, the reference source policy may be preset. Of course, the reference source strategy can also be set or adjusted during actual use. The reference source policy can be divided into a common policy and a dedicated policy. The public policy is mainly for a switching policy between each reference source in multiple reference sources, and the dedicated policy is mainly a reference source internal processing policy for each reference source.

The switching policies between the above reference sources include: Reference source switching is cut according to the configuration priority The switching policy, the reference source switch policy according to the configuration order, the reference source according to the currently available non-switching policy, the reference source arbitrarily maintaining the switching policy, and other customized reference source switching policies, where

1) The reference source according to the configuration priority switching policy refers to the policy of switching according to the priority configured by the user, that is, the reference source is normal, and the reference source with high priority is preferentially selected as the current valid reference source.

2) The reference source switches the policy according to the configuration order. It refers to the policy of switching according to the user configuration order, that is, the reference source is normal, and the first configured reference source is preferentially selected as the current valid reference source.

3) The reference source currently available without switching policy means that if two reference sources are coexisted at the same time, reference source A and reference source B, reference source A has a higher priority, reference source B has a lower priority, and both reference sources are normal. Then, the base station first selects the reference source A as the current active reference source, and when the reference source A is abnormal, switches to the reference source B, the reference source B becomes the current active reference source, and the reference source A becomes the inactive reference source, and when the reference source When A returns to normal, reference source B is also kept as the reference source of the current selection without switching to reference source A.

4) The reference source arbitrarily maintains the switching strategy. After the reference source is abnormal, the reference source does not choose to switch to other available reference sources, and still maintains the current reference source.

Certainly, the specific content of the switching policy between the reference sources is not limited in this embodiment, and the foregoing switching policy may be set according to actual conditions.

The above reference source internal processing strategies include: reference source internal anomaly dithering strategy, reference source internal anomaly determination detection strategy, reference source internal state transition strategy, reference source internal control stepping strategy, and the like. For each reference source internal processing strategy, there is a default initial state for different reference sources. For each reference source internal processing policy for the reference source, the reference source will remain the default initial policy execution if the user does not reconfigure.

1) The reference source internal abnormal jitter strategy is mainly to prevent the abnormal jitter from being repeated, that is, to set the abnormal jitter processing. For example, after the abnormal jitter duration TO seconds, the reference source reports an abnormality. When the reference source is restored, the reference source is reported to be normal for a duration of T1 seconds. With the above settings, it is possible to prevent constant switching between reference sources;

2) Reference source internal anomaly determination detection strategy, mainly the threshold of the alarm and the criterion of the determination, for example, the number of satellites in the GPS is used as the threshold or criterion for the reference source anomaly, or the phase or frequency difference of the reference source is used as the criterion. Wait;

3) The transition strategy of the internal state of the reference source refers to the transition strategy of several states or links in the process of synchronization between the local clock and the reference source. The local clock state transition condition can be re-established according to the actual working conditions of the reference source. Definition and division. For example, free running, fast catching, tracking, maintaining, etc., or transition conditions between links are redefined;

4) The control stepping strategy inside the reference source refers to the stepping control in the process of synchronizing the reference source with the local clock. It should be adjusted according to the actual situation. If the stability of the clock is not high, the stepping can be increased, so that Save synchronization time. If the clock stability requirements are high, the stepping can be reduced, but it takes time to synchronize.

Certainly, the specific content of the internal processing strategy of the reference source is not limited in this embodiment, and the internal processing strategy of the reference source may be set according to actual conditions.

In order to make the objects, the technical solutions and the advantages of the embodiments of the present invention more comprehensible, the embodiments of the present invention will be described in detail below with reference to the embodiments. The illustrative embodiments and the description of the present invention are intended to be illustrative of the invention, but are not intended to limit the invention.

Referring to FIG. 1 , which is a flow chart of a clock control method for multiple reference source inputs according to an embodiment of the present invention, the specific steps are as follows:

Step 101: Select a first reference source for local clock synchronization from multiple reference sources. Before performing this step, a switching policy between each reference source of the multiple reference sources may be preset, the first reference source. A reference source selected from a plurality of reference sources according to the switching policy when the switching policy is satisfied. By setting a switching policy, it is possible to effectively manage multiple reference sources. See the description above for an introduction to the switching strategy. In fact, before performing step 101, it may be determined whether there is a reference source available among the plurality of reference sources (for example, according to status information of the reference source), and if not, the local clock is free to run; otherwise, step 101 is performed.

Step 102: Acquire a current clock control parameter of the local clock.

The above clock control parameters may be related parameters for controlling the clock crystal.

It should be noted that there is no strict chronological order between step 101 and step 102. Step 103: Calculate a first clock control parameter according to a current clock control parameter, and calculate a first clock control parameter, where the first clock control parameter is used to perform synchronization adjustment on the local clock. In this embodiment, the foregoing The first clock control parameter can be a related parameter for controlling the clock crystal. By combining the current clock control parameters of the local clock to obtain the clock control parameters for synchronization adjustment, the original reference source clock can be synchronized, smoothed out, and synchronized with the new reference source. After the first clock control parameter is obtained, the parameter can be recorded for use in subsequent steps.

Step 104: Perform step adjustment on the local clock according to the first clock control parameter, so that the local clock is synchronized with the first reference source;

In this embodiment, each reference source has a default control stepping strategy. Of course, the amplitude of the step can be adjusted according to the actual situation, and the output of the local clock is balanced and stabilized by step adjustment.

Step 105: When an abnormality occurs in the first reference source, activate a second reference source of the multiple reference sources according to a switching policy between the reference sources, and deactivate the first reference source;

In this embodiment, the status information of each reference source may be acquired by the acquisition module. When an abnormality is found in the current active reference source, step 105 may be performed to select other valid reference sources.

Step 106: Calculate a second clock control parameter according to the first clock control parameter, and use the second reference source, where the second clock control parameter is used to perform synchronous adjustment on the local clock.

That is, after the reference source switching, the local clock control adjustment needs to be performed on the basis of the last clock control parameter. Certainly, when an abnormality occurs in the second reference source, other reference sources may be selected from the plurality of reference sources according to the processing flow in steps 105-107 as a synchronous reference source of the local clock.

According to the foregoing technical solution, when clock control of the multi-reference source input is performed, the current clock control parameter of the local clock is obtained, and then the clock control is calculated by using the selected reference source (the activated reference source) according to the current clock control parameter. Parameters, and then step-adjust the local clock according to the calculated clock control parameters, so that the local clock is synchronized with the selected reference source, because during the clock control, the activated reference source always puts the previous reference source to the local clock. The relevant clock control parameters are acquired, and the synchronization adjustment is performed on the basis, so that when the reference source is switched, the original reference source clock can be synchronized, smoothed to synchronize with the new reference source, and localized. The output clock of the crystal oscillator of the clock is stable, which effectively ensures the output quality of the local clock.

Secondly, the switching policy between each reference source in the multiple reference sources is preset, and the switching policy is applied to the specific reference source switching process, thereby implementing effective management of multiple reference sources, which can enable The reference source switches according to the user's policy requirements;

Finally, the reference source internal processing strategy of each of the multiple reference sources can be set, and the reference source internal processing strategy can be effectively managed by referring to the source internal processing strategy.

In this embodiment, the transition strategy of the reference source internal state in the reference source internal processing strategy is shown in FIG. 2 and FIG. In Fig. 2, when the initial state of the local clock is "free running", when the condition Α is satisfied, the state of the local clock transitions to "fast catch"; in the "fast catch" state, when the condition C is satisfied, the state Transition to "tracking", when condition B is satisfied, the state transitions to "free running"; in the "tracking" state, when condition E is satisfied, the state transitions to "hold", when condition D is satisfied, the state transitions to " Fast catch"; In the "hold" state, when condition F is satisfied, the state transitions to "tracking". In Fig. 3, assuming that the initial state of the local clock is "free running", when the condition A is satisfied, the state of the local clock transitions to "fast catch"; in the "fast catch" state, when the condition B is satisfied, the state transitions to "" Free running", when condition C is satisfied, the state transitions to "tracking"; in "tracking, state, when condition D is satisfied, state transitions to "fast catch", when condition E is satisfied, state transitions to "hold" When the condition G is satisfied, the state transitions to "free running"; in the "hold" state, when the condition F is satisfied, the state transitions to "tracking", and when the condition H is satisfied, the state transitions to "free running".

4 is a schematic diagram showing the structure of a multi-reference source input clock control apparatus according to an embodiment of the present invention. The clock control apparatus includes:

The main control module 401 is configured to select a first reference source for local clock synchronization from the plurality of reference sources, and obtain a current clock control parameter of the local clock;

The clock module 402 is connected to the main control module 401, configured to calculate a first clock control parameter by using the first reference source according to the current clock control parameter, where the first clock control parameter is used for a local clock Make synchronization adjustments;

The hardware module 403 is connected to the clock module 402 for generating the local clock. The execution module 404 is connected to the clock module 402 and the hardware module 403, and is configured to step the local clock according to the first clock control parameter. Adjusting to synchronize the local clock with the first reference source.

In another embodiment of the present invention, the main control module 401 is further configured to activate the first one of the multiple reference sources according to a switching policy between each reference source when an abnormality occurs in the first reference source. Two reference sources, and deactivating the first reference source;

The clock module 402 is further configured to: according to the first clock control parameter, calculate a second clock control parameter by using the second reference source, where the second clock control parameter is used for synchronous adjustment of a local clock;

The execution module 404 is further configured to: pair the local clock according to the second clock control parameter Step adjustment is performed to synchronize the local clock with the second reference source.

In another embodiment of the present invention, the clock control apparatus further includes:

The acquisition module 405 is connected to the clock module 402 and the main control module 401, and is used for collecting state information of the reference source, and feeding back the collected state information to the main control module 401;

The configuration module 406 is connected to the main control module 401, configured to preset a switching policy between each of the plurality of reference sources, and a reference source internal processing for presetting each of the plurality of reference sources The policy, and the switching policy between the reference source and the reference source internal processing policy are sent to the main control module 401.

In another embodiment of the present invention, the clock module 402 includes:

a reference source configuration interface, connected to the main control module 401, configured to receive configuration information of each reference source sent by the main control module 401, and a reference source internal processing strategy of each reference source; a reference source state detecting unit, It is used to determine whether the current reference source is in a normal state by using the reference source internal processing strategy and the result of the reference source and the local clock synchronization operation;

Referring to FIG. 5, it is a schematic structural diagram of a hardware module according to an embodiment of the present invention, where the hardware module includes:

The clock circuit 501 is connected to the execution module 404 for generating a local clock; the reference source selection unit 502 is configured to select a valid reference source from a plurality of reference sources; for example, the reference source can be used according to a preset switching policy. Selection, set the selected reference source to activate the reference source, and send the relevant information of the activated reference source to the logical processing unit

503. Perform correlation calculation by the logic processing unit 503. The logic processing operation unit 503 is respectively connected to the clock circuit 501 and the reference source selection unit 502, and is configured to calculate each reference source according to the input information of each reference source, the input information of the local clock, and the configuration information of the reference source. The information related to the operation is subsequently called by the clock module.

Continue to Figure 4. In this embodiment, the main control module 401 is configured to complete the pre-configured related configuration information (such as the priority of the reference source, the type of the reference source, and the like) in the configuration module 406, and the slave module 402 is The various information collected by the clock module 402 (for example, reference source status, reference source alarm, etc.) is processed, and finally combined with the configuration information and the collected information to achieve switching control of the multi-input reference source.

The foregoing collecting module 405 is configured to collect and report the status information of each reference source to the main control module 401, and the main control module 401 processes the information.

The clock module 402 includes a plurality of reference source modules, and the reference source module is configured to complete processing for each reference source. The functions of each reference source module include: 1) a reference source configuration interface function (corresponding to a reference source configuration interface;) 2) reference source state detection function (corresponding to reference source state detection unit); 3) calculation of execution clock control parameters synchronized between each reference source and local clock (corresponding to clock control parameter calculation unit); 4) reference State transition policy processing of the source and local clock synchronization process (corresponding to the state transition processing unit);

The reference source configuration interface is configured to receive configuration information of each reference source that is sent by the main control module 401, and a reference source internal processing policy of each reference source;

The reference source state detecting unit mainly provides a conclusion that the current reference source is normal or abnormal according to the internal processing strategy of the reference source configured by the user, combined with the actual reference source and the local clock synchronization operation. The reference source anomaly can be divided into two cases, one: the reference source loss anomaly, and the second: the reference source degraded anomaly (the reference source quality cannot meet the available reference source standard or threshold).

The clock parameter calculation unit calculates a clock control parameter for synchronously adjusting the local clock. In order to synchronize the local clock with the reference source, the local clock needs to be adjusted accordingly. The clock control parameter calculation unit is a parameter to be adjusted by the real-time output hardware module 403 (for example, a clock crystal oscillator);

The state transition processing unit is configured to perform mutual transfer processing of several states or links defined in the process of synchronizing the local clock with the reference source. For example, the local clock can be defined as a transition condition between free running, fast catching, tracking, holding, etc.; if the user does not redefine the transition condition, the reference source retains the initial transition definition. See Figure 2 and Figure 3 for the state transition strategy.

The execution module 404 controls the hardware module 403 according to the clock control parameters calculated by the clock module 402, so that the local clock output by the hardware is synchronized with the reference source.

Among the related information of the obtained reference sources of the clock module 402, only the currently active reference source has the right to use the execution module 404 (that is, the local clock control adjustment according to the activated reference source), and other There is no permission if the reference source is not activated. That is, when a reference source is activated, the reference source will take over control of the execution module 404. When a reference source is deactivated, the reference source will lose control of the execution module 404 and return to the initial state of the reference source;

The hardware module 403 includes: a clock circuit 501 that generates a local clock, a reference source selection unit 502 that inputs each reference source, and a logical operation processing unit 503. See Figure 5 for details. The clock circuit 501 generating the local clock outputs a corresponding local clock according to the clock control parameter transmitted by the execution module 404;

The reference source selection unit 502, for example, selects a valid reference source from the reference source A, the reference source B, and the reference source X to make the reference source input valid, for example, may be selected according to a switching policy between each of the plurality of reference sources. ;

The logic processing operation unit 503 has three input ports and one output port, and the three input ports are respectively a reference source input port, an input port of a local clock, and an input port of configuration information, and a combination of the three input information is logically processed. The operation unit 503 will pass a series of logic The processing operations are performed to output basic information required for each reference source operation for subsequent processing by the clock module 402.

The following describes how the clock control apparatus of the present invention implements clock control under a plurality of reference source input conditions by way of a specific embodiment.

Assume that the currently configured reference sources include: Reference Source A, Reference Source B, and Reference Source X. The public policy of the reference source selects the priority switching policy, and the priorities are PI, P2, and P3, respectively, and P1>P3>P2. For the dedicated policy of the reference source, reference source A selects the default dedicated policy, reference source B selects the reference source internal abnormal jitter policy (according to the policy, configuration parameters TO and T1), other defaults (default step parameter is S), reference source X Select the control step strategy (configure step control parameter M), other defaults. Through the configuration module 406, the relevant configuration information of the reference source and the switching policy can be delivered to the main control module 401. The main control module 401 first sorts according to the priority, and ranks the highest priority in the forefront of the rotation training, for example, reference source A, reference source X, and reference source B. The master module 401 also passes the configuration information of each reference source, as well as the dedicated policy, to the clock module 402. The clock module 402 starts executing the corresponding processing according to the above configuration information and a dedicated policy.

At the same time, the module 405 is collected, and the status information of each reference source is continuously collected and provided to the main control module 401. The main control module 401 determines the valid reference source according to the status information of each reference source provided by the acquisition module 405, and records the reference source as the reference source to be activated.

Assuming reference source A is selected, reference source A will be activated while having control of hardware module 403. While exercising the control right, the reference source A will first obtain the current clock control parameter P0 from the execution module 404, and the reference source A will obtain the clock control parameter PA (PA according to the reference source A algorithm based on the clock control parameter P0. It is not a fixed value), and the hardware module 403 is step-adjusted by the clock control parameter, thereby achieving the goal that the reference source A is gradually synchronized with the local clock. Since the reference source A adopts the default control stepping strategy (configure step control parameter S), the absolute value of the difference between the new PA and the previous PA formed each time is less than S. The operation process in the reference source may be: the reference source A first obtains the current clock control parameter P0 from the execution module 404, The reference source A is input into the logic of the hardware module, and the local clock performs phase or band comparison with the reference source A in the logic, and outputs the difference parameter, which is continuously calculated by the difference parameter, the original control parameter P0, and the algorithm formula. PA.

If an abnormality occurs in the reference source A, since the reference source A is not configured with a dedicated policy, the reference source A is immediately deactivated by the main control module 401, thereby losing control of the hardware module 403. While losing control, reference source A will save the current clock control parameters of hardware module 403, denoted as Pl.

The master module 401 will reselect the available reference source, then the reference source X will be selected. If the reference source X is working properly, the reference source X acquires control of the execution module 404 while the reference source X is activated. The reference source X obtains the clock control parameter P1, then the reference source X is activated instead of the reference source A. Based on the algorithm of the reference source X on the basis of P1, the clock control parameter Px is obtained, and the hardware module 403 is adjusted according to the clock control parameter. , thereby achieving the goal that the reference source X is gradually synchronized with the local clock. Since the reference source X adopts the control stepping strategy (configure step control parameter M), the absolute value of the difference between the value of the new PA formed each time and the previous PA value is less than M.

Through the common policy between the system configuration reference source and the dedicated policy of the reference source itself, the reference source can be switched according to the user's policy requirements, and since the reference source to be activated is always the last reference source pair during the handover process. The clock control parameter of the hardware module 403 is obtained, and the control adjustment of the hardware module 403 is performed on the basis, and the parameter amplitude adjusted by the hardware module 403 is limited (that is, each reference source has a default control stepping strategy, and may also be The actual situation adjusts the amplitude of the step), so that when switching between multiple reference sources, the output of the local clock is guaranteed to be smooth and stable, and the output quality of the local clock during the reference source switching is ensured.

Next, in this embodiment, after the reference source configuration and the policy configuration are completed, how the reference source is switched, and how various policies are effective.

For example: Clock module 402 obtains the following reference source 2Mbps/2MHz/GPS/SyncE configuration The information, while the dedicated policy has also taken effect, each reference source will have corresponding settings for the hardware module 403 to ensure that the hardware module 403 can provide basic processing information for each reference source of the clock module 402.

After the reference source is configured, the initial state of each configured reference source is considered normal. At this time, the main control module 401 will be based on a common policy, for example: priority switching policy and reference source currently available no switching policy (for GPS) Clock reference source) to select the appropriate reference source as the reference source to be activated.

Since the reference source 2 Mbps is at the top, the reference source 2 Mbps is selected as the current active reference source, which has control over the execution module 404, which first acquires the initial clock control parameter P0 held by the execution module 404. At the same time, the acquisition module 405 performs a status query on each reference source according to the ordering rules to ensure that the common policy of the signal source can be executed normally.

For each reference source internal, the internal transition strategy of the reference source of 2 Mbps can be converted according to the state transition conditions shown in Figure 2. Other proprietary strategies, keep the default. During operation, the reference source 2Mbps will show the status of the reference source, such as the current transition state, and the normal or abnormal of the current reference source. There are two types of reference source 2Mbps anomalies: reference source loss and reference source degradation.

For the internal transition strategy of the reference source of 2MHz, the transition can be performed according to the state transition condition shown in Figure 3. Other proprietary strategies, keep the default. Other same reference source 2Mbps.

For the GPS clock reference source, when searching for stars, continuous TO time, when the number of satellites is less than 4, the GPS clock reference source reports an abnormality. When the number of satellites is greater than or equal to 4 for consecutive T1 time, the GPS clock reference source reports normal.

For the reference source SyncE, it is executed according to the default dedicated policy.

After obtaining the control right of the execution module 404 for the reference source 2 Mbps, the P2mbps control parameter is calculated in real time according to the reference source 2 Mbps algorithm on the clock control parameter P0 base, and the clock circuit of the hardware module 403 is executed by the execution module 404. 501 is configured to make the clock The local clock output of circuit 501 is synchronized with the reference source 2 Mbps. It should be noted that the actual configuration parameters of the hardware module 403 are calculated as follows: the absolute value p of the adjacent two P2mbps difference values, if p is greater than or equal to the default step value S, the configuration parameter is S, otherwise configuration The parameter is p.

Unplug the reference source 2 Mbps input or otherwise leave the reference source 2 Mbps in an abnormal state. Then, after TO seconds (60s), the main control module 401 deactivates the reference source 2Mbps, and the execution module 404 reserves the clock control parameter as P1.

Since the state of the reference source 2 MHz is normal, the main control module 401 selects the reference source 2 MHz as the current active reference source, then the reference source 2 MHz will acquire the control right of the execution module 404, and simultaneously acquire the clock control parameter P1, according to the reference. The source 2 MHz algorithm calculates the P2MHz control parameters in real time, and performs the step parameter configuration on the clock circuit 501 of the hardware module 403 through the execution module 404, so that the local clock output of the clock circuit 501 is synchronized with the reference source 2 MHz.

Unplug the reference source from the 2MHz input or otherwise leave the reference source 2MHz in an abnormal state. Then, after 10 seconds (the default jitter processing policy), the reference source 2MHz reports an exception, the acquisition module 405 will report the abnormality to the main control module 401, the main control module 401 will deactivate the reference source 2MHz, and reclaim the reference source 2Mhz to the execution module. Control of 404, while execution module 404 reserves the clock control parameter as P2.

If the reference source 2 Mbps returns to normal at this time, the main control module 401 will reselect the reference source 2 Mbps as the current active reference source.

If the reference source 2 Mbps is still in an abnormal state at this time, since the GPS clock reference source state is normal at this time, the main control module 401 selects the GPS clock reference source as the current active reference source, then the GPS clock reference source acquires the execution module 404. The control right is obtained, and the control parameter of the execution module 404 is obtained as P2. Then the GPS clock reference source, according to the algorithm of the GPS clock reference source, calculates the PGPS clock control parameter in real time, and executes the module 404 to the hardware module. The clock circuit 501 of block 403 performs step parameter configuration to synchronize the local clock output of clock circuit 501 with the GPS clock reference source.

If the reference source 2Mbps/2MHz is restored to normal at this time, because the user has set a common policy: The reference source is currently available without switching policy (for the GPS clock reference source), that is, as long as the GPS clock reference source is available, then it will not Switching to the task reference source, the master module 401 will perform the reselection of the reference source in sequence unless the GPS clock reference source is not available.

As long as the reference source 2Mbps/2MHz/GPS is not available, then the reference source SyncE may be selected by the master module 401 as the currently active reference source.

Throughout the entire operation process, as large as each switching process, as small as the application of each dedicated strategy, the flexibility and operability of the reference source switching are presented to varying degrees, and the control parameters are also constantly referenced. During the switching, the hardware module 403 is always adjusted according to the set stepping strategy on the original basis to ensure the stability of the local clock output.

The specific switching procedure of the reference source in the embodiment of the present invention will be described below with reference to FIG. 1 and FIG. 4. After the user configures various switching policies of the reference source, the reference source will run according to the configured switching policy, and the collecting module 405 collects the information of each configuration reference source state in real time and provides the information to the main control module 401. The main control module 401 selects the best valid reference source according to each reference source state and the switching strategy. If not currently optimal, the clock circuit 501 of the hardware module 403 will run freely without being controlled by any reference source.

If there is currently a best valid reference source, the main control module 401 determines whether the currently activated reference source is the best valid reference source, and if not, deactivates the current reference source, activates the currently best valid reference source, and obtains The current control parameters of module 404 and the control of control module 404 are performed. If yes, the currently active reference source continues to run. After the activation reference source has the control right of the execution module 404, the clock control parameter is calculated according to the algorithm of the reference source, and the clock output of the hardware module 403 is stepwise adjusted in combination with the control parameter step of the reference source.

Reference source commonly used by base stations, GPS clock reference source, reference source 2Mbps, reference source 2MHz, line clock (E1/T1/STM1), reference source IEEE588, reference source SyncE, etc. Suppose the user selects the reference source 2Mbps/2MHz/GPS/SyncE clock as the input reference source of the base station. The selected common policy is the priority switching policy and the reference source currently available non-switching strategy (for GPS clock reference source), reference source 2Mbps priority. 0, the reference source 2MHz priority is 0, the GPS clock reference source priority is 1, and the reference source SyncE priority is 2. That is, the reference source 2 Mbps and the reference source 2 MHz priority are greater than the GPS clock reference source, the reference source 2 Mbps and the reference source 2 MHz have the same priority, and the GPS clock reference source priority is greater than the reference source SyncE. For the case where the reference source 2 MHz and the reference source 2 Mbps have the same priority, the main control module 401 processes it by itself, and then assumes that the final priority order of the main control module 401 is the reference source 2 Mbps, the reference source 2 MHz, the GPS clock reference source, and Reference source SyncE.

For the reference source 2Mbps selected dedicated strategy: reference source internal state transition strategy, the specific strategy is the reference source just activated, the local clock state transition conditions are shown in Figure 2. For other dedicated strategies, the default policy is adopted (for example, the control parameter step is S, the 10s is abnormal, the reference source is abnormal, the 20s is normal, and the reference source is normal).

For the reference source 2Mbps selected dedicated strategy: reference source internal state transition strategy, the specific strategy is the reference source just activated, the local clock state transition conditions are shown in Figure 3. For other dedicated strategies, the default policy is adopted (for example, the control parameter step is S, the 10s is abnormal, the reference source is abnormal, the 20s is normal, and the reference source is normal).

The dedicated strategy for the GPS clock reference source: 1) Reference source internal anomaly detection detection strategy (ie, GPS search star is greater than or equal to 4 is normal, less than 4 is abnormal); 2) Reference source internal abnormal jitter strategy, that is, continuous TO (60s) When the second is abnormal, the GPS will report an abnormality. When the continuous Tl (120s) is normal, the GPS will report normal. For other proprietary strategies, the default policy is used (for example, the control parameter step is s ).

For the dedicated strategy selected by the reference source SyncE, the default is adopted (for example, the control parameter step is S, the 10s is abnormal, the reference source is abnormal, the 20s is normal, and the reference source is normal). The main control module 401 obtains the reference source configuration information and the common policy configuration information, and the main control module 401 transmits the reference source configuration information and the reference source-specific policy configuration information to the clock module 402, and the configuration reference source of the clock module 402 acquires the configuration. After the information and the dedicated configuration policy, the hardware module 403 is correspondingly set.

A base station is further provided in an embodiment of the present invention, including:

a clock module, configured to be connected to the main control module, configured to calculate a first clock control parameter by using the first reference source according to the current clock control parameter, where the first clock control parameter is used for a local clock Make synchronization adjustments;

a hardware module, connected to the clock module, for generating the local clock;

And an execution module, connected to the clock module and the hardware module, configured to perform step adjustment on the local clock according to the first clock control parameter, so that the local clock is synchronized with the first reference source.

In another embodiment of the present invention, the main control module is further configured to: when an abnormality occurs in the first reference source, activate a first one of the multiple reference sources according to a switching policy between each reference source Two reference sources, and deactivating the first reference source;

The clock module is further configured to: according to the first clock control parameter, calculate a second clock control parameter by using the second reference source, where the second clock control parameter is used to perform synchronous adjustment on a local clock;

The above description is only a preferred embodiment of the present invention, and it should be noted that those skilled in the art can also make several improvements and retouchings without departing from the principles of the present invention. It is considered as the scope of protection of the present invention. Industrial applicability

The multi-reference source input clock control method, device and base station of the present invention select a first reference source for local clock synchronization from a plurality of reference sources; and acquire current clock control parameters of the local clock; a current clock control parameter, using the first reference source to calculate a first clock control parameter; the first clock control parameter is used for synchronously adjusting a local clock; and the local clock is configured according to the first clock control parameter Step adjustment is performed to synchronize the local clock with the first reference source. The method, device and base station of the invention ensure that when a switchover occurs between multiple reference sources, the local clock is synchronized from the original reference source clock, smoothed out to synchronize with the new reference source.

Claims

Claim

1. A clock control method for multiple reference source inputs, the method comprising:

Selecting a first reference source for local clock synchronization from a plurality of reference sources, and acquiring current clock control parameters of the local clock;

Determining, according to the current clock control parameter, a first clock control parameter by using the first reference source, and performing step adjustment on the local clock to synchronize the local clock with the first reference source. .

2. The method according to claim 1, wherein the first reference source is: when a handover policy between each reference source of the plurality of reference sources set in advance is met, according to the handover policy from the multiple The reference source selected from the reference sources.

3. The method according to claim 2, wherein the switching policy between the reference sources comprises: a reference source switching according to a configuration priority switching policy, a reference source switching policy according to a configuration order, and a reference source not switching according to a current available state. The policy and reference source arbitrarily maintain any one or more of the switching policies.

The method of claim 2, wherein when the first reference source is abnormal, the method further includes:

Deactivating a second one of the plurality of reference sources and deactivating the first reference source according to a switching policy between the reference sources;

Determining, by using the second reference source, a second clock control parameter for performing synchronization adjustment on the local clock according to the first clock control parameter, and performing step adjustment on the local clock, so that the local clock is Synchronized with the second reference source.

The method according to any one of claims 1 to 4, wherein the method further comprises: presetting a reference source internal processing policy of each of the plurality of reference sources.

The method according to claim 5, wherein the reference source internal processing strategy comprises: a reference source internal abnormal jitter strategy, a reference source internal abnormality determination detection strategy, and a reference source internal shape. Any one or more of the transition strategy of the state and the control stepping strategy inside the reference source.

The method according to any one of claims 1 to 4, wherein the method further comprises: determining whether a reference source is available among the plurality of reference sources, and if not, the local clock is free to run; if yes, Selecting the first reference source and acquiring the clock control parameters.

8. A multi-reference source input clock control device, the device comprising:

a hardware module, configured to generate the local clock;

9. The device according to claim 8, wherein the clock module comprises:

The device of claim 8, wherein the hardware module comprises: a clock circuit, configured to generate the local clock;

a reference source selection unit for selecting a valid reference source from a plurality of reference sources; a logic processing operation unit for inputting information according to each reference source and a local clock The information of the input and the configuration information of the reference source are used to calculate related information of each reference source operation for subsequent call by the clock module.

The device according to any one of claims 8 to 10, wherein the main control module is further configured to activate, according to a switching policy between each reference source, when an abnormality occurs in the first reference source Deriving a second reference source of the plurality of reference sources and deactivating the first reference source;

12. The device according to claim 11, wherein the device further comprises:

The acquiring module is configured to collect state information of the reference source, and feed the collected state information to the main control module.

13. The device according to claim 11, wherein the device further comprises:

a configuration module, configured to pre-set a switching policy between each of the plurality of reference sources, and a reference source internal processing policy for pre-setting each of the plurality of reference sources, and The switching policy between the reference sources and the internal processing policy of the reference source are sent to the main control module.

14. Apparatus according to any one of claims 8 to 10, wherein the apparatus is arranged in a base station.