CN108462548B

CN108462548B - Time synchronization method and device

Info

Publication number: CN108462548B
Application number: CN201710097245.4A
Authority: CN
Inventors: 都美江; 罗彬�; 何力
Original assignee: Shenzhen Zte Software Co ltd
Current assignee: Shenzhen Zte Software Co ltd
Priority date: 2017-02-22
Filing date: 2017-02-22
Publication date: 2021-09-03
Anticipated expiration: 2037-02-22
Also published as: WO2018153192A1; CN108462548A

Abstract

The invention provides a time synchronization method and a time synchronization device, wherein the time synchronization method comprises the following steps: and performing time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm.

Description

Time synchronization method and device

Technical Field

The invention relates to the field of synchronization, in particular to a time synchronization method and a time synchronization device.

Background

In a packet transport network, a method of clock synchronization of synchronous ethernet +1588v2 is generally adopted, synchronization of system frequency between devices is established through the synchronous ethernet, and time synchronization is realized through a precision time synchronization protocol (PTP), wherein, as the clock includes frequency and/or time, the clock synchronization includes frequency synchronization and/or time synchronization. The processing flow of the above synchronization process is roughly divided into two parts:

(1)1588v2 establishment of time synchronization network: receiving and authenticating notification messages from other clock (time) ports; utilizing an optimal Master Clock (Best Master Clock, abbreviated as BMC) algorithm to decide the recommended state of the output port; completing the updating of a port data set according to a recommended state decision point entered in a port state decision algorithm; and according to the recommended state and the 'state decision event', determining the actual state of the port according to a port state machine, and establishing a master-slave relationship.

(2) Time offset measurement and time synchronization: after the timestamp message response process, that is, a PTP (Precision Time Protocol, abbreviated as PTP) synchronization message is continuously sent between the master device and the slave device, the Offset value (Offset) is obtained, and the slave device can correct the local Time value according to the Offset, so that the local Time is synchronized with the Time of the master device.

A BMC source selection mechanism for establishing a time synchronization network transmits time source quality information through an announcement message, and each time source in the system carries out independent BMC operation. The BMC algorithm includes two decision algorithms: a time state decision algorithm and a port state decision algorithm.

Each clock in the BMC algorithm does not negotiate which time source is a master clock and which time source is a slave clock; instead, each clock evaluates the state of its own port only. The method is essentially an algorithm similar to the minimum spanning tree, the network building process cannot be subjected to real-time manual intervention, and the problems of high algorithm complexity (the number of network elements is increased in a multiple-order manner) and easiness in ring formation exist, so that the time synchronization network building efficiency is greatly influenced. The stability of the network also affects the accuracy of the synchronization, which can be severely affected if it is not able to adapt quickly to changes in the network topology. The existing time Synchronization BMC algorithm is essentially two implementation methods different from a frequency Synchronization algorithm (for example, an SSM algorithm, where SSM is a short name for Synchronization Status Message), so that inconsistency between a time Synchronization network and a frequency Synchronization network often occurs, and a clock frequency of a time Synchronization device and a clock frequency of a master device are deviated, and a precision requirement of sub-nanosecond time Synchronization cannot be met.

The prior art can not meet the requirements of clock correlation synchronization and the interference of network topology change on time synchronization, so that the realization of the clock correlation synchronization is more and more important.

Disclosure of Invention

The embodiment of the invention provides a time synchronization method and a time synchronization device, which are used for at least solving the problems that the time synchronization precision is poor and the time synchronization is easily influenced by network topology change in the related technology.

According to an embodiment of the present invention, there is provided a time synchronization method including: and performing time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm.

According to another embodiment of the present invention, there is provided a time synchronization apparatus including: and the synchronization module is used for carrying out time synchronization on the network element based on the clock synchronization result determined by the network element through the clock synchronization algorithm.

According to still another embodiment of the present invention, there is also provided a storage medium. The storage medium is configured to store program code for performing the steps of: and performing time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm.

According to the invention, the time synchronization of the network element is carried out based on the clock synchronization result determined by the network element through the clock synchronization algorithm, so that the rapid network establishment can be realized, the influence of the network topology change on the time synchronization is reduced, the problems of poor time synchronization precision and easiness in influence of the network topology change are solved, and the effects of improving the time precision and stability are achieved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:

fig. 1 is a block diagram of a hardware structure of a mobile terminal of a time synchronization method according to an embodiment of the present invention;

FIG. 2 is a flow chart of a method of time synchronization according to an embodiment of the present invention;

fig. 3 is a block diagram of a time synchronizer according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of an architecture of a clock synchronization network according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of an alternative message description and interaction flow according to an embodiment of the present invention;

FIG. 6 is a schematic diagram illustrating an alternative clock time correlation synchronization Status Decision Algorithm (SDA) according to an embodiment of the present invention;

fig. 7 is a schematic diagram of the operation principle of a clock time correlation synchronous State Machine (FSM).

Detailed Description

The invention will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

Example 1

An application scenario of the embodiment of the application is as follows: and the network element completes frequency synchronization through the selected frequency synchronization algorithm, and then the result of the operation through the frequency synchronization algorithm is used for realizing the time synchronization of the network. The selected frequency Synchronization algorithm is a Synchronization Status information algorithm (SSM) in the present scheme. The implementation principle of using the result of the operation by the frequency synchronization algorithm to implement the time synchronization of the network is as follows: the master-slave relationship (i.e. the port state) obtained based on the SSM algorithm is locked on the network element (or on the network element port) by the protocol interaction (the interaction of the section of fig. 6 about the PLL), and then the network time synchronization is realized by the time synchronization algorithm based on the port state (calculated by SSM). The time synchronization Algorithm includes, but is not limited to, a Best Master Clock Algorithm (BMCA) in the embodiment of the present application, and it should be noted that the "Clock" core in the BMCA Algorithm refers to "time".

Based on the above scenario, the technical solution adopted in embodiment 1 of the present application is as follows:

the method provided by the embodiment can be executed in a mobile terminal, a computer terminal or a similar operation device. Taking the example of running on a computer device, fig. 1 is a hardware structure block diagram of a computer device of a time synchronization method according to an embodiment of the present invention. As shown in fig. 1, computer device 10 may include one or more (only one shown) processors 102 (processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA, etc.), a memory 104 for storing data, and a transmission device 106 for communication functions. It will be understood by those skilled in the art that the structure shown in fig. 1 is only an illustration and is not intended to limit the structure of the electronic device. For example, computer device 10 may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.

The memory 104 may be used to store software programs and modules of application software, such as program instructions/modules corresponding to the time synchronization method in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by executing the software programs and modules stored in the memory 104, so as to implement the method described above. The memory 104 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, memory 104 may further include memory located remotely from processor 102, which may be connected to computer device 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device 106 is used for receiving or transmitting data via a network. Specific examples of such networks may include wireless networks provided by the communications provider of computer device 10. In one example, the transmission device 106 includes a Network Interface Controller (NIC) that can be connected to other Network devices through a base station to communicate with the internet. In one example, the transmission device 106 can be a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.

In the present embodiment, a method operating on the computer device is provided, and fig. 2 is a flowchart of a time synchronization method according to an embodiment of the present invention, as shown in fig. 2, the flowchart includes the following steps:

step S202, obtaining a clock synchronization result determined by a clock synchronization algorithm based on a network element; optionally, the clock synchronization result includes: the network element specifies a port state of a port, where the port state includes: master port state and slave port state.

Optionally, the port status of the designated port in the network element is determined by: determining a port state of a designated port in the network element according to a tracking state of a system clock of the network element, wherein the tracking state includes: whether to accept an external ethernet clock, i.e. the tracking status includes: accept external ethernet clock, refuse to accept external ethernet clock.

Step S204, based on the clock synchronization result, time synchronization is carried out.

As an alternative embodiment of the present application, step S204 may be expressed as the following implementation, but is not limited thereto:

judging whether the local data set of the network element belongs to a preset priority clock level range or not; and under the condition that the judgment result is negative, triggering the following processing procedures: determining a first port state of a designated port in the network element according to the tracking state of the system clock of the network element; performing time synchronization of the network element according to the first port state; if the judgment result is yes, comparing the priority of the optimal port data set judged by the appointed port of the network element with the priority of the local data set of the network element; determining a second port state of the designated port according to the comparison result; and performing time synchronization of the network element according to the state of the second port. It should be noted that the first port state and the second port state may be the same port state, or the second port state follows the first port state.

Optionally, the preset priority clock level range may be a high priority clock level range, for example, the priority clock level range (Class ID) of the local data set may take any value from 0 to 127, and of course, the preset priority clock level range may be adjustable and is not limited to the value from 0 to 127. Based on the value range, in an optional embodiment, before step S202, it may be determined whether to set the Class ID to a value between 1 and 127 according to actual needs (whether to designate the network element as a top network element), where the top network element refers to a device whose local clock does not track an external clock.

Alternatively, the process of "determining the second port status of the designated port according to the comparison result" may be implemented by, but is not limited to:

determining the port state of the designated port as a master port state in case that the comparison result indicates that the local data set has a higher priority than the optimal port data set; and determining the port status of the designated port as a Passive (Passive) port status if the comparison result indicates that the local data set has a lower priority than the best port data set (Erbest).

Optionally, after determining the port status of the designated port as a Passive (Passive) port status, the method further includes: and setting the source port ID in the Erbest as a parent port ID of the network element, where the parent port ID is used to indicate a port corresponding to the specified port in the upstream device of the network element.

Optionally, the Erbest of the designated port is obtained by: acquiring the route hop number of the appointed port receiving the appointed message; and storing the data received by the port of the source node corresponding to the minimum routing hop count in the Erbest.

Optionally, the local data set and/or the best port data set are used to store information required for time synchronization, including but not limited to: clock priority, clock level, clock type (e.g., boundary clock, transparent clock, etc.). The specific definition can be found by querying in the related art, and is not described herein again. The source of the optimal port data set Erbest can be obtained by related technologies, and is not described herein again.

Alternatively, the main body of the above steps may be a base station, a terminal, etc., but is not limited thereto.

The above scheme is described in detail below with reference to a specific application scenario:

firstly, on the premise of completing the establishment of a clock network, the configuration of the time network is completed by referring to the configuration of a clock source. And according to the configuration of the clock network local area network, carrying out time synchronization configuration on the same network element port, and establishing a correct virtual local area network. The ports in the direction of the main ring are configured into a uniform virtual local area network in the main direction, and the ports in the direction of the standby ring are configured into a uniform virtual local area network in the standby direction, so that the time synchronization is ensured to be consistent with the clock synchronization networking. The local area network enables the standard PTP messages of the same VLAN to only run in a specified virtual network, namely, the PTP messages in the main direction can only be transmitted in the main clock ring, and the PTP messages in the standby direction can only be transmitted in the standby clock ring.

Secondly, compatible with a standard PTP notification message, and utilizing information such as port identification of a notification message transmitting and receiving clock node to carry out time node information interaction between devices; the notification message is transmitted in a predetermined virtual network, and in a network formed by Boundary Clock (BC) devices, the notification message is transmitted only to neighboring devices. In a network containing Transparent Clock (TC) devices, an advertisement message is transmitted to adjacent devices and to each device in a specified virtual network.

And thirdly, using a data set comparison algorithm of the BMC algorithm. The data set comparison algorithm 1 is omitted, that is, the priorities of all clock nodes received by the default receiving end are the same, and only the topological relations among the nodes are compared. Traversing the node hop count of the message received by the port by using a data set comparison algorithm 2. The source node with the shortest topological distance is used as the best port (data is stored in Erbest) of the port, that is, the data set comparison algorithm 2 is used for comparing the data sets carried by each advertisement message received by the port, and a decision is made as to whether E is the best port or not_rbestAnd data support is provided for a port decision algorithm.

And fourthly, comparing the PTP ports by using a state decision algorithm based on the clock source selection result, and deciding the port state according to the SSM clock synchronization direction. If the Class ID of the local data set belongs to the number within 1-127, comparing the local data set with Erbest, and if the local data set is more optimal, setting the port to be in a Master state; and if Erbest is better, setting the port as the Passive port. If the Class ID of the local data set does not belong to the number between 1 and 127, the master-slave state of the port is controlled by externally providing clock output or receiving input according to the equipment. If the port does not receive the external clock, the Master state is set, if the port receives the external clock, the Slave state is set, and even if the reference source clock is not configured, the Master state is still set;

the port decision algorithm decides the port state depending on the data set comparison algorithm 1 and the data set comparison algorithm 2 except that the Class ID of the local data set is 1-127. And for the condition that the Class ID of the local data set is not within 1-127, deciding the port state by completely depending on the master-slave state of the clock source. For the top-end equipment, the Class ID of the local data set is a value of 1-127, so that the top-end equipment does not track the external equipment; and for other equipment, setting the Class ID of the local data set to a value except 1-127, if the external clock is not tracked, setting the equipment to be in a master state, and if the external clock is tracked, setting the equipment to be in a slave state. If the port is not configured with the synchronous timing source, the port is still set to be in the active state. The top node cannot track the time of an external network through a port decision algorithm, and the time source selection direction of the time node in the network is consistent with the clock source selection direction.

Fifthly, for the port with the Slave (Slave) decision, writing the device port ID of Erbest of the port into the parent port ID of the device, so that a logical master-Slave relationship is established among the devices;

sixthly, establishing connection between the devices by means of signaling messages, deciding that the device of the slave port actively initiates a link to the device of the master port, and interacting with the slave port after the master port receives the messages to establish the link; for example, Node a and Node B complete the interaction of signaling messages and perform clock synchronization. And starting time synchronization control after the clock is locked.

And seventhly, executing normal PTP time synchronization deviation measurement after the link is completed, and correcting the time deviation of the master clock and the slave clock, namely executing a standard PTP protocol message to respond to the time deviation measurement and adjust the master clock and the slave clock after the time synchronization link is established.

Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.

Example 2

In this embodiment, a time synchronization apparatus is further provided, and the apparatus is used to implement the foregoing embodiments and preferred embodiments, and the description already made is omitted. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.

Fig. 3 is a block diagram of a time synchronization apparatus according to an embodiment of the present invention, as shown in fig. 3, the apparatus including:

an obtaining module 30, configured to obtain a clock synchronization result determined by a clock synchronization algorithm based on a network element, where optionally, the clock synchronization result includes: the network element specifies a port state of a port, where the port state includes: master port state and slave port state.

Optionally, the port status of the designated port in the network element is determined by: determining a port state of a designated port in the network element according to a tracking state of a system clock of the network element, wherein the tracking state includes: whether to accept an external ethernet clock, i.e. the tracking status includes: two states of accepting the external Ethernet clock and refusing to accept the external Ethernet clock.

And a synchronization module 32 connected to the obtaining module 30 for performing time synchronization based on the clock synchronization result.

Optionally, the synchronization module is configured to determine whether the local data set of the network element belongs to a preset priority clock level range; and under the condition that the judgment result is negative, triggering the following processing procedures: determining a first port state of a designated port in the network element according to the tracking state of the system clock of the network element; performing time synchronization of the network element according to the first port state; and comparing the priority of the best port data set judged by the appointed port of the network element with the priority of the local data set of the network element under the condition that the judgment result is yes; determining a second port state of the designated port according to the comparison result; and performing time synchronization of the network element according to the state of the second port.

As an optional implementation manner of this embodiment, the Erbest of the network element is a data set obtained by: acquiring the route hop number of the appointed port receiving the appointed message; and storing the data received by the port of the source node corresponding to the minimum routing hop count in the Erbest.

Optionally, the synchronization module 32 is further configured to determine the port status of the designated port as a master port status if the comparison result indicates that the local data set has a higher priority than the optimal port data set; and determining the port state of the designated port as a Passive port state when the comparison result indicates that the priority of the local data set is lower than the optimal port data set.

It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.

It should be noted that, for the preferred implementation in this embodiment, reference may be made to the description in embodiment 1, and details are not described here.

Example 3

The time synchronization method provided by the embodiment comprises the following processing steps:

step 501: the clock node extracts an SSM optimal master clock according to the synchronization state information, wherein the SSM optimal master clock is used for an optimal master clock with synchronous frequency;

step 501 further comprises:

as shown in fig. 4: and clock source configuration of the active link (SEC 1-SEC 2-SEC 6) and the standby link (SEC 1-SEC 6-SEC 2) is completed. The figure only describes a single ring configuration, and the large network is configured according to a core layer, a convergence layer and an access layer in a layering manner. The meaning indicated by SEC or EEC in fig. 4 identifies the network device in the embodiment of the present application, and meets the clock requirement of three-level clock.

Step 502: the time virtual local area network shown in fig. 4 is configured into different virtual local area networks according to the active link and the standby link. And secondly, each virtual local area network comprises all equipment in the ring to ensure the normal transmission of the messages in the ring.

As shown in fig. 5, in the clock synchronization network, the device enters a monitoring state after being powered on and initialized, and monitors a received PTP notification message. Based on the data set comparison algorithm and the port decision algorithm shown in fig. 6, Node a decides to be Master state and enters pre-Master state. In fig. 6, for the judgment of Class, YES branch belongs to the contents of the port decision algorithm of the original BMC standard, and NO part is the modified contents. If the right-hand side is used to decide the port, the top-end network element may have a problem of being unable to decide, because the top-end network element does not track the devices in the network, and its clock is even synchronous with the external clock source, so special processing is required.

Step 601: node A sends the notice message at regular time, and Node B updates the port data set after receiving the notice message;

step 602: according to the data set comparison algorithm 2, calculating Erbest (Erbest) of the PTP port of Node B;

as shown in fig. 6, for the port for which Erbest has been calculated, the port status is determined. Node B decides to be in Slave state and enters into uncalibrated state.

Step 701: for the top network element, it is not desirable to keep track of external time, and it is also necessary to provide time output for nodes within the network. The Class of its local dataset (D0) needs to be set to a value within 1-127, which can be increased appropriately to make its local dataset larger than the datasets of the rest of the nodes in the network. Thus, the local data set is considered to be larger than the port optimal data set Erbest, and the port is set to be in the active state. Even if the value of the external network port is smaller than the optimal data set Erbest, the port is set to be in a transparent transmission state, and external time cannot be tracked;

step 702: for common nodes in the network, even nodes of the drop branch network, the Class of D0 of the nodes needs to be set to a value except 1-127, and thus if the port tracks an external clock, the nodes are set as slave ports according to a port decision algorithm; if the port does not track the best master clock, it is set as the master port. The master port is set even if the reference source clock is not configured.

As shown in fig. 7, the state machine of the standard PTP does not change, only because the State Decision Algorithm (SDA) of the SSM decision PTP port is relied upon to modify the conditions of the original BMC decision into the state machine (FSM) of the SSM decision accordingly in the text description.

Step 603: node A enters into Master state after finishing the port decision algorithm, Node B enters into uncalibrated state after finishing the port decision algorithm, Node B actively sends signaling message to Node A to establish link. The Node B sends a Source Selected signaling message to the Node A after detecting that a clock Source is Selected, the Node A informs the Node B of a PLL START signaling message which can be tracked by a phase-LOCKED loop after receiving the message, the Node B sends a PLL LOCKED signaling message to the Node A after detecting that the phase-LOCKED loop is LOCKED, the Node A sends a TimeLock Modon to the Node B after receiving the message LOCKED by the phase-LOCKED loop, and the Node B establishes a time synchronization link between the Node A and the Node B after receiving the message and enters a Slave state.

Step 604: the method includes the steps that PTP event synchronization messages are normally sent to complete time synchronization, according to a standard execution mode, a Master sends a Sync event message (carrying estimated time required for message sending) to a Slave, a device which starts a two-step method also needs to send a FollowUp message (carrying current system time), the Slave sends back a DelayReq event message to the Master after receiving the Sync message, and the Master sends a DelayResp common message to the Slave. And after collecting the T1, T2, T3 and T4 time stamps, the Slave device calculates the time offset of the Slave device and the master device according to a formula, adjusts the local time and completes time synchronization. In the time synchronization message interaction process, notification messages are periodically sent, the time synchronization network is adjusted according to the change of received data information, if the data set changes, the change is executed according to the content of the steps 601-603, and then the step 604 is repeated continuously to instantly modify the time of the slave end to complete the time tracking of the master end device.

By adopting the scheme provided by the embodiment, compared with the related technology, the network establishing efficiency of the time network is improved, the network loop is avoided, the time for establishing the time network is saved, the time synchronization precision is improved, and the like.

The transmission requirement of the existing 4G technology for time synchronization is 1.5us, and with the development of the next generation mobile network technology and Pre5G, high density networking is required, and the requirement of 3GPP is highlighted again. With the development of high real-time applications such as indoor positioning and Augmented Reality (AR), higher requirements are also put forward on time synchronization, and sub-nanosecond time synchronization becomes a problem to be solved urgently. Therefore, the original PTP network time synchronization source selection algorithm needs to be adjusted, so that the fast network establishment is realized, and the influence of the network topology change on the time synchronization is reduced. The frequency deviation of the master clock and the slave clock is eliminated by realizing the clock time homodromous synchronization, and the precision of the time synchronization is improved.

Example 4

The embodiment of the invention also provides a storage medium. Alternatively, in the present embodiment, the storage medium may be configured to store program codes for performing the following steps: and performing time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm.

Optionally, in this embodiment, the storage medium may include, but is not limited to: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.

It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method of time synchronization, comprising:

performing time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm;

the time synchronization of the network element is performed based on a clock synchronization result determined by the network element through a clock synchronization algorithm, and the method comprises the following steps:

judging whether the local data set of the network element belongs to a preset priority clock level range or not;

and under the condition that the judgment result is negative, triggering the following processing procedures: determining a first port state of a designated port in the network element according to the tracking state of the system clock of the network element; performing time synchronization of the network element according to the state of the first port;

if the judgment result is yes, comparing the priority of the optimal port data set judged by the appointed port of the network element with the priority of the local data set of the network element; determining a second port state of the designated port according to the comparison result; and performing time synchronization of the network element according to the state of the second port.

2. The method of claim 1, wherein the clock synchronization result comprises: the port state of a designated port in the network element, wherein the port state includes: the device comprises a first port state and a second port state, wherein the first port state is a master port state or a slave port state, and the second port state is a master port state or a passive port state.

3. The method of claim 2, wherein the port status of the designated port in the network element is determined by: determining a port state of a designated port in the network element according to a tracking state of a system clock of the network element, wherein the tracking state comprises: accept external ethernet clock, refuse to accept external ethernet clock.

4. The method of claim 1, wherein determining the second port status of the designated port based on the comparison comprises:

determining the port state of the designated port as a primary port state if the comparison result indicates that the local data set has a higher priority than the optimal port data set; determining the port state of the designated port as a Passive port state if the comparison result indicates that the local data set has a lower priority than the optimal port data set.

5. A time synchronization apparatus, comprising:

the synchronization module is used for carrying out time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm;

the synchronization module is further configured to determine whether the local data set of the network element belongs to a preset priority clock level range; and under the condition that the judgment result is negative, triggering the following processing procedures: determining a first port state of a designated port in the network element according to the tracking state of the system clock of the network element; performing time synchronization of the network element according to the state of the first port; and comparing the priorities of the optimal port data set judged by the appointed port of the network element and the local data set of the network element under the condition that the judgment result is yes; determining a second port state of the designated port according to the comparison result; and performing time synchronization of the network element according to the state of the second port.

6. The apparatus of claim 5, wherein the clock synchronization result comprises: the port state of a designated port in the network element, wherein the port state includes: the device comprises a first port state and a second port state, wherein the first port state is a master port state or a slave port state, and the second port state is a master port state or a passive port state.

7. The apparatus of claim 6, wherein the port status of the designated port in the network element is determined by: determining a port state of a designated port in the network element according to a tracking state of a system clock of the network element, wherein the tracking state comprises: accept external ethernet clock, refuse to accept external ethernet clock.

8. The apparatus according to any of claims 5 to 7, wherein the synchronization module is further configured to determine the port status of the designated port as a master port status if the comparison result indicates that the local data set has a higher priority than the optimal port data set; determining the port state of the designated port as a Passive port state if the comparison result indicates that the local data set has a lower priority than the optimal port data set.