WO2011145930A1 - Dispositif de traitement d'interconnexion verticale (tsv) et procédé de traitement de tsv dans un procédé de fabrication de puces - Google Patents

Dispositif de traitement d'interconnexion verticale (tsv) et procédé de traitement de tsv dans un procédé de fabrication de puces Download PDF

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Publication number
WO2011145930A1
WO2011145930A1 PCT/NL2011/050329 NL2011050329W WO2011145930A1 WO 2011145930 A1 WO2011145930 A1 WO 2011145930A1 NL 2011050329 W NL2011050329 W NL 2011050329W WO 2011145930 A1 WO2011145930 A1 WO 2011145930A1
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WO
WIPO (PCT)
Prior art keywords
donor
tsv
laser beam
wafer
guiding
Prior art date
Application number
PCT/NL2011/050329
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English (en)
Inventor
Gerrit Oosterhuis
Albertus Jozef Huis In 't Veld
Frederikus Johannes Maria De Vreede
Edwin Adrianus Cornelius Van Den Eijnden
Raymond Jacobus Wilhelmus Knaapen
Original Assignee
Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno filed Critical Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno
Publication of WO2011145930A1 publication Critical patent/WO2011145930A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/048—Coating on selected surface areas, e.g. using masks using irradiation by energy or particles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

Definitions

  • the invention relates to a chip die Through Silicon Via (TSV) treatment device and method arranged for treatment of TSVs in chip dies in a chip manufacturing process.
  • TSV chip die Through Silicon Via
  • TSVs Through Silicon Vias
  • a TSV can be seen as a through hole through the thin die; this hole structure typically needs a wall liner treatment, in the remainder also referenced as cladding which may include for example, a barrier layer, isolation layer or seed layer.
  • the TSV is provided with a filling of a conductive matter such as Cu.
  • the width of a TSV is typically sub 10 micron, and a filling resolution of 2-5 micron is therefore desired. To obtain such resolution, traditionally
  • subtractive (photolithographic) techniques are applied, which involves complex steps including coating, fotoresisting, lithography, etching and rinsing which also involves substantial waste of functional matters that are not used.
  • a chip die TSV treatment device arranged for treatment of TSVs in chip dies in a chip manufacturing process, comprising: a carrier plate comprising clamping zones on a top face arranged for placement of a wafer having identified TSVs to be treated; a donor guiding system for guiding a donor matter over a TSV to be treated, the guiding system adapted to keep the donor matter distanced from the wafer top surface; an alignable laser system arranged for impinging a laser beam on a side of the donor matter opposite a side facing the wafer; the laser beam tuned in timing, energy and direction to generate donor matter directed towards the TSV; and a control system for aligning the laser beam and the donor guiding system relative to the TSV.
  • a method of treatment of TSVs in chip dies in a chip manufacturing process comprising: clamping a wafer having identified TSVs to be treated; providing a donor distanced from the wafer top surface; aligning the laser beam of the laser system and guiding the donor relative to an identified TSV on the wafer; and impinging a laser beam on a side of the donor matter opposite a side facing the wafer; the laser beam tuned in timing, energy and direction to generate donor matter directed towards a TSV to be treated.
  • this technique is found to have throughput capability that is attractive especially when the number of TSV's on a chip die is limited to less than about 100 TSV/mm2.
  • Advantages may further include reduction of process steps and process locations - in particular, obviating the necessity of a photolithographic process step - less material waste and combining manufacturing process stages of TSV cladding and filling.
  • Figure 1 shows a first embodiment of the present invention
  • Figure 2 shows a second embodiment of the present invention
  • Figure 3 shows a treatment device using a moving carrier
  • Figure 4 shows a stepping embodiment for treatment of a TSV in a repetitive treatment process
  • Figure 5 shows a donor system including a rotating disk
  • Figure 6 shows a donor system including a tape guiding system
  • Figure 7 shows experimental results of a series of molten depositions
  • Figure 8 shows a diagram indicating the droplet size vs laser power.
  • a first embodiment of a chip die TSV treatment concerns cladding the TSV wall 101 by a plasma deposition process, by impinging the laser beam 102 on the donor 130 so as to generate a plasma 140 directed into the TSV 100.
  • a silicon die 110 having vias 100 (schematically indicated with a bottom part 105, while this may or may not be the case) is cladded with a liner 106.
  • the silicon die 110 is provided with a Silicon dioxide isolator wall 101 and a barrier layer 106 of any of the group of
  • a seed layer can be provided for an electroplating process, for example, a Copper liner.
  • the deposition step can be carried out as one embodiment of a method of treatment of TSVs 100 in chip dies 150 in a chip manufacturing process.
  • the method comprises clamping a wafer 110 having identified TSVs 100 to be treated; providing a donor 130 distanced from the wafer top surface 111; aligning the laser beam 102 of the laser system 120 and guiding the donor 130 relative to an identified TSV 100 on the wafer 110; and impinging a laser beam 102 on a side 131 of the donor 130 opposite a side facing 132 the wafer 110; the laser beam 102 tuned in timing, energy and direction to generate donor matter in the form of a plasma 140 directed towards a TSV 100 to be treated.
  • a plasma 140 is generated of a donor 130 preferably chosen of a group of Tantalum (Ta), Tantalum Nitride (TaN), Titanium (Ti), Titanium Nitride (TiN).
  • the clamp 112 may be made of silicon, glass or epoxy based support.
  • the clamp 112 is a vacuum clamp, for example, of porous aluminum, where a vacuum is provided underneath the wafer 110 and transferred to the clamping zones 113 via channels 114.
  • a second embodiment of the inventive method is schematically depicted in Figure 2, advantageously provided as process subsequent to the cladding treatment of Figure 1.
  • a subsequent process step is provided of filling the TSV 100 with a conductive material 200 such as Copper wherein subsequent donor matter 231 is directed towards a TSV 100 by directing particles 231 of a subsequent donor 230 into the TSV 100.
  • the cladding and filling step are performed in the same process environment 250 with subsequent donors 130 230.
  • the TSV treatment involves filling the TSV 100, by having donor matter 231 directed towards a TSV 100 to be treated.
  • Suitable conductors 200 include Copper, Aluminum, Tungsten, Chromium, Polysilicon.
  • filling droplets preferably range between 2-5 micron.
  • a laser repetition rate is preferably at least 60-600kHz.
  • a donor refreshment module with high refresh rate capabilities is very advantageous, for example having a donor refreshment velocity relative to the TSV of more than 2 m/s or even more than 4 m/s.
  • the high laser repetition rate combined with a relative high number of about 60-200 of droplets per via provides an effective operation range for this via filling application.
  • TSVs may be advantageous to fill TSVs using droplets having a typical diameter of 2 - 5 micrometer.
  • TSV densities of 10 - 100 TSVs/mm A 2 to achieve sufficient, i.e. economically viable, rates, it is advantageous to provide a donor film between 200 and 1000 nanometers moving at speeds of 10 m/s or more with respect to the TSV to be filled.
  • the laser frequency of such a system may be e.g. 1 - 2 MHz or higher and the laser spot size 10 - 20 micrometers.
  • FIG 3 shows a schematic embodiment, wherein a donor guiding system 300 comprises a movable transparent carrier 310 that is kept distanced from wafer top surface 111 and having the donor material 230 provided on a face 311 thereof.
  • the laser beam 102 impinges on the donor 230 via a carrier face 312 opposite the donor 230 to direct a particle 231 of donor matter into the TSV 100.
  • the donor 230 is provided as a homogenous layer guided by the donor guiding system 300.
  • the donors 130, 230 may be provided in a premachined form, for example, comprising a sacrificial layer 311, a prepatterned donor layer and/or a donor provided in a matrix of sacrificial material.
  • a suitable thickness of the homogenous layer may range between 50 and 2000 nm, preferably in a range of 50-500 nm or even more preferably in a range of 50-250 nm.
  • the donor 130, 230 may be provided as a homogenous layer directly provided on a moving carrier 310.
  • the carrier 310 may be formed by a thin glass plate or any suitable transparent carrier, for example a glass plate of 1-5 mm that is rotated at high speed.
  • the distance to the die surface 111 is kept in a range of 1-50 micron, preferably 1-20 micron.
  • FIG. 4 shows a stepping embodiment for treatment of a TSV 100 in a repetitive treatment process.
  • a laser beam 102 is directed towards a scanning stage having a wafer 110 clamped thereon.
  • a fast beam modulator 400 (galvano mirror, polygon mirror, acousto-optic or electro-optic modulator etc.) provides a scanning movement of the laser beam 102 in a first direction.
  • the modulator is preferably controlled in a feed forward process wherein TSV coordinates are provided from an external source that provides the layout data of a chip die.
  • the layout data of a chip die can be controlled by the layout data of a chip die.
  • each single TSV 100 is treated by a multishot process where repeated steps are provided of guiding fresh donor material 230 relative to the TSV 100 and generating a particle 231.
  • the donor 230 is kept fixed relative to the wafer surface 111, and the laser beam 102 is scanned over the various TSVs 100 by a tilting movement of a beam modulator 410.
  • Step (2) the donor 230 is shifted relative to the wafer 110 and the scanning steps are repeated.
  • fresh donor material 230 is directed to each TSV 100.
  • Step (3) the same scanning movement is repeated with the donor material 230 shifted a further step.
  • the shifting steps can be performed in both planar directions to cover the entire wafer surface 111.
  • the wafer can be continuously moved in a direction perpendicular to the scanning beam movement.
  • Figure 5 shows a donor guiding system including a rotating carrier disk 500.
  • the rotating disc 500 may be provided on an actuator 510 that moves the disc 500 in a translational movement relative to the wafer 110, so that by the rotation fresh donor material 230 is brought over the TSV 110.
  • the disc 500 can be provided with a z-adjustment means, for example, of an autofocus type conventional in CD-ROM technology, to mechanically control the correct height of the donor above the wafer surface.
  • a z-adjustment means for example, of an autofocus type conventional in CD-ROM technology
  • the control can be provided by magnetic positioning or alternatively, as depicted, the donor guiding system comprises an air bearing 520 arranged to distance the homogenous layer 230 from the wafer top surface 111.
  • the air bearing 520 spans a width of about two or three dies 150, so that a height over a single die 150 is substantially kept constant within less then 1 micron and the donor 230 is kept at an optimal distance in a range of 1-20 micron.
  • the rotating disk 500 can be provided with a central air bearing 521 and a peripheral bearing 522; by fast rotating of the disk 500 the planar rigidity of the donor 230 is ensured.
  • the donor guiding system 500 is provided by a central air bearing 521 and a peripheral air bearing 522 spanning a donor layer 230 in a fast rotating movement. Placement of the air bearing system 520 on the wafer 110 ensures constant z-positioning of the donor material 230 relative to the wafer surface 111.
  • the air bearing 520 typically comprises a set of flow channels 522 and a bearing surface 523 conventionally known, so that the bearing surface 523 and the flow channels 524 can be tuned to provide an air bearing layer 525 ensuring constant z- positioning.
  • the disk actuator 510 comprises a controller 511 to adjust the rotation speed to keep the relative velocity to the TSV
  • the controller 511 controls the carrier disk 500 to rotate at a velocity of more than 4 m/s relative to the TSV 100 to be filled.
  • FIG. 6 shows a donor system including a tape guiding system 600.
  • the tape guiding system may include a premachined tape 610, for example, provided on a pair of roll-on/roll off tape spools (not shown) wherein the tape 610 is moved at high speed along a tape guiding system 600 adapted to provide the tape 610 at a constant height moving over a TSV 100 to be treated.
  • the tape 610 is provided endlessly and includes a regeneration system 650 , for instance by having the tape 610 refreshed in a stripping step (etching/reverse plating) and a deposition step (PVD or plating).
  • a regeneration system 650 for instance by having the tape 610 refreshed in a stripping step (etching/reverse plating) and a deposition step (PVD or plating).
  • regeneration system 650 is arranged for deposition of a homogenous layer 630 of donor material on the carrier 610 that is moved from the regeneration system 650 to a TSV 100 to be treated by a stepping or continuous movement.
  • depositing of donor material 630 can be provided on the carrier 610 prior to guiding the donor material 630 to the TSV 100 in a continuous process.
  • the guiding system 600 may optionally be equipped with z-height- sensor (not shown) for self-z-positioning to ensure constant z-positioning.
  • Figure 7 shows a SEM image 700 of experimental results of a series of molten depositions.
  • An optimal process window is illustrated as 710. It is found that in an average power range of 50-100 mW the droplet size is about 2-6 micron by having the distance to the die surface kept in a range of 1-20 micron.
  • Figure 8 provides further illustrative values of a transferred spot size vs a power for a Cupper donor layer having a thickness of about 150 nm for gap distances ranging from 0 to 40 micron. From the graph it is shown that the size decreases with growing energy and reduced distance.
  • 80, 120 and 200 nm Copper thickness are provided on a 1 mm thick glass carrier having an air gap kept fixed 1-10 ⁇ . A laser beam is scanned over fixed donor and carrier assembly. Additional process parameters are:

Abstract

Selon un certain aspect, l'invention concerne un dispositif de traitement d'interconnexion verticale (TSV) conçu pour le traitement des TSV (100) dans des puces, dans le cadre d'un procédé de fabrication de puces, comprenant : une plaque porteuse (112) comprenant des zones de serrage (114) sur une face supérieure conçue pour la mise en place d'une tranche (150) possédant des TSV identifiés à traiter ; un système de guidage de donneur, destiné à guider un donneur (130) au-dessus d'un TSV à traiter, le système de guidage étant conçu pour maintenir le donneur écarté de la surface supérieure de la tranche ; un système laser alignable (120), conçu pour envoyer un faisceau laser (102) sur un côté du donneur opposé au côté faisant face à la tranche, le faisceau laser étant adapté en termes de temps, d'énergie et de direction de façon à générer une matière donneuse envoyée vers le TSV ; et un système de commande destiné à aligner le faisceau laser et le système de guidage du donneur par rapport au TSV. Les avantages peuvent comprendre la réduction du nombre d'étapes du procédé et du nombre de positions du procédé, en particulier la suppression de la nécessité d'une étape de traitement photo-lithographique, la réduction du gaspillage de matière et la combinaison des étapes de placage et de remplissage dans la fabrication des TSV du procédé de fabrication.
PCT/NL2011/050329 2010-05-17 2011-05-16 Dispositif de traitement d'interconnexion verticale (tsv) et procédé de traitement de tsv dans un procédé de fabrication de puces WO2011145930A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP10163027 2010-05-17
EP10163027.5 2010-05-17

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Publication Number Publication Date
WO2011145930A1 true WO2011145930A1 (fr) 2011-11-24

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WO (1) WO2011145930A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2824699A1 (fr) 2013-07-08 2015-01-14 Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO Fournir une microplaquette avec éléments électriquement conducteurs
US9645502B2 (en) 2011-04-08 2017-05-09 Asml Netherlands B.V. Lithographic apparatus, programmable patterning device and lithographic method
EP3521483A1 (fr) 2018-02-06 2019-08-07 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Appareil et procédé de dépôt par lift
US10957615B2 (en) 2016-03-31 2021-03-23 Electro Scientific Industries, Inc Laser-seeding for electro-conductive plating

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WO1998005068A1 (fr) * 1996-07-26 1998-02-05 Philips Electronics N.V. Procede de fabrication et de transfert de gouttelettes metalliques
WO1998022635A1 (fr) * 1996-11-18 1998-05-28 Micron Technology, Inc. Procede et appareil de depot directionnel de films minces au moyen d'une ablation par laser
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9645502B2 (en) 2011-04-08 2017-05-09 Asml Netherlands B.V. Lithographic apparatus, programmable patterning device and lithographic method
EP2824699A1 (fr) 2013-07-08 2015-01-14 Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO Fournir une microplaquette avec éléments électriquement conducteurs
WO2015005779A1 (fr) * 2013-07-08 2015-01-15 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Fourniture d'un dé de puce ayant des éléments électroconducteurs
JP2016531419A (ja) * 2013-07-08 2016-10-06 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー 導電性要素を備えたチップダイの提供
US9659822B2 (en) 2013-07-08 2017-05-23 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Providing a chip die with electrically conductive elements
US10957615B2 (en) 2016-03-31 2021-03-23 Electro Scientific Industries, Inc Laser-seeding for electro-conductive plating
EP3521483A1 (fr) 2018-02-06 2019-08-07 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Appareil et procédé de dépôt par lift
WO2019156555A1 (fr) 2018-02-06 2019-08-15 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Appareil et procédé de dépôt par lift

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