WO2011125178A1 - Control system, control device and control method - Google Patents

Control system, control device and control method Download PDF

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Publication number
WO2011125178A1
WO2011125178A1 PCT/JP2010/056249 JP2010056249W WO2011125178A1 WO 2011125178 A1 WO2011125178 A1 WO 2011125178A1 JP 2010056249 W JP2010056249 W JP 2010056249W WO 2011125178 A1 WO2011125178 A1 WO 2011125178A1
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WO
WIPO (PCT)
Prior art keywords
input
output data
control unit
refresh
storage unit
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PCT/JP2010/056249
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French (fr)
Japanese (ja)
Inventor
寛 芦谷
卓也 宮丸
Original Assignee
三菱電機株式会社
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Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2010/056249 priority Critical patent/WO2011125178A1/en
Priority to JP2012509227A priority patent/JPWO2011125178A1/en
Publication of WO2011125178A1 publication Critical patent/WO2011125178A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes

Definitions

  • the present invention relates to a control system, a control device, and a control method for controlling a controlled device with a user program written in a general-purpose programming language such as C language.
  • a controlled device In the field of general factory automation (FA), a controlled device is often controlled by a programmable logic controller (PLC) using a ladder language specialized in machine control.
  • PLC programmable logic controller
  • an FA controller that has compatibility with a PLC and can be used without porting a user program that executes advanced processing described in a general-purpose programming language to a ladder language for PLC.
  • Control device has been developed. For example, according to the FA controller using the C language, past C language program assets can be diverted, and functions that the ladder language is not good at, such as trigonometric functions, can be easily handled. Since the FA controller has compatibility with the PLC, it is possible to construct a system (control system) in which various expansion modules prepared for PLC are connected via an expansion bus for PLC. It has become.
  • the FA controller conceals the above complicated procedures and operations and provides an automated dedicated access processing function to improve user programming convenience.
  • a user program written in a general-purpose programming language is executed under the control of a real-time OS (Real Time Operating System: RTOS).
  • OS Real Time Operating System
  • RTOS Real Time Operating System
  • usage environments such as provided libraries, graphical user interfaces, and development environments differ for each type of RTOS. Since the types of RTOS selected by the user are diverse, it is desired that the FA controller can also be equipped with various RTOSs.
  • the above-mentioned dedicated access processing function depends on the RTOS, and when the RTOS type is changed, it is necessary to re-implement the dedicated access processing function.
  • preparing a dedicated access processing function for each RTOS in order to meet the above-described demand has a problem that it imposes a heavy burden on the manufacturer.
  • a configuration in which a plurality of CPUs each capable of executing different RTOSs is provided, and the dedicated access processing function and the user program are operated on different CPUs can be considered.
  • Patent Document 1 a control process for a controlled apparatus and a communication control process for transmitting and receiving various operations for executing the control process are operated by CPUs that are operated by independent OSs, and the CPUs are shared storage units. A technique for executing data storage / reading via the Internet is disclosed. However, according to the technique of Patent Document 1, since the communication procedure between two CPUs is complicated, if this technique is adopted in the above configuration, the convenience of programming on the user side is reduced.
  • the present invention has been made in view of the above, and an object thereof is to obtain a control system, a control device, and a control method that allow a user to easily execute a dedicated access process that does not depend on an OS used by the user. To do.
  • the present invention provides an input / output data storage unit that is connected to a controlled device and stores first input / output data with the controlled device.
  • An output module ; a shared storage unit storing second input / output data; second input / output data stored in the shared storage unit; and first input / output data stored in the input / output data storage unit
  • a control device comprising: a first control unit that executes a refresh process between the first control unit, and a second control unit that operates based on a user program and operates second input / output data stored in the shared storage unit;
  • the second control unit writes the refresh information describing the settings for the refresh process to the shared storage unit, and the first control unit follows the refresh information written to the shared storage unit. Executing the refresh process Te, characterized in that.
  • the control system according to the present invention allows the user to easily execute a dedicated access process that does not depend on the OS used by the user.
  • FIG. 1 is a diagram illustrating a hardware configuration of the FA controller system according to the first embodiment.
  • FIG. 2 is a diagram schematically illustrating communication between the components.
  • FIG. 3 is a diagram illustrating an example of a data structure of the refresh information.
  • FIG. 4 is a flowchart for explaining the operation for setting the refresh information.
  • FIG. 5 is a flowchart for explaining the operation of the automatic refresh process.
  • FIG. 6 is a flowchart for explaining the operation of the manual refresh process.
  • FIG. 7 is a flowchart for explaining the operation when the manual refresh process is executed.
  • FIG. 8 is a flowchart for explaining the operation of the refresh process end process.
  • FIG. 9 is a diagram schematically illustrating communication between each component according to the second embodiment.
  • FIG. 10 is a diagram illustrating an example of a data structure of command information.
  • FIG. 11 is a flowchart for explaining the operation of setting command information.
  • FIG. 12 is a flowchart illustrating an operation in which a dedicated access processing function executes a command.
  • FIG. 13 is a diagram illustrating a hardware configuration of the FA controller system according to the third embodiment.
  • FIG. 14 is a diagram schematically illustrating communication between the components.
  • FIG. 15 is a diagram illustrating an example of command information.
  • FIG. 1 is a diagram illustrating a hardware configuration of an FA controller system as a control system according to the first embodiment of the present invention.
  • the FA controller system 1 is configured by connecting an FA controller 100 as a control device of the first embodiment and an input / output module 200 to an expansion bus 300 for PLC.
  • the input / output module 200 is connected to a controlled device (not shown) such as an industrial device, and stores output data of the controlled device and input data (input / output data 201) to the controlled device.
  • Input / output data storage unit 202 and a communication controller 203 that is a communication interface for communication with the FA controller 100 via the expansion bus 300.
  • the communication controller 203 converts the input / output data 201 into an electrical signal that flows on the expansion bus 300.
  • the FA controller 100 includes a first MCU 101 that includes a CPU 110 that executes a dedicated access processing function 115 that is a program for realizing dedicated access processing in accordance with a dedicated access procedure for the input / output module 200 expanded by the expansion bus 300.
  • the second MCU 102 on which the CPU 120 that executes the user program 124 is mounted, and the shared memory 103 that is used for communication between the first MCU 101 and the second MCU 102.
  • the shared memory 103 is a two-port memory, and MCUs 101 and 102 are connected to respective ports of the shared memory 103 by signal lines 104 and 105, respectively. Further, the first MCU 101 and the second MCU 102 are directly connected by a signal line 106.
  • the first MCU 101 includes an EEPROM 111, a RAM 112, an external interface 113, and a communication controller 114 in addition to the CPU 110 described above, and these components are connected to the internal bus of the first MCU 101, respectively.
  • the EEPROM 111 stores a dedicated access processing function 115 and a first RTOS 116 that is a real-time OS that executes basic control of the first MCU 101.
  • the RAM 112 is used as a program development area.
  • the dedicated access processing function 115 and the first RTOS 116 are sent to the RAM 112 via the internal bus and are expanded in the program expansion area of the RAM 112, respectively.
  • the CPU 110 executes the first RTOS 116 expanded on the RAM 112.
  • the CPU 110 implements the dedicated access processing by executing the dedicated access processing function 115 under basic control by the first RTOS 116.
  • the external interface 113 is an interface for communication with the second MCU 102, and is connected to a signal line 104 for accessing the shared memory 103 and a signal line 106 for transmitting and receiving interrupt signals between the second MCU 102.
  • the communication controller 114 is a communication interface for accessing the input / output data 201 via the expansion bus 300.
  • the second MCU 102 includes an EEPROM 121, a RAM 122, and an external interface 123 in addition to the CPU 120, and these components are connected to the internal bus of the second MCU 102, respectively.
  • the EEPROM 121 stores a user program 124 created by a user for reading input / output data of the input / output data 201 and writing output data, and a second RTOS 125 for operating the user program 124. . Note that the user can select a desired type of second RTOS 125 as long as the user program 124 can be operated.
  • the RAM 122 is used as a program development area, like the RAM 112.
  • the user program 124 and the second RTOS 125 are sent to the RAM 122 via the internal bus of the second MCU 102 and are expanded in the program expansion area of the RAM 122, respectively.
  • the CPU 120 executes the second RTOS 125 expanded on the RAM 122.
  • the CPU 120 executes the user program 124 under the control of the second RTOS 125.
  • the external interface 123 is an interface for communication with the first MCU 101, and includes a signal line 105 for accessing the shared memory 103 and a signal line 106 for transmitting and receiving various interrupt signals to and from the second MCU 101. It is connected.
  • FIG. 2 schematically illustrates communication between components related to dedicated access processing between the dedicated access processing function 115 and the user program 124 in the FA controller system 1 of the first embodiment configured as described above. It is a figure to do.
  • the input / output data storage unit 202 stores M input / output data.
  • the shared memory 103 has a memory area 131 for storing data to be processed (refresh processing) synchronized with the input / output data 201 at a predetermined timing by the dedicated access processing function 115. .
  • N memory areas are secured in the shared memory 103. More specifically, the refresh process overwrites the input data in the input / output data 201 with the corresponding input data prepared in the memory area 131 and replaces the output data stored in the memory area 131 with the input / output data 201.
  • the user program 124 can indirectly access the input / output data 201 by reading / writing data stored in the memory area 131 via the signal line 105.
  • the dedicated access processing function 115 executes data refresh processing at a predetermined time interval or at a timing when an instruction (refresh execution instruction) is received from the user program 124 via the signal line 106.
  • the refresh process executed at a predetermined time interval is referred to as an automatic refresh process, and the refresh process executed at a timing when a refresh execution instruction is received is referred to as a manual refresh process.
  • FIG. 3 is a diagram illustrating an example of the data structure of the refresh information 130.
  • the refresh information 130 is a refresh operation setting field that indicates whether to execute the automatic refresh process, the manual refresh process, or invalidate the refresh information 130 in order from the top.
  • a field for setting a time interval (cycle) for executing automatic refresh processing, an automatic refresh execution instruction field for instructing start / stop of automatic refresh processing, and manual refresh execution for instructing start / stop of manual refresh processing Dedicated access indicating the instruction field, the field indicating the data name of the refresh processing target in the input / output data 201, the field indicating the storage destination memory area of the data to be synchronized, and indicating whether the refresh processing is stopped or operating
  • Status information updated managed contains a field to be filled.
  • the data name of the input / output data is associated with the storage address in the input / output data storage unit 202
  • the dedicated access processing function 115 is based on the data name of the input / output data. The corresponding position can be accessed.
  • the user program 124 When the user program 124 completes writing (setting) of the refresh information 130 to the shared memory, the user program 124 sends a refresh information setting completion notification, which is a notification that the setting of the refresh information 130 is completed, via the signal line 106 to the dedicated access processing function. Issue to 115.
  • the dedicated access processing function 115 receives the notification, the dedicated access processing function 115 reads the refresh information 130 written in the shared memory 103 and executes the refresh processing according to the read refresh information 130.
  • the user program 124 notifies the completion of writing of the refresh information 130 by issuing a refresh information setting completion notification via the signal line 106, but the refresh information 130 is sent to the dedicated access processing function 115.
  • the procedure for notification via the signal line 106 may be omitted by constantly monitoring the set position.
  • a refresh execution instruction in the manual refresh process is notified via the signal line 106, but the user program 124 writes the instruction content for executing the refresh to a predetermined location of the shared memory 103, and the dedicated access processing function 115. May be configured to always monitor the portion where the content is written, so that the execution instruction is transmitted from the user program 124 to the dedicated access processing function 115.
  • the dedicated access processing function 115 synchronizes the data stored in the memory area 131 with the input / output data 201 based on the refresh information 130 set in the shared memory 103. Therefore, the user program 124 can operate the input / output data 201 only by implementing simple memory access to the shared memory 103.
  • the dedicated access processing function 115 and the user program 124 can be used. Communication between the CPUs 110 and 120 can be executed without re-implementing the access processing function 115. Further, since the communication between the CPUs 110 and 120 is realized only by mounting the user program 124 for memory access to the shared memory 103, the convenience of programming for the user is high.
  • FIG. 4 is a flowchart for explaining the operation in which the user program 124 sets the refresh information 130.
  • the user program 124 first creates the refresh information 130 and writes it in the shared memory 103 (step S1).
  • the user program 124 can instruct start / stop of the automatic refresh process, change of the execution cycle of the automatic refresh process, and start / stop of the manual refresh process according to the description content of the refresh information 130.
  • the user program 124 describes “auto refresh process” in the refresh operation setting field, and sets a desired time interval (for example, 1000 msec) in the field for setting the cycle of the automatic refresh process. Describe it and describe "Start" in the automatic refresh execution instruction field.
  • the changed time interval may be described in the field for setting the cycle of the automatic refresh process in the refresh information 130 described as described above.
  • the user program 124 may describe “manual refresh process” in the refresh operation setting field and “start” in the manual refresh execution instruction field.
  • stop may be described in the refresh execution instruction field corresponding to the refresh process being executed.
  • the user program 124 may describe “automatic refresh processing and manual refresh processing” in the refresh operation setting field so that the automatic refresh processing and manual refresh processing are executed simultaneously.
  • the dedicated access processing function 115 reads the refresh information 130 when the refresh information setting completion notification is received.
  • the dedicated access processing function 115 starts the automatic refresh process when the read refresh information 130 describes an instruction to start the automatic refresh process.
  • FIG. 5 is a flowchart for explaining the operation of automatic refresh processing by the dedicated access processing function 115.
  • the dedicated access processing function 115 writes “in operation” in the field indicating the refresh state of the refresh information 130 (step S11), and starts counting time (step S11). S12). Then, the dedicated access processing function 115 determines whether or not the count value has reached the period of time set by the refresh information 130 (step S13). When the count value has not reached the set cycle time (No in step S13), the dedicated access processing function 115 repeatedly executes the determination in step S13 until the time is reached.
  • step S13 When the count value reaches the time (step S13, Yes), the dedicated access processing function 115 exits the repetition processing of step S13, and the input / output data and memory area specified by the data name described in the refresh information 130 The data of the designated area in 131 is synchronized (step S14). Then, the dedicated access processing function 115 proceeds to step S12, resets the count value, and starts counting time again.
  • the data stored in the memory area 131 is periodically synchronized with the input / output data 201. Therefore, the user program 124 once sets the refresh information 130 and starts the automatic refresh process. Then, by accessing the memory area 131, the contents of the input / output data 201 can be manipulated in substantially real time.
  • the dedicated access processing function 115 starts the manual refresh processing when the read refresh information 130 describes an instruction to start the manual refresh processing.
  • FIG. 6 is a flowchart for explaining the operation of manual refresh processing by the dedicated access processing function 115.
  • step S21 when the dedicated access processing function 115 starts the manual refresh process, “dedicated” is written in the field indicating the refresh state of the refresh information 130 (step S21), and whether or not a refresh execution instruction has been received. Is determined (step S22). When it is determined that the refresh execution instruction has not been received (No at Step S22), the dedicated access processing function 115 repeatedly executes the determination process at Step S22. When the dedicated access processing function 115 receives the refresh execution instruction (step S22, Yes), the dedicated access processing function 115 exits the repetition processing of step S22, and the input / output data specified by the refresh information 130 and the data of the specified area in the memory area 131 are stored. Are synchronized with each other (step S23). Then, the dedicated access processing function 115 proceeds to step S22 again and waits for reception of a refresh execution instruction.
  • FIG. 7 is a flowchart for explaining the operation when the manual refresh process by the user program 124 is executed.
  • the user program 124 issues a refresh execution instruction at a desired timing (step S31).
  • the refresh execution instruction is issued, the data in the memory area 131 is synchronized with the input / output data 201 by the operation in step S23, so that the user program 124 reads / writes the synchronized data (step S32).
  • the process proceeds to step S31.
  • the refresh process is executed at the timing when the refresh execution instruction is issued, so that the user program 124 can access the latest input / output data 201 at a desired timing. Become.
  • the dedicated access processing function 115 starts the processing for stopping the corresponding refresh processing (refresh processing end processing) when the read refresh information 130 describes an instruction to stop the automatic refresh processing or manual refresh processing.
  • FIG. 8 is a flowchart for explaining the operation of the refresh process end process by the dedicated access process function 115.
  • the dedicated access processing function 115 stops the corresponding refresh operation (step S41). For example, when stopping the automatic refresh process, the dedicated access processing function 115 stops the repeated process of steps S12 to S14. When the manual refresh process is stopped, the dedicated access processing function 115 stops the repeated process of steps S22 to S23. After step S41, the dedicated access processing function 115 writes “stopped” in the field indicating the refresh state of the refresh information 130 (step S42), and the refresh process end process is returned.
  • the FA controller 100 stores the shared memory 103, the data stored in the memory area 131 secured in the shared memory 103, and the input / output data storage. Operates based on the first MCU 101 that executes the refresh process with the input / output data 201 stored in the unit 202 and the user program 124, and operates the data stored in the memory area 131 of the shared memory 103 A second MCU 102, the second MCU 102 writes the refresh information 130 describing the settings for the refresh process to the memory area 131 of the shared memory 103, and the first MCU 101 writes the refresh information written to the memory area 131. Refresh according to 130 Since it is configured such that the process, it is possible to only access process that is independent of the OS used by the user the user to easily perform.
  • Embodiment 2 a user program can issue a command for a dedicated access processing function to execute a desired operation on input / output data. Since the hardware configuration of the FA controller system of the second embodiment is the same as that of the first embodiment except for the dedicated access processing function and the user program, the description of the hardware configuration of the FA controller system of the second embodiment is omitted. To do.
  • FIG. 9 is a diagram schematically illustrating communication between each component related to dedicated access processing between a dedicated access processing function and a user program in the FA controller system of the second embodiment.
  • the FA controller system, FA controller, dedicated access processing function, and user program of the second embodiment are denoted by reference numerals 2, 400, 401, and 402, respectively. It is attached.
  • the shared memory 103 stores command information 403 describing a command for the dedicated access processing function 401 by the user program 402.
  • the dedicated access processing function 401 reads the command information 403 and operates the input / output data 201 based on the command described in the read command information 403.
  • the command may be any command as long as it is defined as usable in the dedicated access processing function 401.
  • a command to write input data to the input / output data storage unit 202 and a command to read output data can be defined as commands.
  • various commands may be defined.
  • a controlled device that issues an interrupt signal may be used. Even if the input / output data as an interrupt signal from this type of controlled device is monitored and the interrupt signal is turned on, a command for notifying the user program 402 as an execution result is specified. Good.
  • a memory area 404 is reserved for the dedicated access processing function 401 to write a command execution result. Completion of writing (setting) of the command information 403 and completion of writing of the command execution result are notified to each other between the CPUs 110 and 120 by a command information setting completion notification and a command execution completion notification, respectively.
  • the command information setting completion notification and the command execution completion notification are transmitted via the signal line 106, respectively.
  • the dedicated access processing function 401 is configured to monitor the position where the command information 403 is written, and the user program 402 is configured to monitor the position where the execution result is written, so that a command information setting completion notification and a command execution completion notification are notified. Can be omitted.
  • FIG. 10 is a diagram illustrating an example of the data structure of the command information 403.
  • the command information 403 includes a message header and command data.
  • the message header describes the message type indicating the command information 403, the size of the command information 403, the identification number for each command information 403, the size of the command data, and the like.
  • an identification code for identifying the type of command and the size and content of each argument data of the command are described.
  • the command is a write command (WRITE function) for writing input data to the input / output data storage unit 202
  • the WRITE function includes the data name of the input data and the content to be written as argument data
  • an identification code is described.
  • the WRITE function identification code is described in the field, the data name size and data name of the input data are described in the argument data 1 field, and the input data size and the input data itself are described in the argument data 2 field. Is described.
  • FIG. 11 is a flowchart illustrating an operation in which the user program 402 sets the command information 403.
  • the user program 402 creates command information 403 and writes it to the shared memory 103 (step S51).
  • a command information setting completion notification is issued (step S52), and the operation at the time of setting the command information 403 by the user program 402 is returned.
  • the dedicated access processing function 401 reads the command information 403 from the shared memory 103 when receiving the command information setting completion notification.
  • the dedicated access processing function 401 executes the read command information 403.
  • FIG. 12 is a flowchart illustrating an operation in which the dedicated access processing function 401 executes a command.
  • the dedicated access processing function 401 performs an operation corresponding to the read command information 403 on the input / output data 201 (step S61). After executing the command, the dedicated access processing function 401 writes the execution result in the memory area 404 (step S62). When writing of the execution result is completed, the dedicated access processing function 401 issues a command execution completion notification (step S63), and the operation of executing the command returns.
  • the FA controller 400 is based on the shared memory 103, the first MCU 101 that operates the input / output data 201 stored in the input / output data storage unit 202 included in the input / output module 200, and the user program 402.
  • a second MCU 102 that operates and calculates a command for operating the input / output data 201 stored in the input / output data storage unit 202, and the second MCU 102 stores command information 403 describing the command
  • the first MCU 101 is configured to execute the operation of the input / output data 201 based on the command information 403 written to the shared memory 103, the first MCU 101 is dedicated not depending on the OS used by the user. Easy access processing by the user It can be. Further, by defining various commands in the dedicated access processing function 401, it is possible to execute a complicated operation on the input / output data 201 as compared with the first embodiment.
  • Embodiment 3 FIG.
  • the MCU that executes the dedicated access processing function is configured to be able to directly write to the RAM provided in the MCU that executes the user program, and the dedicated access processing function directly outputs the execution result of the command to the RAM. I tried to write.
  • FIG. 13 is a diagram illustrating the hardware configuration of the FA controller system according to the third embodiment.
  • symbol as Embodiment 1 is attached
  • the FA controller system 3 is configured by connecting an FA controller 500 and an input / output module 200 to an expansion bus 300.
  • the input / output module 200 includes an input / output data storage unit 202 in which input / output data 201 is stored, and a communication controller 203.
  • the FA controller 500 includes a first MCU 501 for executing the dedicated access processing function 511, a second MCU 502 for executing the user program 521, and the shared memory 103.
  • the MCUs 501 and 502 are connected to the shared memory 103 by signal lines 104 and 105, respectively. Further, the first MCU 501 and the second MCU 502 are directly connected by a signal line 503 capable of transmitting and receiving data, an address, and an interrupt signal.
  • the first MCU 501 includes a CPU 110, an EEPROM 111, a RAM 112, an external interface 510, and a communication controller 114.
  • the EEPROM 111 stores the dedicated access processing function 511 and the first RTOS 116 described above.
  • the dedicated access processing function 511 is read from the EEPROM 111 and expanded in the program expansion area of the RAM 112.
  • the CPU 110 executes a dedicated access processing function 511 developed in the RAM 112.
  • the signal line 104 and the signal line 503 are connected to the external interface 510.
  • the second MCU 502 includes a CPU 120, an EEPROM 121, a RAM 122, and an external interface 520.
  • the EEPROM 121 stores a user program 521 and a second RTOS 125.
  • the user program 521 is read from the EEPROM 121 and expanded in the program expansion area of the RAM 122.
  • the CPU 120 executes the user program 521 expanded in the RAM 122.
  • a signal line 105 and a signal line 503 are connected to the external interface 520.
  • FIG. 14 is a diagram schematically illustrating communication between components related to dedicated access processing between the dedicated access processing function 511 and the user program 521 in the FA controller system 3 of the third embodiment.
  • command information 530 describing a command for the dedicated access processing function 511 and a storage destination address in the RAM 122 of the execution result of the command is stored by the user program 521.
  • FIG. 15 is a diagram illustrating an example of the data structure of the command information 530.
  • the command information 530 has a data structure in which a storage destination address is added to the command information 403 of the second embodiment.
  • the dedicated access processing function 511 reads the command information 530 and operates the input / output data 201 based on the command described in the read command information 530. After the execution of the command is completed, the dedicated access processing function 511 writes the execution result of the command to the storage destination address of the RAM 122 described in the command information 530. The execution result is written via the signal line 503.
  • the user program 521 reads the execution result written in the RAM 122. Completion of writing (setting) of the command information 530 and completion of writing of the command execution result are notified to each other by a command execution completion notification and a command information setting completion notification, respectively. The notification is transmitted as an interrupt signal via the signal line 503 by the command execution completion notification and the command information setting completion notification. As in the second embodiment, it is possible to adopt a configuration in which the procedures for command execution completion notification and command information setting completion notification are omitted.
  • the operation of the FA controller system 3 according to the third embodiment is the same as that of the second embodiment except that the dedicated access processing function 511 is written to the RAM 122 instead of the shared memory 103, and thus the description thereof is omitted.
  • the first MCU 501 is configured to be able to directly write the execution result to the RAM 122 included in the second MCU 502, so the user obtains the execution result without accessing the shared memory 103. can do.
  • control system As described above, the control system, the control device, and the control method according to the present invention are applied to the control system, the control device, and the control method for controlling the controlled device by the user program described in a general-purpose programming language such as C language. It is preferable.

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Abstract

An FA controller (100) is provided with a shared memory (103), a first MCU (101) for performing refresh processing between data stored in a memory area (131) reserved in a shared memory (103) and input/output data (201) stored in an input/output data storage unit, and a second MCU (102) operating on the basis of a user program (124) for manipulating data stored in the memory area (131) of the shared memory (103); wherein the second MCU (102) writes refresh information (130) describing the settings for the refresh processing into the memory area (131) of the shared memory (103), and the first MCU (101) performs the refresh processing according to the refresh information (130) that has been written into the memory area (131).

Description

制御システム、制御装置および制御方法Control system, control device, and control method
 本発明は、C言語などの汎用プログラミング言語で記述されたユーザプログラムで被制御装置を制御する制御システム、制御装置および制御方法に関する。 The present invention relates to a control system, a control device, and a control method for controlling a controlled device with a user program written in a general-purpose programming language such as C language.
 一般的なファクトリーオートメーション(FA)の分野では、機械制御に特化したラダー言語などを用いたプログラマブルロジックコントローラ(PLC)によって被制御装置の制御が行われることが多い。これに対して、近年、PLCとの間の互換性を備え、汎用プログラミング言語で記述される高度な処理を実行するユーザプログラムをPLC用のラダー言語に移植することなく使用することができるFAコントローラ(制御装置)が開発されている。例えば、C言語を用いたFAコントローラによれば、過去のC言語プログラム資産が流用でき、かつ三角関数などラダー言語が不得意とする関数も簡単に扱うことができる。FAコントローラは、PLCとの間の互換性を備えるため、PLC用の拡張バスを介してPLC用の豊富に用意された種々の拡張モジュールを接続したシステム(制御システム)を構築することができるようになっている。 In the field of general factory automation (FA), a controlled device is often controlled by a programmable logic controller (PLC) using a ladder language specialized in machine control. On the other hand, in recent years, an FA controller that has compatibility with a PLC and can be used without porting a user program that executes advanced processing described in a general-purpose programming language to a ladder language for PLC. (Control device) has been developed. For example, according to the FA controller using the C language, past C language program assets can be diverted, and functions that the ladder language is not good at, such as trigonometric functions, can be easily handled. Since the FA controller has compatibility with the PLC, it is possible to construct a system (control system) in which various expansion modules prepared for PLC are connected via an expansion bus for PLC. It has become.
 ユーザプログラムが拡張モジュールの1つである入出力モジュールへアクセスするには、PLCと同等の信頼性・拡張性・汎用性を確保するために、多くの手順や操作が必要となる。そこでFAコントローラでは、上記の複雑な手順や操作を隠蔽し、自動化した専用アクセス処理関数を提供することでユーザのプログラミング利便性を向上させていた。 ・ To access the input / output module, which is one of the expansion modules, the user program requires many procedures and operations in order to ensure the same reliability, expandability, and versatility as the PLC. Therefore, the FA controller conceals the above complicated procedures and operations and provides an automated dedicated access processing function to improve user programming convenience.
特開2004-94473号公報JP 2004-94473 A
 ところで、FAコントローラにおいては、汎用プログラミング言語で記述されたユーザプログラムは、リアルタイムOS(Real Time Operating System:RTOS)の制御の下に実行される。RTOSには様々な種類があり、RTOSの種類毎に、提供されるライブラリやグラフィカルユーザインタフェース、開発環境など利用環境が異なる。ユーザが選択するRTOSの種類は多岐にわたるため、FAコントローラも様々なRTOSを搭載可能とすることが要望される。 By the way, in the FA controller, a user program written in a general-purpose programming language is executed under the control of a real-time OS (Real Time Operating System: RTOS). There are various types of RTOS, and usage environments such as provided libraries, graphical user interfaces, and development environments differ for each type of RTOS. Since the types of RTOS selected by the user are diverse, it is desired that the FA controller can also be equipped with various RTOSs.
 前述の専用アクセス処理関数は、RTOSに依存しており、RTOSの種類が変更された場合には専用アクセス処理関数の再実装が必要となる。しかしながら、前述の要望に対応するためにRTOS毎に専用アクセス処理関数を用意することは、メーカにとって大きな負担となるという問題があった。この問題に対する1つの解として、夫々別々のRTOSを実行可能な複数CPUを備えさせ、専用アクセス処理関数とユーザプログラムとを異なるCPU上で動作させる構成が考えられる。 The above-mentioned dedicated access processing function depends on the RTOS, and when the RTOS type is changed, it is necessary to re-implement the dedicated access processing function. However, preparing a dedicated access processing function for each RTOS in order to meet the above-described demand has a problem that it imposes a heavy burden on the manufacturer. As one solution to this problem, a configuration in which a plurality of CPUs each capable of executing different RTOSs is provided, and the dedicated access processing function and the user program are operated on different CPUs can be considered.
 特許文献1には、被制御装置に対する制御処理と制御処理を実行させるための各種操作を送受信するための通信制御処理とを夫々独立したOSで動作するCPUで動作させ、CPU同士は共有記憶部を介してデータの保存・読み出しなどを実行する技術が開示されている。しかしながら、特許文献1の技術によれば、二つのCPU間の通信の手順が複雑であるため、該技術を上記構成に採用すると、ユーザ側のプログラミングの利便性の低下を招いてしまう。 In Patent Document 1, a control process for a controlled apparatus and a communication control process for transmitting and receiving various operations for executing the control process are operated by CPUs that are operated by independent OSs, and the CPUs are shared storage units. A technique for executing data storage / reading via the Internet is disclosed. However, according to the technique of Patent Document 1, since the communication procedure between two CPUs is complicated, if this technique is adopted in the above configuration, the convenience of programming on the user side is reduced.
 本発明は、上記に鑑みてなされたものであって、ユーザが利用するOSに依存しない専用アクセス処理をユーザが簡単に実行することができる制御システム、制御装置および制御方法を得ることを目的とする。 The present invention has been made in view of the above, and an object thereof is to obtain a control system, a control device, and a control method that allow a user to easily execute a dedicated access process that does not depend on an OS used by the user. To do.
 上述した課題を解決し、目的を達成するために、本発明は、被制御装置に接続され、該被制御装置との間の第1入出力データが格納される入出力データ記憶部を備える入出力モジュールと、第2入出力データが格納される共有記憶部と、前記共有記憶部に格納されている第2入出力データと前記入出力データ記憶部に格納されている第1入出力データとの間のリフレッシュ処理を実行する第1制御部と、ユーザプログラムに基づいて動作し、前記共有記憶部に格納されている第2入出力データを操作する第2制御部と、を備える制御装置と、を備え、前記第2制御部は、前記リフレッシュ処理にかかる設定を記述したリフレッシュ情報を前記共有記憶部に書き込み、前記第1制御部は、前記共有記憶部に書き込まれたリフレッシュ情報に従って前記リフレッシュ処理を実行する、ことを特徴とする。 In order to solve the above-described problems and achieve the object, the present invention provides an input / output data storage unit that is connected to a controlled device and stores first input / output data with the controlled device. An output module; a shared storage unit storing second input / output data; second input / output data stored in the shared storage unit; and first input / output data stored in the input / output data storage unit A control device comprising: a first control unit that executes a refresh process between the first control unit, and a second control unit that operates based on a user program and operates second input / output data stored in the shared storage unit; The second control unit writes the refresh information describing the settings for the refresh process to the shared storage unit, and the first control unit follows the refresh information written to the shared storage unit. Executing the refresh process Te, characterized in that.
 本発明にかかる制御システムは、ユーザが利用するOSに依存しない専用アクセス処理をユーザが簡単に実行することができる。 The control system according to the present invention allows the user to easily execute a dedicated access process that does not depend on the OS used by the user.
図1は、実施の形態1のFAコントローラシステムのハードウェア構成を説明する図である。FIG. 1 is a diagram illustrating a hardware configuration of the FA controller system according to the first embodiment. 図2は、各構成要素間の通信を概要的に説明する図である。FIG. 2 is a diagram schematically illustrating communication between the components. 図3は、リフレッシュ情報のデータ構造の一例を示す図である。FIG. 3 is a diagram illustrating an example of a data structure of the refresh information. 図4は、リフレッシュ情報を設定する動作を説明するフローチャートである。FIG. 4 is a flowchart for explaining the operation for setting the refresh information. 図5は、自動リフレッシュ処理の動作を説明するフローチャートである。FIG. 5 is a flowchart for explaining the operation of the automatic refresh process. 図6は、手動リフレッシュ処理の動作を説明するフローチャートである。FIG. 6 is a flowchart for explaining the operation of the manual refresh process. 図7は、手動リフレッシュ処理を実行させる際の動作を説明するフローチャートである。FIG. 7 is a flowchart for explaining the operation when the manual refresh process is executed. 図8は、リフレッシュ処理終了処理の動作を説明するフローチャートである。FIG. 8 is a flowchart for explaining the operation of the refresh process end process. 図9は、実施の形態2の各構成要素間の通信を概要的に説明する図である。FIG. 9 is a diagram schematically illustrating communication between each component according to the second embodiment. 図10は、コマンド情報のデータ構造の一例を示す図である。FIG. 10 is a diagram illustrating an example of a data structure of command information. 図11は、コマンド情報を設定する動作を説明するフローチャートである。FIG. 11 is a flowchart for explaining the operation of setting command information. 図12は、専用アクセス処理関数がコマンドを実行する動作を説明するフローチャートである。FIG. 12 is a flowchart illustrating an operation in which a dedicated access processing function executes a command. 図13は、実施の形態3のFAコントローラシステムのハードウェア構成を説明する図である。FIG. 13 is a diagram illustrating a hardware configuration of the FA controller system according to the third embodiment. 図14は、各構成要素間の通信を概要的に説明する図である。FIG. 14 is a diagram schematically illustrating communication between the components. 図15は、コマンド情報の一例を示す図である。FIG. 15 is a diagram illustrating an example of command information.
 以下に、本発明にかかる制御システム、制御装置および制御方法の実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。 Hereinafter, embodiments of a control system, a control device, and a control method according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.
実施の形態1.
 図1は、本発明の実施の形態1の制御システムとしてのFAコントローラシステムのハードウェア構成を説明する図である。FAコントローラシステム1は、実施の形態1の制御装置としてのFAコントローラ100と、入出力モジュール200とがPLC用の拡張バス300に接続されて構成されている。
Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a hardware configuration of an FA controller system as a control system according to the first embodiment of the present invention. The FA controller system 1 is configured by connecting an FA controller 100 as a control device of the first embodiment and an input / output module 200 to an expansion bus 300 for PLC.
 入出力モジュール200は、産業用機器などの被制御装置(図示せず)に接続されており、該被制御装置の出力データおよび該被制御装置への入力データ(入出力データ201)を記憶するための入出力データ記憶部202と、拡張バス300を介したFAコントローラ100との間の通信のための通信インタフェースである通信コントローラ203とを備えている。通信コントローラ203は、入出力データ201を拡張バス300上を流れる電気信号に変換する。 The input / output module 200 is connected to a controlled device (not shown) such as an industrial device, and stores output data of the controlled device and input data (input / output data 201) to the controlled device. Input / output data storage unit 202 and a communication controller 203 that is a communication interface for communication with the FA controller 100 via the expansion bus 300. The communication controller 203 converts the input / output data 201 into an electrical signal that flows on the expansion bus 300.
 FAコントローラ100は、拡張バス300で拡張された入出力モジュール200に専用のアクセス手順に従った専用アクセス処理を実現するためのプログラムである専用アクセス処理関数115を実行するCPU110を搭載する第1MCU101と、ユーザプログラム124を実行するCPU120を搭載する第2MCU102と、第1MCU101と第2MCU102との間の通信のために使用される共有メモリ103と、を備えている。共有メモリ103は2ポートメモリであって、共有メモリ103が備える夫々のポートに信号線104、105でMCU101、102が夫々接続されている。また、第1MCU101と第2MCU102との間は、信号線106で直接接続されている。 The FA controller 100 includes a first MCU 101 that includes a CPU 110 that executes a dedicated access processing function 115 that is a program for realizing dedicated access processing in accordance with a dedicated access procedure for the input / output module 200 expanded by the expansion bus 300. The second MCU 102 on which the CPU 120 that executes the user program 124 is mounted, and the shared memory 103 that is used for communication between the first MCU 101 and the second MCU 102. The shared memory 103 is a two-port memory, and MCUs 101 and 102 are connected to respective ports of the shared memory 103 by signal lines 104 and 105, respectively. Further, the first MCU 101 and the second MCU 102 are directly connected by a signal line 106.
 第1MCU101は、より詳しくは、前述のCPU110のほか、EEPROM111、RAM112、外部インタフェース113、通信コントローラ114を備えており、これらの構成要素は第1MCU101の内部バスに夫々接続されている。EEPROM111には、専用アクセス処理関数115と、第1MCU101の基本制御を実行するリアルタイムOSである第1RTOS116とが格納されている。 More specifically, the first MCU 101 includes an EEPROM 111, a RAM 112, an external interface 113, and a communication controller 114 in addition to the CPU 110 described above, and these components are connected to the internal bus of the first MCU 101, respectively. The EEPROM 111 stores a dedicated access processing function 115 and a first RTOS 116 that is a real-time OS that executes basic control of the first MCU 101.
 RAM112は、プログラム展開用領域として使用される。FAコントローラ100が起動されると、専用アクセス処理関数115および第1RTOS116は、内部バスを介してRAM112に送られて、RAM112のプログラム展開用領域に夫々展開される。CPU110は、RAM112に展開された第1RTOS116を実行する。CPU110は、第1RTOS116による基本制御の下で専用アクセス処理関数115を実行することによって、専用アクセス処理を実現する。 The RAM 112 is used as a program development area. When the FA controller 100 is activated, the dedicated access processing function 115 and the first RTOS 116 are sent to the RAM 112 via the internal bus and are expanded in the program expansion area of the RAM 112, respectively. The CPU 110 executes the first RTOS 116 expanded on the RAM 112. The CPU 110 implements the dedicated access processing by executing the dedicated access processing function 115 under basic control by the first RTOS 116.
 外部インタフェース113は、第2MCU102との間の通信のためのインタフェースであって、共有メモリ103にアクセスするための信号線104および第2MCU102との間で割り込み信号を送受信するための信号線106が接続されている。通信コントローラ114は、拡張バス300を介して入出力データ201にアクセスするための通信インタフェースである。 The external interface 113 is an interface for communication with the second MCU 102, and is connected to a signal line 104 for accessing the shared memory 103 and a signal line 106 for transmitting and receiving interrupt signals between the second MCU 102. Has been. The communication controller 114 is a communication interface for accessing the input / output data 201 via the expansion bus 300.
 第2MCU102は、CPU120のほか、EEPROM121、RAM122、外部インタフェース123を備えており、これらの構成要素は第2MCU102の内部バスに夫々接続されている。EEPROM121には、入出力データ201のうちの入出データの読み出しおよび出力データの書き込みを行うためのユーザにより作成されるユーザプログラム124と、ユーザプログラム124を動作させるための第2RTOS125とが格納されている。なお、ユーザは、ユーザプログラム124を動作させることができるのであれば所望の種類の第2RTOS125を選択することができる。 The second MCU 102 includes an EEPROM 121, a RAM 122, and an external interface 123 in addition to the CPU 120, and these components are connected to the internal bus of the second MCU 102, respectively. The EEPROM 121 stores a user program 124 created by a user for reading input / output data of the input / output data 201 and writing output data, and a second RTOS 125 for operating the user program 124. . Note that the user can select a desired type of second RTOS 125 as long as the user program 124 can be operated.
 RAM122は、RAM112と同じく、プログラム展開用領域として使用される。FAコントローラ100が起動されると、ユーザプログラム124および第2RTOS125は、第2MCU102の内部バスを介してRAM122に送られて、RAM122のプログラム展開用領域に夫々展開される。CPU120は、RAM122に展開された第2RTOS125を実行する。CPU120は、第2RTOS125による制御の下でユーザプログラム124を実行する。 The RAM 122 is used as a program development area, like the RAM 112. When the FA controller 100 is activated, the user program 124 and the second RTOS 125 are sent to the RAM 122 via the internal bus of the second MCU 102 and are expanded in the program expansion area of the RAM 122, respectively. The CPU 120 executes the second RTOS 125 expanded on the RAM 122. The CPU 120 executes the user program 124 under the control of the second RTOS 125.
 外部インタフェース123は、第1MCU101との間の通信のためのインタフェースであって、共有メモリ103にアクセスするための信号線105および第2MCU101との間で各種割り込み信号を送受信するための信号線106が接続されている。 The external interface 123 is an interface for communication with the first MCU 101, and includes a signal line 105 for accessing the shared memory 103 and a signal line 106 for transmitting and receiving various interrupt signals to and from the second MCU 101. It is connected.
 図2は、上記のように構成される実施の形態1のFAコントローラシステム1において専用アクセス処理関数115とユーザプログラム124との間の専用アクセス処理にかかる各構成要素間の通信を概要的に説明する図である。 FIG. 2 schematically illustrates communication between components related to dedicated access processing between the dedicated access processing function 115 and the user program 124 in the FA controller system 1 of the first embodiment configured as described above. It is a figure to do.
 図2において、入出力データ記憶部202は、M個の入出力データが格納されている。共有メモリ103には、専用アクセス処理関数115によって所定のタイミングで入出力データ201との間で同期される処理(リフレッシュ処理)が実行されるデータを格納するためのメモリエリア131が確保されている。ここでは、共有メモリ103にはN個のメモリエリアが確保されている。リフレッシュ処理とは、より詳しくは、入出力データ201のうちの入力データをメモリエリア131に用意された対応する入力データで上書きし、メモリエリア131に格納されている出力データを入出力データ201のうちの対応する出力データで上書きすることによって、入出力データ記憶部202に格納されている入出力データ201とメモリエリア131に格納されているデータとを同一の状態にする動作をいう。ユーザプログラム124は、メモリエリア131に格納されているデータを信号線105を介してリード/ライトすることによって、間接的に入出力データ201にアクセスすることができる。専用アクセス処理関数115は、所定の時間間隔で、または信号線106を介してユーザプログラム124から指示(リフレッシュ実行指示)を受けたタイミングで、データのリフレッシュ処理を実行する。所定の時間間隔で実行されるリフレッシュ処理を自動リフレッシュ処理、リフレッシュ実行指示を受けたタイミングで実行されるリフレッシュ処理を手動リフレッシュ処理ということとする。 In FIG. 2, the input / output data storage unit 202 stores M input / output data. The shared memory 103 has a memory area 131 for storing data to be processed (refresh processing) synchronized with the input / output data 201 at a predetermined timing by the dedicated access processing function 115. . Here, N memory areas are secured in the shared memory 103. More specifically, the refresh process overwrites the input data in the input / output data 201 with the corresponding input data prepared in the memory area 131 and replaces the output data stored in the memory area 131 with the input / output data 201. This is an operation of making the input / output data 201 stored in the input / output data storage unit 202 and the data stored in the memory area 131 in the same state by overwriting with corresponding output data. The user program 124 can indirectly access the input / output data 201 by reading / writing data stored in the memory area 131 via the signal line 105. The dedicated access processing function 115 executes data refresh processing at a predetermined time interval or at a timing when an instruction (refresh execution instruction) is received from the user program 124 via the signal line 106. The refresh process executed at a predetermined time interval is referred to as an automatic refresh process, and the refresh process executed at a timing when a refresh execution instruction is received is referred to as a manual refresh process.
 リフレッシュ処理の開始/停止などを含む専用アクセス処理関数115への詳細な動作設定は、共有メモリ103に格納されたリフレッシュ情報130を用いて実行される。図3は、リフレッシュ情報130のデータ構造の一例を示す図である。 Detailed operation setting to the dedicated access processing function 115 including start / stop of the refresh process is executed using the refresh information 130 stored in the shared memory 103. FIG. 3 is a diagram illustrating an example of the data structure of the refresh information 130.
 図3に示すように、この例においては、リフレッシュ情報130は、上段から順番に、自動リフレッシュ処理を実行するか手動リフレッシュ処理を実行するかリフレッシュ情報130を無効とするかを示すリフレッシュ動作設定フィールド、自動リフレッシュ処理を実行する時間間隔(周期)を設定するフィールド、自動リフレッシュ処理の開始/停止を指示するための自動リフレッシュ実行指示フィールド、手動リフレッシュ処理の開始/停止を指示するための手動リフレッシュ実行指示フィールド、入出力データ201のうちのリフレッシュ処理対象のデータ名を示すフィールド、同期対象のデータの格納先メモリエリアを示すフィールド、リフレッシュ処理が停止中であるか動作中であるかを示す専用アクセス処理関数115によって更新管理されるステータス情報(リフレッシュ状態)が記入されるフィールドを含んでいる。なお、ここでは、入出力データのデータ名は入出力データ記憶部202における格納アドレスに対応付けられており、専用アクセス処理関数115は入出力データのデータ名に基づいて入出力データ記憶部202における対応する位置にアクセスできるものとしている。 As shown in FIG. 3, in this example, the refresh information 130 is a refresh operation setting field that indicates whether to execute the automatic refresh process, the manual refresh process, or invalidate the refresh information 130 in order from the top. , A field for setting a time interval (cycle) for executing automatic refresh processing, an automatic refresh execution instruction field for instructing start / stop of automatic refresh processing, and manual refresh execution for instructing start / stop of manual refresh processing Dedicated access indicating the instruction field, the field indicating the data name of the refresh processing target in the input / output data 201, the field indicating the storage destination memory area of the data to be synchronized, and indicating whether the refresh processing is stopped or operating By processing function 115 Status information updated managed (refresh state) contains a field to be filled. Here, the data name of the input / output data is associated with the storage address in the input / output data storage unit 202, and the dedicated access processing function 115 is based on the data name of the input / output data. The corresponding position can be accessed.
 ユーザプログラム124は、リフレッシュ情報130の共有メモリへの書き込み(設定)を完了すると、リフレッシュ情報130の設定が完了した旨の通知であるリフレッシュ情報設定完了通知を信号線106を介して専用アクセス処理関数115へ発行する。専用アクセス処理関数115は、該通知を受信すると、共有メモリ103に書き込まれたリフレッシュ情報130を読み出して、読み出したリフレッシュ情報130にしたがったリフレッシュ処理を実行する。 When the user program 124 completes writing (setting) of the refresh information 130 to the shared memory, the user program 124 sends a refresh information setting completion notification, which is a notification that the setting of the refresh information 130 is completed, via the signal line 106 to the dedicated access processing function. Issue to 115. When the dedicated access processing function 115 receives the notification, the dedicated access processing function 115 reads the refresh information 130 written in the shared memory 103 and executes the refresh processing according to the read refresh information 130.
 なお、ここでは、ユーザプログラム124は信号線106を介してリフレッシュ情報設定完了通知を発行することによってリフレッシュ情報130の書き込み完了を通知するようにしているが、専用アクセス処理関数115にリフレッシュ情報130が設定される位置を常時監視させるようにして、信号線106を介した通知の手順を省略するようにしてもよい。また、手動リフレッシュ処理におけるリフレッシュ実行指示は信号線106を介して通知されることとしているが、ユーザプログラム124は共有メモリ103の所定の箇所にリフレッシュを実行させる指示内容を書き込み、専用アクセス処理関数115は該内容が書き込まれる箇所を常時監視させるように構成することによって、ユーザプログラム124から専用アクセス処理関数115へ実行指示が伝達されるようにしてもよい。 Here, the user program 124 notifies the completion of writing of the refresh information 130 by issuing a refresh information setting completion notification via the signal line 106, but the refresh information 130 is sent to the dedicated access processing function 115. The procedure for notification via the signal line 106 may be omitted by constantly monitoring the set position. In addition, a refresh execution instruction in the manual refresh process is notified via the signal line 106, but the user program 124 writes the instruction content for executing the refresh to a predetermined location of the shared memory 103, and the dedicated access processing function 115. May be configured to always monitor the portion where the content is written, so that the execution instruction is transmitted from the user program 124 to the dedicated access processing function 115.
 このように、実施の形態1では、専用アクセス処理関数115は、共有メモリ103に設定されたリフレッシュ情報130に基づいてメモリエリア131に格納されたデータを入出力データ201に同期するようになっているので、ユーザプログラム124は共有メモリ103に対する単純なメモリアクセスを実装するだけで入出力データ201を操作することができる。また、専用アクセス処理関数115とユーザプログラム124との間で通信を行うことができるようになっているので、ユーザが選択する第2RTOS125の種類や、さらにはCPU120の種類が変更されても、専用アクセス処理関数115を再実装することなくCPU110、120間の通信を実行することができる。また、CPU110、120間の通信は、共有メモリ103に対するメモリアクセスのみユーザプログラム124を実装するだけで実現されるので、ユーザにとってのプログラミングの利便性が高いものとなっている。 Thus, in the first embodiment, the dedicated access processing function 115 synchronizes the data stored in the memory area 131 with the input / output data 201 based on the refresh information 130 set in the shared memory 103. Therefore, the user program 124 can operate the input / output data 201 only by implementing simple memory access to the shared memory 103. In addition, since communication can be performed between the dedicated access processing function 115 and the user program 124, even if the type of the second RTOS 125 selected by the user or the type of the CPU 120 is changed, the dedicated access processing function 115 and the user program 124 can be used. Communication between the CPUs 110 and 120 can be executed without re-implementing the access processing function 115. Further, since the communication between the CPUs 110 and 120 is realized only by mounting the user program 124 for memory access to the shared memory 103, the convenience of programming for the user is high.
 次に、本発明の実施の形態1の詳細な動作を図4~図8を参照して説明する。図4は、ユーザプログラム124がリフレッシュ情報130を設定する動作を説明するフローチャートである。 Next, the detailed operation of the first embodiment of the present invention will be described with reference to FIGS. FIG. 4 is a flowchart for explaining the operation in which the user program 124 sets the refresh information 130.
 図4に示すように、ユーザプログラム124は、まず、リフレッシュ情報130を作成して共有メモリ103に書き込む(ステップS1)。ユーザプログラム124は、リフレッシュ情報130の記述内容によって、自動リフレッシュ処理の開始/停止、自動リフレッシュ処理の実行周期の変更、手動リフレッシュ処理の開始/停止を指示することができる。例えば、ユーザプログラム124は、自動リフレッシュ処理を開始させる際には、リフレッシュ動作設定フィールドに”自動リフレッシュ処理”を記述し、自動リフレッシュ処理の周期を設定するフィールドに所望の時間間隔(たとえば1000msec)を記述し、自動リフレッシュ実行指示フィールドに”開始”を記述するとよい。また、自動リフレッシュ処理の実行周期の変更する際には、上述のように記述されているリフレッシュ情報130のうちの自動リフレッシュ処理の周期を設定するフィールドに変更後の時間間隔を記述するとよい。また、手動リフレッシュ処理を開始させる際には、ユーザプログラム124は、リフレッシュ動作設定フィールドに”手動リフレッシュ処理”を記述し、手動リフレッシュ実行指示フィールドに”開始”を記述するとよい。また、リフレッシュ処理を停止する際、実行中のリフレッシュ処理に対応するリフレッシュ実行指示フィールドに”停止”を記述するとよい。なお、ユーザプログラム124は、リフレッシュ動作設定フィールドに”自動リフレッシュ処理、手動リフレッシュ処理”を記述して、自動リフレッシュ処理と手動リフレッシュ処理とを同時に実行させるようにしてもよい。リフレッシュ情報130の書き込み完了後、リフレッシュ情報設定完了通知を発行し(ステップS2)、ユーザプログラム124によるリフレッシュ情報130の設定時の動作がリターンされる。 As shown in FIG. 4, the user program 124 first creates the refresh information 130 and writes it in the shared memory 103 (step S1). The user program 124 can instruct start / stop of the automatic refresh process, change of the execution cycle of the automatic refresh process, and start / stop of the manual refresh process according to the description content of the refresh information 130. For example, when starting the automatic refresh process, the user program 124 describes “auto refresh process” in the refresh operation setting field, and sets a desired time interval (for example, 1000 msec) in the field for setting the cycle of the automatic refresh process. Describe it and describe "Start" in the automatic refresh execution instruction field. Further, when changing the execution cycle of the automatic refresh process, the changed time interval may be described in the field for setting the cycle of the automatic refresh process in the refresh information 130 described as described above. When starting the manual refresh process, the user program 124 may describe “manual refresh process” in the refresh operation setting field and “start” in the manual refresh execution instruction field. When stopping the refresh process, “stop” may be described in the refresh execution instruction field corresponding to the refresh process being executed. Note that the user program 124 may describe “automatic refresh processing and manual refresh processing” in the refresh operation setting field so that the automatic refresh processing and manual refresh processing are executed simultaneously. After completing the writing of the refresh information 130, a refresh information setting completion notification is issued (step S2), and the operation at the time of setting the refresh information 130 by the user program 124 is returned.
 専用アクセス処理関数115は、リフレッシュ情報設定完了通知を受信したとき、リフレッシュ情報130を読み出す。専用アクセス処理関数115は、読み出したリフレッシュ情報130が自動リフレッシュ処理を開始する旨の指示が記述されていたとき、自動リフレッシュ処理をスタートする。図5は、専用アクセス処理関数115による自動リフレッシュ処理の動作を説明するフローチャートである。 The dedicated access processing function 115 reads the refresh information 130 when the refresh information setting completion notification is received. The dedicated access processing function 115 starts the automatic refresh process when the read refresh information 130 describes an instruction to start the automatic refresh process. FIG. 5 is a flowchart for explaining the operation of automatic refresh processing by the dedicated access processing function 115.
 図5に示すように、専用アクセス処理関数115は、自動リフレッシュ処理をスタートすると、リフレッシュ情報130のリフレッシュ状態を示すフィールドに”動作中”を書き込み(ステップS11)、時間のカウントを開始する(ステップS12)。そして、専用アクセス処理関数115は、カウント値がリフレッシュ情報130により設定された周期の時間に達したか否かを判定する(ステップS13)。専用アクセス処理関数115は、カウント値が設定された周期の時間に達していなかった場合(ステップS13、No)、該時間に達するまでステップS13の判定を繰り返し実行する。専用アクセス処理関数115は、カウント値が該時間に達した場合(ステップS13、Yes)、ステップS13の繰り返し処理を抜け、リフレッシュ情報130に記述されたデータ名により指定された入出力データとメモリエリア131における指定されたエリアのデータとを同期させる(ステップS14)。そして、専用アクセス処理関数115は、ステップS12に移行し、カウント値をリセットして再び時間カウントを開始する。 As shown in FIG. 5, when the automatic refresh process is started, the dedicated access processing function 115 writes “in operation” in the field indicating the refresh state of the refresh information 130 (step S11), and starts counting time (step S11). S12). Then, the dedicated access processing function 115 determines whether or not the count value has reached the period of time set by the refresh information 130 (step S13). When the count value has not reached the set cycle time (No in step S13), the dedicated access processing function 115 repeatedly executes the determination in step S13 until the time is reached. When the count value reaches the time (step S13, Yes), the dedicated access processing function 115 exits the repetition processing of step S13, and the input / output data and memory area specified by the data name described in the refresh information 130 The data of the designated area in 131 is synchronized (step S14). Then, the dedicated access processing function 115 proceeds to step S12, resets the count value, and starts counting time again.
 このように、自動リフレッシュ処理では、メモリエリア131に格納されているデータが入出力データ201に定期的に同期されるので、ユーザプログラム124は、いったんリフレッシュ情報130を設定して自動リフレッシュ処理を開始すると、メモリエリア131にアクセスすることによって入出力データ201の内容を略リアルタイムで操作することができるようになる。 As described above, in the automatic refresh process, the data stored in the memory area 131 is periodically synchronized with the input / output data 201. Therefore, the user program 124 once sets the refresh information 130 and starts the automatic refresh process. Then, by accessing the memory area 131, the contents of the input / output data 201 can be manipulated in substantially real time.
 専用アクセス処理関数115は、読み出したリフレッシュ情報130が手動リフレッシュ処理を開始する旨の指示が記述されていたとき、手動リフレッシュ処理をスタートする。図6は、専用アクセス処理関数115による手動リフレッシュ処理の動作を説明するフローチャートである。 The dedicated access processing function 115 starts the manual refresh processing when the read refresh information 130 describes an instruction to start the manual refresh processing. FIG. 6 is a flowchart for explaining the operation of manual refresh processing by the dedicated access processing function 115.
 図6に示すように、専用アクセス処理関数115は、手動リフレッシュ処理をスタートすると、リフレッシュ情報130のリフレッシュ状態を示すフィールドに”動作中”を書き込み(ステップS21)、リフレッシュ実行指示を受信したか否かを判定する(ステップS22)。専用アクセス処理関数115は、リフレッシュ実行指示を受信しなかったと判定した場合(ステップS22、No)、ステップS22の判定処理を繰り返し実行する。専用アクセス処理関数115は、リフレッシュ実行指示を受信したとき(ステップS22、Yes)、ステップS22の繰り返し処理を抜け、リフレッシュ情報130により指定された入出力データとメモリエリア131における指定されたエリアのデータとを同期させる(ステップS23)。そして、専用アクセス処理関数115は、再度ステップS22に移行し、リフレッシュ実行指示の受信を待ち受ける。 As shown in FIG. 6, when the dedicated access processing function 115 starts the manual refresh process, “dedicated” is written in the field indicating the refresh state of the refresh information 130 (step S21), and whether or not a refresh execution instruction has been received. Is determined (step S22). When it is determined that the refresh execution instruction has not been received (No at Step S22), the dedicated access processing function 115 repeatedly executes the determination process at Step S22. When the dedicated access processing function 115 receives the refresh execution instruction (step S22, Yes), the dedicated access processing function 115 exits the repetition processing of step S22, and the input / output data specified by the refresh information 130 and the data of the specified area in the memory area 131 are stored. Are synchronized with each other (step S23). Then, the dedicated access processing function 115 proceeds to step S22 again and waits for reception of a refresh execution instruction.
 図7は、ユーザプログラム124による手動リフレッシュ処理を実行させる際の動作を説明するフローチャートである。図7に示すように、ユーザプログラム124は、手動リフレッシュ処理を開始する旨のリフレッシュ情報130を設定後、所望のタイミングでリフレッシュ実行指示を発行する(ステップS31)。リフレッシュ実行指示を発行すると、ステップS23の動作によりメモリエリア131内のデータが入出力データ201に同期されるので、ユーザプログラム124は、該同期されたデータに対してリード/ライトし(ステップS32)、ステップS31へ移行する。 FIG. 7 is a flowchart for explaining the operation when the manual refresh process by the user program 124 is executed. As shown in FIG. 7, after setting the refresh information 130 for starting the manual refresh process, the user program 124 issues a refresh execution instruction at a desired timing (step S31). When the refresh execution instruction is issued, the data in the memory area 131 is synchronized with the input / output data 201 by the operation in step S23, so that the user program 124 reads / writes the synchronized data (step S32). The process proceeds to step S31.
 このように、手動リフレッシュ処理によれば、リフレッシュ実行指示が発行されたタイミングでリフレッシュ処理が実行されるので、ユーザプログラム124は、所望のタイミングで最新の状態の入出力データ201にアクセスできるようになる。 Thus, according to the manual refresh process, the refresh process is executed at the timing when the refresh execution instruction is issued, so that the user program 124 can access the latest input / output data 201 at a desired timing. Become.
 専用アクセス処理関数115は、読み出したリフレッシュ情報130が自動リフレッシュ処理や手動リフレッシュ処理を停止する旨の指示が記述されていたとき、対応するリフレッシュ処理を停止する処理(リフレッシュ処理終了処理)を開始する。図8は専用アクセス処理関数115によるリフレッシュ処理終了処理の動作を説明するフローチャートである。 The dedicated access processing function 115 starts the processing for stopping the corresponding refresh processing (refresh processing end processing) when the read refresh information 130 describes an instruction to stop the automatic refresh processing or manual refresh processing. . FIG. 8 is a flowchart for explaining the operation of the refresh process end process by the dedicated access process function 115.
 図8に示すように、専用アクセス処理関数115は、対応するリフレッシュ動作を停止する(ステップS41)。例えば、自動リフレッシュ処理を停止する場合、専用アクセス処理関数115は、ステップS12~ステップS14の繰り返し処理を停止する。また、手動リフレッシュ処理を停止する場合、専用アクセス処理関数115は、ステップS22~ステップS23の繰り返し処理を停止する。ステップS41の後、専用アクセス処理関数115は、リフレッシュ情報130のリフレッシュ状態を示すフィールドに”停止中”を書き込み(ステップS42)、リフレッシュ処理終了処理がリターンされる。 As shown in FIG. 8, the dedicated access processing function 115 stops the corresponding refresh operation (step S41). For example, when stopping the automatic refresh process, the dedicated access processing function 115 stops the repeated process of steps S12 to S14. When the manual refresh process is stopped, the dedicated access processing function 115 stops the repeated process of steps S22 to S23. After step S41, the dedicated access processing function 115 writes “stopped” in the field indicating the refresh state of the refresh information 130 (step S42), and the refresh process end process is returned.
 以上説明したように、本発明の実施の形態1によれば、FAコントローラ100は、共有メモリ103と、前記共有メモリ103に確保されているメモリエリア131に格納されているデータと入出力データ記憶部202に格納されている入出力データ201との間のリフレッシュ処理を実行する第1MCU101と、ユーザプログラム124に基づいて動作し、前記共有メモリ103のメモリエリア131に格納されているデータを操作する第2MCU102と、を備え、第2MCU102は、前記リフレッシュ処理にかかる設定を記述したリフレッシュ情報130を前記共有メモリ103のメモリエリア131に書き込み、前記第1MCU101は、前記メモリエリア131に書き込まれたリフレッシュ情報130に従ってリフレッシュ処理を実行するように構成したので、ユーザが利用するOSに依存しない専用アクセス処理をユーザが簡単に実行することができるようになる。 As described above, according to the first embodiment of the present invention, the FA controller 100 stores the shared memory 103, the data stored in the memory area 131 secured in the shared memory 103, and the input / output data storage. Operates based on the first MCU 101 that executes the refresh process with the input / output data 201 stored in the unit 202 and the user program 124, and operates the data stored in the memory area 131 of the shared memory 103 A second MCU 102, the second MCU 102 writes the refresh information 130 describing the settings for the refresh process to the memory area 131 of the shared memory 103, and the first MCU 101 writes the refresh information written to the memory area 131. Refresh according to 130 Since it is configured such that the process, it is possible to only access process that is independent of the OS used by the user the user to easily perform.
実施の形態2.
 本発明の実施の形態2では、ユーザプログラムが専用アクセス処理関数に対するコマンドを発行して入出力データに対して所望の操作を実行できるようにした。実施の形態2のFAコントローラシステムのハードウェア構成は、専用アクセス処理関数、ユーザプログラムを除いて実施の形態1と同等であるので、実施の形態2のFAコントローラシステムのハードウェア構成に関する説明は省略する。
Embodiment 2. FIG.
In the second embodiment of the present invention, a user program can issue a command for a dedicated access processing function to execute a desired operation on input / output data. Since the hardware configuration of the FA controller system of the second embodiment is the same as that of the first embodiment except for the dedicated access processing function and the user program, the description of the hardware configuration of the FA controller system of the second embodiment is omitted. To do.
 図9は、実施の形態2のFAコントローラシステムにおいて専用アクセス処理関数とユーザプログラムとの間の専用アクセス処理にかかる各構成要素間の通信を概要的に説明する図である。なお、実施の形態1の構成要素と区別するために、実施の形態2のFAコントローラシステム、FAコントローラ、専用アクセス処理関数、ユーザプログラムには、符号2、符号400、符号401、符号402を夫々付している。図示するように、共有メモリ103には、ユーザプログラム402によって、専用アクセス処理関数401に対するコマンドを記述したコマンド情報403が格納される。専用アクセス処理関数401は、コマンド情報403を読み出して、読み出したコマンド情報403に記述されているコマンドに基づいて入出力データ201を操作する。 FIG. 9 is a diagram schematically illustrating communication between each component related to dedicated access processing between a dedicated access processing function and a user program in the FA controller system of the second embodiment. In order to distinguish from the components of the first embodiment, the FA controller system, FA controller, dedicated access processing function, and user program of the second embodiment are denoted by reference numerals 2, 400, 401, and 402, respectively. It is attached. As shown in the figure, the shared memory 103 stores command information 403 describing a command for the dedicated access processing function 401 by the user program 402. The dedicated access processing function 401 reads the command information 403 and operates the input / output data 201 based on the command described in the read command information 403.
 ここで、コマンドとは、専用アクセス処理関数401において使用可能に規定されたものであればどのようなものであっても構わない。例えば、コマンドとして、入力データの入出力データ記憶部202への書き込みコマンド、出力データの読み出しコマンドを規定することができる。これら以外にも様々なコマンドを規定するようにしてもよい。例えば割り込み信号を発行するタイプの被制御装置が使用される場合がある。このタイプの被制御装置からの割り込み信号としての入出力データを監視し、該割り込み信号がオンになったとき、オンになった旨を実行結果としてユーザプログラム402へ通知させるコマンドを規定してもよい。 Here, the command may be any command as long as it is defined as usable in the dedicated access processing function 401. For example, a command to write input data to the input / output data storage unit 202 and a command to read output data can be defined as commands. In addition to these, various commands may be defined. For example, a controlled device that issues an interrupt signal may be used. Even if the input / output data as an interrupt signal from this type of controlled device is monitored and the interrupt signal is turned on, a command for notifying the user program 402 as an execution result is specified. Good.
 共有メモリ103には、専用アクセス処理関数401がコマンドの実行結果を書き込むためのメモリエリア404が確保されている。コマンド情報403の書き込み(設定)完了、コマンドの実行結果の書き込み完了は、夫々、コマンド情報設定完了通知、コマンド実行完了通知によりCPU110、120間で互いに通知される。コマンド情報設定完了通知、コマンド実行完了通知による通知は、夫々信号線106を介して送信される。なお、専用アクセス処理関数401はコマンド情報403が書き込まれる位置、ユーザプログラム402は実行結果が書き込まれる位置を夫々監視するように構成することによって、コマンド情報設定完了通知、コマンド実行完了通知が通知される手順を省略することができる。 In the shared memory 103, a memory area 404 is reserved for the dedicated access processing function 401 to write a command execution result. Completion of writing (setting) of the command information 403 and completion of writing of the command execution result are notified to each other between the CPUs 110 and 120 by a command information setting completion notification and a command execution completion notification, respectively. The command information setting completion notification and the command execution completion notification are transmitted via the signal line 106, respectively. The dedicated access processing function 401 is configured to monitor the position where the command information 403 is written, and the user program 402 is configured to monitor the position where the execution result is written, so that a command information setting completion notification and a command execution completion notification are notified. Can be omitted.
 図10は、コマンド情報403のデータ構造の一例を示す図である。図示するように、コマンド情報403は、メッセージヘッダとコマンドデータとを含んでいる。メッセージヘッダには、コマンド情報403であることを示すメッセージ種別、コマンド情報403のサイズ、コマンド情報403毎の識別番号、コマンドデータのサイズなどが記述される。コマンドデータには、コマンドの種類を識別するための識別コードと、該コマンドの引数データ毎のサイズおよび内容と、が記述されている。例えばコマンドが入出力データ記憶部202へ入力データを書き込むための書き込みコマンド(WRITE関数)であって、WRITE関数が引数データとして入力データのデータ名および書き込み内容を含む場合、識別コードが記述されるフィールドにはWRITE関数の識別コードが記述され、引数データ1のフィールドには入力データのデータ名のサイズとデータ名とが記述され、引数データ2のフィールドには入力データのサイズと入力データ自身とが記述される。 FIG. 10 is a diagram illustrating an example of the data structure of the command information 403. As shown in the figure, the command information 403 includes a message header and command data. The message header describes the message type indicating the command information 403, the size of the command information 403, the identification number for each command information 403, the size of the command data, and the like. In the command data, an identification code for identifying the type of command and the size and content of each argument data of the command are described. For example, if the command is a write command (WRITE function) for writing input data to the input / output data storage unit 202, and the WRITE function includes the data name of the input data and the content to be written as argument data, an identification code is described. The WRITE function identification code is described in the field, the data name size and data name of the input data are described in the argument data 1 field, and the input data size and the input data itself are described in the argument data 2 field. Is described.
 図11は、ユーザプログラム402がコマンド情報403を設定する動作を説明するフローチャートである。まず、ユーザプログラム402は、コマンド情報403を作成して共有メモリ103に書き込む(ステップS51)。コマンド情報403の書き込み完了後、コマンド情報設定完了通知を発行し(ステップS52)、ユーザプログラム402によるコマンド情報403の設定時の動作がリターンされる。 FIG. 11 is a flowchart illustrating an operation in which the user program 402 sets the command information 403. First, the user program 402 creates command information 403 and writes it to the shared memory 103 (step S51). After the writing of the command information 403 is completed, a command information setting completion notification is issued (step S52), and the operation at the time of setting the command information 403 by the user program 402 is returned.
 専用アクセス処理関数401は、コマンド情報設定完了通知を受信したとき、コマンド情報403を共有メモリ103から読み出す。専用アクセス処理関数401は、読み出したコマンド情報403を実行する。図12は、専用アクセス処理関数401がコマンドを実行する動作を説明するフローチャートである。 The dedicated access processing function 401 reads the command information 403 from the shared memory 103 when receiving the command information setting completion notification. The dedicated access processing function 401 executes the read command information 403. FIG. 12 is a flowchart illustrating an operation in which the dedicated access processing function 401 executes a command.
 図12に示すように、専用アクセス処理関数401は、読み出したコマンド情報403に対応する操作を入出力データ201に対して実行する(ステップS61)。コマンド実行後、専用アクセス処理関数401は、実行結果をメモリエリア404に書き込む(ステップS62)。実行結果の書き込みが完了すると、専用アクセス処理関数401は、コマンド実行完了通知を発行し(ステップS63)、コマンドを実行する動作がリターンとなる。 As shown in FIG. 12, the dedicated access processing function 401 performs an operation corresponding to the read command information 403 on the input / output data 201 (step S61). After executing the command, the dedicated access processing function 401 writes the execution result in the memory area 404 (step S62). When writing of the execution result is completed, the dedicated access processing function 401 issues a command execution completion notification (step S63), and the operation of executing the command returns.
 以上述べたように、FAコントローラ400は、共有メモリ103と、入出力モジュール200が備える入出力データ記憶部202に格納されている入出力データ201を操作する第1MCU101と、ユーザプログラム402に基づいて動作し、前記入出力データ記憶部202に格納されている入出力データ201を操作するためのコマンドを算出する第2MCU102と、を備え、前記第2MCU102は、前記コマンドを記述したコマンド情報403を前記共有メモリ103に書き込み、前記第1MCU101は、前記共有メモリ103に書き込まれたコマンド情報403に基づいて前記入出力データ201の操作を実行するように構成したので、ユーザが利用するOSに依存しない専用アクセス処理をユーザが簡単に実行することができる。また、専用アクセス処理関数401に様々なコマンドを規定しておくことによって、入出力データ201に対し、実施の形態1に比して複雑な操作を実行することができる。 As described above, the FA controller 400 is based on the shared memory 103, the first MCU 101 that operates the input / output data 201 stored in the input / output data storage unit 202 included in the input / output module 200, and the user program 402. A second MCU 102 that operates and calculates a command for operating the input / output data 201 stored in the input / output data storage unit 202, and the second MCU 102 stores command information 403 describing the command Since the first MCU 101 is configured to execute the operation of the input / output data 201 based on the command information 403 written to the shared memory 103, the first MCU 101 is dedicated not depending on the OS used by the user. Easy access processing by the user It can be. Further, by defining various commands in the dedicated access processing function 401, it is possible to execute a complicated operation on the input / output data 201 as compared with the first embodiment.
実施の形態3.
 実施の形態3では、専用アクセス処理関数を実行するMCUがユーザプログラムを実行するMCUが備えるRAMに直接書き込みすることができるように構成され、専用アクセス処理関数はコマンドの実行結果を該RAMに直接書き込むようにした。
Embodiment 3 FIG.
In the third embodiment, the MCU that executes the dedicated access processing function is configured to be able to directly write to the RAM provided in the MCU that executes the user program, and the dedicated access processing function directly outputs the execution result of the command to the RAM. I tried to write.
 図13は、実施の形態3のFAコントローラシステムのハードウェア構成を説明する図である。なお、実施の形態1と同等の構成要素に対しては、実施の形態1と同じ符号を付し、詳細な説明を省略する。図示するように、FAコントローラシステム3は、FAコントローラ500と入出力モジュール200とが拡張バス300に接続されて構成されている。入出力モジュール200は、入出力データ201が格納される入出力データ記憶部202と、通信コントローラ203とを備えている。 FIG. 13 is a diagram illustrating the hardware configuration of the FA controller system according to the third embodiment. In addition, the same code | symbol as Embodiment 1 is attached | subjected to the component equivalent to Embodiment 1, and detailed description is abbreviate | omitted. As shown in the figure, the FA controller system 3 is configured by connecting an FA controller 500 and an input / output module 200 to an expansion bus 300. The input / output module 200 includes an input / output data storage unit 202 in which input / output data 201 is stored, and a communication controller 203.
 FAコントローラ500は、専用アクセス処理関数511を実行するための第1MCU501と、ユーザプログラム521を実行するための第2MCU502と、共有メモリ103とを備えている。MCU501、502は、夫々、信号線104、105で共有メモリ103に接続されている。また、第1MCU501と第2MCU502との間は、データ、アドレス、割り込み信号を送受信することが可能な信号線503で直接接続されている。 The FA controller 500 includes a first MCU 501 for executing the dedicated access processing function 511, a second MCU 502 for executing the user program 521, and the shared memory 103. The MCUs 501 and 502 are connected to the shared memory 103 by signal lines 104 and 105, respectively. Further, the first MCU 501 and the second MCU 502 are directly connected by a signal line 503 capable of transmitting and receiving data, an address, and an interrupt signal.
 第1MCU501は、CPU110、EEPROM111、RAM112、外部インタフェース510、通信コントローラ114を備えている。EEPROM111には、前記した専用アクセス処理関数511および第1RTOS116が格納されている。専用アクセス処理関数511は、EEPROM111から読み出されてRAM112のプログラム展開領域に展開される。CPU110は、RAM112に展開された専用アクセス処理関数511を実行する。外部インタフェース510には、信号線104および信号線503が接続されている。 The first MCU 501 includes a CPU 110, an EEPROM 111, a RAM 112, an external interface 510, and a communication controller 114. The EEPROM 111 stores the dedicated access processing function 511 and the first RTOS 116 described above. The dedicated access processing function 511 is read from the EEPROM 111 and expanded in the program expansion area of the RAM 112. The CPU 110 executes a dedicated access processing function 511 developed in the RAM 112. The signal line 104 and the signal line 503 are connected to the external interface 510.
 第2MCU502は、CPU120、EEPROM121、RAM122、外部インタフェース520を備えている。EEPROM121には、ユーザプログラム521および第2RTOS125が格納されている。ユーザプログラム521は、EEPROM121から読み出されてRAM122のプログラム展開領域に展開される。CPU120は、RAM122に展開されたユーザプログラム521を実行する。外部インタフェース520には、信号線105および信号線503が接続されている。 The second MCU 502 includes a CPU 120, an EEPROM 121, a RAM 122, and an external interface 520. The EEPROM 121 stores a user program 521 and a second RTOS 125. The user program 521 is read from the EEPROM 121 and expanded in the program expansion area of the RAM 122. The CPU 120 executes the user program 521 expanded in the RAM 122. A signal line 105 and a signal line 503 are connected to the external interface 520.
 図14は、実施の形態3のFAコントローラシステム3において専用アクセス処理関数511とユーザプログラム521との間の専用アクセス処理にかかる各構成要素間の通信を概要的に説明する図である。図示するように、共有メモリ103には、ユーザプログラム521によって、専用アクセス処理関数511に対するコマンドおよび該コマンドの実行結果のRAM122における格納先アドレスを記述したコマンド情報530が格納される。図15は、コマンド情報530のデータ構造の一例を示す図である。図示するように、コマンド情報530は、実施の形態2のコマンド情報403に格納先アドレスが追加されたデータ構造を備えている。 FIG. 14 is a diagram schematically illustrating communication between components related to dedicated access processing between the dedicated access processing function 511 and the user program 521 in the FA controller system 3 of the third embodiment. As shown in the figure, in the shared memory 103, command information 530 describing a command for the dedicated access processing function 511 and a storage destination address in the RAM 122 of the execution result of the command is stored by the user program 521. FIG. 15 is a diagram illustrating an example of the data structure of the command information 530. As shown in the figure, the command information 530 has a data structure in which a storage destination address is added to the command information 403 of the second embodiment.
 専用アクセス処理関数511は、コマンド情報530を読み出して、読み出したコマンド情報530に記述されているコマンドに基づいて入出力データ201を操作する。専用アクセス処理関数511はコマンドを実行完了後、該コマンドの実行結果を、コマンド情報530に記述されていたRAM122の格納先アドレスに書き込む。該実行結果の書き込みは、信号線503を介して実行される。ユーザプログラム521は、RAM122に書き込まれた実行結果を読み出す。コマンド情報530の書き込み(設定)完了、コマンドの実行結果の書き込み完了は、夫々コマンド実行完了通知、コマンド情報設定完了通知により互いに通知される。コマンド実行完了通知、コマンド情報設定完了通知により通知は、夫々信号線503を介して割り込み信号として送信される。なお、実施の形態2と同様、コマンド実行完了通知、コマンド情報設定完了通知の手順を省略した構成とすることも可能である。 The dedicated access processing function 511 reads the command information 530 and operates the input / output data 201 based on the command described in the read command information 530. After the execution of the command is completed, the dedicated access processing function 511 writes the execution result of the command to the storage destination address of the RAM 122 described in the command information 530. The execution result is written via the signal line 503. The user program 521 reads the execution result written in the RAM 122. Completion of writing (setting) of the command information 530 and completion of writing of the command execution result are notified to each other by a command execution completion notification and a command information setting completion notification, respectively. The notification is transmitted as an interrupt signal via the signal line 503 by the command execution completion notification and the command information setting completion notification. As in the second embodiment, it is possible to adopt a configuration in which the procedures for command execution completion notification and command information setting completion notification are omitted.
 実施の形態3のFAコントローラシステム3の動作は、専用アクセス処理関数511が共有メモリ103ではなくRAM122へ書き込むことを除いて実施の形態2と同等であるので、説明を省略する。 The operation of the FA controller system 3 according to the third embodiment is the same as that of the second embodiment except that the dedicated access processing function 511 is written to the RAM 122 instead of the shared memory 103, and thus the description thereof is omitted.
 以上述べたように、実施の形態3では、第1MCU501は第2MCU502が備えるRAM122に実行結果を直接書き込みすることができるように構成したので、ユーザは共有メモリ103にアクセスすることなく実行結果を取得することができる。 As described above, in the third embodiment, the first MCU 501 is configured to be able to directly write the execution result to the RAM 122 included in the second MCU 502, so the user obtains the execution result without accessing the shared memory 103. can do.
 以上のように、本発明にかかる制御システム、制御装置および制御方法は、C言語などの汎用プログラミング言語で記述されたユーザプログラムで被制御装置を制御する制御システム、制御装置および制御方法に適用して好適である。 As described above, the control system, the control device, and the control method according to the present invention are applied to the control system, the control device, and the control method for controlling the controlled device by the user program described in a general-purpose programming language such as C language. It is preferable.
 1、2、3 FAコントローラシステム
 100、400、500 FAコントローラ
 101、501 第1MCU
 102、502 第2MCU
 103 共有メモリ
 104、105、106、503 信号線
 110、120 CPU
 111、121 EEPROM
 112、122 RAM
 113、123、510、520 外部インタフェース
 114、203 通信コントローラ
 115、401、511 専用アクセス処理関数
 124、402、521 ユーザプログラム
 130 リフレッシュ情報
 131、404 メモリエリア
 200 入出力モジュール
 201 入出力データ
 202 入出力データ記憶部
 300 拡張バス
 403、530 コマンド情報
1, 2, 3 FA controller system 100, 400, 500 FA controller 101, 501 First MCU
102, 502 Second MCU
103 Shared memory 104, 105, 106, 503 Signal line 110, 120 CPU
111, 121 EEPROM
112, 122 RAM
113, 123, 510, 520 External interface 114, 203 Communication controller 115, 401, 511 Dedicated access processing function 124, 402, 521 User program 130 Refresh information 131, 404 Memory area 200 Input / output module 201 Input / output data 202 Input / output data Storage unit 300 Expansion bus 403, 530 Command information

Claims (23)

  1.  被制御装置に接続され、該被制御装置との間の第1入出力データが格納される入出力データ記憶部を備える入出力モジュールと、
     第2入出力データが格納される共有記憶部と、前記共有記憶部に格納されている第2入出力データと前記入出力データ記憶部に格納されている第1入出力データとの間のリフレッシュ処理を実行する第1制御部と、ユーザプログラムに基づいて動作し、前記共有記憶部に格納されている第2入出力データを操作する第2制御部と、を備える制御装置と、
     を備え、
     前記第2制御部は、前記リフレッシュ処理にかかる設定を記述したリフレッシュ情報を前記共有記憶部に書き込み、前記第1制御部は、前記共有記憶部に書き込まれたリフレッシュ情報に従って前記リフレッシュ処理を実行する、
     ことを特徴とする制御システム。
    An input / output module including an input / output data storage unit connected to the controlled device and storing first input / output data with the controlled device;
    A shared storage unit storing second input / output data, and a refresh between the second input / output data stored in the shared storage unit and the first input / output data stored in the input / output data storage unit A control device comprising: a first control unit that executes processing; and a second control unit that operates based on a user program and operates second input / output data stored in the shared storage unit;
    With
    The second control unit writes refresh information describing settings for the refresh process to the shared storage unit, and the first control unit executes the refresh process according to the refresh information written to the shared storage unit ,
    A control system characterized by that.
  2.  前記リフレッシュ情報は、前記第1入出力データを指定する記述と、該指定された第1入出力データに対応する第2入出力データの前記共有記憶部における格納アドレスの記述と、を含むことを特徴とする請求項1に記載の制御システム。 The refresh information includes a description designating the first input / output data and a description of a storage address of the second input / output data corresponding to the designated first input / output data in the shared storage unit. The control system according to claim 1, wherein
  3.  前記リフレッシュ情報は、前記リフレッシュ処理の実行の開始/停止を指示する記述を含む、ことを特徴とする請求項1に記載の制御システム。 The control system according to claim 1, wherein the refresh information includes a description instructing start / stop of execution of the refresh process.
  4.  前記リフレッシュ情報は、実行周期の記述を含み、前記第1制御部は、前記リフレッシュ情報に記述されている実行周期で前記リフレッシュ処理を実行する、
     ことを特徴とする請求項1~請求項3のうちの何れか一項に記載の制御システム。
    The refresh information includes a description of an execution cycle, and the first control unit executes the refresh process at an execution cycle described in the refresh information.
    The control system according to any one of claims 1 to 3, characterized in that:
  5.  前記第2制御部は、前記リフレッシュ処理を実行させるリフレッシュ実行指示を前記第1制御部に発行し、前記第1制御部は、前記リフレッシュ実行指示が発行されたタイミングで前記リフレッシュ処理を実行する、
     ことを特徴とする請求項1~請求項3のうちの何れか一項に記載の制御システム。
    The second control unit issues a refresh execution instruction for executing the refresh process to the first control unit, and the first control unit executes the refresh process at a timing when the refresh execution instruction is issued.
    The control system according to any one of claims 1 to 3, characterized in that:
  6.  前記第1制御部と前記第2制御部との間は割り込み信号線で接続されており、前記リフレッシュ実行指示は前記割込み信号線を介して発行される、
     ことを特徴とする請求項1~請求項3のうちの何れか一項に記載の制御システム。
    The first control unit and the second control unit are connected by an interrupt signal line, and the refresh execution instruction is issued through the interrupt signal line.
    The control system according to any one of claims 1 to 3, characterized in that:
  7.  前記第1制御部と前記第2制御部との間は割り込み信号線で接続されており、前記第2制御部は、前記リフレッシュ情報を前記共有記憶部に書き込み完了したとき、前記第1制御部に前記割込み信号線を介して前記リフレッシュ情報を書き込み完了した旨を通知するリフレッシュ情報設定完了通知を発行する、
     ことを特徴とする請求項1~請求項3のうちの何れか一項に記載の制御システム。
    The first control unit and the second control unit are connected by an interrupt signal line. When the second control unit completes writing the refresh information to the shared storage unit, the first control unit Issuing a refresh information setting completion notification for notifying that the refresh information has been written via the interrupt signal line,
    The control system according to any one of claims 1 to 3, characterized in that:
  8.  被制御装置に接続され、該被制御装置との間の入出力データが格納される入出力データ記憶部を備える入出力モジュールと、
     共有記憶部と、前記入出力データ記憶部に格納されている入出力データを操作する第1制御部と、ユーザプログラムに基づいて動作し、前記入出力データ記憶部に格納されている入出力データを操作するためのコマンドを算出する第2制御部と、
     を備え、
     前記第2制御部は、前記コマンドを記述したコマンド情報を前記共有記憶部に書き込み、前記第1制御部は、前記共有記憶部に書き込まれたコマンド情報に基づいて前記入出力データの操作を実行する、
     ことを特徴とする制御システム。
    An input / output module including an input / output data storage unit connected to the controlled device and storing input / output data between the controlled device;
    A shared storage unit, a first control unit that operates input / output data stored in the input / output data storage unit, and an input / output data that operates based on a user program and is stored in the input / output data storage unit A second control unit for calculating a command for operating
    With
    The second control unit writes command information describing the command to the shared storage unit, and the first control unit performs an operation on the input / output data based on the command information written to the shared storage unit To
    A control system characterized by that.
  9.  前記コマンド情報は、前記コマンドに付随する引数を含む、ことを特徴とする請求項8に記載の制御システム。 The control system according to claim 8, wherein the command information includes an argument accompanying the command.
  10.  前記第2制御部は、前記コマンド情報を前記共有記憶部に書き込み完了したとき、前記コマンド情報を書き込み完了した旨を通知するコマンド情報設定完了通知を前記第1制御部に発行する、
     ことを特徴とする請求項8または請求項9に記載の制御システム。
    The second control unit issues a command information setting completion notification for notifying that the command information has been written to the first control unit when the command information has been written to the shared storage unit.
    The control system according to claim 8 or 9, characterized by the above.
  11.  前記第1制御部と前記第2制御部との間は割り込み信号線で接続されており、前記コマンド情報設定完了通知は前記割込み信号線を介して発行される、
     ことを特徴とする請求項10に記載の制御システム。
    The first control unit and the second control unit are connected by an interrupt signal line, and the command information setting completion notification is issued through the interrupt signal line.
    The control system according to claim 10.
  12.  前記第1制御部は、前記コマンド情報に基づく前記入出力データの操作の実行結果を前記共有記憶部に書き込む、
     ことを特徴とする請求項8または請求項9に記載の制御システム。
    The first control unit writes an execution result of the operation of the input / output data based on the command information in the shared storage unit.
    The control system according to claim 8 or 9, characterized by the above.
  13.  前記第2制御部は、前記第1制御部から書き込み可能なメモリを備え、
     前記コマンド情報は、前記メモリのアドレスの記述を含み、
     前記第1制御部は、前記メインメモリにおける前記コマンド情報に記述されているアドレスが指す位置に前記入出力データの操作の実行結果を書き込む、
     ことを特徴とする請求項8または請求項9に記載の制御システム。
    The second control unit includes a memory writable from the first control unit,
    The command information includes a description of the memory address;
    The first control unit writes an execution result of the operation of the input / output data at a position indicated by an address described in the command information in the main memory;
    The control system according to claim 8 or 9, characterized by the above.
  14.  被制御装置に接続され、該被制御装置との間の第1入出力データが格納される入出力データ記憶部を備える入出力モジュールにバスを介して接続される制御装置であって、
     第2入出力データが格納される共有記憶部と、
     前記共有記憶部に格納されている第2入出力データと前記入出力データ記憶部に格納されている第1入出力データとの間のリフレッシュ処理を実行する第1制御部と、
     ユーザプログラムに基づいて動作し、前記共有記憶部に格納されている第2入出力データを操作する第2制御部と、
     を備え、
     前記第2制御部は、前記リフレッシュ処理にかかる設定を記述したリフレッシュ情報を前記共有記憶部に書き込み、前記第1制御部は、前記共有記憶部に書き込まれたリフレッシュ情報に従って前記リフレッシュ処理を実行する、
     ことを特徴とする制御装置。
    A control device connected to a controlled device and connected to an input / output module including an input / output data storage unit for storing first input / output data with the controlled device via a bus,
    A shared storage unit for storing second input / output data;
    A first control unit that executes a refresh process between the second input / output data stored in the shared storage unit and the first input / output data stored in the input / output data storage unit;
    A second control unit that operates based on a user program and operates second input / output data stored in the shared storage unit;
    With
    The second control unit writes refresh information describing settings for the refresh process to the shared storage unit, and the first control unit executes the refresh process according to the refresh information written to the shared storage unit ,
    A control device characterized by that.
  15.  被制御装置に接続され、該被制御装置との間の入出力データが格納される入出力データ記憶部を備える入出力モジュールにバスを介して接続される制御装置であって、
     共有記憶部と、
     前記入出力データ記憶部に格納されている入出力データを操作する第1制御部と、
     ユーザプログラムに基づいて動作し、前記入出力データ記憶部に格納されている入出力データを操作するためのコマンドを算出する第2制御部と、
     を備え、
     前記第2制御部は、前記コマンドを記述したコマンド情報を前記共有記憶部に書き込み、前記第1制御部は、前記共有記憶部に書き込まれたコマンド情報に基づいて前記入出力データの操作を実行する、
     ことを特徴とする制御装置。
    A control device connected to a controlled device and connected to an input / output module including an input / output data storage unit for storing input / output data with the controlled device via a bus,
    A shared storage unit;
    A first control unit for operating input / output data stored in the input / output data storage unit;
    A second control unit that operates based on a user program and calculates a command for operating the input / output data stored in the input / output data storage unit;
    With
    The second control unit writes command information describing the command to the shared storage unit, and the first control unit performs an operation on the input / output data based on the command information written to the shared storage unit To
    A control device characterized by that.
  16.  被制御装置に接続され、該被制御装置との間の第1入出力データが格納される入出力データ記憶部を備える入出力モジュールと、第2入出力データが格納される共有記憶部と、前記共有記憶部に格納されている第2入出力データと前記入出力データ記憶部に格納されている第1入出力データとの間のリフレッシュ処理を実行する第1制御部と、ユーザプログラムに基づいて動作し、前記共有記憶部に格納されている第2入出力データを操作する第2制御部と、を備える制御装置と、を備える制御システムの制御方法であって、
     前記第2制御部が前記リフレッシュ処理にかかる設定を記述したリフレッシュ情報を前記共有記憶部に書き込む第1ステップと、
     前記第1制御部が、前記共有記憶部に書き込まれたリフレッシュ情報に従って前記リフレッシュ処理を実行する第2ステップと、
     を備えることを特徴とする制御方法。
    An input / output module that is connected to the controlled device and includes an input / output data storage unit that stores the first input / output data between the controlled device, a shared storage unit that stores the second input / output data, A first control unit for executing a refresh process between the second input / output data stored in the shared storage unit and the first input / output data stored in the input / output data storage unit; and a user program. A control device comprising: a second control unit that operates and operates second input / output data stored in the shared storage unit;
    A first step in which the second control unit writes in the shared storage unit refresh information describing settings for the refresh process;
    A second step in which the first control unit executes the refresh process according to the refresh information written in the shared storage unit;
    A control method comprising:
  17.  前記リフレッシュ情報は、実行周期の記述を含み、
     前記第2ステップにおいて、前記第1制御部は、前記リフレッシュ情報に記述されている実行周期で前記リフレッシュ処理を実行する、
     ことを特徴とする請求項16に記載の制御システム。
    The refresh information includes a description of an execution cycle,
    In the second step, the first control unit executes the refresh process at an execution cycle described in the refresh information.
    The control system according to claim 16.
  18.  前記第2ステップは、
     前記第2制御部が前記リフレッシュ処理を実行させるリフレッシュ実行指示を前記第1制御部に発行する第3ステップと、
     前記リフレッシュ実行指示が発行されたとき、前記第1制御部が前記リフレッシュ処理を実行する第4ステップと、
     を含むことを特徴とする請求項16に記載の制御システム。
    The second step includes
    A third step in which the second control unit issues a refresh execution instruction for causing the first control unit to execute the refresh process;
    A fourth step in which the first control unit executes the refresh process when the refresh execution instruction is issued;
    The control system according to claim 16, comprising:
  19.  前記第1制御部と前記第2制御部との間は割り込み信号線で接続されており、
     前記第3ステップにおいて、前記第2制御部は、前記リフレッシュ実行指示を前記割り込み信号線を介して発行する、
     ことを特徴とする請求項18に記載の制御方法。
    The first control unit and the second control unit are connected by an interrupt signal line,
    In the third step, the second control unit issues the refresh execution instruction via the interrupt signal line.
    The control method according to claim 18.
  20.  被制御装置に接続され、該被制御装置との間の入出力データが格納される入出力データ記憶部を備える入出力モジュールと、共有記憶部と、前記入出力データ記憶部に格納されている入出力データを操作する第1制御部と、ユーザプログラムに基づいて動作し、前記入出力データ記憶部に格納されている入出力データを操作するためのコマンドを算出する第2制御部と、を備える制御システムの制御方法であって、
     前記第2制御部が前記コマンドを記述したコマンド情報を前記共有記憶部に書き込む第1ステップと、
     前記第1制御部が前記共有記憶部に書き込まれたコマンド情報に基づいて前記入出力データの操作を実行する第2ステップと、
     を備えることを特徴とする制御方法。
    An input / output module including an input / output data storage unit connected to the controlled device and storing input / output data between the controlled devices, a shared storage unit, and the input / output data storage unit. A first control unit that operates input / output data; and a second control unit that operates based on a user program and calculates a command for operating the input / output data stored in the input / output data storage unit; A control method for a control system comprising:
    A first step in which the second control unit writes command information describing the command to the shared storage unit;
    A second step in which the first control unit performs an operation on the input / output data based on command information written in the shared storage unit;
    A control method comprising:
  21.  前記コマンド情報は、前記コマンドに付随する引数を含む、ことを特徴とする請求項20に記載の制御方法。 The control method according to claim 20, wherein the command information includes an argument accompanying the command.
  22.  前記第1制御部が前記コマンド情報に基づく前記入出力データの操作の実行結果を前記共有記憶部に書き込む第3ステップをさらに備える、
     ことを特徴とする請求項20または請求項21に記載の制御方法。
    The first control unit further includes a third step of writing an execution result of the input / output data operation based on the command information in the shared storage unit.
    The control method according to claim 20 or 21, characterized in that:
  23.  前記第2制御部は、前記第1制御部から書き込み可能なメモリを備え、
     前記コマンド情報は、前記メモリのアドレスの記述を含み、
     前記第1制御部が前記メインメモリにおける前記コマンド情報に記述されているアドレスが指す位置に前記入出力データの操作の実行結果を書き込む第3ステップをさらに備える、
     ことを特徴とする請求項20または請求項21に記載の制御方法。
    The second control unit includes a memory writable from the first control unit,
    The command information includes a description of the memory address;
    The first control unit further includes a third step of writing an execution result of the operation of the input / output data at a position indicated by an address described in the command information in the main memory.
    The control method according to claim 20 or 21, characterized in that:
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