WO2011114633A1 - Video signal processing device and video signal processing method - Google Patents

Video signal processing device and video signal processing method Download PDF

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Publication number
WO2011114633A1
WO2011114633A1 PCT/JP2011/001205 JP2011001205W WO2011114633A1 WO 2011114633 A1 WO2011114633 A1 WO 2011114633A1 JP 2011001205 W JP2011001205 W JP 2011001205W WO 2011114633 A1 WO2011114633 A1 WO 2011114633A1
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Prior art keywords
signal
decoded signal
video
unit
decoded
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PCT/JP2011/001205
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French (fr)
Japanese (ja)
Inventor
智明 大喜
毎良 中村
和之 石田
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パナソニック株式会社
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Priority to JP2012505477A priority Critical patent/JPWO2011114633A1/en
Publication of WO2011114633A1 publication Critical patent/WO2011114633A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/012—Conversion between an interlaced and a progressive signal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/0122—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal the input and the output signals having different aspect ratios

Definitions

  • the present invention relates to a video signal processing apparatus and a video signal processing method for processing a video signal so as to output an output signal of an image having a size different from that of an image indicated by the input video signal.
  • a video signal processing apparatus for displaying a three-dimensional image which is a two-dimensional image that a viewer feels three-dimensionally, is known.
  • home televisions having a function of displaying such a three-dimensional image are being realized.
  • the video signal processing apparatus inputs a video signal and processes the video signal to display a three-dimensional image on the display panel.
  • FIG. 17 is a diagram for explaining video signal processing by the conventional video signal processing apparatus 300.
  • a video signal of an encoded video stream such as a broadcast wave is input to a decoder 310.
  • the decoder 310 generates a decoded signal by decoding the video signal, and writes the decoded signal in the decode buffer 311.
  • the video reading unit 320 reads the decoded signal from the decode buffer 311.
  • the OSD synthesis unit 330 reads an OSD (On Screen Display) signal stored in the OSD signal storage unit 331 and synthesizes it with a decoded signal.
  • OSD On Screen Display
  • the NR / IP conversion unit 340 writes the decoded signal combined with the OSD signal into the NR / IP conversion signal storage unit 341, and reads out the decoded signal from the NR / IP conversion signal storage unit 341, thereby decoding the decoded signal. And the decoded signal is converted from the interlace method to the progressive method (hereinafter referred to as “IP conversion”).
  • the scanning line converter 350 writes the decoded signal into the resized signal storage unit 351 and reads out the decoded signal from the resized signal storage unit 351, thereby performing vertical scaling resizing (scanning line conversion) of the decoded signal. Thereby, the scanning line conversion unit 350 converts the format of the decoded signal into a format for displaying on the display panel.
  • the decode buffer 311, the OSD signal storage unit 331, the NR / IP conversion signal storage unit 341, and the resize signal storage unit 351 are storage areas of a DRAM (Dynamic Random Access Memory) 380.
  • the video signal processing apparatus 300 inputs a video signal and processes the video signal to display a three-dimensional image on the display panel.
  • FIG. 18 is a diagram for explaining video signal processing by the conventional video signal processing device disclosed in Patent Document 1.
  • FIG. 18 is a diagram for explaining video signal processing by the conventional video signal processing device disclosed in Patent Document 1.
  • the video signal conversion device includes a pixel conversion device 1 and a field memory unit 7.
  • the pixel conversion device 1 includes a memory control processing unit 2, an IP conversion processing unit 3, a scanning line conversion processing unit 4, a horizontal pixel conversion processing unit 5, and a synchronization processing unit 6.
  • the IP conversion processing unit 3 uses the field memory unit 7 as a memory for IP conversion for a video signal that needs IP conversion.
  • the scanning line conversion processing unit 4 uses the field memory unit 7 as a memory for scanning line conversion with respect to a video signal that requires scanning line conversion.
  • the IP conversion processing unit 3 and the scanning line conversion processing unit 4 share the field memory unit 7, the memory usage of the DRAM can be reduced.
  • the conventional video signal processing apparatus has a problem that the memory capacity and the processing amount of the DRAM are increased.
  • the memory usage of the DRAM is reduced by performing the IP conversion and the scanning line conversion by sharing the memory.
  • the noise is not reduced.
  • an additional storage area of the DRAM is required.
  • 19A and 19B are diagrams for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal.
  • FIG. 19A is a diagram illustrating a process of writing and reading a video signal to and from the field memory unit 7 in order to perform IP conversion and scanning line conversion when the video signal is an interlace method.
  • FIG. 19B is a diagram for describing processing for writing and reading a video signal to / from the field memory unit 7 in order to perform IP conversion, scanning line conversion, and noise reduction when the video signal is an interlace method.
  • the field memory unit 7 first stores the current video signal (current signal shown in FIG. 19A). Then, a signal one field before the video signal (1F before signal shown in the figure) and a signal two fields before (the signal before 2F shown in the figure) are read out.
  • noise is generated in the field memory unit 7 by a processing unit (NR shown in the figure) for noise reduction.
  • the reduced video signal is stored. Then, the signal two fields before the video signal for noise reduction, the signal one field before the resized format video signal, the signal two fields before, and the current signal are read out.
  • the present invention has been made in view of such problems, and an object thereof is to provide a video signal processing device and a video signal processing method capable of reducing the memory capacity and the processing amount of a DRAM.
  • a video signal processing apparatus processes a video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal.
  • a processing device that decodes the encoded video signal to generate a decoded signal; a decoder that is connected to the decoder and stores the decoded signal generated by the decoder; and
  • the decoded signal which has been changed so that the video valid period within one vertical synchronization period becomes the same value as the video valid period within one vertical synchronization period of the output signal, is read from the decode buffer as a modified decoded signal and read out.
  • the decoded signal changing unit that outputs the changed decoded signal, and the changed decoded signal that is output is written to and read from the memory, so that the change in time is changed. While reducing the noise of the modified decoded signal using the decoded signal, and an NR / IP converter for converting the progressive method from interlaced the modified decoded signal if the change decoded signal is interlaced.
  • the modified decoded signal which has been changed so that the video valid period within one vertical synchronization period of the decoded signal becomes the same value as the video valid period within one vertical synchronous period of the output signal, is read from the decode buffer.
  • Read and output modified decoding signal that is, when the decoded signal is read from the decode buffer, the decoded signal that has been changed for resizing is directly read from the decode buffer, whereby the vertical scaling of the decoded signal can be performed. Accordingly, the vertical scaling of the decoded signal can be performed without the resized signal storage unit 351 as illustrated in FIG.
  • the memory capacity of the resize signal storage unit 351 can be deleted from the DRAM 380, and the amount of data transferred between the resize signal storage unit 351 and the processing unit can be reduced. Further, since noise reduction and IP conversion can be performed by sharing the memory storage area, no additional DRAM storage area is required even when noise reduction is performed. Accordingly, the memory capacity and the processing amount of the DRAM can be reduced.
  • the NR / IP conversion unit is time-shifted by writing and reading the uncompressed signal into the memory when an uncompressed signal that is an unencoded video signal is input.
  • the non-compressed signal is used to reduce noise of the uncompressed signal, and when the uncompressed signal is an interlaced format, the uncompressed signal is converted from an interlaced format to a progressive format and output, and the video signal
  • the processing apparatus further stores the uncompressed signal output from the NR / IP converter in the decode buffer, and the video valid period within one vertical synchronization period of the uncompressed signal is one vertical synchronization of the output signal.
  • the uncompressed signal changed so as to have the same value as the video valid period within the period is read from the decode buffer as a modified uncompressed signal and read.
  • the decoding process when an uncompressed signal is input, the decoding process is stopped, the uncompressed signal is written to the decode buffer, and the changed uncompressed signal is read from the decode buffer. That is, when an uncompressed signal is input, the decoding process can be stopped, so that the uncompressed signal can be stored in the decode buffer instead of the decoded signal. For this reason, since the storage area of the decode buffer of the DRAM can be allocated to the uncompressed signal, the vertical scaling of the uncompressed signal can be performed using the decode buffer. Even when an uncompressed signal is input, noise reduction and IP conversion can be performed by sharing one storage area of the memory. Therefore, even if noise reduction is performed, an additional DRAM storage area is required. do not do. Therefore, even when an uncompressed signal is input, the memory capacity and processing amount of the DRAM can be reduced.
  • a frame synchronization unit for converting a frame rate of the modified uncompressed signal output from the uncompressed signal changing unit into a frame rate of the output signal is further provided.
  • the changed uncompressed signal output by the uncompressed signal changing unit is converted to the progressive method because IP conversion is performed.
  • the frame rate conversion performance is inferior to that when frame rate conversion is performed on a progressive video signal.
  • by performing frame rate conversion on the changed uncompressed signal that has been subjected to IP conversion it is possible to reduce the memory capacity and the processing amount of the DRAM while suppressing a decrease in the performance of the frame rate conversion.
  • the frame synchronization for converting the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit to the frame rate of the output signal is written to and read from the decode buffer of the uncompressed signal changing unit. You may decide to provide the frame synchronization part performed using.
  • the decode buffer in the uncompressed signal changing unit for the frame rate conversion in the frame synchronizing unit. That is, the non-compressed signal conversion unit and the frame synchronization unit do not process in sequence, but the frame rate conversion processing can be performed simultaneously with the writing and reading processing to the decode buffer by the non-compressed signal conversion unit. As a result, the processing by the uncompressed signal conversion unit and the processing by the frame synchronization unit can be performed simultaneously using the decode buffer, and the memory capacity and processing amount of the DRAM can be reduced.
  • the decoded signal changing unit sets the ratio of the video effective period within one vertical synchronization period as an effective ratio, and the effective ratio of the decoded signal is the same value as the effective ratio of the output signal.
  • the video effective period of the decoded signal is changed, the changed decoded signal of the video effective period is read from the decode buffer as the changed decoded signal, and the read changed decoded signal is output.
  • the video effective period of the decoded signal is changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, and the decoded buffer of the changed video effective period is used as the changed decoded signal.
  • Read from and output that is, by changing the video effective period of the decoded signal and reading it from the decode buffer, the decoded signal can be resized by vertical scaling, and the memory capacity and the processing amount of the DRAM can be reduced.
  • the decoded signal changing unit calculates a ratio of the number of vertical effective lines that is the number of vertical lines within the video effective period to the number of all vertical lines that is the number of vertical lines within one vertical synchronization period. And changing the number of vertical lines of the decoded signal so that the effective rate of the changed decoded signal is the same as the effective rate of the output signal, and changing the decoded signal of the changed number of vertical lines. Read from the decoding buffer as a decoded signal, and output the read modified decoded signal.
  • the total number of vertical lines of the decoded signal is changed, and the decoded signal having the changed total number of vertical lines is read from the decoding buffer as a changed decoded signal and output. That is, by changing the total number of vertical lines of the decoded signal and reading from the decoding buffer, the vertical scaling of the decoded signal can be performed, and the memory capacity and processing amount of the DRAM can be reduced.
  • the decoded signal changing unit uses the acquisition unit for acquiring the number of vertical effective lines of the decoded signal and the number of vertical effective lines of the acquired decoded signal, and uses all the vertical lines of the changed decoded signal.
  • a calculation unit that calculates a number, and a reading unit that reads the modified decoded signal changed to the calculated total number of vertical lines from the decode buffer and outputs the read modified decoded signal.
  • the modified decoded signal changed to the calculated total number of vertical lines is read from the decoding buffer, Output. For this reason, for example, by acquiring an arbitrary number of vertical effective lines set by the user, a modified decoded signal corresponding to the number of vertical effective lines can be read from the decode buffer. Thereby, the memory capacity and the processing amount of the DRAM can be reduced.
  • the acquisition unit further acquires information indicating a format type of the output signal
  • the calculation unit further includes all vertical lines of the output signal corresponding to the format indicated by the acquired information.
  • the total number of vertical lines of the modified decoded signal is calculated by further using the number and the number of vertical effective lines.
  • the changed decoded signal changed to the calculated total number of vertical lines is read from the decoding buffer. Read and output. For this reason, for example, by acquiring information indicating the format type of an arbitrary output signal set by the user, a modified decoded signal corresponding to the format can be read from the decode buffer. Thereby, the memory capacity and the processing amount of the DRAM can be reduced.
  • an OSD synthesis unit that synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit, and the NR / IP conversion unit is configured such that the OSD synthesis unit includes the OSD signal. Is reduced, and the modified decoded signal is converted from the interlace method to the progressive method.
  • OSD On Screen Display
  • the OSD signal is synthesized, and noise reduction and IP conversion are performed. For this reason, even if there is no resize signal storage unit 351 as shown in FIG. 17, a decoded signal that has been changed to perform vertical scaling resizing of the decoded signal and subjected to OSD synthesis and IP conversion is generated. be able to. Accordingly, the memory capacity and the processing amount of the DRAM can be reduced.
  • the decoder generates the decoded signal obtained by decoding the video signal for 3D images
  • the decode buffer stores the decoded signal for 3D images generated by the decoder.
  • the decoded signal changing unit reads out and outputs the changed decoded signal for the 3D image from the decode buffer.
  • the video signal processing device can be used as a video signal processing device for a three-dimensional image.
  • the memory capacity and the processing amount of the DRAM are reduced. Can be reduced.
  • the present invention can be realized not only as such a video signal processing apparatus, but also as a control method of a video signal processing apparatus or a video signal processing method using steps characteristic processing included in the video signal processing apparatus. Or, it can be realized as a program for causing a computer to execute such characteristic steps. Needless to say, such a program can be distributed via a recording medium such as a CD-ROM and a transmission medium such as the Internet.
  • the present invention can be realized as a semiconductor integrated circuit (LSI) that realizes part or all of the functions of such a video signal processing apparatus, or a video signal process such as a digital television provided with such a video signal processing apparatus. It can be realized as a device or a three-dimensional image display system including such a video signal processing device.
  • LSI semiconductor integrated circuit
  • the present invention can provide a video signal processing apparatus capable of reducing the memory capacity and processing amount of a DRAM.
  • FIG. 1 is a block diagram illustrating a functional configuration of the three-dimensional image display system according to the first embodiment.
  • FIG. 2 is a block diagram showing a functional configuration of the video signal processing apparatus according to the first embodiment.
  • FIG. 3 is a flowchart illustrating an example of video signal processing performed by the video signal processing apparatus according to the first embodiment.
  • FIG. 4 is a flowchart showing an example of processing in which the decoded signal changing unit according to Embodiment 1 reads out and outputs the changed decoded signal.
  • FIG. 5 is a diagram for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to the first embodiment.
  • FIG. 6A is a diagram for explaining the number of vertical lines of a decoded signal and the number of vertical lines of an output signal according to Embodiment 1.
  • FIG. 6B is a diagram for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to Embodiment 1.
  • FIG. 7A is a diagram illustrating a process in which a conventional scanning line conversion unit changes a decoded signal in order to perform resizing.
  • FIG. 7B is a diagram illustrating a process of changing a decoded signal in order for the conventional scanning line conversion unit to perform resizing.
  • FIG. 8 is a diagram illustrating a process in which the reading unit according to Embodiment 1 reads the modified decoded signal from the decode buffer.
  • FIG. 9A is a diagram illustrating that an NR / IP conversion signal storage unit is necessary for processing performed by a conventional NR / IP conversion unit.
  • FIG. 9B is a diagram illustrating that an NR / IP conversion signal storage unit is necessary for processing performed by a conventional NR / IP conversion unit.
  • FIG. 10A is a diagram for explaining a problem when a conventional scanning line conversion unit reads out a resized decoded signal from the NR / IP conversion signal storage unit.
  • FIG. 10B is a diagram for explaining a problem when the conventional scanning line conversion unit reads out the resized format decoded signal from the NR / IP conversion signal storage unit.
  • FIG. 10A is a diagram for explaining a problem when a conventional scanning line conversion unit reads out a resized decoded signal from the NR / IP conversion signal storage unit.
  • FIG. 10B is a diagram for explaining a problem when the conventional scanning line conversion unit reads out the resized format decoded signal from the
  • FIG. 11A is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit.
  • FIG. 11B is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit.
  • FIG. 11C is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit.
  • FIG. 12 is a block diagram illustrating a functional configuration of the video signal processing apparatus according to the second embodiment.
  • FIG. 13 is a flowchart illustrating an example of video signal processing performed by the video signal processing apparatus according to the second embodiment.
  • FIG. 14A is a diagram for explaining an effect when the video signal processing apparatus according to Embodiment 2 performs frame rate conversion.
  • FIG. 14B is a diagram for explaining an effect when the video signal processing apparatus according to Embodiment 2 performs frame rate conversion.
  • FIG. 15 is a table summarizing the effects produced by the video signal processing apparatus according to the second embodiment.
  • FIG. 16 is an external view showing an example of a digital video recorder and a digital television provided with the video signal processing apparatus according to the present invention.
  • FIG. 17 is a diagram for explaining video signal processing by a conventional video signal processing apparatus.
  • FIG. 18 is a diagram for explaining video signal processing by a conventional video signal processing apparatus.
  • FIG. 19A is a diagram for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal.
  • FIG. 19B is a diagram for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal.
  • FIG. 1 is a block diagram showing a functional configuration of a 3D image display system 10 according to Embodiment 1 of the present invention.
  • the three-dimensional image display system 10 includes a digital video recorder 20 and a digital television 30.
  • the digital video recorder 20 and the digital television 30 are connected via an HDMI (High-Definition Multimedia Interface) cable.
  • HDMI High-Definition Multimedia Interface
  • the digital video recorder 20 converts the format of a three-dimensional video signal recorded on an optical disc 41 such as a BD (Blu-ray disc), and converts the converted three-dimensional video signal to the digital television 30 via an HDMI cable. Output.
  • an optical disc 41 such as a BD (Blu-ray disc)
  • the digital television 30 converts the 3D video signal output from the digital video recorder 20 and the 3D video signal format included in the broadcast wave 42 and displays the converted signal.
  • the broadcast wave 42 is a terrestrial digital television broadcast, a satellite digital television broadcast, or the like.
  • the digital video recorder 20 may convert the format of a three-dimensional video signal recorded on a recording medium other than the optical disc 41 (for example, a hard disk drive, a nonvolatile memory, or the like).
  • the digital video recorder 20 may convert the format of the three-dimensional video signal included in the broadcast wave 42 or the three-dimensional video signal acquired via a communication network such as the Internet.
  • the digital video recorder 20 may convert the format of a three-dimensional video signal input to an external input terminal (not shown) or the like by an external device.
  • the digital television 30 may convert the format of the three-dimensional video signal recorded on the optical disc 41 and other recording media.
  • the digital television 30 may convert the format of a three-dimensional video signal acquired via a communication network such as the Internet.
  • the digital television 30 may convert the format of a three-dimensional video signal input to an external input terminal (not shown) or the like by an external device other than the digital video recorder 20.
  • the digital television 30 and the digital video recorder 20 may be connected by a standard cable other than the HDMI cable, or may be connected by a wireless communication network.
  • the digital video recorder 20 includes an input unit 21, a video signal processing device 100B, and an HDMI communication unit 22.
  • the input unit 21 obtains an encoded three-dimensional video signal recorded on the optical disc 41.
  • the video signal processing device 100B processes the acquired three-dimensional video signal and generates an output signal.
  • the video signal processing apparatus 100B decodes the acquired three-dimensional video signal and converts the format of the decoded three-dimensional video signal to generate an output signal.
  • the HDMI communication unit 22 outputs the output signal generated by the video signal processing device 100B to the digital television 30 via the HDMI cable.
  • the digital video recorder 20 may store the generated output signal in a storage unit (such as a hard disk drive and a non-volatile memory) included in the digital video recorder 20 or a recording that is detachable from the digital video recorder 20. You may record on a medium (optical disk etc.).
  • a storage unit such as a hard disk drive and a non-volatile memory
  • the digital television 30 includes an input unit 31, an HDMI communication unit 32, a video signal processing device 100, an output signal control unit 33, and a display panel 34.
  • the input unit 31 acquires an encoded three-dimensional video signal included in the broadcast wave 42.
  • the HDMI communication unit 32 acquires the output signal output by the HDMI communication unit 22 and outputs it as an input signal.
  • the video signal processing apparatus 100 processes a signal input from the input unit 31 or a signal input from the HDMI communication unit 32 to generate an output signal. Details of the processing performed by the video signal processing apparatus 100 will be described later.
  • the output signal control unit 33 performs control so that the output signal generated by the video signal processing apparatus 100 is displayed on the display panel 34. For example, the output signal control unit 33 converts the output signal into an output signal for the left eye and an output signal for the right eye so that a 3D image is displayed on the display panel 34, and outputs the output signal to the display panel 34.
  • the display panel 34 receives the left-eye output signal and the right-eye output signal output from the output signal control unit 33, and displays a three-dimensional image.
  • shutter glasses (not shown) including a left-eye shutter and a right-eye shutter that can be opened and closed in accordance with the display timing of the left-eye output signal and the right-eye output signal. By wearing it, the user can view the 3D image displayed on the display panel 34.
  • the video signal processing device 100B included in the digital video recorder 20 has a part or all of the functions of the video signal processing device 100. That is, the video signal processing device 100 performs processing that the video signal processing device 100B did not perform on the input signal input from the HDMI communication unit 32.
  • FIG. 2 is a block diagram showing a functional configuration of the video signal processing apparatus 100 according to the first embodiment.
  • the video signal processing device 100 is a device that processes a video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal.
  • the video signal processing apparatus 100 includes a decoder 110, a decode buffer 111, a decoded signal change unit 120, an OSD synthesis unit 130, an OSD signal storage unit 131, an NR / IP conversion unit 140, and an NR / IP conversion.
  • a signal storage unit 141 is provided.
  • the decoder 110 decodes the input encoded video signal and generates a decoded signal. Then, the decoder 110 outputs the generated decoded signal to the decode buffer 111 and causes the decode buffer 111 to store the decoded signal.
  • the decode buffer 111 is connected to the decoder 110 and stores the decoded signal generated by the decoder 110.
  • the decode buffer 111 is a storage area of the DRAM 180 provided in the digital television 30.
  • the decoded signal changing unit 120 changes the decoded signal so that the video effective period within one vertical synchronization period of the decoded signal becomes the same value as the video effective period within one vertical synchronization period of the output signal. Are read from the decode buffer 111 and the read modified decoded signal is output.
  • the decoded signal changing unit 120 reads out the decoded signal, which has been changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, from the decoding buffer 111 as the changed decoded signal, and the read changed decoding Output a signal. That is, the decoded signal changing unit 120 changes the decoded signal in order to perform resizing. Note that the resize of the decoded signal means changing the size of the image indicated by the decoded signal.
  • the effective ratio is the ratio of the video effective period within one vertical synchronization period.
  • the video valid period is a period in which a horizontal synchronization signal of a video signal indicating a video displayed on the display panel 34 is included. That is, the video signal indicated by the horizontal synchronization signal within the video valid period is displayed on the display panel 34.
  • the output signal is a video signal having a format to be output by the video signal processing device 100, and specifically, a video signal having a format that can be displayed on the display panel 34.
  • the format is a type of video signal expressed by a scanning method (progressive and interlaced) and an image size, such as 480i and 1080p.
  • the output signal is a video signal output to the display panel 34.
  • the storage signal is stored. It may be a video signal output to the unit.
  • the decoded signal changing unit 120 changes the video effective period of the decoded signal so that the effective ratio of the changed decoded signal becomes the same value as the effective ratio of the output signal, and decodes the changed video effective period.
  • the signal is read from the decode buffer 111 as a modified decoded signal, and the read modified decoded signal is output.
  • the decoded signal changing unit 120 determines the ratio of the number of vertical effective lines, which is the number of vertical lines within the video effective period, to the total number of vertical lines, which is the number of vertical lines within one vertical synchronization period.
  • the decoding buffer of the decoded signal having the changed total number of vertical lines is changed as a changed decoding signal by changing the total number of vertical lines of the decoded signal so that the effective ratio of the changed decoded signal becomes the same value as the effective ratio of the output signal. Read from 111 and output the read modified decoded signal.
  • the DRAM 180 includes various storage areas in addition to the decode buffer 111, many processing units other than the decoded signal changing unit 120 access the DRAM 180. For this reason, when the decoded signal changing unit 120 reads out the changed decoded signal from the DRAM 180, fluctuation occurs during reading, and an error occurs in the number of vertical lines of the changed decoded signal to be read out. This error is usually from -1 line to +1 line, and is at most about -2 line to +2 line. Therefore, the maximum number of lines changed by the decoded signal changing unit 120 is allowed to be about ⁇ 2 lines to +2 lines.
  • the decoded signal changing unit 120 includes an obtaining unit 121, a calculating unit 122, and a reading unit 123.
  • the obtaining unit 121 obtains the number of effective vertical lines of the decoded signal and information indicating the format type of the output signal.
  • the acquisition unit 121 may acquire the number of vertical effective lines of the decoded signal by a user input operation, or may be acquired by determining an input video signal.
  • the acquisition unit 121 may acquire information indicating the format type of the output signal by a user input operation, or may acquire the information by determining the format of the video signal that can be displayed on the display panel 34. Good.
  • the calculation unit 122 calculates the number of vertical effective lines of the decoded signal acquired by the acquisition unit 121 and the total number of vertical lines and the number of vertical effective lines of the output signal corresponding to the format indicated by the information indicating the format type of the output signal. To calculate the total number of vertical lines of the modified decoded signal.
  • the reading unit 123 reads the modified decoded signal changed to the total number of vertical lines calculated by the calculating unit 122 from the decoding buffer 111, and outputs the read modified decoded signal.
  • the OSD signal storage unit 131 stores an OSD signal.
  • the OSD signal storage unit 131 is a storage area of the DRAM 180 included in the digital television 30.
  • the OSD synthesis unit 130 synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit 120. Specifically, the OSD synthesis unit 130 reads out the OSD signal stored in the OSD signal storage unit 131 from the OSD signal storage unit 131, and synthesizes the OSD signal into the modified decoded signal.
  • OSD On Screen Display
  • the NR / IP conversion signal storage unit 141 is a storage area of the DRAM 180 included in the digital television 30 for reducing the noise of the modified decoded signal and converting the modified decoded signal from the interlace system to the progressive system.
  • the NR / IP conversion signal storage unit 141 corresponds to a “memory” described in the claims.
  • the NR / IP conversion unit 140 writes and reads the modified decoded signal obtained by synthesizing the OSD signal by the OSD synthesis unit 130 into the memory, thereby reducing the noise of the modified decoded signal by using the modified decoded signal that changes in time.
  • the modified decoded signal is an interlace system
  • the modified decoded signal is converted from the interlace system to the progressive system.
  • the NR / IP conversion unit 140 stores the changed decoded signal in the NR / IP converted signal storage unit 141, and the NR / IP converted signal storage unit 141 stores the current signal of the changed decoded signal or one frame before. The signal of 2 frames before is read out to reduce the noise of the modified decoded signal and perform IP conversion.
  • the NR / IP conversion unit 140 stores the modified decoded signal in the NR / IP converted signal storage unit 141 and the NR / IP converted signal storage unit 141 stores the modified decoded signal.
  • the signal two frames before is read out and averaged with the current signal. If the input video is an image with no motion such as a still image, random noise is reduced by repeating this averaging.
  • the NR / IP conversion unit 140 reads the signal one frame before the modified decoded signal from the NR / IP converted signal storage unit 141 and performs averaging with the current signal. .
  • the NR / IP conversion unit 140 when the modified decoded signal is an interlace scheme, the NR / IP conversion unit 140 generates one frame from the two frames of the top frame and the bottom frame of the modified decoded signal, thereby changing the modified decoded signal. Is converted from interlaced to progressive.
  • the NR / IP conversion unit 140 outputs the modified decoded signal that has undergone IP conversion with noise reduced to the output signal control unit 33.
  • FIG. 3 is a flowchart showing an example of video signal processing performed by the video signal processing apparatus 100 according to the first embodiment.
  • an encoded video signal as an input signal is input to the decoder 110 (S102).
  • the decoder 110 decodes the video signal and generates a decoded signal (S104).
  • the decoder 110 outputs the generated decoded signal to the decode buffer 111, and stores the decoded signal in the decode buffer 111 (S106).
  • the decoded signal changing unit 120 reads the decoded signal, which has been changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, from the decoding buffer 111 as the changed decoded signal, and the read changed decoded signal Output (S108). Details of the process in which the decoded signal changing unit 120 reads and outputs the changed decoded signal will be described later.
  • the OSD synthesis unit 130 synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit 120 (S110). Specifically, the OSD synthesis unit 130 reads out the OSD signal from the OSD signal storage unit 131 and synthesizes the OSD signal with the modified decoded signal.
  • OSD On Screen Display
  • the NR / IP conversion unit 140 reduces noise of the modified decoded signal obtained by synthesizing the OSD signal by the OSD synthesis unit 130, and converts the modified decoded signal from the interlace method to the progressive method (S112).
  • the NR / IP conversion unit 140 outputs an output signal, which is a modified decoded signal subjected to noise reduction and IP conversion, to the output signal control unit 33 (S114).
  • the video signal processing performed by the video signal processing apparatus 100 ends.
  • FIG. 4 is a flowchart showing an example of processing in which the decoded signal changing unit 120 according to Embodiment 1 reads out and outputs the changed decoded signal.
  • the acquisition unit 121 acquires input data that is information indicating the number of vertical effective lines of a decoded signal and the format type of an output signal (S202).
  • the acquisition unit 121 may acquire the input data by a user input operation, or may acquire the input data by determining the format of the input video signal and the video signal that can be displayed on the display panel 34. Good.
  • the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the input data acquired by the acquisition unit 121 (S204). Specifically, the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the number of vertical effective lines of the decoded signal, the total number of vertical lines and the number of vertical effective lines of the output signal.
  • 6A and 6B are diagrams for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to the first embodiment.
  • FIG. 5A is a diagram illustrating a video input to the video signal processing apparatus 100
  • FIG. 5B is a diagram illustrating a video displayed on the display panel 34.
  • 6A is a diagram showing a video signal input to the video signal processing device 100
  • FIG. 6B is a diagram showing a video signal displayed on the display panel.
  • the video signal input to the video signal processing apparatus 100 is a video signal in the 480p standard format having an aspect ratio of 4: 3 and a vertical line number of 480 lines. That is, the aspect ratio of the decoded signal is 4: 3, and the number of vertical lines is 480 lines.
  • the format of the video signal input to the video signal processing apparatus 100 is not limited to the 480p standard format, and any format may be used.
  • the video signal displayed on the display panel 34 is a 1080p non-standard format video signal having an aspect ratio of 16: 9 and a number of vertical lines of 1080 lines. That is, the aspect ratio of the output signal is 16: 9, and the number of vertical lines is 1080 lines.
  • the format of the video signal displayed on the display panel 34 is not limited to the 1080p non-standard format, and may be any format, for example, a standard format.
  • the video signal input to the video signal processing apparatus 100 is a video signal having a total number of vertical lines of 525 lines, which is the number of vertical lines within one vertical synchronization period. That is, the total number of vertical lines of the decoded signal is 525 lines.
  • the number of vertical lines in the video period within one vertical synchronization period of the decoded signal is 480 lines.
  • the aspect ratio 4: 3 of the decoded signal match the aspect ratio 16: 9 of the output signal, the number of vertical lines of the decoded signal must be changed from 480 lines to 360 lines.
  • the video valid period within one vertical synchronization period of the decoded signal is a period of 360 lines. That is, the number of vertical effective lines, which is the number of vertical lines within the video effective period of the decoded signal, is 360 lines.
  • the video signal displayed on the display panel 34 is a video signal having a total number of vertical lines of 1100 lines and a vertical effective line number of 1080 lines. That is, the total number of vertical lines of the output signal is 1100 lines, and the number of vertical effective lines is 1080 lines.
  • the calculation unit 122 calculates the effective ratio that is the ratio of the video effective period within one vertical synchronization period of the output signal as 98.1% that is the ratio of the number of vertical effective lines to the total number of vertical lines.
  • the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal. Specifically, since the effective ratio of the output signal is 98.1% and the number of vertical effective lines of the decoded signal is 360 lines, the calculation unit 122 determines that the total number of vertical lines of the modified decoded signal is 366.67 lines. It is calculated that
  • the calculation unit 122 calculates the number of vertical effective lines by rounding up the fractional part when the number of vertical effective lines is a fraction, and when the number of vertical total lines is a fraction, Calculate the number of lines.
  • the handling of fractions by the calculation unit 122 is not limited to the above method, and any method such as truncation or rounding off may be used.
  • the reading unit 123 reads the modified decoded signal changed to the total number of vertical lines calculated by the calculating unit 122 from the decoding buffer 111, and outputs the read modified decoded signal (S206). Details of the process in which the reading unit 123 reads the modified decoded signal from the decoding buffer 111 will be described later.
  • the process in which the decoded signal changing unit 120 reads and outputs the changed decoded signal ends.
  • FIG. 7A and 7B are diagrams for explaining processing in which the conventional scanning line conversion unit 350 resizes the decoded signal.
  • FIG. 7A is a diagram illustrating a process in which the scanning line conversion unit 350 writes the decoded signal to the resize signal storage unit 351
  • FIG. 7B is a diagram in which the scanning line conversion unit 350 outputs the decoded signal to the resize signal storage unit.
  • FIG. 6 is a diagram for describing processing to read from 351.
  • the scanning line conversion unit 350 has the same number of vertical lines within one vertical synchronization period as the decoded signal shown in FIG. A decoded signal having 480 vertical lines is input.
  • the scanning line conversion unit 350 has the number of vertical effective lines of 360 lines.
  • the decoded signal of the video valid period is written in the resize signal storage unit 351. That is, the decoded signal is written into the resized signal storage unit 351 in a state where the effective ratio of the decoded signal is 68.6%.
  • the scanning line conversion unit 350 reads the decoded signal from the resize signal storage unit 351 so as to conform to the format of the output signal illustrated in FIG. 6B. Specifically, the scanning line conversion unit 350 reads out from the resize signal storage unit 351 the decoded signal of the video effective period corresponding to 360 effective vertical lines so that the effective ratio is 98.1%.
  • the scanning line conversion unit 350 outputs a decoded signal that matches the format of the output signal, as shown in FIG. 7B (b). can do.
  • FIG. 8 is a diagram illustrating a process in which the reading unit 123 according to the first embodiment reads the modified decoded signal from the decode buffer 111.
  • this figure shows a modified decoded signal read from the decode buffer 111.
  • the decoded signal stored in the decode buffer 111 is the decoded signal shown in FIG. 6A.
  • the reading unit 123 changes the video effective period of the decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal, and changes the decoded signal of the changed video effective period to the changed decoded signal. Is read from the decode buffer 111.
  • the reading unit 123 sets the ratio of the number of effective vertical lines to the total number of vertical lines as an effective ratio, and the vertical direction of the decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal.
  • the total number of lines is changed, and the decoded signal of the changed total number of vertical lines is read from the decode buffer 111 as a changed decoded signal.
  • the reading unit 123 calculates the total number of vertical lines of the decoded signal so that the effective rate of the modified decoded signal is 98.1%.
  • the calculated decoded signal is read from the decode buffer 111.
  • the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal, so that the reading unit 123 outputs the modified decoded signal that matches the format of the output signal as shown in FIG. can do.
  • the modified decoded signal changed so that the effective rate of the decoded signal becomes the same value as the effective rate of the output signal is read from the decode buffer 111, and the changed decoded signal is output. Specifically, the total number of vertical lines of the decoded signal is changed, and the decoded signal having the changed total number of vertical lines is read from the decode buffer 111 as a changed decoded signal and output.
  • the decoded signal when the decoded signal is read from the decode buffer 111, the decoded signal that has been changed for resizing is directly read from the decode buffer 111, so that the vertical scaling of the decoded signal can be performed.
  • the vertical scaling of the decoded signal can be performed without the resized signal storage unit 351 as shown in FIG. Therefore, the memory capacity of the resize signal storage unit 351 can be deleted from the DRAM 380, and the amount of data transferred between the resize signal storage unit 351 and the processing unit can be reduced.
  • noise reduction and IP conversion can be performed by sharing the NR / IP conversion signal storage unit 141 which is a memory storage area, no additional DRAM storage area is required even when noise reduction is performed. .
  • the modified decoded signal changed to the calculated total number of vertical lines is read from the decode buffer 111 and output.
  • a modified decoded signal corresponding to the number of vertical effective lines can be read from the decode buffer 111.
  • the modified decoded signal changed to the calculated total number of vertical lines is read from the decode buffer 111, Output. For this reason, for example, by acquiring information indicating the format type of an arbitrary output signal set by the user, a modified decoded signal corresponding to the format can be read from the decode buffer 111.
  • the OSD signal is synthesized and IP conversion is performed. For this reason, even if there is no resize signal storage unit 351 as shown in FIG. 17, a decoded signal that has been changed to perform vertical scaling resizing of the decoded signal and subjected to OSD synthesis and IP conversion is generated. be able to.
  • the video signal processing apparatus 100 can be used as a video signal processing apparatus for 3D images.
  • the memory capacity and the processing amount of the DRAM are reduced. Can be reduced.
  • the video signal processing apparatus 100 is not limited to being used as a video signal processing apparatus for 3D images, and the memory capacity and processing amount of the DRAM of the video signal processing apparatus for 2D images are reduced. It may be used as a video signal processing device that can be reduced.
  • FIG. 9A and 9B are diagrams illustrating that the NR / IP conversion signal storage unit 341 is necessary for the processing performed by the conventional NR / IP conversion unit 340.
  • FIG. 9A and 9B are diagrams illustrating that the NR / IP conversion signal storage unit 341 is necessary for the processing performed by the conventional NR / IP conversion unit 340.
  • FIG. 9A is a diagram for explaining the necessity of the NR / IP conversion signal storage unit 341 when the decoded signal is an interlaced method
  • FIG. 9A is a diagram illustrating that the decoded signal is a progressive NR / IP signal. It is a figure explaining the IP conversion signal memory
  • the NR / IP conversion unit 340 when the NR / IP conversion unit 340 performs IP conversion and noise reduction (“NR” shown in the figure), the NR / IP conversion signal storage unit 341 stores 1 field and 2 It is necessary to store the signal before the field or the signal one frame before. Therefore, in order for the NR / IP conversion unit 340 to perform the IP conversion and noise reduction processing, the NR / IP conversion signal storage unit 341 as a storage area of the DRAM 380 is necessary.
  • the memory capacity of the DRAM 380 can be reduced by deleting the memory capacity of the resize signal storage unit 351.
  • FIG. 10A and 10B are diagrams for explaining a problem when the conventional scanning line conversion unit 350 reads out a resized format decoded signal from the NR / IP conversion signal storage unit 341.
  • FIG. 10A and 10B are diagrams for explaining a problem when the conventional scanning line conversion unit 350 reads out a resized format decoded signal from the NR / IP conversion signal storage unit 341.
  • FIG. 10A and 10B are diagrams for explaining a problem when the conventional scanning line conversion unit 350 reads out a resized format decoded signal from the NR / IP conversion signal storage unit 341.
  • FIG. 10A is a diagram illustrating a process in which the conventional scanning line conversion unit 350 reads out a decoded signal from the NR / IP converted signal storage unit 341 when the decoded signal is an interlace method.
  • FIG. 10B is a diagram for explaining a problem when the scanning line conversion unit 350 reads out a resized decoded signal from the NR / IP converted signal storage unit 341 when the decoded signal is an interlaced method.
  • the decoded signal in the post-resize format is a decoded signal that has been changed so that the effective ratio becomes the same value as the effective ratio of the output signal in order to perform resizing.
  • the scanning line conversion unit 350 also performs noise reduction and IP conversion when reading the resized format decoded signal from the NR / IP conversion signal storage unit 341. That is, in this case, the scanning line conversion unit 350 also has the function of the NR / IP conversion unit 340.
  • the scanning line conversion unit 350 stores the decoded signal in the NR / IP conversion signal storage unit 341, and the NR / IP conversion signal storage unit 341 stores a signal (one figure before the decoded signal). 1F before signal) and 2 fields before signal (2F before signal shown in FIG. 2) are read out.
  • the scanning line conversion unit 350 when the scanning line conversion unit 350 reads out the resized format decoded signal from the NR / IP conversion signal storage unit 341, the scanning line conversion unit 350 first starts the NR / IP conversion signal storage unit. The decoded signal is stored in 341. Then, the scanning line conversion unit 350 reads, from the NR / IP conversion signal storage unit 341, the signal before 1 field, the signal before 2 fields, and the current signal of the decoded signal in the resized format in order to perform IP conversion. . Further, the scanning line conversion unit 350 reads a signal two fields before the decoded signal from the NR / IP conversion signal storage unit 341 in order to perform noise reduction (NR).
  • NR noise reduction
  • the scanning line conversion unit 350 when the scanning line conversion unit 350 reads out the decoded signal of the resized format from the NR / IP conversion signal storage unit 341, the scanning line conversion unit 350 must read out many signals, and the NR / IP The amount of data transferred from the conversion signal storage unit 341 increases.
  • the video signal processing apparatus 100 deletes the memory capacity of the resize signal storage unit 351 without increasing the data transfer amount from the NR / IP conversion signal storage unit 341, The memory transfer amount of the DRAM 380 can be reduced.
  • FIG. 11A, 11B, and 11C are diagrams illustrating that the resize signal storage unit 351 is necessary for the resize processing performed by the conventional scanning line conversion unit 350.
  • FIG. 11A, 11B, and 11C are diagrams illustrating that the resize signal storage unit 351 is necessary for the resize processing performed by the conventional scanning line conversion unit 350.
  • FIG. 11A is a diagram for performing resizing processing by converting the vertical frequency
  • FIGS. 11B and 11C are diagrams for performing resizing processing by converting the video size without converting the vertical frequency. .
  • one vertical synchronization period is changed for the input video signal, and the changed output signal is output.
  • a 60 Hz video signal is input, converted into a 120 Hz output signal, and output. That is, the input video signal is divided into two output signals and output.
  • the scanning line conversion unit 350 stores the input video signal within one vertical synchronization period in the resize signal storage unit 351, reads out two output signals from the resize signal storage unit 351, and outputs them.
  • the video size is changed with respect to the input video signal, and the changed output signal is output.
  • a video signal having 480 vertical lines within one vertical synchronization period is input, and an output signal having 360 vertical lines is output.
  • the scanning line conversion unit 350 stores 360 lines of the 480-line video signal in the resize signal storage unit 351 and reads the output signal of the 360 lines from the resize signal storage unit 351. Output.
  • the memory capacity of the resize signal storage unit 351 can be reduced. It cannot be reduced.
  • the memory capacity of the DRAM 380 and the memory transfer amount can be reduced by deleting the memory capacity of the resize signal storage unit 351.
  • the video signal processing apparatus 100 changes the decoded signal in order to resize the vertical scaling of the encoded video signal.
  • the video signal processing apparatus 100 changes the video signal in order to resize the non-coded video signal in the vertical scaling.
  • FIG. 12 is a block diagram showing a functional configuration of the video signal processing apparatus 100 according to the second embodiment.
  • the video signal processing apparatus 100 according to the second embodiment includes an uncompressed signal changing unit 150, a frame synchronization unit 160, and A switching unit 170 is provided.
  • the processing units included in the video signal processing apparatus 100 according to the second embodiment those having functions similar to those of the respective processing units of the video signal processing apparatus 100 according to the first embodiment will be described in detail. Omitted.
  • the NR / IP conversion unit 140 When an uncompressed signal, which is an unencoded video signal, is input, the NR / IP conversion unit 140 writes and reads the uncompressed signal in the NR / IP conversion signal storage unit 141, thereby temporally changing the time.
  • the non-compressed signal is used to reduce the noise of the uncompressed signal, and when the uncompressed signal is an interlace system, the uncompressed signal is converted from the interlace system to the progressive system and output.
  • noise reduction and IP conversion by the NR / IP conversion unit 140 are the same as the noise reduction and IP conversion by the NR / IP conversion unit 140 in the first embodiment, detailed description thereof will be omitted.
  • the uncompressed signal changing unit 150 stores the uncompressed signal output from the NR / IP converting unit 140 in the decode buffer 111. Further, the non-compressed signal changing unit 150 performs the non-compression that has been changed so that the video effective period within one vertical synchronization period of the uncompressed signal becomes the same value as the video effective period within one vertical synchronization period of the output signal.
  • the signal is read from the decode buffer 111 as a modified uncompressed signal, and the read modified uncompressed signal is output.
  • the uncompressed signal changing unit 150 reads the uncompressed signal that has been changed so that the effective ratio of the uncompressed signal becomes the same value as the effective ratio of the output signal from the decode buffer 111 as a changed uncompressed signal, The read modified uncompressed signal is output.
  • the output signal here is a video signal output to the display panel 34 as in the first embodiment, but before the video signal is output to the display panel 34, it is stored in a storage unit such as a frame buffer. When stored, it may be a video signal output to the storage unit.
  • the uncompressed signal changing unit 150 reads the changed uncompressed signal from the DRAM 180, a fluctuation occurs at the time of reading, and the vertical line of the changed uncompressed signal to be read out An error occurs in the number. This error is usually from -1 line to +1 line, and is at most about -2 line to +2 line. For this reason, the number of lines changed by the uncompressed signal changing unit 150 is allowed to have an error of about ⁇ 2 lines to +2 lines at the maximum.
  • the switching unit 170 causes the decoder 110 to stop generating a decoded signal when an uncompressed signal is input to the NR / IP conversion unit 140. Specifically, when an uncompressed signal is input to the NR / IP converter 140, the switching unit 170 permits the uncompressed signal change unit 150 to access the decode buffer 111 and the decoder 110 In this case, access to the decode buffer 111 is not permitted. Note that the switching unit 170 may acquire from the NR / IP conversion unit 140 that the uncompressed signal has been input to the NR / IP conversion unit 140, or may acquire it based on user input.
  • the decode buffer 111 is a storage area of the DRAM 180 that stores the uncompressed signal instead of the decoded signal.
  • the uncompressed signal changing unit 150 does not function and the signal input to the uncompressed signal changing unit 150 is output as it is.
  • the frame synchronization unit 160 converts the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit 150 into the frame rate of the output signal. This is because an uncompressed signal input from the outside often does not have a frame rate that matches the output, and needs to be converted to a frame rate that matches the output signal. Specifically, the frame synchronization unit 160 converts the frame rate by writing and reading the changed uncompressed signal to and from the decode buffer 111.
  • the frame synchronization unit 160 writes the frame synchronization for converting the frame rate of the modified uncompressed signal output from the uncompressed signal change unit 150 into the frame rate of the output signal to the decode buffer 111 of the uncompressed signal change unit 150. And reading may be used. That is, the non-compressed signal conversion unit 150 and the frame synchronization unit 160 do not process in sequence, but the frame rate conversion process may be performed simultaneously with the writing and reading processing to the decode buffer 111 by the non-compressed signal conversion unit 150. it can. In this case, the memory capacity and the processing amount of the DRAM can be reduced by simultaneously performing the processing by the uncompressed signal conversion unit and the processing by the frame synchronization unit using the decode buffer.
  • an uncompressed signal is input from the outside to the HDMI communication unit 32 shown in FIG. 1, and the HDMI communication unit 32 outputs the uncompressed signal to the NR / IP conversion unit 140.
  • the decoder 110 stops the generation of the decoded signal when an uncompressed signal is input to the NR / IP conversion unit 140 in accordance with the instruction from the switching unit 170. This is because the uncompressed signal is an unencoded video signal and thus does not need to be decoded.
  • FIG. 13 is a flowchart showing an example of video signal processing performed by the video signal processing apparatus 100 according to the second embodiment.
  • an uncompressed signal is input to the NR / IP conversion unit 140 via the HDMI communication unit 32 (S302).
  • the switching unit 170 instructs the decoder 110 to stop generating the decoded signal, and the decoder 110 stops generating the decoded signal (S304).
  • the NR / IP conversion unit 140 reduces the noise of the uncompressed signal and performs IP conversion on the uncompressed signal (S306).
  • the uncompressed signal changing unit 150 stores the noise-reduced and IP-converted uncompressed signal in the decode buffer 111 (S308).
  • the uncompressed signal changing unit 150 reads the uncompressed signal that has been changed so that the effective ratio of the uncompressed signal becomes the same value as the effective ratio of the output signal from the decode buffer 111 as the changed uncompressed signal, and the read change An uncompressed signal is output (S310).
  • the frame synchronization unit 160 converts the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit 150 into the frame rate of the output signal (S312).
  • this frame rate conversion can also be performed using writing to and reading from the decoding buffer in the uncompressed signal changing unit 150.
  • FIG. 14A and FIG. 14B are diagrams for explaining effects when the video signal processing apparatus 100 according to Embodiment 2 performs frame rate conversion.
  • FIG. 14A is a diagram illustrating frame rate conversion when an input video signal is an interlaced system
  • FIG. 14B is a frame rate conversion when an input video signal is a progressive system.
  • FIG. 14A is a diagram illustrating frame rate conversion when an input video signal is an interlaced system
  • FIG. 14B is a frame rate conversion when an input video signal is a progressive system.
  • the frame rate of the input video signal (video signal shown in FIG. 14A) is different from the frame rate of the output signal (video signal shown in FIG. 14B). Therefore, it is necessary to convert the frame rate of the input video signal into the frame rate of the output signal.
  • the output signal is a signal having a frame rate of 8 frames within the same time as the 6 frames of the input signal.
  • two frames are inserted between the frames of the input signal so that the Top frame and the Bottom frame are alternately arranged in the output signal.
  • the first frame A Top frame (“1Top” shown in the figure)
  • a second Bottom frame (“2Bottom” shown in the figure)
  • the first Top frame is arranged after the second Bottom frame of the input signal and a time return occurs, the user who views the video is uncomfortable.
  • the performance of the frame rate conversion is deteriorated.
  • the output signal is a signal having a frame rate of 8 frames within the same time as the 6 frames of the input signal.
  • the output signal has the second frame inserted after the second frame of the input signal, and the fourth frame after the fourth frame. A frame is inserted.
  • the video signal conversion apparatus shown in FIG. 18 uses the field memory unit 7 in common for frame rate conversion, it performs IP conversion after frame rate conversion. Frame rate conversion must be performed on the video signal of the race system. For this reason, the performance in frame rate conversion deteriorates.
  • the frame synchronization unit 160 converts the frame rate by writing and reading the changed uncompressed signal after the IP conversion into the decode buffer 111. That is, the frame synchronization unit 160 shares the storage area of the decode buffer 111 and performs frame rate conversion on the progressive video signal.
  • the encoded video signal input to the decoder 110 is usually a signal having the same frame rate as the frame rate of the output signal. Therefore, when the video signal is input to the decoder 110 and the decoded signal is stored in the decode buffer 111, the frame synchronization unit 160 stops functioning and does not use the storage area of the decode buffer 111. No additional storage space is required.
  • the video signal processing apparatus 100 As described above, in the video signal processing apparatus 100 according to the second embodiment, it is possible to suppress performance degradation in frame rate conversion.
  • FIG. 15 is a diagram summarizing the effects produced by the video signal processing apparatus 100 according to the second embodiment.
  • FIG. 17 when an encoded video signal such as a video stream is input, the conventional video signal processing apparatus shown in FIG. 17 (“Conventional 1” shown in FIG. 15) Three memories are required: a memory 1 for decoding buffer, a memory 2 for noise reduction and IP conversion, and a memory 3 for scanning line conversion.
  • a memory 1 for decoding buffer and scanning line conversion, and a memory 2 for noise reduction and IP conversion are included. Only two memories are required.
  • the decoding process is stopped, the uncompressed signal is written to the decode buffer 111, and the changed uncompressed signal is read from the decode buffer 111. That is, when an uncompressed signal is input, the decoding process can be stopped, so that the uncompressed signal can be stored in the decode buffer 111 instead of the decoded signal. For this reason, since the storage area of the decode buffer 111 of the DRAM 180 can be assigned to an uncompressed signal, the decode buffer 111 can be used to resize the non-compressed signal in vertical scaling.
  • the modified uncompressed signal output from the uncompressed signal changing unit 150 is converted to the progressive method because IP conversion is performed.
  • the frame rate conversion performance is inferior to that when frame rate conversion is performed on a progressive video signal. For this reason, by performing frame rate conversion on the changed uncompressed signal that has been subjected to IP conversion, it is possible to suppress degradation in performance of frame rate conversion.
  • the video signal processing apparatus 100 is mounted on a digital video recorder 20 and a digital television 30 as shown in FIG.
  • the video signal processing apparatus 100 includes the processing units illustrated in FIG. 2 or FIG. 12, but the video signal processing apparatus 100 performs the processing illustrated in these drawings.
  • a processing unit other than the unit may be provided.
  • the video signal processing apparatus 100 may include a processing unit that resizes, that is, enlarges or reduces the horizontal image size of an input video.
  • the structure of the video signal processing apparatus 100 is for illustrating in order to demonstrate this invention concretely, and the video signal processing apparatus which concerns on this invention has all the said structures. It is not always necessary to prepare.
  • the video signal processing apparatus 100 only needs to include the decoder 110, the decode buffer 111, the decoded signal change unit 120, the NR / IP conversion unit 140, and the NR / IP conversion signal storage unit 141.
  • the OSD synthesis unit 130 and the OSD signal storage unit 131 are not necessarily provided.
  • the video signal processing apparatus 100 includes the decoder 110, the decode buffer 111, the decoded signal change unit 120, the NR / IP conversion unit 140, the NR / IP conversion signal storage unit 141, and the uncompressed signal change unit.
  • the OSD synthesis unit 130, the OSD signal storage unit 131, and the frame synchronization unit 160 are not necessarily provided.
  • the decoded signal changing unit 120 only needs to include the reading unit 123, and the acquisition unit 121 and the calculation unit 122 are not necessarily provided.
  • the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the data acquired by the acquisition unit 121.
  • data such as the number of vertical effective lines of the decoded signal, the total number of vertical lines and the number of vertical effective lines of the output signal are set in advance, and the calculation unit 122 uses the predetermined data to change the decoded decoded signal.
  • the total number of vertical lines may be calculated.
  • the reading unit 123 may read the modified decoded signal from the decode buffer 111 according to the predetermined total number of vertical lines. .
  • the video signal processing apparatus 100 according to the present invention is applied to a digital television and a digital video recorder has been described.
  • the present invention can be applied to a three-dimensional image display device (for example, a mobile phone device, a personal computer, etc.) that displays an image.
  • the video signal processing apparatus 100 according to the present invention can be applied to a three-dimensional image output apparatus (for example, a BD player) that outputs a three-dimensional image other than a digital video recorder.
  • the video signal processing apparatus 100 is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them.
  • circuits are not limited to LSI, and may be realized by a dedicated circuit or a general-purpose processor.
  • An FPGA Field Programmable Gate Array
  • reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used.
  • some or all of the functions of the video signal processing apparatuses 100 and 100B according to the first and second embodiments may be realized by a processor such as a CPU executing a program.
  • the present invention may be the above program or a recording medium on which the above program is recorded.
  • the program can be distributed via a transmission medium such as the Internet.
  • the video signal processing apparatus has an effect that the memory capacity and the processing amount of the DRAM can be reduced, and can be applied to, for example, a digital television and a digital video recorder.

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Abstract

Disclosed is a video signal processing device (100) for processing a video signal in such a way that an output signal is output. The output signal is for an image which has a size that is different from an image displayed by a video signal that is input. The video signal processing device (100) is provided with: a decoder (110) for decoding an encoded video signal and generating a decoded signal; a decoding buffer (111) for connecting to the decoder (110) and storing the decoded signal generated by the decoder (110); a decoded signal modification unit (120) for reading out the decoded signal, which has been modified in such a way that the video effective period within one vertical synchronization period of the decoded signal has the same values as the video effective period within one vertical synchronization period of the output signal, from the decoding buffer (111) as a modified decoded signal, and for outputting the modified decoded signal that is read out; and an NR/IP conversion unit for reducing noise in the modified decoded signal and also for performing IP conversion of the modified decoded signal, by writing the modified decoded signal to memory and reading the modified decoded signal out from memory.

Description

映像信号処理装置及び映像信号処理方法Video signal processing apparatus and video signal processing method
　本発明は、入力される映像信号で示される画像とは異なるサイズの画像の出力信号を出力するように、映像信号を処理する映像信号処理装置及び映像信号処理方法に関する。 The present invention relates to a video signal processing apparatus and a video signal processing method for processing a video signal so as to output an output signal of an image having a size different from that of an image indicated by the input video signal.
　従来、視聴者が立体的に感じる二次元画像である三次元画像を表示するための映像信号処理装置が知られている。また、近年では、このような三次元画像を表示する機能を有する家庭用テレビが実現されつつある。 Conventionally, a video signal processing apparatus for displaying a three-dimensional image, which is a two-dimensional image that a viewer feels three-dimensionally, is known. In recent years, home televisions having a function of displaying such a three-dimensional image are being realized.
　そして、この映像信号処理装置は、映像信号を入力して、当該映像信号を処理することで、三次元画像を表示パネルに表示させる。 The video signal processing apparatus inputs a video signal and processes the video signal to display a three-dimensional image on the display panel.
　図１７は、従来の映像信号処理装置３００による映像信号の処理を説明する図である。 FIG. 17 is a diagram for explaining video signal processing by the conventional video signal processing apparatus 300.
　同図に示すように、従来の映像信号処理装置３００では、まず、放送波などの符号化されたビデオストリームの映像信号が、デコーダ３１０に入力される。そして、デコーダ３１０は、当該映像信号を復号して復号信号を生成し、当復号信号をデコードバッファ３１１に書き込む。そして、映像読出部３２０は、デコードバッファ３１１から復号信号を読み出す。 As shown in the figure, in the conventional video signal processing apparatus 300, first, a video signal of an encoded video stream such as a broadcast wave is input to a decoder 310. Then, the decoder 310 generates a decoded signal by decoding the video signal, and writes the decoded signal in the decode buffer 311. Then, the video reading unit 320 reads the decoded signal from the decode buffer 311.
　また、ＯＳＤ合成部３３０は、ＯＳＤ信号記憶部３３１に記憶されているＯＳＤ（Ｏｎ　Ｓｃｒｅｅｎ　Ｄｉｓｐｌａｙ）信号を読み出し、復号信号に合成する。 Also, the OSD synthesis unit 330 reads an OSD (On Screen Display) signal stored in the OSD signal storage unit 331 and synthesizes it with a decoded signal.
　そして、ＮＲ／ＩＰ変換部３４０は、ＯＳＤ信号が合成された復号信号をＮＲ／ＩＰ変換信号記憶部３４１に書き込み、またＮＲ／ＩＰ変換信号記憶部３４１から当該復号信号を読み出すことで、復号信号のノイズを低減するとともに、復号信号をインタレース方式からプログレッシブ方式に変換（以下、「ＩＰ変換」という）する。 Then, the NR / IP conversion unit 340 writes the decoded signal combined with the OSD signal into the NR / IP conversion signal storage unit 341, and reads out the decoded signal from the NR / IP conversion signal storage unit 341, thereby decoding the decoded signal. And the decoded signal is converted from the interlace method to the progressive method (hereinafter referred to as “IP conversion”).
　そして、走査線変換部３５０は、リサイズ信号記憶部３５１に復号信号を書き込み、またリサイズ信号記憶部３５１から復号信号を読み出すことで、復号信号の垂直スケーリングのリサイズ（走査線変換）を行う。これにより、走査線変換部３５０は、復号信号のフォーマットを、表示パネルに表示させるためのフォーマットに変換する。 Then, the scanning line converter 350 writes the decoded signal into the resized signal storage unit 351 and reads out the decoded signal from the resized signal storage unit 351, thereby performing vertical scaling resizing (scanning line conversion) of the decoded signal. Thereby, the scanning line conversion unit 350 converts the format of the decoded signal into a format for displaying on the display panel.
　ここで、これらのデコードバッファ３１１、ＯＳＤ信号記憶部３３１、ＮＲ／ＩＰ変換信号記憶部３４１及びリサイズ信号記憶部３５１は、ＤＲＡＭ（Ｄｙｎａｍｉｃ　Ｒａｎｄｏｍ　Ａｃｃｅｓｓ　Ｍｅｍｏｒｙ）３８０の記憶領域である。 Here, the decode buffer 311, the OSD signal storage unit 331, the NR / IP conversion signal storage unit 341, and the resize signal storage unit 351 are storage areas of a DRAM (Dynamic Random Access Memory) 380.
　このようにして、映像信号処理装置３００は、映像信号を入力して、当該映像信号を処理することで、三次元画像を表示パネルに表示させる。 In this manner, the video signal processing apparatus 300 inputs a video signal and processes the video signal to display a three-dimensional image on the display panel.
　また、ＩＰ変換に必要なメモリと走査線変換に必要なメモリとを共用する映像信号処理装置が提案されている（例えば、特許文献１参照）。 Also, a video signal processing apparatus that shares a memory necessary for IP conversion and a memory necessary for scanning line conversion has been proposed (for example, see Patent Document 1).
　図１８は、特許文献１に開示されている従来の映像信号処理装置による映像信号の処理を説明する図である。 FIG. 18 is a diagram for explaining video signal processing by the conventional video signal processing device disclosed in Patent Document 1. In FIG.
　同図に示すように、映像信号変換装置は、画素変換装置１とフィールドメモリ部７とを備えている。そして、画素変換装置１は、メモリ制御処理部２、ＩＰ変換処理部３、走査線変換処理部４、水平画素変換処理部５及び同期処理部６を備えている。 As shown in the figure, the video signal conversion device includes a pixel conversion device 1 and a field memory unit 7. The pixel conversion device 1 includes a memory control processing unit 2, an IP conversion processing unit 3, a scanning line conversion processing unit 4, a horizontal pixel conversion processing unit 5, and a synchronization processing unit 6.
　そして、ＩＰ変換処理部３は、ＩＰ変換が必要な映像信号に対して、フィールドメモリ部７をＩＰ変換用のメモリとして使用する。また、走査線変換処理部４は、走査線変換が必要な映像信号に対して、フィールドメモリ部７を走査線変換用のメモリとして使用する。 Then, the IP conversion processing unit 3 uses the field memory unit 7 as a memory for IP conversion for a video signal that needs IP conversion. Further, the scanning line conversion processing unit 4 uses the field memory unit 7 as a memory for scanning line conversion with respect to a video signal that requires scanning line conversion.
　このように、ＩＰ変換処理部３と走査線変換処理部４とがフィールドメモリ部７を共用することで、ＤＲＡＭのメモリ使用量を低減することができる。 As described above, since the IP conversion processing unit 3 and the scanning line conversion processing unit 4 share the field memory unit 7, the memory usage of the DRAM can be reduced.
特許第３９９８３９９号公報Japanese Patent No. 3998399
　しかしながら、上記従来の映像信号処理装置では、ＤＲＡＭのメモリ容量及び処理量が大きくなるという問題がある。 However, the conventional video signal processing apparatus has a problem that the memory capacity and the processing amount of the DRAM are increased.
　つまり、図１７に示された従来の映像信号処理装置では、ＤＲＡＭに多くのデータが記憶されているため、ＤＲＡＭのメモリ容量が大きくなる。また、ＤＲＡＭと各処理部との間でデータ転送が行われるため、単位時間当たりのデータ転送量が大きくなり、ＤＲＡＭのメモリ処理量が大きくなる。 That is, in the conventional video signal processing apparatus shown in FIG. 17, since a large amount of data is stored in the DRAM, the memory capacity of the DRAM increases. In addition, since data transfer is performed between the DRAM and each processing unit, the data transfer amount per unit time increases, and the memory processing amount of the DRAM increases.
　また、図１８に示された従来の映像信号処理装置では、ＩＰ変換と走査線変換とをメモリを共用して行うことで、ＤＲＡＭのメモリ使用量を低減しているが、入力される映像信号のノイズの低減は行われていない。そして、この従来の映像信号処理装置において、入力される映像信号のノイズ低減を行う場合には、ＤＲＡＭの記憶領域が追加で必要になる。 Further, in the conventional video signal processing apparatus shown in FIG. 18, the memory usage of the DRAM is reduced by performing the IP conversion and the scanning line conversion by sharing the memory. The noise is not reduced. In the conventional video signal processing apparatus, when noise reduction of an input video signal is performed, an additional storage area of the DRAM is required.
　図１９Ａ及び図１９Ｂは、従来の映像信号処理装置が映像信号のノイズ低減を行う場合に、ＤＲＡＭの記憶領域が追加で必要になることを説明する図である。 19A and 19B are diagrams for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal.
　具体的には、図１９Ａは、映像信号がインタレース方式の場合に、ＩＰ変換と走査線変換とを行うために映像信号をフィールドメモリ部７に書き込み読み出す処理を説明する図である。また、図１９Ｂは、映像信号がインタレース方式の場合に、ＩＰ変換と走査線変換とノイズ低減とを行うために映像信号をフィールドメモリ部７に書き込み読み出す処理を説明する図である。 Specifically, FIG. 19A is a diagram illustrating a process of writing and reading a video signal to and from the field memory unit 7 in order to perform IP conversion and scanning line conversion when the video signal is an interlace method. FIG. 19B is a diagram for describing processing for writing and reading a video signal to / from the field memory unit 7 in order to perform IP conversion, scanning line conversion, and noise reduction when the video signal is an interlace method.
　図１９Ａに示すように、ＩＰ変換と走査線変換とを行うためには、まず、フィールドメモリ部７には、現在の映像信号（同図に示す現信号）が記憶される。そして、映像信号の１フィールド前の信号（同図に示す１Ｆ前信号）と２フィールド前の信号（同図に示す２Ｆ前信号）とが読み出される。 As shown in FIG. 19A, in order to perform IP conversion and scanning line conversion, the field memory unit 7 first stores the current video signal (current signal shown in FIG. 19A). Then, a signal one field before the video signal (1F before signal shown in the figure) and a signal two fields before (the signal before 2F shown in the figure) are read out.
　また、図１９Ｂに示すように、ＩＰ変換と走査線変換とノイズ低減とを行うためには、まず、フィールドメモリ部７に、ノイズ低減のための処理部（同図に示すＮＲ）でノイズが低減された映像信号が記憶される。そして、ノイズ低減のための映像信号の２フィールド前の信号と、リサイズ後フォーマットの映像信号の１フィールド前の信号と２フィールド前の信号と現信号とが読み出される。 Further, as shown in FIG. 19B, in order to perform IP conversion, scanning line conversion, and noise reduction, first, noise is generated in the field memory unit 7 by a processing unit (NR shown in the figure) for noise reduction. The reduced video signal is stored. Then, the signal two fields before the video signal for noise reduction, the signal one field before the resized format video signal, the signal two fields before, and the current signal are read out.
　このように、ＩＰ変換と走査線変換に加えてノイズ低減を行う場合には、ＩＰ変換と走査線変換とを行う場合に比べて、多くの信号を読み出さなければならず、データ転送量が増加するため、ノイズ低減を行うためのＤＲＡＭの記憶領域が追加で必要になる。 As described above, when noise reduction is performed in addition to IP conversion and scanning line conversion, more signals must be read and data transfer amount is increased as compared with the case of performing IP conversion and scanning line conversion. Therefore, an additional DRAM storage area for noise reduction is required.
　そこで、本発明は、このような問題に鑑みてなされたものであり、ＤＲＡＭのメモリ容量及び処理量を低減することができる映像信号処理装置及び映像信号処理方法を提供することを目的とする。 Therefore, the present invention has been made in view of such problems, and an object thereof is to provide a video signal processing device and a video signal processing method capable of reducing the memory capacity and the processing amount of a DRAM.
　上記目的を達成するために、本発明に係る映像信号処理装置は、入力される映像信号で示される画像とは異なるサイズの画像の出力信号を出力するように、前記映像信号を処理する映像信号処理装置であって、符号化された前記映像信号を復号し復号信号を生成するデコーダと、前記デコーダに接続され、前記デコーダが生成した復号信号を記憶しているデコードバッファと、前記復号信号の１垂直同期期間内での映像有効期間が前記出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された前記復号信号を変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する復号信号変更部と、出力された前記変更復号信号をメモリに書き込み読み出すことで、時間的に前後する前記変更復号信号を用いて前記変更復号信号のノイズを低減するとともに、前記変更復号信号がインタレース方式の場合に前記変更復号信号をインタレース方式からプログレッシブ方式に変換するＮＲ／ＩＰ変換部とを備える。 In order to achieve the above object, a video signal processing apparatus according to the present invention processes a video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal. A processing device that decodes the encoded video signal to generate a decoded signal; a decoder that is connected to the decoder and stores the decoded signal generated by the decoder; and The decoded signal, which has been changed so that the video valid period within one vertical synchronization period becomes the same value as the video valid period within one vertical synchronization period of the output signal, is read from the decode buffer as a modified decoded signal and read out. The decoded signal changing unit that outputs the changed decoded signal, and the changed decoded signal that is output is written to and read from the memory, so that the change in time is changed. While reducing the noise of the modified decoded signal using the decoded signal, and an NR / IP converter for converting the progressive method from interlaced the modified decoded signal if the change decoded signal is interlaced.
　これによれば、復号信号の１垂直同期期間内での映像有効期間が出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された変更復号信号を、デコードバッファから読み出し、変更復号信号を出力する。つまり、デコードバッファから復号信号を読み出す際に、リサイズを行うために変更された復号信号をデコードバッファから直接読み出すことで、復号信号の垂直スケーリングのリサイズを行うことができる。これにより、図１７に示されたようなリサイズ信号記憶部３５１がなくても、復号信号の垂直スケーリングのリサイズを行うことができる。このため、ＤＲＡＭ３８０からリサイズ信号記憶部３５１のメモリ容量を削除することができ、リサイズ信号記憶部３５１と処理部との間のデータ転送量を削減することができる。また、メモリの記憶領域を共用して、ノイズ低減とＩＰ変換とを行うことができるため、ノイズ低減を行う場合でもＤＲＡＭの記憶領域を追加で必要としない。したがって、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, the modified decoded signal, which has been changed so that the video valid period within one vertical synchronization period of the decoded signal becomes the same value as the video valid period within one vertical synchronous period of the output signal, is read from the decode buffer. Read and output modified decoding signal. That is, when the decoded signal is read from the decode buffer, the decoded signal that has been changed for resizing is directly read from the decode buffer, whereby the vertical scaling of the decoded signal can be performed. Accordingly, the vertical scaling of the decoded signal can be performed without the resized signal storage unit 351 as illustrated in FIG. Therefore, the memory capacity of the resize signal storage unit 351 can be deleted from the DRAM 380, and the amount of data transferred between the resize signal storage unit 351 and the processing unit can be reduced. Further, since noise reduction and IP conversion can be performed by sharing the memory storage area, no additional DRAM storage area is required even when noise reduction is performed. Accordingly, the memory capacity and the processing amount of the DRAM can be reduced.
　また、好ましくは、前記ＮＲ／ＩＰ変換部は、符号化されていない映像信号である非圧縮信号が入力された場合に、前記非圧縮信号を前記メモリに書き込み読み出すことで、時間的に前後する前記非圧縮信号を用いて前記非圧縮信号のノイズを低減するとともに、前記非圧縮信号がインタレース方式の場合に前記非圧縮信号をインタレース方式からプログレッシブ方式に変換して出力し、前記映像信号処理装置は、さらに、前記ＮＲ／ＩＰ変換部が出力した非圧縮信号を前記デコードバッファに記憶させるとともに、前記非圧縮信号の１垂直同期期間内での映像有効期間が前記出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された前記非圧縮信号を変更非圧縮信号として前記デコードバッファから読み出し、読み出した前記変更非圧縮信号を出力する非圧縮信号変更部と、前記ＮＲ／ＩＰ変換部に前記非圧縮信号が入力された場合に、前記デコーダに前記復号信号の生成を停止させる切替部とを備える。 Preferably, the NR / IP conversion unit is time-shifted by writing and reading the uncompressed signal into the memory when an uncompressed signal that is an unencoded video signal is input. The non-compressed signal is used to reduce noise of the uncompressed signal, and when the uncompressed signal is an interlaced format, the uncompressed signal is converted from an interlaced format to a progressive format and output, and the video signal The processing apparatus further stores the uncompressed signal output from the NR / IP converter in the decode buffer, and the video valid period within one vertical synchronization period of the uncompressed signal is one vertical synchronization of the output signal. The uncompressed signal changed so as to have the same value as the video valid period within the period is read from the decode buffer as a modified uncompressed signal and read. An uncompressed signal changing unit that outputs the changed uncompressed signal, and a switching unit that causes the decoder to stop generating the decoded signal when the uncompressed signal is input to the NR / IP conversion unit. .
　これによれば、非圧縮信号が入力された場合に、復号処理を停止するとともに、デコードバッファに非圧縮信号を書き込み、デコードバッファから変更非圧縮信号を読み出す。つまり、非圧縮信号が入力された場合は、復号処理を停止できるため、デコードバッファには復号信号の代わりに非圧縮信号を記憶させることができる。このため、ＤＲＡＭのデコードバッファの記憶領域を非圧縮信号に割り当てることができるため、デコードバッファを用いて非圧縮信号の垂直スケーリングのリサイズを行うことができる。また、非圧縮信号が入力された場合でも、メモリの１つの記憶領域を共用してノイズ低減とＩＰ変換とを行うことができるため、ノイズ低減を行ってもＤＲＡＭの記憶領域を追加で必要としない。したがって、非圧縮信号が入力される場合でも、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, when an uncompressed signal is input, the decoding process is stopped, the uncompressed signal is written to the decode buffer, and the changed uncompressed signal is read from the decode buffer. That is, when an uncompressed signal is input, the decoding process can be stopped, so that the uncompressed signal can be stored in the decode buffer instead of the decoded signal. For this reason, since the storage area of the decode buffer of the DRAM can be allocated to the uncompressed signal, the vertical scaling of the uncompressed signal can be performed using the decode buffer. Even when an uncompressed signal is input, noise reduction and IP conversion can be performed by sharing one storage area of the memory. Therefore, even if noise reduction is performed, an additional DRAM storage area is required. do not do. Therefore, even when an uncompressed signal is input, the memory capacity and processing amount of the DRAM can be reduced.
　また、好ましくは、さらに、前記非圧縮信号変更部が出力した変更非圧縮信号のフレームレートを前記出力信号のフレームレートに変換するフレームシンクロ部を備える。 Also preferably, a frame synchronization unit for converting a frame rate of the modified uncompressed signal output from the uncompressed signal changing unit into a frame rate of the output signal is further provided.
　これによれば、非圧縮信号変更部が出力した変更非圧縮信号は、ＩＰ変換が行われているため、プログレッシブ方式に変換されている。ここで、インタレース方式の映像信号をフレームレート変換する場合は、プログレッシブ方式の映像信号をフレームレート変換する場合に比べて、フレームレート変換の性能が劣る。このため、ＩＰ変換が行われた変更非圧縮信号をフレームレート変換することで、フレームレート変換の性能低下を抑制しつつ、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, the changed uncompressed signal output by the uncompressed signal changing unit is converted to the progressive method because IP conversion is performed. Here, when frame rate conversion is performed on an interlaced video signal, the frame rate conversion performance is inferior to that when frame rate conversion is performed on a progressive video signal. For this reason, by performing frame rate conversion on the changed uncompressed signal that has been subjected to IP conversion, it is possible to reduce the memory capacity and the processing amount of the DRAM while suppressing a decrease in the performance of the frame rate conversion.
　また、さらに、前記非圧縮信号変更部が出力した変更非圧縮信号のフレームレートを前記出力信号のフレームレートに変換するフレームシンクロを、前記非圧縮信号変更部の前記デコードバッファとの書き込みと読み出しを用いて行うフレームシンクロ部を備えることにしてもよい。 Further, the frame synchronization for converting the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit to the frame rate of the output signal is written to and read from the decode buffer of the uncompressed signal changing unit. You may decide to provide the frame synchronization part performed using.
　これによれば、フレームシンクロ部におけるフレームレート変換は、非圧縮信号変更部におけるデコードバッファを用いることも可能である。つまり、非圧縮信号変換部とフレームシンクロ部とが順に処理するのではなく、非圧縮信号変換部によるデコードバッファへの書き込みと読み出しの処理と同時にフレームレート変換の処理を行うこともできる。これにより、非圧縮信号変換部による処理とフレームシンクロ部による処理をデコードバッファを用いて同時に行うことができ、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, it is also possible to use the decode buffer in the uncompressed signal changing unit for the frame rate conversion in the frame synchronizing unit. That is, the non-compressed signal conversion unit and the frame synchronization unit do not process in sequence, but the frame rate conversion processing can be performed simultaneously with the writing and reading processing to the decode buffer by the non-compressed signal conversion unit. As a result, the processing by the uncompressed signal conversion unit and the processing by the frame synchronization unit can be performed simultaneously using the decode buffer, and the memory capacity and processing amount of the DRAM can be reduced.
　また、好ましくは、前記復号信号変更部は、１垂直同期期間内での映像有効期間の割合を有効割合とし、前記復号信号の有効割合が前記出力信号の有効割合と同じ値になるように、前記復号信号の映像有効期間を変更して、変更した前記映像有効期間の復号信号を前記変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する。 Preferably, the decoded signal changing unit sets the ratio of the video effective period within one vertical synchronization period as an effective ratio, and the effective ratio of the decoded signal is the same value as the effective ratio of the output signal. The video effective period of the decoded signal is changed, the changed decoded signal of the video effective period is read from the decode buffer as the changed decoded signal, and the read changed decoded signal is output.
　これによれば、復号信号の有効割合が出力信号の有効割合と同じ値になるように、復号信号の映像有効期間を変更して、変更した映像有効期間の復号信号を変更復号信号としてデコードバッファから読み出し、出力する。つまり、復号信号の映像有効期間を変更してデコードバッファから読み出すことで、復号信号の垂直スケーリングのリサイズを行うことができ、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, the video effective period of the decoded signal is changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, and the decoded buffer of the changed video effective period is used as the changed decoded signal. Read from and output. That is, by changing the video effective period of the decoded signal and reading it from the decode buffer, the decoded signal can be resized by vertical scaling, and the memory capacity and the processing amount of the DRAM can be reduced.
　また、好ましくは、前記復号信号変更部は、１垂直同期期間内での垂直ライン数である垂直全ライン数に対する映像有効期間内での垂直ライン数である垂直有効ライン数の割合を前記有効割合とし、前記変更復号信号の有効割合が前記出力信号の有効割合と同じ値になるように、前記復号信号の垂直全ライン数を変更して、変更した前記垂直全ライン数の復号信号を前記変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する。 Preferably, the decoded signal changing unit calculates a ratio of the number of vertical effective lines that is the number of vertical lines within the video effective period to the number of all vertical lines that is the number of vertical lines within one vertical synchronization period. And changing the number of vertical lines of the decoded signal so that the effective rate of the changed decoded signal is the same as the effective rate of the output signal, and changing the decoded signal of the changed number of vertical lines. Read from the decoding buffer as a decoded signal, and output the read modified decoded signal.
　これによれば、復号信号の垂直全ライン数を変更して、変更した垂直全ライン数の復号信号を変更復号信号としてデコードバッファから読み出し、出力する。つまり、復号信号の垂直全ライン数を変更してデコードバッファから読み出すことで、復号信号の垂直スケーリングのリサイズを行うことができ、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, the total number of vertical lines of the decoded signal is changed, and the decoded signal having the changed total number of vertical lines is read from the decoding buffer as a changed decoded signal and output. That is, by changing the total number of vertical lines of the decoded signal and reading from the decoding buffer, the vertical scaling of the decoded signal can be performed, and the memory capacity and processing amount of the DRAM can be reduced.
　また、好ましくは、前記復号信号変更部は、前記復号信号の垂直有効ライン数を取得する取得部と、取得された前記復号信号の垂直有効ライン数を用いて、前記変更復号信号の垂直全ライン数を算出する算出部と、算出された前記垂直全ライン数に変更した前記変更復号信号を前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する読出部とを備える。 Preferably, the decoded signal changing unit uses the acquisition unit for acquiring the number of vertical effective lines of the decoded signal and the number of vertical effective lines of the acquired decoded signal, and uses all the vertical lines of the changed decoded signal. A calculation unit that calculates a number, and a reading unit that reads the modified decoded signal changed to the calculated total number of vertical lines from the decode buffer and outputs the read modified decoded signal.
　これによれば、復号信号の垂直有効ライン数を取得して、変更復号信号の垂直全ライン数を算出することで、算出された垂直全ライン数に変更した変更復号信号をデコードバッファから読み出し、出力する。このため、例えば、ユーザが設定した任意の垂直有効ライン数を取得することで、当該垂直有効ライン数に応じた変更復号信号をデコードバッファから読み出すことができる。これにより、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, by obtaining the number of vertical effective lines of the decoded signal and calculating the total number of vertical lines of the modified decoded signal, the modified decoded signal changed to the calculated total number of vertical lines is read from the decoding buffer, Output. For this reason, for example, by acquiring an arbitrary number of vertical effective lines set by the user, a modified decoded signal corresponding to the number of vertical effective lines can be read from the decode buffer. Thereby, the memory capacity and the processing amount of the DRAM can be reduced.
　また、好ましくは、前記取得部は、さらに、前記出力信号のフォーマットの種別を示す情報を取得し、前記算出部は、取得された前記情報で示されるフォーマットに対応した前記出力信号の垂直全ライン数と垂直有効ライン数とをさらに用いて、前記変更復号信号の垂直全ライン数を算出する。 Preferably, the acquisition unit further acquires information indicating a format type of the output signal, and the calculation unit further includes all vertical lines of the output signal corresponding to the format indicated by the acquired information. The total number of vertical lines of the modified decoded signal is calculated by further using the number and the number of vertical effective lines.
　これによれば、出力信号のフォーマットの種別を示す情報を取得して、変更復号信号の垂直全ライン数を算出することで、算出された垂直全ライン数に変更した変更復号信号をデコードバッファから読み出し、出力する。このため、例えば、ユーザが設定した任意の出力信号のフォーマットの種別を示す情報を取得することで、当該フォーマットに応じた変更復号信号をデコードバッファから読み出すことができる。これにより、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, by obtaining information indicating the format type of the output signal and calculating the total number of vertical lines of the changed decoded signal, the changed decoded signal changed to the calculated total number of vertical lines is read from the decoding buffer. Read and output. For this reason, for example, by acquiring information indicating the format type of an arbitrary output signal set by the user, a modified decoded signal corresponding to the format can be read from the decode buffer. Thereby, the memory capacity and the processing amount of the DRAM can be reduced.
　また、好ましくは、さらに、前記復号信号変更部が出力した変更復号信号にＯＳＤ（Ｏｎ　Ｓｃｒｅｅｎ　Ｄｉｓｐｌａｙ）信号を合成するＯＳＤ合成部を備え、前記ＮＲ／ＩＰ変換部は、前記ＯＳＤ合成部がＯＳＤ信号を合成した変更復号信号のノイズを低減するとともに、前記変更復号信号をインタレース方式からプログレッシブ方式に変換する。 In addition, preferably, an OSD synthesis unit that synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit, and the NR / IP conversion unit is configured such that the OSD synthesis unit includes the OSD signal. Is reduced, and the modified decoded signal is converted from the interlace method to the progressive method.
　これによれば、復号信号が変更された後に、ＯＳＤ信号が合成され、ノイズ低減とＩＰ変換が行われる。このため、図１７に示されたようなリサイズ信号記憶部３５１がなくても、復号信号の垂直スケーリングのリサイズを行うために変更され、ＯＳＤ合成、及びＩＰ変換が行われた復号信号を生成することができる。したがって、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, after the decoded signal is changed, the OSD signal is synthesized, and noise reduction and IP conversion are performed. For this reason, even if there is no resize signal storage unit 351 as shown in FIG. 17, a decoded signal that has been changed to perform vertical scaling resizing of the decoded signal and subjected to OSD synthesis and IP conversion is generated. be able to. Accordingly, the memory capacity and the processing amount of the DRAM can be reduced.
　また、好ましくは、前記デコーダは、三次元画像用の前記映像信号を復号した前記復号信号を生成し、前記デコードバッファは、前記デコーダが生成した三次元画像用の前記復号信号を記憶しており、前記復号信号変更部は、前記デコードバッファから、三次元画像用の前記変更復号信号を読み出し、出力する。 Preferably, the decoder generates the decoded signal obtained by decoding the video signal for 3D images, and the decode buffer stores the decoded signal for 3D images generated by the decoder. The decoded signal changing unit reads out and outputs the changed decoded signal for the 3D image from the decode buffer.
　これによれば、本発明に係る映像信号処理装置を、三次元画像用の映像信号処理装置として使用することができ、三次元画像用の映像信号処理装置において、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 According to this, the video signal processing device according to the present invention can be used as a video signal processing device for a three-dimensional image. In the video signal processing device for a three-dimensional image, the memory capacity and the processing amount of the DRAM are reduced. Can be reduced.
　なお、本発明は、このような映像信号処理装置として実現できるだけでなく、映像信号処理装置に含まれる特徴的な処理をステップとする映像信号処理装置の制御方法、又は映像信号処理方法として実現したり、そのような特徴的なステップをコンピュータに実行させるプログラムとして実現したりすることもできる。そして、そのようなプログラムは、ＣＤ－ＲＯＭ等の記録媒体及びインターネット等の伝送媒体を介して流通させることができるのは言うまでもない。 The present invention can be realized not only as such a video signal processing apparatus, but also as a control method of a video signal processing apparatus or a video signal processing method using steps characteristic processing included in the video signal processing apparatus. Or, it can be realized as a program for causing a computer to execute such characteristic steps. Needless to say, such a program can be distributed via a recording medium such as a CD-ROM and a transmission medium such as the Internet.
　さらに、本発明は、このような映像信号処理装置の機能の一部又は全てを実現する半導体集積回路（ＬＳＩ）として実現したり、このような映像信号処理装置を備えるデジタルテレビ等の映像信号処理装置として実現したり、このような映像信号処理装置を含む三次元画像表示システムとして実現したりできる。 Furthermore, the present invention can be realized as a semiconductor integrated circuit (LSI) that realizes part or all of the functions of such a video signal processing apparatus, or a video signal process such as a digital television provided with such a video signal processing apparatus. It can be realized as a device or a three-dimensional image display system including such a video signal processing device.
　以上より、本発明は、ＤＲＡＭのメモリ容量及び処理量を低減することができる映像信号処理装置を提供することができる。 As described above, the present invention can provide a video signal processing apparatus capable of reducing the memory capacity and processing amount of a DRAM.
図１は、実施の形態１に係る三次元画像表示システムの機能構成を示すブロック図である。FIG. 1 is a block diagram illustrating a functional configuration of the three-dimensional image display system according to the first embodiment. 図２は、実施の形態１に係る映像信号処理装置の機能構成を示すブロック図である。FIG. 2 is a block diagram showing a functional configuration of the video signal processing apparatus according to the first embodiment. 図３は、実施の形態１に係る映像信号処理装置が行う映像信号の処理の一例を示すフローチャートである。FIG. 3 is a flowchart illustrating an example of video signal processing performed by the video signal processing apparatus according to the first embodiment. 図４は、実施の形態１に係る復号信号変更部が変更復号信号を読み出して出力する処理の一例を示すフローチャートである。FIG. 4 is a flowchart showing an example of processing in which the decoded signal changing unit according to Embodiment 1 reads out and outputs the changed decoded signal. 図５は、実施の形態１に係る復号信号の垂直ライン数と出力信号の垂直ライン数とを説明する図である。FIG. 5 is a diagram for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to the first embodiment. 図６Ａは、実施の形態１に係る復号信号の垂直ライン数と出力信号の垂直ライン数とを説明する図である。6A is a diagram for explaining the number of vertical lines of a decoded signal and the number of vertical lines of an output signal according to Embodiment 1. FIG. 図６Ｂは、実施の形態１に係る復号信号の垂直ライン数と出力信号の垂直ライン数とを説明する図である。FIG. 6B is a diagram for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to Embodiment 1. 図７Ａは、従来の走査線変換部がリサイズを行うために復号信号を変更する処理を説明する図である。FIG. 7A is a diagram illustrating a process in which a conventional scanning line conversion unit changes a decoded signal in order to perform resizing. 図７Ｂは、従来の走査線変換部がリサイズを行うために復号信号を変更する処理を説明する図である。FIG. 7B is a diagram illustrating a process of changing a decoded signal in order for the conventional scanning line conversion unit to perform resizing. 図８は、実施の形態１に係る読出部が変更復号信号をデコードバッファから読み出す処理を説明する図である。FIG. 8 is a diagram illustrating a process in which the reading unit according to Embodiment 1 reads the modified decoded signal from the decode buffer. 図９Ａは、従来のＮＲ／ＩＰ変換部が行う処理にＮＲ／ＩＰ変換信号記憶部が必要であることを説明する図である。FIG. 9A is a diagram illustrating that an NR / IP conversion signal storage unit is necessary for processing performed by a conventional NR / IP conversion unit. 図９Ｂは、従来のＮＲ／ＩＰ変換部が行う処理にＮＲ／ＩＰ変換信号記憶部が必要であることを説明する図である。FIG. 9B is a diagram illustrating that an NR / IP conversion signal storage unit is necessary for processing performed by a conventional NR / IP conversion unit. 図１０Ａは、従来の走査線変換部がＮＲ／ＩＰ変換信号記憶部からリサイズ後フォーマットの復号信号を読み出す場合の課題を説明する図である。FIG. 10A is a diagram for explaining a problem when a conventional scanning line conversion unit reads out a resized decoded signal from the NR / IP conversion signal storage unit. 図１０Ｂは、従来の走査線変換部がＮＲ／ＩＰ変換信号記憶部からリサイズ後フォーマットの復号信号を読み出す場合の課題を説明する図である。FIG. 10B is a diagram for explaining a problem when the conventional scanning line conversion unit reads out the resized format decoded signal from the NR / IP conversion signal storage unit. 図１１Ａは、従来の走査線変換部が行うリサイズ処理にリサイズ信号記憶部が必要であることを説明する図である。FIG. 11A is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit. 図１１Ｂは、従来の走査線変換部が行うリサイズ処理にリサイズ信号記憶部が必要であることを説明する図である。FIG. 11B is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit. 図１１Ｃは、従来の走査線変換部が行うリサイズ処理にリサイズ信号記憶部が必要であることを説明する図である。FIG. 11C is a diagram illustrating that a resizing signal storage unit is necessary for resizing processing performed by a conventional scanning line conversion unit. 図１２は、実施の形態２に係る映像信号処理装置の機能構成を示すブロック図である。FIG. 12 is a block diagram illustrating a functional configuration of the video signal processing apparatus according to the second embodiment. 図１３は、実施の形態２に係る映像信号処理装置が行う映像信号の処理の一例を示すフローチャートである。FIG. 13 is a flowchart illustrating an example of video signal processing performed by the video signal processing apparatus according to the second embodiment. 図１４Ａは、実施の形態２に係る映像信号処理装置がフレームレート変換を行う際の効果を説明する図である。FIG. 14A is a diagram for explaining an effect when the video signal processing apparatus according to Embodiment 2 performs frame rate conversion. 図１４Ｂは、実施の形態２に係る映像信号処理装置がフレームレート変換を行う際の効果を説明する図である。FIG. 14B is a diagram for explaining an effect when the video signal processing apparatus according to Embodiment 2 performs frame rate conversion. 図１５は、実施の形態２に係る映像信号処理装置が奏する効果をまとめた図である。FIG. 15 is a table summarizing the effects produced by the video signal processing apparatus according to the second embodiment. 図１６は、本発明に係る映像信号処理装置を備えるデジタルビデオレコーダ及びデジタルテレビの一例を示す外観図である。FIG. 16 is an external view showing an example of a digital video recorder and a digital television provided with the video signal processing apparatus according to the present invention. 図１７は、従来の映像信号処理装置による映像信号の処理を説明する図である。FIG. 17 is a diagram for explaining video signal processing by a conventional video signal processing apparatus. 図１８は、従来の映像信号処理装置による映像信号の処理を説明する図である。FIG. 18 is a diagram for explaining video signal processing by a conventional video signal processing apparatus. 図１９Ａは、従来の映像信号処理装置が映像信号のノイズ低減を行う場合に、ＤＲＡＭの記憶領域が追加で必要になることを説明する図である。FIG. 19A is a diagram for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal. 図１９Ｂは、従来の映像信号処理装置が映像信号のノイズ低減を行う場合に、ＤＲＡＭの記憶領域が追加で必要になることを説明する図である。FIG. 19B is a diagram for explaining that a storage area of a DRAM is additionally required when a conventional video signal processing apparatus performs noise reduction of a video signal.
　以下、本発明に係る映像信号処理装置の実施の形態について、図面を参照しながら詳細に説明する。 Hereinafter, embodiments of a video signal processing device according to the present invention will be described in detail with reference to the drawings.
　（実施の形態１）
　まず、本発明の実施の形態１に係る映像信号処理装置を含む三次元画像表示システムの構成を説明する。 (Embodiment 1)
First, the configuration of a 3D image display system including the video signal processing apparatus according to Embodiment 1 of the present invention will be described.
　図１は、本発明の実施の形態１に係る三次元画像表示システム１０の機能構成を示すブロック図である。 FIG. 1 is a block diagram showing a functional configuration of a 3D image display system 10 according to Embodiment 1 of the present invention.
　同図に示すように、三次元画像表示システム１０は、デジタルビデオレコーダ２０及びデジタルテレビ３０を備えている。また、デジタルビデオレコーダ２０とデジタルテレビ３０とは、ＨＤＭＩ（Ｈｉｇｈ－Ｄｅｆｉｎｉｔｉｏｎ　Ｍｕｌｔｉｍｅｄｉａ　Ｉｎｔｅｒｆａｃｅ）ケーブルを介して接続されている。 As shown in the figure, the three-dimensional image display system 10 includes a digital video recorder 20 and a digital television 30. In addition, the digital video recorder 20 and the digital television 30 are connected via an HDMI (High-Definition Multimedia Interface) cable.
　デジタルビデオレコーダ２０は、ＢＤ（ブルーレイディスク）等の光ディスク４１に記録されている三次元の映像信号のフォーマットを変換し、変換した三次元の映像信号を、ＨＤＭＩケーブルを経由してデジタルテレビ３０へ出力する。 The digital video recorder 20 converts the format of a three-dimensional video signal recorded on an optical disc 41 such as a BD (Blu-ray disc), and converts the converted three-dimensional video signal to the digital television 30 via an HDMI cable. Output.
　デジタルテレビ３０は、デジタルビデオレコーダ２０により出力される三次元の映像信号、及び放送波４２に含まれる三次元の映像信号のフォーマットを変換したうえで表示する。例えば、放送波４２は、地上デジタルテレビ放送、及び衛星デジタルテレビ放送等である。 The digital television 30 converts the 3D video signal output from the digital video recorder 20 and the 3D video signal format included in the broadcast wave 42 and displays the converted signal. For example, the broadcast wave 42 is a terrestrial digital television broadcast, a satellite digital television broadcast, or the like.
　なお、デジタルビデオレコーダ２０は、光ディスク４１以外の記録媒体（例えば、ハードディスクドライブ及び不揮発性メモリ等）に記録されている三次元の映像信号のフォーマットを変換してもよい。また、デジタルビデオレコーダ２０は、放送波４２に含まれる三次元の映像信号、又はインターネット等の通信網を経由して取得した三次元の映像信号のフォーマットを変換してもよい。また、デジタルビデオレコーダ２０は、外部の装置により、外部入力端子（図示せず）等に入力された三次元の映像信号のフォーマットを変換してもよい。 Note that the digital video recorder 20 may convert the format of a three-dimensional video signal recorded on a recording medium other than the optical disc 41 (for example, a hard disk drive, a nonvolatile memory, or the like). The digital video recorder 20 may convert the format of the three-dimensional video signal included in the broadcast wave 42 or the three-dimensional video signal acquired via a communication network such as the Internet. The digital video recorder 20 may convert the format of a three-dimensional video signal input to an external input terminal (not shown) or the like by an external device.
　同様に、デジタルテレビ３０は、光ディスク４１及びその他の記録媒体に記録されている三次元の映像信号のフォーマットを変換してもよい。また、デジタルテレビ３０は、インターネット等の通信網を経由して取得した三次元の映像信号のフォーマットを変換してもよい。また、デジタルテレビ３０は、デジタルビデオレコーダ２０以外の外部の装置により、外部入力端子（図示せず）等に入力された三次元の映像信号のフォーマットを変換してもよい。 Similarly, the digital television 30 may convert the format of the three-dimensional video signal recorded on the optical disc 41 and other recording media. The digital television 30 may convert the format of a three-dimensional video signal acquired via a communication network such as the Internet. The digital television 30 may convert the format of a three-dimensional video signal input to an external input terminal (not shown) or the like by an external device other than the digital video recorder 20.
　また、デジタルテレビ３０とデジタルビデオレコーダ２０とは、ＨＤＭＩケーブル以外の規格のケーブルにより接続されていてもよいし、無線通信網により接続されていてもよい。 Also, the digital television 30 and the digital video recorder 20 may be connected by a standard cable other than the HDMI cable, or may be connected by a wireless communication network.
　デジタルビデオレコーダ２０は、入力部２１、映像信号処理装置１００Ｂ及びＨＤＭＩ通信部２２を備える。 The digital video recorder 20 includes an input unit 21, a video signal processing device 100B, and an HDMI communication unit 22.
　入力部２１は、光ディスク４１に記録されている符号化された三次元の映像信号を取得する。 The input unit 21 obtains an encoded three-dimensional video signal recorded on the optical disc 41.
　映像信号処理装置１００Ｂは、取得された三次元の映像信号の処理を行い、出力信号を生成する。例えば、映像信号処理装置１００Ｂは、取得された三次元の映像信号の復号を行い、復号した三次元の映像信号のフォーマットを変換することにより、出力信号を生成する。 The video signal processing device 100B processes the acquired three-dimensional video signal and generates an output signal. For example, the video signal processing apparatus 100B decodes the acquired three-dimensional video signal and converts the format of the decoded three-dimensional video signal to generate an output signal.
　ＨＤＭＩ通信部２２は、映像信号処理装置１００Ｂにより生成された出力信号を、ＨＤＭＩケーブルを経由してデジタルテレビ３０へ出力する。 The HDMI communication unit 22 outputs the output signal generated by the video signal processing device 100B to the digital television 30 via the HDMI cable.
　なお、デジタルビデオレコーダ２０は、生成した出力信号を、当該デジタルビデオレコーダ２０が備える記憶部（ハードディスクドライブ及び不揮発性メモリ等）に記憶してもよいし、当該デジタルビデオレコーダ２０に着脱可能な記録媒体（光ディスク等）に記録してもよい。 The digital video recorder 20 may store the generated output signal in a storage unit (such as a hard disk drive and a non-volatile memory) included in the digital video recorder 20 or a recording that is detachable from the digital video recorder 20. You may record on a medium (optical disk etc.).
　デジタルテレビ３０は、入力部３１、ＨＤＭＩ通信部３２、映像信号処理装置１００、出力信号制御部３３及び表示パネル３４を備えている。 The digital television 30 includes an input unit 31, an HDMI communication unit 32, a video signal processing device 100, an output signal control unit 33, and a display panel 34.
　入力部３１は、放送波４２に含まれる符号化された三次元の映像信号を取得する。 The input unit 31 acquires an encoded three-dimensional video signal included in the broadcast wave 42.
　ＨＤＭＩ通信部３２は、ＨＤＭＩ通信部２２により出力された出力信号を取得し、入力信号として出力する。 The HDMI communication unit 32 acquires the output signal output by the HDMI communication unit 22 and outputs it as an input signal.
　映像信号処理装置１００は、入力部３１から入力される信号又はＨＤＭＩ通信部３２から入力される信号を処理し、出力信号を生成する。この映像信号処理装置１００が行う処理の詳細については、後述する。 The video signal processing apparatus 100 processes a signal input from the input unit 31 or a signal input from the HDMI communication unit 32 to generate an output signal. Details of the processing performed by the video signal processing apparatus 100 will be described later.
　出力信号制御部３３は、映像信号処理装置１００が生成した出力信号を、表示パネル３４に表示させるよう、制御を行う。例えば、出力信号制御部３３は、三次元映像が表示パネル３４に表示されるように、出力信号を左眼用出力信号と右眼用出力信号とに変換し、表示パネル３４に出力する。 The output signal control unit 33 performs control so that the output signal generated by the video signal processing apparatus 100 is displayed on the display panel 34. For example, the output signal control unit 33 converts the output signal into an output signal for the left eye and an output signal for the right eye so that a 3D image is displayed on the display panel 34, and outputs the output signal to the display panel 34.
　表示パネル３４は、出力信号制御部３３が出力した左眼用出力信号と右眼用出力信号とを入力し、三次元映像を表示する。例えば、ユーザが、左眼用出力信号と右眼用出力信号との表示タイミングにあわせて、開閉を行うことができる左眼用シャッタと右眼用シャッタとを備えるシャッタメガネ（図示せず）を装着することにより、当該ユーザは、表示パネル３４に表示される三次元映像を見ることができる。 The display panel 34 receives the left-eye output signal and the right-eye output signal output from the output signal control unit 33, and displays a three-dimensional image. For example, shutter glasses (not shown) including a left-eye shutter and a right-eye shutter that can be opened and closed in accordance with the display timing of the left-eye output signal and the right-eye output signal. By wearing it, the user can view the 3D image displayed on the display panel 34.
　次に、映像信号処理装置１００が行う処理の詳細について説明する。ここで、以下では、映像信号処理装置１００による、入力部３１から入力される映像信号の処理を例に説明する。 Next, details of processing performed by the video signal processing apparatus 100 will be described. Here, in the following, processing of a video signal input from the input unit 31 by the video signal processing apparatus 100 will be described as an example.
　なお、デジタルビデオレコーダ２０が備える映像信号処理装置１００Ｂは、映像信号処理装置１００の機能の一部又は全部を有していることとする。つまり、ＨＤＭＩ通信部３２から入力される入力信号に対しては、映像信号処理装置１００Ｂが行わなかった処理を、映像信号処理装置１００が行う。 Note that the video signal processing device 100B included in the digital video recorder 20 has a part or all of the functions of the video signal processing device 100. That is, the video signal processing device 100 performs processing that the video signal processing device 100B did not perform on the input signal input from the HDMI communication unit 32.
　図２は、本実施の形態１に係る映像信号処理装置１００の機能構成を示すブロック図である。 FIG. 2 is a block diagram showing a functional configuration of the video signal processing apparatus 100 according to the first embodiment.
　映像信号処理装置１００は、入力される映像信号で示される画像とは異なるサイズの画像の出力信号を出力するように、映像信号を処理する装置である。同図に示すように、映像信号処理装置１００は、デコーダ１１０、デコードバッファ１１１、復号信号変更部１２０、ＯＳＤ合成部１３０、ＯＳＤ信号記憶部１３１、ＮＲ／ＩＰ変換部１４０、及びＮＲ／ＩＰ変換信号記憶部１４１を備えている。 The video signal processing device 100 is a device that processes a video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal. As shown in the figure, the video signal processing apparatus 100 includes a decoder 110, a decode buffer 111, a decoded signal change unit 120, an OSD synthesis unit 130, an OSD signal storage unit 131, an NR / IP conversion unit 140, and an NR / IP conversion. A signal storage unit 141 is provided.
　デコーダ１１０は、入力された、符号化された映像信号を復号し、復号信号を生成する。そして、デコーダ１１０は、生成した復号信号をデコードバッファ１１１に出力して、デコードバッファ１１１に当該復号信号を記憶させる。 The decoder 110 decodes the input encoded video signal and generates a decoded signal. Then, the decoder 110 outputs the generated decoded signal to the decode buffer 111 and causes the decode buffer 111 to store the decoded signal.
　デコードバッファ１１１は、デコーダ１１０に接続され、デコーダ１１０が生成した復号信号を記憶している。なお、デコードバッファ１１１は、デジタルテレビ３０が備えるＤＲＡＭ１８０の記憶領域である。 The decode buffer 111 is connected to the decoder 110 and stores the decoded signal generated by the decoder 110. The decode buffer 111 is a storage area of the DRAM 180 provided in the digital television 30.
　復号信号変更部１２０は、復号信号の１垂直同期期間内での映像有効期間が出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された復号信号を変更復号信号としてデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する。 The decoded signal changing unit 120 changes the decoded signal so that the video effective period within one vertical synchronization period of the decoded signal becomes the same value as the video effective period within one vertical synchronization period of the output signal. Are read from the decode buffer 111 and the read modified decoded signal is output.
　具体的には、復号信号変更部１２０は、復号信号の有効割合が出力信号の有効割合と同じ値になるように変更された復号信号を変更復号信号としてデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する。つまり、復号信号変更部１２０は、リサイズを行うために復号信号を変更する。なお、復号信号のリサイズとは、復号信号で示される画像のサイズを変更することである。 Specifically, the decoded signal changing unit 120 reads out the decoded signal, which has been changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, from the decoding buffer 111 as the changed decoded signal, and the read changed decoding Output a signal. That is, the decoded signal changing unit 120 changes the decoded signal in order to perform resizing. Note that the resize of the decoded signal means changing the size of the image indicated by the decoded signal.
　ここで、有効割合とは、１垂直同期期間内での映像有効期間の割合である。また、映像有効期間とは、表示パネル３４に表示される映像を示す映像信号の水平同期信号が含まれる期間である。つまり、映像有効期間内の水平同期信号で示される映像信号が、表示パネル３４に表示される。 Here, the effective ratio is the ratio of the video effective period within one vertical synchronization period. The video valid period is a period in which a horizontal synchronization signal of a video signal indicating a video displayed on the display panel 34 is included. That is, the video signal indicated by the horizontal synchronization signal within the video valid period is displayed on the display panel 34.
　また、出力信号とは、映像信号処理装置１００が出力すべきフォーマットを有する映像信号であり、具体的には、表示パネル３４に表示することができるフォーマットを有する映像信号である。なお、フォーマットとは、４８０ｉや１０８０ｐなど、走査方式（プログレッシブ及びインタレース）と画像サイズとで表現される映像信号の種別である。 Further, the output signal is a video signal having a format to be output by the video signal processing device 100, and specifically, a video signal having a format that can be displayed on the display panel 34. The format is a type of video signal expressed by a scanning method (progressive and interlaced) and an image size, such as 480i and 1080p.
　なお、ここでは、出力信号は、表示パネル３４へ出力される映像信号であるが、当該映像信号が表示パネル３４に出力される前にフレームバッファなどの記憶部に記憶される場合は、当該記憶部へ出力される映像信号であってもよい。 Here, the output signal is a video signal output to the display panel 34. However, when the video signal is stored in a storage unit such as a frame buffer before being output to the display panel 34, the storage signal is stored. It may be a video signal output to the unit.
　具体的には、復号信号変更部１２０は、変更復号信号の有効割合が出力信号の有効割合と同じ値になるように、復号信号の映像有効期間を変更して、変更した映像有効期間の復号信号を変更復号信号としてデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する。 Specifically, the decoded signal changing unit 120 changes the video effective period of the decoded signal so that the effective ratio of the changed decoded signal becomes the same value as the effective ratio of the output signal, and decodes the changed video effective period. The signal is read from the decode buffer 111 as a modified decoded signal, and the read modified decoded signal is output.
　さらに具体的には、復号信号変更部１２０は、１垂直同期期間内での垂直ライン数である垂直全ライン数に対する映像有効期間内での垂直ライン数である垂直有効ライン数の割合を有効割合とし、変更復号信号の有効割合が出力信号の有効割合と同じ値になるように、復号信号の垂直全ライン数を変更して、変更した垂直全ライン数の復号信号を変更復号信号としてデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する。 More specifically, the decoded signal changing unit 120 determines the ratio of the number of vertical effective lines, which is the number of vertical lines within the video effective period, to the total number of vertical lines, which is the number of vertical lines within one vertical synchronization period. The decoding buffer of the decoded signal having the changed total number of vertical lines is changed as a changed decoding signal by changing the total number of vertical lines of the decoded signal so that the effective ratio of the changed decoded signal becomes the same value as the effective ratio of the output signal. Read from 111 and output the read modified decoded signal.
　ここで、ＤＲＡＭ１８０には、デコードバッファ１１１の他にも種々の記憶領域が含まれているため、ＤＲＡＭ１８０には、復号信号変更部１２０以外にも多くの処理部がアクセスを行う。このため、復号信号変更部１２０がＤＲＡＭ１８０から変更復号信号を読み出す際に、読み出し時の揺らぎが発生し、読み出す変更復号信号の垂直ライン数に誤差が生じる。この誤差は、通常、－１ライン～＋１ラインであり、大きくても－２ライン～＋２ライン程度である。このため、復号信号変更部１２０が変更するライン数は、最大で－２ライン～＋２ライン程度の誤差が許容される。 Here, since the DRAM 180 includes various storage areas in addition to the decode buffer 111, many processing units other than the decoded signal changing unit 120 access the DRAM 180. For this reason, when the decoded signal changing unit 120 reads out the changed decoded signal from the DRAM 180, fluctuation occurs during reading, and an error occurs in the number of vertical lines of the changed decoded signal to be read out. This error is usually from -1 line to +1 line, and is at most about -2 line to +2 line. Therefore, the maximum number of lines changed by the decoded signal changing unit 120 is allowed to be about −2 lines to +2 lines.
　また、復号信号変更部１２０は、取得部１２１、算出部１２２及び読出部１２３を備えている。 The decoded signal changing unit 120 includes an obtaining unit 121, a calculating unit 122, and a reading unit 123.
　取得部１２１は、復号信号の垂直有効ライン数と、出力信号のフォーマットの種別を示す情報とを取得する。ここで、取得部１２１は、復号信号の垂直有効ライン数を、ユーザの入力操作によって取得してもよいし、入力される映像信号を判別することにより取得してもよい。また、取得部１２１は、出力信号のフォーマットの種別を示す情報を、ユーザの入力操作によって取得してもよいし、表示パネル３４に表示可能な映像信号のフォーマットを判別することにより取得してもよい。 The obtaining unit 121 obtains the number of effective vertical lines of the decoded signal and information indicating the format type of the output signal. Here, the acquisition unit 121 may acquire the number of vertical effective lines of the decoded signal by a user input operation, or may be acquired by determining an input video signal. Further, the acquisition unit 121 may acquire information indicating the format type of the output signal by a user input operation, or may acquire the information by determining the format of the video signal that can be displayed on the display panel 34. Good.
　算出部１２２は、取得部１２１が取得した復号信号の垂直有効ライン数と、出力信号のフォーマットの種別を示す情報で示されるフォーマットに対応した出力信号の垂直全ライン数及び垂直有効ライン数とを用いて、変更復号信号の垂直全ライン数を算出する。 The calculation unit 122 calculates the number of vertical effective lines of the decoded signal acquired by the acquisition unit 121 and the total number of vertical lines and the number of vertical effective lines of the output signal corresponding to the format indicated by the information indicating the format type of the output signal. To calculate the total number of vertical lines of the modified decoded signal.
　読出部１２３は、算出部１２２が算出した垂直全ライン数に変更した変更復号信号をデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する。 The reading unit 123 reads the modified decoded signal changed to the total number of vertical lines calculated by the calculating unit 122 from the decoding buffer 111, and outputs the read modified decoded signal.
　ＯＳＤ信号記憶部１３１は、ＯＳＤ信号を記憶している。なお、ＯＳＤ信号記憶部１３１は、デジタルテレビ３０が備えるＤＲＡＭ１８０の記憶領域である。 The OSD signal storage unit 131 stores an OSD signal. The OSD signal storage unit 131 is a storage area of the DRAM 180 included in the digital television 30.
　ＯＳＤ合成部１３０は、復号信号変更部１２０が出力した変更復号信号に、ＯＳＤ（Ｏｎ　Ｓｃｒｅｅｎ　Ｄｉｓｐｌａｙ）信号を合成する。具体的には、ＯＳＤ合成部１３０は、ＯＳＤ信号記憶部１３１に記憶されているＯＳＤ信号を、ＯＳＤ信号記憶部１３１から読み出し、当該ＯＳＤ信号を変更復号信号に合成する。 The OSD synthesis unit 130 synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit 120. Specifically, the OSD synthesis unit 130 reads out the OSD signal stored in the OSD signal storage unit 131 from the OSD signal storage unit 131, and synthesizes the OSD signal into the modified decoded signal.
　ＮＲ／ＩＰ変換信号記憶部１４１は、変更復号信号のノイズを低減するとともに変更復号信号をインタレース方式からプログレッシブ方式に変換するための、デジタルテレビ３０が備えるＤＲＡＭ１８０の記憶領域である。なお、ＮＲ／ＩＰ変換信号記憶部１４１は、請求の範囲に記載の「メモリ」に相当する。 The NR / IP conversion signal storage unit 141 is a storage area of the DRAM 180 included in the digital television 30 for reducing the noise of the modified decoded signal and converting the modified decoded signal from the interlace system to the progressive system. The NR / IP conversion signal storage unit 141 corresponds to a “memory” described in the claims.
　ＮＲ／ＩＰ変換部１４０は、ＯＳＤ合成部１３０がＯＳＤ信号を合成した変更復号信号をメモリに書き込み読み出すことで、時間的に前後する変更復号信号を用いて変更復号信号のノイズを低減するとともに、変更復号信号がインタレース方式の場合に変更復号信号をインタレース方式からプログレッシブ方式に変換する。具体的には、ＮＲ／ＩＰ変換部１４０は、当該変更復号信号をＮＲ／ＩＰ変換信号記憶部１４１に記憶させ、ＮＲ／ＩＰ変換信号記憶部１４１から、変更復号信号の現信号や１フレーム前の信号、２フレーム前の信号を読み出すことで、変更復号信号のノイズを低減し、ＩＰ変換を行う。 The NR / IP conversion unit 140 writes and reads the modified decoded signal obtained by synthesizing the OSD signal by the OSD synthesis unit 130 into the memory, thereby reducing the noise of the modified decoded signal by using the modified decoded signal that changes in time. When the modified decoded signal is an interlace system, the modified decoded signal is converted from the interlace system to the progressive system. Specifically, the NR / IP conversion unit 140 stores the changed decoded signal in the NR / IP converted signal storage unit 141, and the NR / IP converted signal storage unit 141 stores the current signal of the changed decoded signal or one frame before. The signal of 2 frames before is read out to reduce the noise of the modified decoded signal and perform IP conversion.
　例えば、変更復号信号がインタレース方式の場合は、ＮＲ／ＩＰ変換部１４０は、当該変更復号信号をＮＲ／ＩＰ変換信号記憶部１４１に記憶させ、ＮＲ／ＩＰ変換信号記憶部１４１から変更復号信号の２フレーム前の信号を読み出して、現信号との平均化を行う。入力される映像が静止画のように動きがない画像の場合は、この平均化を繰り返すことで、ランダムノイズが低減される。なお、変更復号信号がプログレッシブ方式の場合は、ＮＲ／ＩＰ変換部１４０は、ＮＲ／ＩＰ変換信号記憶部１４１から変更復号信号の１フレーム前の信号を読み出して、現信号との平均化を行う。 For example, when the modified decoded signal is an interlaced scheme, the NR / IP conversion unit 140 stores the modified decoded signal in the NR / IP converted signal storage unit 141 and the NR / IP converted signal storage unit 141 stores the modified decoded signal. The signal two frames before is read out and averaged with the current signal. If the input video is an image with no motion such as a still image, random noise is reduced by repeating this averaging. When the modified decoded signal is a progressive method, the NR / IP conversion unit 140 reads the signal one frame before the modified decoded signal from the NR / IP converted signal storage unit 141 and performs averaging with the current signal. .
　また、ＮＲ／ＩＰ変換部１４０は、変更復号信号がインタレース方式の場合は、変更復号信号のＴｏｐフレームとＢｏｔｔｏｍフレームの二枚のフレームから、一枚のフレームを生成することで、変更復号信号をインタレース方式からプログレッシブ方式に変換する。 In addition, when the modified decoded signal is an interlace scheme, the NR / IP conversion unit 140 generates one frame from the two frames of the top frame and the bottom frame of the modified decoded signal, thereby changing the modified decoded signal. Is converted from interlaced to progressive.
　そして、ＮＲ／ＩＰ変換部１４０は、ノイズが低減されＩＰ変換が行われた変更復号信号を、出力信号制御部３３に出力する。 Then, the NR / IP conversion unit 140 outputs the modified decoded signal that has undergone IP conversion with noise reduced to the output signal control unit 33.
　次に、映像信号処理装置１００が行う映像信号の処理の一例について、説明する。 Next, an example of video signal processing performed by the video signal processing apparatus 100 will be described.
　図３は、本実施の形態１に係る映像信号処理装置１００が行う映像信号の処理の一例を示すフローチャートである。 FIG. 3 is a flowchart showing an example of video signal processing performed by the video signal processing apparatus 100 according to the first embodiment.
　同図に示すように、まず、デコーダ１１０に、入力信号である符号化された映像信号が入力される（Ｓ１０２）。 As shown in the figure, first, an encoded video signal as an input signal is input to the decoder 110 (S102).
　そして、デコーダ１１０は、当該映像信号を復号し、復号信号を生成する（Ｓ１０４）。 Then, the decoder 110 decodes the video signal and generates a decoded signal (S104).
　そして、デコーダ１１０は、生成した復号信号をデコードバッファ１１１に出力して、デコードバッファ１１１に当該復号信号を記憶させる（Ｓ１０６）。 Then, the decoder 110 outputs the generated decoded signal to the decode buffer 111, and stores the decoded signal in the decode buffer 111 (S106).
　次に、復号信号変更部１２０は、復号信号の有効割合が出力信号の有効割合と同じ値になるように変更された復号信号を変更復号信号としてデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する（Ｓ１０８）。なお、この復号信号変更部１２０が変更復号信号を読み出して出力する処理の詳細については、後述する。 Next, the decoded signal changing unit 120 reads the decoded signal, which has been changed so that the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, from the decoding buffer 111 as the changed decoded signal, and the read changed decoded signal Output (S108). Details of the process in which the decoded signal changing unit 120 reads and outputs the changed decoded signal will be described later.
　そして、ＯＳＤ合成部１３０は、復号信号変更部１２０が出力した変更復号信号に、ＯＳＤ（Ｏｎ　Ｓｃｒｅｅｎ　Ｄｉｓｐｌａｙ）信号を合成する（Ｓ１１０）。具体的には、ＯＳＤ合成部１３０は、ＯＳＤ信号記憶部１３１からＯＳＤ信号を読み出し、当該ＯＳＤ信号を変更復号信号に合成する。 Then, the OSD synthesis unit 130 synthesizes an OSD (On Screen Display) signal with the modified decoded signal output from the decoded signal modification unit 120 (S110). Specifically, the OSD synthesis unit 130 reads out the OSD signal from the OSD signal storage unit 131 and synthesizes the OSD signal with the modified decoded signal.
　そして、ＮＲ／ＩＰ変換部１４０は、ＯＳＤ合成部１３０がＯＳＤ信号を合成した変更復号信号のノイズを低減するとともに、当該変更復号信号を、インタレース方式からプログレッシブ方式に変換する（Ｓ１１２）。 Then, the NR / IP conversion unit 140 reduces noise of the modified decoded signal obtained by synthesizing the OSD signal by the OSD synthesis unit 130, and converts the modified decoded signal from the interlace method to the progressive method (S112).
　そして、ＮＲ／ＩＰ変換部１４０は、ノイズ低減及びＩＰ変換が行われた変更復号信号である出力信号を、出力信号制御部３３に出力する（Ｓ１１４）。 Then, the NR / IP conversion unit 140 outputs an output signal, which is a modified decoded signal subjected to noise reduction and IP conversion, to the output signal control unit 33 (S114).
　以上のように、映像信号処理装置１００が行う映像信号の処理は終了する。 As described above, the video signal processing performed by the video signal processing apparatus 100 ends.
　次に、復号信号変更部１２０が変更復号信号を読み出して出力する処理（図３のＳ１０８）の詳細について、説明する。 Next, details of the process (S108 in FIG. 3) in which the decoded signal changing unit 120 reads and outputs the changed decoded signal will be described.
　図４は、本実施の形態１に係る復号信号変更部１２０が変更復号信号を読み出して出力する処理の一例を示すフローチャートである。 FIG. 4 is a flowchart showing an example of processing in which the decoded signal changing unit 120 according to Embodiment 1 reads out and outputs the changed decoded signal.
　同図に示すように、まず、取得部１２１は、復号信号の垂直有効ライン数、及び出力信号のフォーマットの種別を示す情報である入力データを取得する（Ｓ２０２）。ここで、取得部１２１は、当該入力データをユーザの入力操作によって取得してもよいし、入力される映像信号及び表示パネル３４に表示可能な映像信号のフォーマットを判別することにより取得してもよい。 As shown in the figure, first, the acquisition unit 121 acquires input data that is information indicating the number of vertical effective lines of a decoded signal and the format type of an output signal (S202). Here, the acquisition unit 121 may acquire the input data by a user input operation, or may acquire the input data by determining the format of the input video signal and the video signal that can be displayed on the display panel 34. Good.
　そして、算出部１２２は、取得部１２１が取得した入力データを用いて、変更復号信号の垂直全ライン数を算出する（Ｓ２０４）。具体的には、算出部１２２は、復号信号の垂直有効ライン数と、出力信号の垂直全ライン数及び垂直有効ライン数とを用いて、変更復号信号の垂直全ライン数を算出する。 Then, the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the input data acquired by the acquisition unit 121 (S204). Specifically, the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the number of vertical effective lines of the decoded signal, the total number of vertical lines and the number of vertical effective lines of the output signal.
　以下に、この算出部１２２が変更復号信号の垂直全ライン数を算出する処理の詳細について、説明する。 Hereinafter, details of a process in which the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal will be described.
　図５、図６Ａ及び図６Ｂは、本実施の形態１に係る復号信号の垂直ライン数と出力信号の垂直ライン数とを説明する図である。 5, 6A and 6B are diagrams for explaining the number of vertical lines of the decoded signal and the number of vertical lines of the output signal according to the first embodiment.
　具体的には、図５の（ａ）は、映像信号処理装置１００に入力される映像を示す図であり、図５の（ｂ）は、表示パネル３４に表示される映像を示す図である。また、図６Ａは、映像信号処理装置１００に入力される映像信号を示す図であり、図６Ｂは、表示パネル３４に表示される映像信号を示す図である。 Specifically, FIG. 5A is a diagram illustrating a video input to the video signal processing apparatus 100, and FIG. 5B is a diagram illustrating a video displayed on the display panel 34. . 6A is a diagram showing a video signal input to the video signal processing device 100, and FIG. 6B is a diagram showing a video signal displayed on the display panel.
　図５の（ａ）に示すように、映像信号処理装置１００に入力される映像信号は、アスペクト比が４：３であり、垂直ライン数が４８０ラインの４８０ｐ標準フォーマットの映像信号である。つまり、復号信号のアスペクト比は４：３であり、垂直ライン数は４８０ラインである。なお、映像信号処理装置１００に入力される映像信号のフォーマットは、４８０ｐ標準フォーマットに限定されず、どのようなフォーマットであってもよい。 As shown in FIG. 5A, the video signal input to the video signal processing apparatus 100 is a video signal in the 480p standard format having an aspect ratio of 4: 3 and a vertical line number of 480 lines. That is, the aspect ratio of the decoded signal is 4: 3, and the number of vertical lines is 480 lines. The format of the video signal input to the video signal processing apparatus 100 is not limited to the 480p standard format, and any format may be used.
　また、図５の（ｂ）に示すように、表示パネル３４に表示される映像信号は、アスペクト比が１６：９であり、垂直ライン数が１０８０ラインの１０８０ｐ非標準フォーマットの映像信号である。つまり、出力信号のアスペクト比は１６：９であり、垂直ライン数は１０８０ラインである。なお、表示パネル３４に表示される映像信号のフォーマットは、１０８０ｐ非標準フォーマットに限定されず、どのようなフォーマットであってもよく、例えば標準フォーマットであってもよい。 As shown in FIG. 5B, the video signal displayed on the display panel 34 is a 1080p non-standard format video signal having an aspect ratio of 16: 9 and a number of vertical lines of 1080 lines. That is, the aspect ratio of the output signal is 16: 9, and the number of vertical lines is 1080 lines. The format of the video signal displayed on the display panel 34 is not limited to the 1080p non-standard format, and may be any format, for example, a standard format.
　また、図６Ａに示すように、映像信号処理装置１００に入力される映像信号は、１垂直同期期間内での垂直ライン数である垂直全ライン数が５２５ラインの映像信号である。つまり、復号信号の垂直全ライン数は５２５ラインである。 Also, as shown in FIG. 6A, the video signal input to the video signal processing apparatus 100 is a video signal having a total number of vertical lines of 525 lines, which is the number of vertical lines within one vertical synchronization period. That is, the total number of vertical lines of the decoded signal is 525 lines.
　また、復号信号の１垂直同期期間内での映像期間に占める垂直ライン数は４８０ラインである。しかし、復号信号のアスペクト比４：３を、出力信号のアスペクト比１６：９に合わせるために、復号信号の垂直ライン数を４８０ラインから３６０ラインに変更しなければならない。 Also, the number of vertical lines in the video period within one vertical synchronization period of the decoded signal is 480 lines. However, in order to make the aspect ratio 4: 3 of the decoded signal match the aspect ratio 16: 9 of the output signal, the number of vertical lines of the decoded signal must be changed from 480 lines to 360 lines.
　このため、復号信号の１垂直同期期間内での映像有効期間は、３６０ライン分の期間である。つまり、復号信号の映像有効期間内での垂直ライン数である垂直有効ライン数は、３６０ラインである。 Therefore, the video valid period within one vertical synchronization period of the decoded signal is a period of 360 lines. That is, the number of vertical effective lines, which is the number of vertical lines within the video effective period of the decoded signal, is 360 lines.
　また、図６Ｂに示すように、表示パネル３４に表示される映像信号は、垂直全ライン数が１１００ラインであり、垂直有効ライン数が１０８０ラインの映像信号である。つまり、出力信号の垂直全ライン数は１１００ラインであり、垂直有効ライン数は１０８０ラインである。 Also, as shown in FIG. 6B, the video signal displayed on the display panel 34 is a video signal having a total number of vertical lines of 1100 lines and a vertical effective line number of 1080 lines. That is, the total number of vertical lines of the output signal is 1100 lines, and the number of vertical effective lines is 1080 lines.
　このため、算出部１２２は、出力信号の１垂直同期期間内での映像有効期間の割合である有効割合を、垂直全ライン数に対する垂直有効ライン数の割合である９８．１％と算出する。 Therefore, the calculation unit 122 calculates the effective ratio that is the ratio of the video effective period within one vertical synchronization period of the output signal as 98.1% that is the ratio of the number of vertical effective lines to the total number of vertical lines.
　そして、算出部１２２は、変更復号信号の有効割合が出力信号の有効割合と同じ値になるように、変更復号信号の垂直全ライン数を算出する。具体的には、出力信号の有効割合が９８．１％であり、復号信号の垂直有効ライン数が３６０ラインであるので、算出部１２２は、変更復号信号の垂直全ライン数が３６６．６７ラインであると算出する。 Then, the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal. Specifically, since the effective ratio of the output signal is 98.1% and the number of vertical effective lines of the decoded signal is 360 lines, the calculation unit 122 determines that the total number of vertical lines of the modified decoded signal is 366.67 lines. It is calculated that
　ここでは、算出部１２２は、垂直有効ライン数が端数になる場合は、小数点以下を切り上げて垂直有効ライン数を算出し、垂直全ライン数が端数になる場合は、小数点以下も含めて垂直全ライン数を算出する。なお、算出部１２２による端数の取り扱いは上記の方法に限定されず、切捨てや四捨五入など、どのような方法で算出してもよい。 Here, the calculation unit 122 calculates the number of vertical effective lines by rounding up the fractional part when the number of vertical effective lines is a fraction, and when the number of vertical total lines is a fraction, Calculate the number of lines. The handling of fractions by the calculation unit 122 is not limited to the above method, and any method such as truncation or rounding off may be used.
　図４に戻り、読出部１２３は、算出部１２２が算出した垂直全ライン数に変更した変更復号信号をデコードバッファ１１１から読み出し、読み出した変更復号信号を出力する（Ｓ２０６）。この読出部１２３が変更復号信号をデコードバッファ１１１から読み出す処理の詳細については、後述する。 Referring back to FIG. 4, the reading unit 123 reads the modified decoded signal changed to the total number of vertical lines calculated by the calculating unit 122 from the decoding buffer 111, and outputs the read modified decoded signal (S206). Details of the process in which the reading unit 123 reads the modified decoded signal from the decoding buffer 111 will be described later.
　以上のように、復号信号変更部１２０が変更復号信号を読み出して出力する処理（図３のＳ１０８）は、終了する。 As described above, the process in which the decoded signal changing unit 120 reads and outputs the changed decoded signal (S108 in FIG. 3) ends.
　次に、読出部１２３が変更復号信号をデコードバッファ１１１から読み出す処理の詳細について、説明する。 Next, details of the process in which the reading unit 123 reads the modified decoded signal from the decode buffer 111 will be described.
　まず、図１７に示された従来の映像信号処理装置３００の走査線変換部３５０が復号信号のリサイズを行う処理を説明する。 First, a process in which the scanning line conversion unit 350 of the conventional video signal processing apparatus 300 shown in FIG. 17 resizes the decoded signal will be described.
　図７Ａ及び図７Ｂは、従来の走査線変換部３５０が復号信号のリサイズを行う処理を説明する図である。具体的には、図７Ａは、走査線変換部３５０が復号信号をリサイズ信号記憶部３５１に書き込む処理を説明する図であり、図７Ｂは、走査線変換部３５０が復号信号をリサイズ信号記憶部３５１から読み出す処理を説明する図である。 7A and 7B are diagrams for explaining processing in which the conventional scanning line conversion unit 350 resizes the decoded signal. Specifically, FIG. 7A is a diagram illustrating a process in which the scanning line conversion unit 350 writes the decoded signal to the resize signal storage unit 351, and FIG. 7B is a diagram in which the scanning line conversion unit 350 outputs the decoded signal to the resize signal storage unit. FIG. 6 is a diagram for describing processing to read from 351.
　図７Ａの（ａ）に示すように、走査線変換部３５０には、図６Ａに示された復号信号と同様の、１垂直同期期間内での垂直全ライン数が５２５ラインであり、映像期間内での垂直ライン数が４８０ラインである復号信号が入力される。 As shown in (a) of FIG. 7A, the scanning line conversion unit 350 has the same number of vertical lines within one vertical synchronization period as the decoded signal shown in FIG. A decoded signal having 480 vertical lines is input.
　ここで、上述したように、当該復号信号の垂直有効ライン数は３６０ラインであるので、図７Ａの（ｂ）に示すように、走査線変換部３５０は、垂直有効ライン数が３６０ライン分の映像有効期間の復号信号を、リサイズ信号記憶部３５１に書き込む。つまり、当該復号信号の有効割合が６８．６％の状態で、復号信号をリサイズ信号記憶部３５１に書き込む。 Here, as described above, since the number of vertical effective lines of the decoded signal is 360 lines, as shown in FIG. 7A (b), the scanning line conversion unit 350 has the number of vertical effective lines of 360 lines. The decoded signal of the video valid period is written in the resize signal storage unit 351. That is, the decoded signal is written into the resized signal storage unit 351 in a state where the effective ratio of the decoded signal is 68.6%.
　次に、図７Ｂの（ａ）に示すように、走査線変換部３５０は、図６Ｂに示された出力信号のフォーマットに合うように、復号信号をリサイズ信号記憶部３５１から読み出す。具体的には、走査線変換部３５０は、垂直有効ライン数が３６０ライン分の映像有効期間の復号信号を、有効割合が９８．１％になるように、リサイズ信号記憶部３５１から読み出す。 Next, as illustrated in (a) of FIG. 7B, the scanning line conversion unit 350 reads the decoded signal from the resize signal storage unit 351 so as to conform to the format of the output signal illustrated in FIG. 6B. Specifically, the scanning line conversion unit 350 reads out from the resize signal storage unit 351 the decoded signal of the video effective period corresponding to 360 effective vertical lines so that the effective ratio is 98.1%.
　これにより、復号信号の有効割合が出力信号の有効割合と同じ値になるので、走査線変換部３５０は、図７Ｂの（ｂ）に示すように、出力信号のフォーマットに合った復号信号を出力することができる。 Accordingly, since the effective ratio of the decoded signal becomes the same value as the effective ratio of the output signal, the scanning line conversion unit 350 outputs a decoded signal that matches the format of the output signal, as shown in FIG. 7B (b). can do.
　次に、本実施の形態１の読出部１２３が変更復号信号をデコードバッファ１１１から読み出す処理について説明する。 Next, a process in which the reading unit 123 according to the first embodiment reads the modified decoded signal from the decode buffer 111 will be described.
　図８は、本実施の形態１に係る読出部１２３が変更復号信号をデコードバッファ１１１から読み出す処理を説明する図である。 FIG. 8 is a diagram illustrating a process in which the reading unit 123 according to the first embodiment reads the modified decoded signal from the decode buffer 111.
　具体的には、同図は、デコードバッファ１１１から読み出される変更復号信号を示している。ここで、デコードバッファ１１１に記憶されている復号信号は、図６Ａに示された復号信号である。 Specifically, this figure shows a modified decoded signal read from the decode buffer 111. Here, the decoded signal stored in the decode buffer 111 is the decoded signal shown in FIG. 6A.
　つまり、読出部１２３は、変更復号信号の有効割合が出力信号の有効割合と同じ値になるように、復号信号の映像有効期間を変更して、変更した映像有効期間の復号信号を変更復号信号としてデコードバッファ１１１から読み出す。 That is, the reading unit 123 changes the video effective period of the decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal, and changes the decoded signal of the changed video effective period to the changed decoded signal. Is read from the decode buffer 111.
　具体的には、読出部１２３は、垂直全ライン数に対する垂直有効ライン数の割合を有効割合とし、変更復号信号の有効割合が出力信号の有効割合と同じ値になるように、復号信号の垂直全ライン数を変更して、変更した垂直全ライン数の復号信号を変更復号信号としてデコードバッファ１１１から読み出す。 Specifically, the reading unit 123 sets the ratio of the number of effective vertical lines to the total number of vertical lines as an effective ratio, and the vertical direction of the decoded signal so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal. The total number of lines is changed, and the decoded signal of the changed total number of vertical lines is read from the decode buffer 111 as a changed decoded signal.
　さらに具体的には、同図の（ａ）に示すように、読出部１２３は、変更復号信号の有効割合が９８．１％になるように、復号信号の垂直全ライン数を、算出部１２２が算出した３６６．６７ラインに変更して、変更復号信号をデコードバッファ１１１から読み出す。 More specifically, as shown in (a) of the figure, the reading unit 123 calculates the total number of vertical lines of the decoded signal so that the effective rate of the modified decoded signal is 98.1%. The calculated decoded signal is read from the decode buffer 111.
　これにより、変更復号信号の有効割合が出力信号の有効割合と同じ値になるので、読出部１２３は、同図の（ｂ）に示すように、出力信号のフォーマットに合った変更復号信号を出力することができる。 As a result, the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal, so that the reading unit 123 outputs the modified decoded signal that matches the format of the output signal as shown in FIG. can do.
　以上のように、復号信号の有効割合が出力信号の有効割合と同じ値になるように変更された変更復号信号を、デコードバッファ１１１から読み出し、変更復号信号を出力する。具体的には、復号信号の垂直全ライン数を変更して、変更した垂直全ライン数の復号信号を変更復号信号としてデコードバッファ１１１から読み出し、出力する。 As described above, the modified decoded signal changed so that the effective rate of the decoded signal becomes the same value as the effective rate of the output signal is read from the decode buffer 111, and the changed decoded signal is output. Specifically, the total number of vertical lines of the decoded signal is changed, and the decoded signal having the changed total number of vertical lines is read from the decode buffer 111 as a changed decoded signal and output.
　これにより、デコードバッファ１１１から復号信号を読み出す際に、リサイズを行うために変更された復号信号をデコードバッファ１１１から直接読み出すことで、復号信号の垂直スケーリングのリサイズを行うことができる。つまり、図１７に示されたようなリサイズ信号記憶部３５１がなくても、復号信号の垂直スケーリングのリサイズを行うことができる。このため、ＤＲＡＭ３８０からリサイズ信号記憶部３５１のメモリ容量を削除することができ、リサイズ信号記憶部３５１と処理部との間のデータ転送量を削減することができる。 Thus, when the decoded signal is read from the decode buffer 111, the decoded signal that has been changed for resizing is directly read from the decode buffer 111, so that the vertical scaling of the decoded signal can be performed. In other words, the vertical scaling of the decoded signal can be performed without the resized signal storage unit 351 as shown in FIG. Therefore, the memory capacity of the resize signal storage unit 351 can be deleted from the DRAM 380, and the amount of data transferred between the resize signal storage unit 351 and the processing unit can be reduced.
　また、メモリの記憶領域であるＮＲ／ＩＰ変換信号記憶部１４１を共用して、ノイズ低減とＩＰ変換とを行うことができるため、ノイズ低減を行う場合でもＤＲＡＭの記憶領域を追加で必要としない。 In addition, since noise reduction and IP conversion can be performed by sharing the NR / IP conversion signal storage unit 141 which is a memory storage area, no additional DRAM storage area is required even when noise reduction is performed. .
　また、復号信号の垂直有効ライン数を取得して、変更復号信号の垂直全ライン数を算出することで、算出された垂直全ライン数に変更した変更復号信号をデコードバッファ１１１から読み出し、出力する。このため、例えば、ユーザが設定した任意の垂直有効ライン数を取得することで、当該垂直有効ライン数に応じた変更復号信号をデコードバッファ１１１から読み出すことができる。 In addition, by obtaining the number of vertical effective lines of the decoded signal and calculating the total number of vertical lines of the modified decoded signal, the modified decoded signal changed to the calculated total number of vertical lines is read from the decode buffer 111 and output. . For this reason, for example, by acquiring an arbitrary number of vertical effective lines set by the user, a modified decoded signal corresponding to the number of vertical effective lines can be read from the decode buffer 111.
　また、出力信号のフォーマットの種別を示す情報を取得して、変更復号信号の垂直全ライン数を算出することで、算出された垂直全ライン数に変更した変更復号信号をデコードバッファ１１１から読み出し、出力する。このため、例えば、ユーザが設定した任意の出力信号のフォーマットの種別を示す情報を取得することで、当該フォーマットに応じた変更復号信号をデコードバッファ１１１から読み出すことができる。 Further, by acquiring information indicating the format type of the output signal and calculating the total number of vertical lines of the modified decoded signal, the modified decoded signal changed to the calculated total number of vertical lines is read from the decode buffer 111, Output. For this reason, for example, by acquiring information indicating the format type of an arbitrary output signal set by the user, a modified decoded signal corresponding to the format can be read from the decode buffer 111.
　また、復号信号が変更された後に、ＯＳＤ信号が合成され、ＩＰ変換が行われる。このため、図１７に示されたようなリサイズ信号記憶部３５１がなくても、復号信号の垂直スケーリングのリサイズを行うために変更され、ＯＳＤ合成、及びＩＰ変換が行われた復号信号を生成することができる。 Also, after the decoded signal is changed, the OSD signal is synthesized and IP conversion is performed. For this reason, even if there is no resize signal storage unit 351 as shown in FIG. 17, a decoded signal that has been changed to perform vertical scaling resizing of the decoded signal and subjected to OSD synthesis and IP conversion is generated. be able to.
　このように、本発明に係る映像信号処理装置１００を、三次元画像用の映像信号処理装置として使用することができ、三次元画像用の映像信号処理装置において、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 As described above, the video signal processing apparatus 100 according to the present invention can be used as a video signal processing apparatus for 3D images. In the video signal processing apparatus for 3D images, the memory capacity and the processing amount of the DRAM are reduced. Can be reduced.
　なお、本発明に係る映像信号処理装置１００は、三次元画像用の映像信号処理装置として使用されることに限定されず、二次元画像用の映像信号処理装置のＤＲＡＭのメモリ容量及び処理量を低減することができる映像信号処理装置として使用されてもよい。 Note that the video signal processing apparatus 100 according to the present invention is not limited to being used as a video signal processing apparatus for 3D images, and the memory capacity and processing amount of the DRAM of the video signal processing apparatus for 2D images are reduced. It may be used as a video signal processing device that can be reduced.
　次に、本発明の実施の形態１に係る映像信号処理装置１００が奏する効果について、さらに説明する。 Next, effects obtained by the video signal processing apparatus 100 according to Embodiment 1 of the present invention will be further described.
　図９Ａ及び図９Ｂは、従来のＮＲ／ＩＰ変換部３４０が行う処理にＮＲ／ＩＰ変換信号記憶部３４１が必要であることを説明する図である。 9A and 9B are diagrams illustrating that the NR / IP conversion signal storage unit 341 is necessary for the processing performed by the conventional NR / IP conversion unit 340. FIG.
　具体的には、図９Ａは、復号信号がインタレース方式の場合のＮＲ／ＩＰ変換信号記憶部３４１が必要であることを説明する図であり、図９Ａは、復号信号がプログレッシブ方式のＮＲ／ＩＰ変換信号記憶部３４１が必要であることを説明する図である。 Specifically, FIG. 9A is a diagram for explaining the necessity of the NR / IP conversion signal storage unit 341 when the decoded signal is an interlaced method, and FIG. 9A is a diagram illustrating that the decoded signal is a progressive NR / IP signal. It is a figure explaining the IP conversion signal memory | storage part 341 being required.
　これらの図に示すように、ＮＲ／ＩＰ変換部３４０がＩＰ変換及びノイズ低減（同図に示す「ＮＲ」）の処理を行う際に、ＮＲ／ＩＰ変換信号記憶部３４１に、１フィールド及び２フィールド前の信号、又は１フレーム前の信号を記憶しておく必要がある。このため、ＮＲ／ＩＰ変換部３４０がＩＰ変換及びノイズ低減の処理を行うために、ＤＲＡＭ３８０の記憶領域としてのＮＲ／ＩＰ変換信号記憶部３４１が必要である。 As shown in these figures, when the NR / IP conversion unit 340 performs IP conversion and noise reduction (“NR” shown in the figure), the NR / IP conversion signal storage unit 341 stores 1 field and 2 It is necessary to store the signal before the field or the signal one frame before. Therefore, in order for the NR / IP conversion unit 340 to perform the IP conversion and noise reduction processing, the NR / IP conversion signal storage unit 341 as a storage area of the DRAM 380 is necessary.
　このように、ＮＲ／ＩＰ変換信号記憶部３４１を削除してＤＲＡＭ３８０のメモリ容量を低減することは、できない。 Thus, it is impossible to reduce the memory capacity of the DRAM 380 by deleting the NR / IP conversion signal storage unit 341.
　これに対し、本発明に係る映像信号処理装置１００によれば、リサイズ信号記憶部３５１のメモリ容量を削除して、ＤＲＡＭ３８０のメモリ容量を低減することができる。 On the other hand, according to the video signal processing apparatus 100 according to the present invention, the memory capacity of the DRAM 380 can be reduced by deleting the memory capacity of the resize signal storage unit 351.
　図１０Ａ及び図１０Ｂは、従来の走査線変換部３５０がＮＲ／ＩＰ変換信号記憶部３４１からリサイズ後フォーマットの復号信号を読み出す場合の課題を説明する図である。 10A and 10B are diagrams for explaining a problem when the conventional scanning line conversion unit 350 reads out a resized format decoded signal from the NR / IP conversion signal storage unit 341. FIG.
　具体的には、図１０Ａは、復号信号がインタレース方式の場合の、従来の走査線変換部３５０がＮＲ／ＩＰ変換信号記憶部３４１から復号信号を読み出す処理を説明する図である。また、図１０Ｂは、復号信号がインタレース方式の場合の、走査線変換部３５０がＮＲ／ＩＰ変換信号記憶部３４１からリサイズ後フォーマットの復号信号を読み出す場合の課題を説明する図である。 Specifically, FIG. 10A is a diagram illustrating a process in which the conventional scanning line conversion unit 350 reads out a decoded signal from the NR / IP converted signal storage unit 341 when the decoded signal is an interlace method. FIG. 10B is a diagram for explaining a problem when the scanning line conversion unit 350 reads out a resized decoded signal from the NR / IP converted signal storage unit 341 when the decoded signal is an interlaced method.
　なお、リサイズ後フォーマットの復号信号とは、リサイズを行うために、有効割合が出力信号の有効割合と同じ値になるように変更された復号信号をいう。また、走査線変換部３５０は、ＮＲ／ＩＰ変換信号記憶部３４１からリサイズ後フォーマットの復号信号を読み出す際に、ノイズ低減及びＩＰ変換も合わせて行う。つまり、この場合は、走査線変換部３５０は、ＮＲ／ＩＰ変換部３４０の機能も有することとする。 Note that the decoded signal in the post-resize format is a decoded signal that has been changed so that the effective ratio becomes the same value as the effective ratio of the output signal in order to perform resizing. The scanning line conversion unit 350 also performs noise reduction and IP conversion when reading the resized format decoded signal from the NR / IP conversion signal storage unit 341. That is, in this case, the scanning line conversion unit 350 also has the function of the NR / IP conversion unit 340.
　図１０Ａに示すように、走査線変換部３５０は、ＮＲ／ＩＰ変換信号記憶部３４１に復号信号を記憶させ、ＮＲ／ＩＰ変換信号記憶部３４１から、復号信号の１フィールド前の信号（同図に示す１Ｆ前信号）と２フィールド前の信号（同図に示す２Ｆ前信号）とを読み出す。 As shown in FIG. 10A, the scanning line conversion unit 350 stores the decoded signal in the NR / IP conversion signal storage unit 341, and the NR / IP conversion signal storage unit 341 stores a signal (one figure before the decoded signal). 1F before signal) and 2 fields before signal (2F before signal shown in FIG. 2) are read out.
　また、図１０Ｂに示すように、走査線変換部３５０がＮＲ／ＩＰ変換信号記憶部３４１からリサイズ後フォーマットの復号信号を読み出す場合は、走査線変換部３５０は、まずＮＲ／ＩＰ変換信号記憶部３４１に復号信号を記憶させる。そして、走査線変換部３５０は、ＩＰ変換を行うために、ＮＲ／ＩＰ変換信号記憶部３４１から、リサイズ後フォーマットの復号信号の１フィールド前の信号と２フィールド前の信号と現信号とを読み出す。また、走査線変換部３５０は、ノイズ低減（ＮＲ）を行うために、ＮＲ／ＩＰ変換信号記憶部３４１から、復号信号の２フィールド前の信号を読み出す。 Also, as shown in FIG. 10B, when the scanning line conversion unit 350 reads out the resized format decoded signal from the NR / IP conversion signal storage unit 341, the scanning line conversion unit 350 first starts the NR / IP conversion signal storage unit. The decoded signal is stored in 341. Then, the scanning line conversion unit 350 reads, from the NR / IP conversion signal storage unit 341, the signal before 1 field, the signal before 2 fields, and the current signal of the decoded signal in the resized format in order to perform IP conversion. . Further, the scanning line conversion unit 350 reads a signal two fields before the decoded signal from the NR / IP conversion signal storage unit 341 in order to perform noise reduction (NR).
　このように、走査線変換部３５０がＮＲ／ＩＰ変換信号記憶部３４１からリサイズ後フォーマットの復号信号を読み出す場合は、走査線変換部３５０は、多くの信号を読み出さなければならず、ＮＲ／ＩＰ変換信号記憶部３４１からのデータ転送量が増加する。 As described above, when the scanning line conversion unit 350 reads out the decoded signal of the resized format from the NR / IP conversion signal storage unit 341, the scanning line conversion unit 350 must read out many signals, and the NR / IP The amount of data transferred from the conversion signal storage unit 341 increases.
　これに対し、本発明に係る映像信号処理装置１００によれば、ＮＲ／ＩＰ変換信号記憶部３４１からのデータ転送量が増加することもなく、リサイズ信号記憶部３５１のメモリ容量を削除して、ＤＲＡＭ３８０のメモリ転送量を低減することができる。 In contrast, the video signal processing apparatus 100 according to the present invention deletes the memory capacity of the resize signal storage unit 351 without increasing the data transfer amount from the NR / IP conversion signal storage unit 341, The memory transfer amount of the DRAM 380 can be reduced.
　図１１Ａ、図１１Ｂ及び図１１Ｃは、従来の走査線変換部３５０が行うリサイズ処理にリサイズ信号記憶部３５１が必要であることを説明する図である。 11A, 11B, and 11C are diagrams illustrating that the resize signal storage unit 351 is necessary for the resize processing performed by the conventional scanning line conversion unit 350. FIG.
　具体的には、図１１Ａは、垂直周波数を変換してリサイズ処理を行う図であり、図１１Ｂ及び図１１Ｃは、垂直周波数は変換せずに映像サイズを変換してリサイズ処理を行う図である。 Specifically, FIG. 11A is a diagram for performing resizing processing by converting the vertical frequency, and FIGS. 11B and 11C are diagrams for performing resizing processing by converting the video size without converting the vertical frequency. .
　図１１Ａに示すように、入力される映像信号に対して１垂直同期期間が変更され、変更された出力信号が出力される。例えば、６０Ｈｚの映像信号が入力され、１２０Ｈｚの出力信号に変換され出力される。つまり、入力される映像信号が２つの出力信号に分割され、出力される。 As shown in FIG. 11A, one vertical synchronization period is changed for the input video signal, and the changed output signal is output. For example, a 60 Hz video signal is input, converted into a 120 Hz output signal, and output. That is, the input video signal is divided into two output signals and output.
　具体的には、走査線変換部３５０は、入力される１垂直同期期間内の映像信号をリサイズ信号記憶部３５１に記憶させ、リサイズ信号記憶部３５１から２つの出力信号を読み出し、出力する。 Specifically, the scanning line conversion unit 350 stores the input video signal within one vertical synchronization period in the resize signal storage unit 351, reads out two output signals from the resize signal storage unit 351, and outputs them.
　このため、１垂直同期期間単位で映像信号をリサイズ信号記憶部３５１に記憶しておく必要があるため、リサイズ信号記憶部３５１を削除してＤＲＡＭ３８０のメモリ容量を低減することは、できない。 For this reason, since it is necessary to store the video signal in the resize signal storage unit 351 in units of one vertical synchronization period, the memory capacity of the DRAM 380 cannot be reduced by deleting the resize signal storage unit 351.
　また、図１１Ｂ及び図１１Ｃに示すように、入力される映像信号に対して映像サイズが変更され、変更された出力信号が出力される。例えば、１垂直同期期間内の垂直ライン数が４８０ラインの映像信号が入力され、垂直ライン数が３６０ラインの出力信号が出力される。 11B and 11C, the video size is changed with respect to the input video signal, and the changed output signal is output. For example, a video signal having 480 vertical lines within one vertical synchronization period is input, and an output signal having 360 vertical lines is output.
　具体的には、走査線変換部３５０は、４８０ラインの映像信号のうちの３６０ライン分の信号をリサイズ信号記憶部３５１に記憶させ、リサイズ信号記憶部３５１から当該３６０ラインの出力信号を読み出し、出力する。 Specifically, the scanning line conversion unit 350 stores 360 lines of the 480-line video signal in the resize signal storage unit 351 and reads the output signal of the 360 lines from the resize signal storage unit 351. Output.
　これにより、入力される映像信号よりも垂直ライン数の少ない信号をリサイズ信号記憶部３５１に記憶させることで、リサイズ信号記憶部３５１のメモリ容量を低減することはできるが、リサイズ信号記憶部３５１を削減することはできない。 Thus, by storing a signal having a smaller number of vertical lines than the input video signal in the resize signal storage unit 351, the memory capacity of the resize signal storage unit 351 can be reduced. It cannot be reduced.
　これに対し、本発明に係る映像信号処理装置１００によれば、リサイズ信号記憶部３５１のメモリ容量を削除して、ＤＲＡＭ３８０のメモリ容量及びメモリ転送量を低減することができる。 On the other hand, according to the video signal processing apparatus 100 of the present invention, the memory capacity of the DRAM 380 and the memory transfer amount can be reduced by deleting the memory capacity of the resize signal storage unit 351.
　（実施の形態２）
　上記の実施の形態１では、映像信号処理装置１００は、符号化された映像信号の垂直スケーリングのリサイズを行うために復号信号の変更を行っていた。しかし、本実施の形態２では、映像信号処理装置１００は、符号化されていない映像信号の垂直スケーリングのリサイズを行うために当該映像信号の変更を行う。 (Embodiment 2)
In the first embodiment, the video signal processing apparatus 100 changes the decoded signal in order to resize the vertical scaling of the encoded video signal. However, in the second embodiment, the video signal processing apparatus 100 changes the video signal in order to resize the non-coded video signal in the vertical scaling.
　図１２は、本実施の形態２に係る映像信号処理装置１００の機能構成を示すブロック図である。 FIG. 12 is a block diagram showing a functional configuration of the video signal processing apparatus 100 according to the second embodiment.
　同図に示すように、本実施の形態２に係る映像信号処理装置１００は、実施の形態１に係る映像信号処理装置１００の構成に加えて、非圧縮信号変更部１５０、フレームシンクロ部１６０及び切替部１７０を備えている。なお、本実施の形態２に係る映像信号処理装置１００が備える処理部のうち、実施の形態１に係る映像信号処理装置１００の各処理部と同様の機能を有するものについては、詳細な説明は省略する。 As shown in the figure, in addition to the configuration of the video signal processing apparatus 100 according to the first embodiment, the video signal processing apparatus 100 according to the second embodiment includes an uncompressed signal changing unit 150, a frame synchronization unit 160, and A switching unit 170 is provided. Of the processing units included in the video signal processing apparatus 100 according to the second embodiment, those having functions similar to those of the respective processing units of the video signal processing apparatus 100 according to the first embodiment will be described in detail. Omitted.
　ＮＲ／ＩＰ変換部１４０は、符号化されていない映像信号である非圧縮信号が入力された場合に、当該非圧縮信号をＮＲ／ＩＰ変換信号記憶部１４１に書き込み読み出すことで、時間的に前後する非圧縮信号を用いて非圧縮信号のノイズを低減するとともに、非圧縮信号がインタレース方式の場合に非圧縮信号をインタレース方式からプログレッシブ方式に変換して出力する。 When an uncompressed signal, which is an unencoded video signal, is input, the NR / IP conversion unit 140 writes and reads the uncompressed signal in the NR / IP conversion signal storage unit 141, thereby temporally changing the time. The non-compressed signal is used to reduce the noise of the uncompressed signal, and when the uncompressed signal is an interlace system, the uncompressed signal is converted from the interlace system to the progressive system and output.
　このＮＲ／ＩＰ変換部１４０によるノイズ低減とＩＰ変換は、実施の形態１におけるＮＲ／ＩＰ変換部１４０によるノイズ低減とＩＰ変換と同様であるため、詳細な説明は省略する。 Since the noise reduction and IP conversion by the NR / IP conversion unit 140 are the same as the noise reduction and IP conversion by the NR / IP conversion unit 140 in the first embodiment, detailed description thereof will be omitted.
　非圧縮信号変更部１５０は、ＮＲ／ＩＰ変換部１４０が出力した非圧縮信号をデコードバッファ１１１に記憶させる。また、非圧縮信号変更部１５０は、非圧縮信号の１垂直同期期間内での映像有効期間が出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された非圧縮信号を変更非圧縮信号としてデコードバッファ１１１から読み出し、読み出した変更非圧縮信号を出力する。 The uncompressed signal changing unit 150 stores the uncompressed signal output from the NR / IP converting unit 140 in the decode buffer 111. Further, the non-compressed signal changing unit 150 performs the non-compression that has been changed so that the video effective period within one vertical synchronization period of the uncompressed signal becomes the same value as the video effective period within one vertical synchronization period of the output signal. The signal is read from the decode buffer 111 as a modified uncompressed signal, and the read modified uncompressed signal is output.
　具体的には、非圧縮信号変更部１５０は、非圧縮信号の有効割合が出力信号の有効割合と同じ値になるように変更された非圧縮信号を変更非圧縮信号としてデコードバッファ１１１から読み出し、読み出した変更非圧縮信号を出力する。 Specifically, the uncompressed signal changing unit 150 reads the uncompressed signal that has been changed so that the effective ratio of the uncompressed signal becomes the same value as the effective ratio of the output signal from the decode buffer 111 as a changed uncompressed signal, The read modified uncompressed signal is output.
　なお、ここでの出力信号は、実施の形態１と同様に、表示パネル３４へ出力される映像信号であるが、当該映像信号が表示パネル３４に出力される前にフレームバッファなどの記憶部に記憶される場合は、当該記憶部へ出力される映像信号であってもよい。 The output signal here is a video signal output to the display panel 34 as in the first embodiment, but before the video signal is output to the display panel 34, it is stored in a storage unit such as a frame buffer. When stored, it may be a video signal output to the storage unit.
　また、実施の形態１における復号信号変更部１２０と同様に、非圧縮信号変更部１５０がＤＲＡＭ１８０から変更非圧縮信号を読み出す際に、読み出し時の揺らぎが発生し、読み出す変更非圧縮信号の垂直ライン数に誤差が生じる。この誤差は、通常、－１ライン～＋１ラインであり、大きくても－２ライン～＋２ライン程度である。このため、非圧縮信号変更部１５０が変更するライン数は、最大で－２ライン～＋２ライン程度の誤差が許容される。 Similarly to the decoded signal changing unit 120 in the first embodiment, when the uncompressed signal changing unit 150 reads the changed uncompressed signal from the DRAM 180, a fluctuation occurs at the time of reading, and the vertical line of the changed uncompressed signal to be read out An error occurs in the number. This error is usually from -1 line to +1 line, and is at most about -2 line to +2 line. For this reason, the number of lines changed by the uncompressed signal changing unit 150 is allowed to have an error of about −2 lines to +2 lines at the maximum.
　切替部１７０は、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力された場合に、デコーダ１１０に復号信号の生成を停止させる。具体的には、切替部１７０は、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力された場合に、非圧縮信号変更部１５０に対してデコードバッファ１１１へのアクセス許可を行い、デコーダ１１０に対してはデコードバッファ１１１へのアクセス不許可を行う。なお、切替部１７０は、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力されたことを、ＮＲ／ＩＰ変換部１４０から取得してもよいし、ユーザの入力により取得してもよい。 The switching unit 170 causes the decoder 110 to stop generating a decoded signal when an uncompressed signal is input to the NR / IP conversion unit 140. Specifically, when an uncompressed signal is input to the NR / IP converter 140, the switching unit 170 permits the uncompressed signal change unit 150 to access the decode buffer 111 and the decoder 110 In this case, access to the decode buffer 111 is not permitted. Note that the switching unit 170 may acquire from the NR / IP conversion unit 140 that the uncompressed signal has been input to the NR / IP conversion unit 140, or may acquire it based on user input.
　このように、デコードバッファ１１１は、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力された場合に、復号信号に代えて、非圧縮信号を記憶しているＤＲＡＭ１８０の記憶領域である。なお、符号化された映像信号がデコーダ１１０に入力され復号された場合は、非圧縮信号変更部１５０は機能せず、非圧縮信号変更部１５０に入力された信号はそのまま出力される。 As described above, when the uncompressed signal is input to the NR / IP converter 140, the decode buffer 111 is a storage area of the DRAM 180 that stores the uncompressed signal instead of the decoded signal. When the encoded video signal is input to the decoder 110 and decoded, the uncompressed signal changing unit 150 does not function and the signal input to the uncompressed signal changing unit 150 is output as it is.
　フレームシンクロ部１６０は、非圧縮信号変更部１５０が出力した変更非圧縮信号のフレームレートを、出力信号のフレームレートに変換する。外部から入力される非圧縮信号は、出力に合ったフレームレートでない場合が多く、出力信号に合ったフレームレートに変換する必要が生じるためである。具体的には、フレームシンクロ部１６０は、デコードバッファ１１１に当該変更非圧縮信号を書き込み読み出すことで、フレームレートを変換する。 The frame synchronization unit 160 converts the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit 150 into the frame rate of the output signal. This is because an uncompressed signal input from the outside often does not have a frame rate that matches the output, and needs to be converted to a frame rate that matches the output signal. Specifically, the frame synchronization unit 160 converts the frame rate by writing and reading the changed uncompressed signal to and from the decode buffer 111.
　なお、フレームシンクロ部１６０は、非圧縮信号変更部１５０が出力した変更非圧縮信号のフレームレートを出力信号のフレームレートに変換するフレームシンクロを、非圧縮信号変更部１５０のデコードバッファ１１１との書き込みと読み出しを用いて行うことにしてもよい。つまり、非圧縮信号変換部１５０とフレームシンクロ部１６０とが順に処理するのではなく、非圧縮信号変換部１５０によるデコードバッファ１１１への書き込みと読み出しの処理と同時にフレームレート変換の処理を行うこともできる。この場合、非圧縮信号変換部による処理とフレームシンクロ部による処理をデコードバッファを用いて同時に行うことで、ＤＲＡＭのメモリ容量及び処理量を低減することができる。 The frame synchronization unit 160 writes the frame synchronization for converting the frame rate of the modified uncompressed signal output from the uncompressed signal change unit 150 into the frame rate of the output signal to the decode buffer 111 of the uncompressed signal change unit 150. And reading may be used. That is, the non-compressed signal conversion unit 150 and the frame synchronization unit 160 do not process in sequence, but the frame rate conversion process may be performed simultaneously with the writing and reading processing to the decode buffer 111 by the non-compressed signal conversion unit 150. it can. In this case, the memory capacity and the processing amount of the DRAM can be reduced by simultaneously performing the processing by the uncompressed signal conversion unit and the processing by the frame synchronization unit using the decode buffer.
　また、図１に示されたＨＤＭＩ通信部３２には、外部から非圧縮信号が入力されることとし、ＨＤＭＩ通信部３２は、当該非圧縮信号をＮＲ／ＩＰ変換部１４０に出力する。 Further, an uncompressed signal is input from the outside to the HDMI communication unit 32 shown in FIG. 1, and the HDMI communication unit 32 outputs the uncompressed signal to the NR / IP conversion unit 140.
　また、デコーダ１１０は、切替部１７０からの指示に従い、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力された場合に、復号信号の生成を停止する。当該非圧縮信号は、符号化されていない映像信号であるため、復号する必要がないからである。 Also, the decoder 110 stops the generation of the decoded signal when an uncompressed signal is input to the NR / IP conversion unit 140 in accordance with the instruction from the switching unit 170. This is because the uncompressed signal is an unencoded video signal and thus does not need to be decoded.
　次に、本実施の形態２に係る映像信号処理装置１００が行う映像信号の処理の一例について、説明する。 Next, an example of video signal processing performed by the video signal processing apparatus 100 according to the second embodiment will be described.
　図１３は、本実施の形態２に係る映像信号処理装置１００が行う映像信号の処理の一例を示すフローチャートである。 FIG. 13 is a flowchart showing an example of video signal processing performed by the video signal processing apparatus 100 according to the second embodiment.
　同図に示すように、まず、ＨＤＭＩ通信部３２を介して、ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力される（Ｓ３０２）。 As shown in the figure, first, an uncompressed signal is input to the NR / IP conversion unit 140 via the HDMI communication unit 32 (S302).
　ＮＲ／ＩＰ変換部１４０に非圧縮信号が入力されると、切替部１７０がデコーダ１１０に復号信号の生成を停止させる指示を行い、デコーダ１１０は、復号信号の生成を停止する（Ｓ３０４）。 When an uncompressed signal is input to the NR / IP converter 140, the switching unit 170 instructs the decoder 110 to stop generating the decoded signal, and the decoder 110 stops generating the decoded signal (S304).
　そして、ＮＲ／ＩＰ変換部１４０は、非圧縮信号のノイズを低減するとともに、非圧縮信号をＩＰ変換する（Ｓ３０６）。 Then, the NR / IP conversion unit 140 reduces the noise of the uncompressed signal and performs IP conversion on the uncompressed signal (S306).
　次に、非圧縮信号変更部１５０は、ノイズ低減されＩＰ変換された非圧縮信号を、デコードバッファ１１１に記憶させる（Ｓ３０８）。 Next, the uncompressed signal changing unit 150 stores the noise-reduced and IP-converted uncompressed signal in the decode buffer 111 (S308).
　そして、非圧縮信号変更部１５０は、非圧縮信号の有効割合が出力信号の有効割合と同じ値になるように変更された非圧縮信号を変更非圧縮信号としてデコードバッファ１１１から読み出し、読み出した変更非圧縮信号を出力する（Ｓ３１０）。 Then, the uncompressed signal changing unit 150 reads the uncompressed signal that has been changed so that the effective ratio of the uncompressed signal becomes the same value as the effective ratio of the output signal from the decode buffer 111 as the changed uncompressed signal, and the read change An uncompressed signal is output (S310).
　そして、フレームシンクロ部１６０は、非圧縮信号変更部１５０が出力した変更非圧縮信号のフレームレートを、出力信号のフレームレートに変換する（Ｓ３１２）。 The frame synchronization unit 160 converts the frame rate of the modified uncompressed signal output from the uncompressed signal changing unit 150 into the frame rate of the output signal (S312).
　なお、このフレームレートの変換は、非圧縮信号変更部１５０におけるデコードバッファへの書き込みと読み出しを用いて行うことも可能である。 It should be noted that this frame rate conversion can also be performed using writing to and reading from the decoding buffer in the uncompressed signal changing unit 150.
　以上により、本実施の形態２に係る映像信号処理装置１００が行う映像信号の処理は、終了する。 Thus, the video signal processing performed by the video signal processing apparatus 100 according to the second embodiment is completed.
　次に、本発明の実施の形態２に係る映像信号処理装置１００が奏する効果について、以下に説明する。 Next, the effects achieved by the video signal processing apparatus 100 according to Embodiment 2 of the present invention will be described below.
　まず、以下に、本実施の形態２に係る映像信号処理装置１００がフレームレート変換を行う際の効果について説明する。 First, the effects when the video signal processing apparatus 100 according to the second embodiment performs frame rate conversion will be described below.
　図１４Ａ及び図１４Ｂは、本実施の形態２に係る映像信号処理装置１００がフレームレート変換を行う際の効果を説明する図である。具体的には、図１４Ａは、入力される映像信号がインタレース方式の場合でのフレームレート変換を示す図であり、図１４Ｂは、入力される映像信号がプログレッシブ方式の場合でのフレームレート変換を示す図である。 FIG. 14A and FIG. 14B are diagrams for explaining effects when the video signal processing apparatus 100 according to Embodiment 2 performs frame rate conversion. Specifically, FIG. 14A is a diagram illustrating frame rate conversion when an input video signal is an interlaced system, and FIG. 14B is a frame rate conversion when an input video signal is a progressive system. FIG.
　図１４Ａに示すように、入力された映像信号（同図の（ａ）に示す映像信号）のフレームレートと、出力信号（同図の（ｂ）に示す映像信号）のフレームレートとが異なる場合、入力された映像信号のフレームレートを出力信号のフレームレートに変換する必要がある。 As shown in FIG. 14A, the frame rate of the input video signal (video signal shown in FIG. 14A) is different from the frame rate of the output signal (video signal shown in FIG. 14B). Therefore, it is necessary to convert the frame rate of the input video signal into the frame rate of the output signal.
　ここで、インタレース方式で入力された映像信号では、同図の（ａ）に示すように、ＴｏｐフレームとＢｏｔｔｏｍフレームとが交互に配列している。また、出力信号は、入力信号のフレーム数６枚分と同じ時間内でのフレーム数が８枚のフレームレートを有する信号であることとする。 Here, in the video signal input by the interlace method, as shown in (a) of the figure, the Top frame and the Bottom frame are alternately arranged. The output signal is a signal having a frame rate of 8 frames within the same time as the 6 frames of the input signal.
　この場合、同図の（ｂ）に示すように、出力信号は、ＴｏｐフレームとＢｏｔｔｏｍフレームとが交互に配列されるように、入力信号のフレーム間に２枚のフレームが挿入される。具体的には、出力信号には、ＴｏｐフレームとＢｏｔｔｏｍフレームとを交互に配列させるために、入力信号の２枚目のＢｏｔｔｏｍフレーム（同図に示す「２Ｂｏｔｔｏｍ」）のあとに、１枚目のＴｏｐフレーム（同図に示す「１Ｔｏｐ」）と２枚目のＢｏｔｔｏｍフレーム（同図に示す「２Ｂｏｔｔｏｍ」）とが挿入される。 In this case, as shown in FIG. 6B, two frames are inserted between the frames of the input signal so that the Top frame and the Bottom frame are alternately arranged in the output signal. Specifically, in order to alternately arrange Top frames and Bottom frames in the output signal, after the second Bottom frame of the input signal ("2Bottom" shown in the figure), the first frame A Top frame ("1Top" shown in the figure) and a second Bottom frame ("2Bottom" shown in the figure) are inserted.
　これにより、入力信号の２枚目のＢｏｔｔｏｍフレームのあとに、１枚目のＴｏｐフレームが配置され、時刻的な戻りが発生するため、当該映像を見るユーザに違和感が生じる。 Thereby, since the first Top frame is arranged after the second Bottom frame of the input signal and a time return occurs, the user who views the video is uncomfortable.
　このように、入力される映像信号がインタレース方式の場合では、フレームレート変換の性能が低下する。 As described above, when the input video signal is an interlace method, the performance of the frame rate conversion is deteriorated.
　これに対し、図１４Ｂに示すように、入力される映像信号がプログレッシブ方式の場合では、ＴｏｐやＢｏｔｔｏｍのフレームがなく、ＴｏｐフレームとＢｏｔｔｏｍフレームとを交互に配列させるような必要がない。つまり、フレームレート変換によるフレームの挿入を行っても時刻的な戻りは発生しない。 On the other hand, as shown in FIG. 14B, when the input video signal is a progressive system, there is no Top or Bottom frame, and there is no need to alternately arrange Top frames and Bottom frames. That is, even if a frame is inserted by frame rate conversion, a time return does not occur.
　具体的には、プログレッシブ方式で入力された映像信号では、同図の（ａ）に示すように、フレームが順に配列している。また、出力信号は、入力信号のフレーム数６枚分と同じ時間内でのフレーム数が８枚のフレームレートを有する信号であることとする。 More specifically, in the video signal input by the progressive method, the frames are arranged in order as shown in FIG. The output signal is a signal having a frame rate of 8 frames within the same time as the 6 frames of the input signal.
　この場合、同図の（ｂ）に示すように、出力信号は、入力信号の２枚目のフレームのあとに２枚目のフレームが挿入され、４枚目のフレームのあとに４枚目のフレームが挿入される。 In this case, as shown in (b) of the figure, the output signal has the second frame inserted after the second frame of the input signal, and the fourth frame after the fourth frame. A frame is inserted.
　これにより、フレームが挿入されても時刻的な戻りが発生しないため、入力される映像信号がプログレッシブ方式であれば、フレームレート変換における性能低下を抑制することができる。 Thereby, even if a frame is inserted, a time-based return does not occur. Therefore, if the input video signal is a progressive method, it is possible to suppress performance degradation in frame rate conversion.
　ここで、図１８に示された映像信号変換装置は、フレームレート変換にフィールドメモリ部７を共用して使用する場合は、フレームレート変換を行ったあとにＩＰ変換を行うことになるため、インタレース方式の映像信号に対してフレームレート変換を行わなければならない。このため、フレームレート変換における性能は低下する。 Here, when the video signal conversion apparatus shown in FIG. 18 uses the field memory unit 7 in common for frame rate conversion, it performs IP conversion after frame rate conversion. Frame rate conversion must be performed on the video signal of the race system. For this reason, the performance in frame rate conversion deteriorates.
　また、図１８に示された映像信号変換装置において、ＩＰ変換後にフレームレート変換を行う場合は、フレームレート変換用の記憶領域が必要であるため、ＤＲＡＭの記憶領域が追加で必要になる。 Further, in the video signal conversion apparatus shown in FIG. 18, when frame rate conversion is performed after IP conversion, a storage area for frame rate conversion is required, and therefore a DRAM storage area is additionally required.
　これに対し、本実施の形態２における映像信号処理装置１００では、フレームシンクロ部１６０は、ＩＰ変換後の変更非圧縮信号をデコードバッファ１１１に書き込み読み出すことで、フレームレートを変換する。つまり、フレームシンクロ部１６０は、デコードバッファ１１１の記憶領域を共用して、プログレッシブ方式の映像信号をフレームレート変換する。 On the other hand, in the video signal processing apparatus 100 according to the second embodiment, the frame synchronization unit 160 converts the frame rate by writing and reading the changed uncompressed signal after the IP conversion into the decode buffer 111. That is, the frame synchronization unit 160 shares the storage area of the decode buffer 111 and performs frame rate conversion on the progressive video signal.
　なお、デコーダ１１０に入力される符号化された映像信号は、通常、出力信号のフレームレートと同じフレームレートの信号である。このため、デコーダ１１０に映像信号が入力されデコードバッファ１１１に復号信号が記憶されている場合は、フレームシンクロ部１６０は、機能を停止しており、デコードバッファ１１１の記憶領域を使用しないため、ＤＲＡＭ１８０の記憶領域を追加で必要としない。 Note that the encoded video signal input to the decoder 110 is usually a signal having the same frame rate as the frame rate of the output signal. Therefore, when the video signal is input to the decoder 110 and the decoded signal is stored in the decode buffer 111, the frame synchronization unit 160 stops functioning and does not use the storage area of the decode buffer 111. No additional storage space is required.
　以上により、本実施の形態２における映像信号処理装置１００では、フレームレート変換における性能低下を抑制することができる。 As described above, in the video signal processing apparatus 100 according to the second embodiment, it is possible to suppress performance degradation in frame rate conversion.
　図１５は、本実施の形態２に係る映像信号処理装置１００が奏する効果をまとめた図である。 FIG. 15 is a diagram summarizing the effects produced by the video signal processing apparatus 100 according to the second embodiment.
　同図に示すように、ビデオストリームなどの符号化された映像信号が入力された場合は、図１７に示された従来の映像信号処理装置（図１５に示された「従来１」）では、デコードバッファ用のメモリ１と、ノイズ低減及びＩＰ変換用のメモリ２と、走査線変換用のメモリ３の３つのメモリが必要である。 As shown in the figure, when an encoded video signal such as a video stream is input, the conventional video signal processing apparatus shown in FIG. 17 (“Conventional 1” shown in FIG. 15) Three memories are required: a memory 1 for decoding buffer, a memory 2 for noise reduction and IP conversion, and a memory 3 for scanning line conversion.
　また、同様に、図１８に示された従来の映像信号処理装置（図１５に示された「従来２」）では、デコードバッファ用のメモリ１と、ノイズ低減用のメモリ２と、ＩＰ変換及び走査線変換用のメモリ３の３つのメモリが必要である。 Similarly, in the conventional video signal processing apparatus shown in FIG. 18 (“Conventional 2” shown in FIG. 15), a memory 1 for decoding buffer, a memory 2 for noise reduction, IP conversion and Three memories, the memory 3 for scanning line conversion, are necessary.
　また、本実施の形態２に係る映像信号処理装置１００（図１５に示された「本発明」）では、デコードバッファ及び走査線変換用のメモリ１と、ノイズ低減及びＩＰ変換用のメモリ２の２つのメモリしか必要としない。 Further, in the video signal processing apparatus 100 according to the second embodiment (“present invention” shown in FIG. 15), a memory 1 for decoding buffer and scanning line conversion, and a memory 2 for noise reduction and IP conversion are included. Only two memories are required.
　また、外部入力により非圧縮の映像信号が入力された場合は、「従来１」、「従来２」及び「本発明」ともに、２つのメモリが必要であるが、「本発明」は「従来２」に比べて、フレームレート変換による性能（図１５に示された「フレームシンクロ性能」）の低下を抑制することができる。 Further, when an uncompressed video signal is input by an external input, two memories are necessary for “Conventional 1”, “Conventional 2”, and “Invention”, but “Invention” is “Conventional 2”. Compared with “”, it is possible to suppress a decrease in performance (“frame synchronization performance” shown in FIG. 15) due to frame rate conversion.
　なお、実施の形態１においても、同図での符号化された映像信号が入力された場合の効果と同じ効果を奏する。つまり、本実施の形態２において符号化された映像信号が入力された場合は、上記実施の形態１で説明した効果と同じ効果を奏する。 In the first embodiment, the same effect as that obtained when the encoded video signal in FIG. That is, when the video signal encoded in the second embodiment is input, the same effect as that described in the first embodiment is obtained.
　このように、非圧縮信号が入力された場合に、復号処理を停止するとともに、デコードバッファ１１１に非圧縮信号を書き込み、デコードバッファ１１１から変更非圧縮信号を読み出す。つまり、非圧縮信号が入力された場合は、復号処理を停止できるため、デコードバッファ１１１には復号信号の代わりに非圧縮信号を記憶させることができる。このため、ＤＲＡＭ１８０のデコードバッファ１１１の記憶領域を非圧縮信号に割り当てることができるため、デコードバッファ１１１を用いて非圧縮信号の垂直スケーリングのリサイズを行うことができる。 Thus, when an uncompressed signal is input, the decoding process is stopped, the uncompressed signal is written to the decode buffer 111, and the changed uncompressed signal is read from the decode buffer 111. That is, when an uncompressed signal is input, the decoding process can be stopped, so that the uncompressed signal can be stored in the decode buffer 111 instead of the decoded signal. For this reason, since the storage area of the decode buffer 111 of the DRAM 180 can be assigned to an uncompressed signal, the decode buffer 111 can be used to resize the non-compressed signal in vertical scaling.
　また、非圧縮信号が入力された場合でも、ＤＲＡＭ１８０の１つの記憶領域であるデコードバッファ１１１を共用してノイズ低減とＩＰ変換とを行うことができるため、ノイズ低減を行ってもＤＲＡＭ１８０の記憶領域を追加で必要としない。 Even when an uncompressed signal is input, noise can be reduced and IP conversion can be performed by sharing the decode buffer 111, which is one storage area of the DRAM 180. Therefore, even if noise reduction is performed, the storage area of the DRAM 180 is reduced. No additional need.
　また、非圧縮信号変更部１５０が出力した変更非圧縮信号は、ＩＰ変換が行われているため、プログレッシブ方式に変換されている。ここで、インタレース方式の映像信号をフレームレート変換する場合は、プログレッシブ方式の映像信号をフレームレート変換する場合に比べて、フレームレート変換の性能が劣る。このため、ＩＰ変換が行われた変更非圧縮信号をフレームレート変換することで、フレームレート変換の性能低下を抑制することができる。 In addition, the modified uncompressed signal output from the uncompressed signal changing unit 150 is converted to the progressive method because IP conversion is performed. Here, when frame rate conversion is performed on an interlaced video signal, the frame rate conversion performance is inferior to that when frame rate conversion is performed on a progressive video signal. For this reason, by performing frame rate conversion on the changed uncompressed signal that has been subjected to IP conversion, it is possible to suppress degradation in performance of frame rate conversion.
　したがって、非圧縮信号が入力される場合でも、フレームレート変換の性能低下を抑制しつつ、ＤＲＡＭ１８０のメモリ容量及び処理量を低減することができる。 Therefore, even when an uncompressed signal is input, it is possible to reduce the memory capacity and the processing amount of the DRAM 180 while suppressing the performance degradation of the frame rate conversion.
　なお、本発明に係る映像信号処理装置１００は、図１６に示すようなデジタルビデオレコーダ２０及びデジタルテレビ３０に搭載される。 The video signal processing apparatus 100 according to the present invention is mounted on a digital video recorder 20 and a digital television 30 as shown in FIG.
　以上、本発明の実施の形態１及び２に係る映像信号処理装置１００について説明したが、本発明は、これらの実施の形態に限定されるものではない。本発明の趣旨を逸脱しない限り、当業者が思いつく各種変形を当該実施の形態に施したものや、異なる実施の形態における構成要素を組み合わせて構築される形態も、本発明の範囲内に含まれる。 The video signal processing apparatus 100 according to Embodiments 1 and 2 of the present invention has been described above, but the present invention is not limited to these embodiments. Unless it deviates from the meaning of this invention, the form which carried out the various deformation | transformation which those skilled in the art will think to the said embodiment, and the form constructed | assembled combining the component in a different embodiment is also contained in the scope of the present invention. .
　例えば、上記実施の形態では、映像信号処理装置１００は、図２又は図１２に示される各処理部を備えていることとしたが、映像信号処理装置１００は、これらの図に示された処理部以外の処理部を備えていてもよい。例えば、映像信号処理装置１００は、入力される映像の水平方向の画像サイズをリサイズ、すなわち、拡大又は縮小する処理部を備えていてもよい。 For example, in the above embodiment, the video signal processing apparatus 100 includes the processing units illustrated in FIG. 2 or FIG. 12, but the video signal processing apparatus 100 performs the processing illustrated in these drawings. A processing unit other than the unit may be provided. For example, the video signal processing apparatus 100 may include a processing unit that resizes, that is, enlarges or reduces the horizontal image size of an input video.
　また、上記実施の形態では、映像信号処理装置１００の構成は、本発明を具体的に説明するために例示するためのものであり、本発明に係る映像信号処理装置は、上記構成の全てを必ずしも備える必要はない。 Moreover, in the said embodiment, the structure of the video signal processing apparatus 100 is for illustrating in order to demonstrate this invention concretely, and the video signal processing apparatus which concerns on this invention has all the said structures. It is not always necessary to prepare.
　例えば、上記実施の形態１では、映像信号処理装置１００は、デコーダ１１０、デコードバッファ１１１、復号信号変更部１２０、ＮＲ／ＩＰ変換部１４０及びＮＲ／ＩＰ変換信号記憶部１４１を備えていればよく、ＯＳＤ合成部１３０及びＯＳＤ信号記憶部１３１は必ずしも備えている必要はない。 For example, in the first embodiment, the video signal processing apparatus 100 only needs to include the decoder 110, the decode buffer 111, the decoded signal change unit 120, the NR / IP conversion unit 140, and the NR / IP conversion signal storage unit 141. The OSD synthesis unit 130 and the OSD signal storage unit 131 are not necessarily provided.
　また、上記実施の形態２では、映像信号処理装置１００は、デコーダ１１０、デコードバッファ１１１、復号信号変更部１２０、ＮＲ／ＩＰ変換部１４０、ＮＲ／ＩＰ変換信号記憶部１４１及び非圧縮信号変更部１５０を備えていればよく、ＯＳＤ合成部１３０、ＯＳＤ信号記憶部１３１及びフレームシンクロ部１６０は必ずしも備えている必要はない。 In the second embodiment, the video signal processing apparatus 100 includes the decoder 110, the decode buffer 111, the decoded signal change unit 120, the NR / IP conversion unit 140, the NR / IP conversion signal storage unit 141, and the uncompressed signal change unit. The OSD synthesis unit 130, the OSD signal storage unit 131, and the frame synchronization unit 160 are not necessarily provided.
　また、復号信号変更部１２０は、読出部１２３を備えていればよく、取得部１２１及び算出部１２２は必ずしも備えている必要はない。 Also, the decoded signal changing unit 120 only needs to include the reading unit 123, and the acquisition unit 121 and the calculation unit 122 are not necessarily provided.
　また、上記実施の形態では、算出部１２２は、取得部１２１が取得したデータを用いて、変更復号信号の垂直全ライン数を算出することとした。しかし、復号信号の垂直有効ライン数、出力信号の垂直全ライン数及び垂直有効ライン数などのデータが予め設定されており、算出部１２２は、当該予め定められたデータを用いて、変更復号信号の垂直全ライン数を算出することにしてもよい。 In the above embodiment, the calculation unit 122 calculates the total number of vertical lines of the modified decoded signal using the data acquired by the acquisition unit 121. However, data such as the number of vertical effective lines of the decoded signal, the total number of vertical lines and the number of vertical effective lines of the output signal are set in advance, and the calculation unit 122 uses the predetermined data to change the decoded decoded signal. The total number of vertical lines may be calculated.
　また、同様に、変更復号信号の垂直全ライン数が予め設定されており、読出部１２３は、当該予め定められた垂直全ライン数に従って、変更復号信号をデコードバッファ１１１から読み出すことにしてもよい。 Similarly, the total number of vertical lines of the modified decoded signal is set in advance, and the reading unit 123 may read the modified decoded signal from the decode buffer 111 according to the predetermined total number of vertical lines. .
　また、上記実施の形態では、本発明に係る映像信号処理装置１００をデジタルテレビ及びデジタルビデオレコーダに適用した例を述べたが、本発明に係る映像信号処理装置１００は、デジタルテレビ以外の三次元画像を表示する三次元画像表示装置（例えば、携帯電話機器、パーソナルコンピュータ等）に適用できる。また、本発明に係る映像信号処理装置１００は、デジタルビデオレコーダ以外の三次元画像を出力する三次元画像出力装置（例えば、ＢＤプレーヤ等）に適用できる。 In the above embodiment, the example in which the video signal processing apparatus 100 according to the present invention is applied to a digital television and a digital video recorder has been described. The present invention can be applied to a three-dimensional image display device (for example, a mobile phone device, a personal computer, etc.) that displays an image. The video signal processing apparatus 100 according to the present invention can be applied to a three-dimensional image output apparatus (for example, a BD player) that outputs a three-dimensional image other than a digital video recorder.
　また、上記実施の形態１及び２に係る映像信号処理装置１００は典型的には集積回路であるＬＳＩとして実現される。これらは個別に１チップ化されてもよいし、一部又はすべてを含むように１チップ化されてもよい。 The video signal processing apparatus 100 according to the first and second embodiments is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them.
　また、集積回路化はＬＳＩに限るものではなく、専用回路又は汎用プロセッサで実現してもよい。ＬＳＩ製造後にプログラムすることが可能なＦＰＧＡ（Ｆｉｅｌｄ　Ｐｒｏｇｒａｍｍａｂｌｅ　Ｇａｔｅ　Ａｒｒａｙ）、又はＬＳＩ内部の回路セルの接続や設定を再構成可能なリコンフィギュラブル・プロセッサを利用してもよい。 Further, the integration of circuits is not limited to LSI, and may be realized by a dedicated circuit or a general-purpose processor. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used.
　さらには、半導体技術の進歩又は派生する別技術によりＬＳＩに置き換わる集積回路化の技術が登場すれば、当然、その技術を用いて各処理部の集積化を行ってもよい。 Furthermore, if integrated circuit technology that replaces LSI emerges as a result of advances in semiconductor technology or other derived technology, it is natural that the processing units may be integrated using this technology.
　また、上記実施の形態１及び２に係る映像信号処理装置１００及び１００Ｂの機能の一部又は全てを、ＣＰＵ等のプロセッサがプログラムを実行することにより実現してもよい。 Also, some or all of the functions of the video signal processing apparatuses 100 and 100B according to the first and second embodiments may be realized by a processor such as a CPU executing a program.
　さらに、本発明は上記プログラムであってもよいし、上記プログラムが記録された記録媒体であってもよい。また、上記プログラムは、インターネット等の伝送媒体を介して流通させることができるのは言うまでもない。 Furthermore, the present invention may be the above program or a recording medium on which the above program is recorded. Needless to say, the program can be distributed via a transmission medium such as the Internet.
　また、上記で用いた数字は、すべて本発明を具体的に説明するために例示するものであり、本発明は例示された数字に制限されない。 Also, the numbers used above are all exemplified for specifically describing the present invention, and the present invention is not limited to the illustrated numbers.
　本発明に係る映像信号処理装置は、ＤＲＡＭのメモリ容量及び処理量を低減することができるという効果を奏し、例えば、デジタルテレビ及びデジタルビデオレコーダ等に適用することができる。 The video signal processing apparatus according to the present invention has an effect that the memory capacity and the processing amount of the DRAM can be reduced, and can be applied to, for example, a digital television and a digital video recorder.
　　　１０　三次元画像表示システム
　　　２０　デジタルビデオレコーダ
　　　２１、３１　入力部
　　　２２、３２　ＨＤＭＩ通信部
　　　３０　デジタルテレビ
　　　３３　出力信号制御部
　　　３４　表示パネル
　　　４１　光ディスク
　　　４２　放送波
　　１００、１００Ｂ、３００　映像信号処理装置
　　１１０、３１０　デコーダ
　　１１１、３１１　デコードバッファ
　　１２０　復号信号変更部
　　１２１　取得部
　　１２２　算出部
　　１２３　読出部
　　１３０、３３０　ＯＳＤ合成部
　　１３１、３３１　ＯＳＤ信号記憶部
　　１４０、３４０　ＮＲ／ＩＰ変換部
　　１４１、３４１　ＮＲ／ＩＰ変換信号記憶部
　　１５０　非圧縮信号変更部
　　１６０　フレームシンクロ部
　　１７０　切替部
　　１８０、３８０　ＤＲＡＭ
　　３２０　映像読出部
　　３５０　走査線変換部
　　３５１　リサイズ信号記憶部 DESCRIPTION OF SYMBOLS 10 3D image display system 20 Digital video recorder 21, 31 Input part 22, 32 HDMI communication part 30 Digital television 33 Output signal control part 34 Display panel 41 Optical disk 42 Broadcast wave 100, 100B, 300 Video signal processing apparatus 110, 310 Decoder 111, 311 Decoding buffer 120 Decoded signal changing unit 121 Acquisition unit 122 Calculation unit 123 Reading unit 130, 330 OSD synthesis unit 131, 331 OSD signal storage unit 140, 340 NR / IP conversion unit 141, 341 NR / IP conversion signal storage unit 150 Uncompressed signal change unit 160 Frame synchronization unit 170 Switching unit 180, 380 DRAM
320 Video Reading Unit 350 Scanning Line Conversion Unit 351 Resize Signal Storage Unit

Claims (11)

  1. 　入力される映像信号で示される画像とは異なるサイズの画像の出力信号を出力するように、前記映像信号を処理する映像信号処理装置であって、
    　符号化された前記映像信号を復号し復号信号を生成するデコーダと、
    　前記デコーダに接続され、前記デコーダが生成した復号信号を記憶しているデコードバッファと、
    　前記復号信号の１垂直同期期間内での映像有効期間が前記出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された前記復号信号を変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する復号信号変更部と、
    　出力された前記変更復号信号をメモリに書き込み読み出すことで、時間的に前後する前記変更復号信号を用いて前記変更復号信号のノイズを低減するとともに、前記変更復号信号がインタレース方式の場合に前記変更復号信号をインタレース方式からプログレッシブ方式に変換するＮＲ／ＩＰ変換部と
    　を備える映像信号処理装置。     A video signal processing apparatus that processes the video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal,
    A decoder that decodes the encoded video signal to generate a decoded signal;
    A decode buffer connected to the decoder and storing a decoded signal generated by the decoder;
    The decoding buffer using the decoded signal, which has been changed so that the video valid period within one vertical synchronization period of the decoded signal becomes the same value as the video valid period within one vertical synchronous period of the output signal, as a modified decoded signal A decoded signal changing unit that outputs the changed decoded signal read from
    Writing and reading out the output of the modified decoded signal to the memory reduces noise of the modified decoded signal by using the modified decoded signal that moves back and forth in time, and when the modified decoded signal is an interlace method, A video signal processing apparatus comprising: an NR / IP conversion unit that converts a modified decoded signal from an interlace system to a progressive system.
  2. 　前記ＮＲ／ＩＰ変換部は、符号化されていない映像信号である非圧縮信号が入力された場合に、前記非圧縮信号を前記メモリに書き込み読み出すことで、時間的に前後する前記非圧縮信号を用いて前記非圧縮信号のノイズを低減するとともに、前記非圧縮信号がインタレース方式の場合に前記非圧縮信号をインタレース方式からプログレッシブ方式に変換して出力し、
    　前記映像信号処理装置は、さらに、
    　前記ＮＲ／ＩＰ変換部が出力した非圧縮信号を前記デコードバッファに記憶させるとともに、前記非圧縮信号の１垂直同期期間内での映像有効期間が前記出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された前記非圧縮信号を変更非圧縮信号として前記デコードバッファから読み出し、読み出した前記変更非圧縮信号を出力する非圧縮信号変更部と、
    　前記ＮＲ／ＩＰ変換部に前記非圧縮信号が入力された場合に、前記デコーダに前記復号信号の生成を停止させる切替部とを備える
    　請求項１に記載の映像信号処理装置。     When an uncompressed signal that is an unencoded video signal is input, the NR / IP conversion unit writes the uncompressed signal into the memory and reads out the uncompressed signal that fluctuates in time. Using the non-compressed signal to reduce noise, and when the non-compressed signal is an interlace method, the non-compressed signal is converted from an interlace method to a progressive method and output,
    The video signal processing device further includes:
    The uncompressed signal output from the NR / IP converter is stored in the decode buffer, and the video valid period within one vertical synchronization period of the uncompressed signal is valid within one vertical synchronization period of the output signal. A non-compressed signal changing unit that reads the uncompressed signal changed to the same value as the period from the decode buffer as a changed uncompressed signal, and outputs the read changed uncompressed signal;
    The video signal processing apparatus according to claim 1, further comprising: a switching unit that causes the decoder to stop generating the decoded signal when the uncompressed signal is input to the NR / IP conversion unit.
  3. 　さらに、
    　前記非圧縮信号変更部が出力した変更非圧縮信号のフレームレートを前記出力信号のフレームレートに変換するフレームシンクロ部を備える
    　請求項２に記載の映像信号処理装置。     further,
    The video signal processing apparatus according to claim 2, further comprising: a frame synchronization unit that converts a frame rate of the modified uncompressed signal output from the uncompressed signal changing unit into a frame rate of the output signal.
  4. 　さらに、
    　前記非圧縮信号変更部が出力した変更非圧縮信号のフレームレートを前記出力信号のフレームレートに変換するフレームシンクロを、前記非圧縮信号変更部の前記デコードバッファとの書き込みと読み出しを用いて行うフレームシンクロ部を備える
    　請求項２に記載の映像信号処理装置。     further,
    A frame that performs frame synchronization for converting the frame rate of the modified uncompressed signal output by the uncompressed signal changing unit into the frame rate of the output signal by using writing and reading with the decode buffer of the uncompressed signal changing unit The video signal processing apparatus according to claim 2, further comprising a synchronization unit.
  5. 　前記復号信号変更部は、１垂直同期期間内での映像有効期間の割合を有効割合とし、前記復号信号の有効割合が前記出力信号の有効割合と同じ値になるように、前記復号信号の映像有効期間を変更して、変更した前記映像有効期間の復号信号を前記変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する
    　請求項１～４のいずれか１項に記載の映像信号処理装置。     The decoded signal changing unit sets the video effective period ratio within one vertical synchronization period as an effective ratio, and the decoded signal video is set so that the effective ratio of the decoded signal is equal to the effective ratio of the output signal. 5. The effective period is changed, the changed decoded signal of the video effective period is read from the decode buffer as the changed decoded signal, and the read changed decoded signal is output. Video signal processing device.
  6. 　前記復号信号変更部は、
    　１垂直同期期間内での垂直ライン数である垂直全ライン数に対する映像有効期間内での垂直ライン数である垂直有効ライン数の割合を前記有効割合とし、
    　前記変更復号信号の有効割合が前記出力信号の有効割合と同じ値になるように、前記復号信号の垂直全ライン数を変更して、変更した前記垂直全ライン数の復号信号を前記変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する
    　請求項５に記載の映像信号処理装置。     The decoded signal changing unit
    The ratio of the number of vertical effective lines, which is the number of vertical lines within the video effective period, to the total number of vertical lines, which is the number of vertical lines within one vertical synchronization period, is defined as the effective ratio,
    The total number of vertical lines of the decoded signal is changed so that the effective ratio of the modified decoded signal becomes the same value as the effective ratio of the output signal, and the decoded signal of the changed total number of vertical lines is changed to the modified decoded signal. The video signal processing apparatus according to claim 5, wherein the video signal processing apparatus reads out the decoded decoded signal from the decoding buffer and outputs the read modified decoded signal.
  7. 　前記復号信号変更部は、
    　前記復号信号の垂直有効ライン数を取得する取得部と、
    　取得された前記復号信号の垂直有効ライン数を用いて、前記変更復号信号の垂直全ライン数を算出する算出部と、
    　算出された前記垂直全ライン数に変更した前記変更復号信号を前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する読出部とを備える
    　請求項６に記載の映像信号処理装置。     The decoded signal changing unit
    An acquisition unit for acquiring the number of vertical effective lines of the decoded signal;
    A calculation unit that calculates the total number of vertical lines of the modified decoded signal using the obtained number of vertical effective lines of the decoded signal;
    The video signal processing apparatus according to claim 6, further comprising: a reading unit that reads the changed decoded signal changed to the calculated total number of vertical lines from the decode buffer and outputs the read changed decoded signal.
  8. 　前記取得部は、さらに、前記出力信号のフォーマットの種別を示す情報を取得し、
    　前記算出部は、取得された前記情報で示されるフォーマットに対応した前記出力信号の垂直全ライン数と垂直有効ライン数とをさらに用いて、前記変更復号信号の垂直全ライン数を算出する
    　請求項７に記載の映像信号処理装置。     The acquisition unit further acquires information indicating a format type of the output signal,
    The calculation unit further calculates the total number of vertical lines of the modified decoded signal by further using the total number of vertical lines and the number of effective vertical lines of the output signal corresponding to the format indicated by the acquired information. 8. The video signal processing device according to 7.
  9. 　さらに、
    　前記復号信号変更部が出力した変更復号信号にＯＳＤ（Ｏｎ　Ｓｃｒｅｅｎ　Ｄｉｓｐｌａｙ）信号を合成するＯＳＤ合成部を備え、
    　前記ＮＲ／ＩＰ変換部は、前記ＯＳＤ合成部がＯＳＤ信号を合成した変更復号信号のノイズを低減するとともに、前記変更復号信号をインタレース方式からプログレッシブ方式に変換する
    　請求項１～８のいずれか１項に記載の映像信号処理装置。     further,
    An OSD synthesis unit that synthesizes an OSD (On Screen Display) signal with the modified decoded signal output by the decoded signal modification unit;
    9. The NR / IP conversion unit reduces noise of a modified decoded signal obtained by synthesizing an OSD signal by the OSD synthesis unit, and converts the modified decoded signal from an interlace method to a progressive method. 2. A video signal processing apparatus according to item 1.
  10. 　前記デコーダは、三次元画像用の前記映像信号を復号した前記復号信号を生成し、
    　前記デコードバッファは、前記デコーダが生成した三次元画像用の前記復号信号を記憶しており、
    　前記復号信号変更部は、前記デコードバッファから、三次元画像用の前記変更復号信号を読み出し、出力する
    　請求項１～９のいずれか１項に記載の映像信号処理装置。     The decoder generates the decoded signal obtained by decoding the video signal for a three-dimensional image;
    The decode buffer stores the decoded signal for the 3D image generated by the decoder,
    The video signal processing device according to any one of claims 1 to 9, wherein the decoded signal changing unit reads out and outputs the changed decoded signal for a three-dimensional image from the decode buffer.
  11. 　入力される映像信号で示される画像とは異なるサイズの画像の出力信号を出力するように、前記映像信号を処理する映像信号処理装置による映像信号処理方法であって、
    　前記映像信号処理装置は、デコーダと、前記デコーダに接続され前記デコーダが生成した復号信号を記憶しているデコードバッファとを備え、
    　前記映像信号処理方法は、
    　前記デコーダが、符号化された前記映像信号を復号し復号信号を生成する復号ステップと、
    　前記復号信号の１垂直同期期間内での映像有効期間が前記出力信号の１垂直同期期間内での映像有効期間と同じ値になるように変更された前記復号信号を変更復号信号として前記デコードバッファから読み出し、読み出した前記変更復号信号を出力する復号信号変更ステップと、
    　出力された前記変更復号信号をメモリに書き込み読み出すことで、時間的に前後する前記変更復号信号を用いて前記変更復号信号のノイズを低減するとともに、前記変更復号信号がインタレース方式の場合に前記変更復号信号をインタレース方式からプログレッシブ方式に変換するＮＲ／ＩＰ変換ステップと
    　を含む映像信号処理方法。     A video signal processing method by a video signal processing apparatus that processes the video signal so as to output an output signal of an image having a size different from that of the image indicated by the input video signal,
    The video signal processing device includes a decoder, and a decode buffer connected to the decoder and storing a decoded signal generated by the decoder,
    The video signal processing method includes:
    A decoding step in which the decoder decodes the encoded video signal to generate a decoded signal;
    The decoding buffer using the decoded signal, which has been changed so that the video valid period within one vertical synchronization period of the decoded signal becomes the same value as the video valid period within one vertical synchronous period of the output signal, as a modified decoded signal And a decoded signal changing step for outputting the read changed decoded signal,
    Writing and reading out the output of the modified decoded signal to the memory reduces noise of the modified decoded signal by using the modified decoded signal that moves back and forth in time, and when the modified decoded signal is an interlace method, An NR / IP conversion step of converting a modified decoded signal from an interlaced method to a progressive method.
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