WO2011082857A3 - Production of a component - Google Patents

Production of a component Download PDF

Info

Publication number
WO2011082857A3
WO2011082857A3 PCT/EP2010/066447 EP2010066447W WO2011082857A3 WO 2011082857 A3 WO2011082857 A3 WO 2011082857A3 EP 2010066447 W EP2010066447 W EP 2010066447W WO 2011082857 A3 WO2011082857 A3 WO 2011082857A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
component
layer
production
producing
Prior art date
Application number
PCT/EP2010/066447
Other languages
German (de)
French (fr)
Other versions
WO2011082857A2 (en
Inventor
Georg Bischopink
Christina Leinenbach
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO2011082857A2 publication Critical patent/WO2011082857A2/en
Publication of WO2011082857A3 publication Critical patent/WO2011082857A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6835Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Weting (AREA)

Abstract

The invention relates to a method for producing a component. The method comprises providing a first substrate (110) and forming a layer arrangement (120) on the first substrate (110), wherein the layer arrangement (120) has at least one component layer (123). The method further comprises forming circuit structures in the region of the component layer (123) and providing a second substrate (150, 151). The invention further relates to producing a bond between the second substrate (150, 151) and the component layer (123) and carrying out an etching process for separating at least one part of the first substrate (110).
PCT/EP2010/066447 2009-12-15 2010-10-29 Production of a component WO2011082857A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102009054659.6 2009-12-15
DE200910054659 DE102009054659A1 (en) 2009-12-15 2009-12-15 Production of a component

Publications (2)

Publication Number Publication Date
WO2011082857A2 WO2011082857A2 (en) 2011-07-14
WO2011082857A3 true WO2011082857A3 (en) 2011-11-03

Family

ID=43636455

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2010/066447 WO2011082857A2 (en) 2009-12-15 2010-10-29 Production of a component

Country Status (3)

Country Link
DE (1) DE102009054659A1 (en)
TW (1) TW201126649A (en)
WO (1) WO2011082857A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3007576B1 (en) * 2013-06-19 2015-07-10 Soitec Silicon On Insulator METHOD OF TRANSFERRING A LAYER OF CIRCUITS.
FR3108777A1 (en) * 2020-03-24 2021-10-01 Commissariat à l'Energie Atomique et aux Energies Alternatives method of manufacturing a semiconductor structure by transferring thumbnails onto a support substrate
DE102021206965A1 (en) 2021-07-02 2023-01-05 Robert Bosch Gesellschaft mit beschränkter Haftung Method of manufacturing a silicon carbide semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020096717A1 (en) * 2001-01-25 2002-07-25 International Business Machines Corporation Transferable device-containing layer for silicon-on-insulator applications
DE102004023405A1 (en) * 2004-05-12 2005-12-15 Infineon Technologies Ag Dicing ultra-thin wafer in to multiple integrated circuits, by fixing carrier wafer to front of product wafer, forming separating trenches between integrated circuits
US20060199382A1 (en) * 2005-03-01 2006-09-07 Semiconductor Energy Laboratory Co., Ltd. Manufacturing Method of Semiconductor Device
DE102005047081A1 (en) * 2005-09-30 2007-04-05 Robert Bosch Gmbh Process for plasma-free etching of silicon with etching gas useful in production of deep structures such as through holes or troughs where silicon has one or more regions to be etched as layer on substrate or on substrate itself
US20080050858A1 (en) * 2006-08-22 2008-02-28 Sony Corporation Method for producing semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020096717A1 (en) * 2001-01-25 2002-07-25 International Business Machines Corporation Transferable device-containing layer for silicon-on-insulator applications
DE102004023405A1 (en) * 2004-05-12 2005-12-15 Infineon Technologies Ag Dicing ultra-thin wafer in to multiple integrated circuits, by fixing carrier wafer to front of product wafer, forming separating trenches between integrated circuits
US20060199382A1 (en) * 2005-03-01 2006-09-07 Semiconductor Energy Laboratory Co., Ltd. Manufacturing Method of Semiconductor Device
DE102005047081A1 (en) * 2005-09-30 2007-04-05 Robert Bosch Gmbh Process for plasma-free etching of silicon with etching gas useful in production of deep structures such as through holes or troughs where silicon has one or more regions to be etched as layer on substrate or on substrate itself
US20080050858A1 (en) * 2006-08-22 2008-02-28 Sony Corporation Method for producing semiconductor device

Also Published As

Publication number Publication date
WO2011082857A2 (en) 2011-07-14
DE102009054659A1 (en) 2011-06-16
TW201126649A (en) 2011-08-01

Similar Documents

Publication Publication Date Title
TW200711181A (en) Light-emitting device and manufacturing method thereof
FR2984599B1 (en) PROCESS FOR PRODUCING A SEMICONDUCTOR MICRO- OR NANO-FILM, SEMICONDUCTOR STRUCTURE COMPRISING SUCH A MICRO- OR NAN-WIRE, AND METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE
TW200717672A (en) Method of manufacturing wiring board
WO2009056235A3 (en) Multilayer system comprising contact elements, and method for the production of a contact element for a multilayer system
WO2010059868A3 (en) Method and apparatus for trench and via profile modification
WO2009105367A3 (en) Integrated circuit package and method of manufacturing same
WO2011076369A3 (en) Method for the production of conical nanostructures on substrate surfaces
WO2009049958A3 (en) Composite comprising at least two semiconductor substrates and production method
WO2014083507A3 (en) Semiconductor structure and method for manufacturing a semiconductor structure
WO2010011009A9 (en) Metal substrate for an electronic component module, module comprising same, and method for manufacturing a metal substrate for an electronic component module
WO2010096473A3 (en) Semiconductor chip with reinforcement layer
WO2009143026A3 (en) Method of forming an electronic device using a separation technique
WO2007117829A3 (en) Method for bonding a semiconductor substrate to a metal substrate
WO2011025149A3 (en) Method for manufacturing a semiconductor substrate and method for manufacturing a light-emitting device
TW200746262A (en) Method of manufacturing nitride semiconductor substrate and composite material substrate
WO2008084524A1 (en) Process for producing semiconductor device and apparatus for semiconductor device production
WO2010143895A3 (en) Semiconductor substrate, semiconductor device, and manufacturing methods thereof
WO2007121735A3 (en) Composite substrate, and method for the production of a composite substrate
WO2009003464A3 (en) Surface-covering structure and method for producing a surface-covering structure
WO2008155087A3 (en) Plasma reactor, and method for the production of monocrystalline diamond layers
WO2010139499A3 (en) Micromechanical component with and method for producing an eutectic connection between two substrates and method for producing said type of micromechanical component
SG162774A1 (en) Interconnect capping layer and method of fabrication
WO2011082857A3 (en) Production of a component
WO2013017466A9 (en) Optoelectronic component and method for producing an optoelectronic component
WO2010098624A3 (en) Substrate having uneven portion thereon, and method for manufacturing solar cell using the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10778921

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 10778921

Country of ref document: EP

Kind code of ref document: A2