WO2011082857A3 - Production of a component - Google Patents
Production of a component Download PDFInfo
- Publication number
- WO2011082857A3 WO2011082857A3 PCT/EP2010/066447 EP2010066447W WO2011082857A3 WO 2011082857 A3 WO2011082857 A3 WO 2011082857A3 EP 2010066447 W EP2010066447 W EP 2010066447W WO 2011082857 A3 WO2011082857 A3 WO 2011082857A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- component
- layer
- production
- producing
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Weting (AREA)
Abstract
The invention relates to a method for producing a component. The method comprises providing a first substrate (110) and forming a layer arrangement (120) on the first substrate (110), wherein the layer arrangement (120) has at least one component layer (123). The method further comprises forming circuit structures in the region of the component layer (123) and providing a second substrate (150, 151). The invention further relates to producing a bond between the second substrate (150, 151) and the component layer (123) and carrying out an etching process for separating at least one part of the first substrate (110).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102009054659.6 | 2009-12-15 | ||
DE200910054659 DE102009054659A1 (en) | 2009-12-15 | 2009-12-15 | Production of a component |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2011082857A2 WO2011082857A2 (en) | 2011-07-14 |
WO2011082857A3 true WO2011082857A3 (en) | 2011-11-03 |
Family
ID=43636455
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2010/066447 WO2011082857A2 (en) | 2009-12-15 | 2010-10-29 | Production of a component |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE102009054659A1 (en) |
TW (1) | TW201126649A (en) |
WO (1) | WO2011082857A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3007576B1 (en) * | 2013-06-19 | 2015-07-10 | Soitec Silicon On Insulator | METHOD OF TRANSFERRING A LAYER OF CIRCUITS. |
FR3108777A1 (en) * | 2020-03-24 | 2021-10-01 | Commissariat à l'Energie Atomique et aux Energies Alternatives | method of manufacturing a semiconductor structure by transferring thumbnails onto a support substrate |
DE102021206965A1 (en) | 2021-07-02 | 2023-01-05 | Robert Bosch Gesellschaft mit beschränkter Haftung | Method of manufacturing a silicon carbide semiconductor device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020096717A1 (en) * | 2001-01-25 | 2002-07-25 | International Business Machines Corporation | Transferable device-containing layer for silicon-on-insulator applications |
DE102004023405A1 (en) * | 2004-05-12 | 2005-12-15 | Infineon Technologies Ag | Dicing ultra-thin wafer in to multiple integrated circuits, by fixing carrier wafer to front of product wafer, forming separating trenches between integrated circuits |
US20060199382A1 (en) * | 2005-03-01 | 2006-09-07 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing Method of Semiconductor Device |
DE102005047081A1 (en) * | 2005-09-30 | 2007-04-05 | Robert Bosch Gmbh | Process for plasma-free etching of silicon with etching gas useful in production of deep structures such as through holes or troughs where silicon has one or more regions to be etched as layer on substrate or on substrate itself |
US20080050858A1 (en) * | 2006-08-22 | 2008-02-28 | Sony Corporation | Method for producing semiconductor device |
-
2009
- 2009-12-15 DE DE200910054659 patent/DE102009054659A1/en not_active Withdrawn
-
2010
- 2010-10-29 WO PCT/EP2010/066447 patent/WO2011082857A2/en active Application Filing
- 2010-12-13 TW TW99143449A patent/TW201126649A/en unknown
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020096717A1 (en) * | 2001-01-25 | 2002-07-25 | International Business Machines Corporation | Transferable device-containing layer for silicon-on-insulator applications |
DE102004023405A1 (en) * | 2004-05-12 | 2005-12-15 | Infineon Technologies Ag | Dicing ultra-thin wafer in to multiple integrated circuits, by fixing carrier wafer to front of product wafer, forming separating trenches between integrated circuits |
US20060199382A1 (en) * | 2005-03-01 | 2006-09-07 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing Method of Semiconductor Device |
DE102005047081A1 (en) * | 2005-09-30 | 2007-04-05 | Robert Bosch Gmbh | Process for plasma-free etching of silicon with etching gas useful in production of deep structures such as through holes or troughs where silicon has one or more regions to be etched as layer on substrate or on substrate itself |
US20080050858A1 (en) * | 2006-08-22 | 2008-02-28 | Sony Corporation | Method for producing semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
WO2011082857A2 (en) | 2011-07-14 |
DE102009054659A1 (en) | 2011-06-16 |
TW201126649A (en) | 2011-08-01 |
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