WO2011078650A2 - Procédé de fabrication de canaux nanofluidiques - Google Patents
Procédé de fabrication de canaux nanofluidiques Download PDFInfo
- Publication number
- WO2011078650A2 WO2011078650A2 PCT/MY2010/000316 MY2010000316W WO2011078650A2 WO 2011078650 A2 WO2011078650 A2 WO 2011078650A2 MY 2010000316 W MY2010000316 W MY 2010000316W WO 2011078650 A2 WO2011078650 A2 WO 2011078650A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- nanowires
- oxide
- polysilicon
- layer
- substrate
- Prior art date
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00055—Grooves
- B81C1/00071—Channels
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L2200/00—Solutions for specific problems relating to chemical or physical laboratory apparatus
- B01L2200/02—Adapting objects or devices to another
- B01L2200/025—Align devices or objects to ensure defined positions relative to each other
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L2200/00—Solutions for specific problems relating to chemical or physical laboratory apparatus
- B01L2200/06—Fluid handling related problems
- B01L2200/0647—Handling flowable solids, e.g. microscopic beads, cells, particles
- B01L2200/0663—Stretching or orienting elongated molecules or particles
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L2300/00—Additional constructional details
- B01L2300/08—Geometry, shape and general structure
- B01L2300/0896—Nanoscaled
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502761—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip specially adapted for handling suspended solids or molecules independently from the bulk fluid flow, e.g. for trapping or sorting beads, for physically stretching molecules
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/05—Microfluidics
- B81B2201/058—Microfluidics not provided for in B81B2201/051 - B81B2201/054
Definitions
- the present invention relates to a method to fabricate nanofluidic flow channels where a combination of silicon and oxide based nanowires and wafer planarization techniques are utilized to form the required channels.
- Nanofluidic flow channel has increasing application demands in the area of biomedical analysis and environmental monitoring. These nanoscale channels are important for nanobiology where by miniaturizing the flow channels; researchers could facilitate the detection of individual DNA molecules and proteins by passing one through the channel. Nanofluidic channels also serve as useful tools for chemical analysis systems.
- nanofluidic flow channels There are several methods to produce nanofluidic flow channels. Presently, these channels are fabricated via conventional microfabrication methods such as masking and etching which rely on resolution of lithographic tools or complicated lithographic methods.
- a prior art includes a method of forming nanofluidic enclosed channels by providing a first substrate having a layer of a first material disposed thereon. A plurality of nanoscale slots is formed along a second substrate using nanolithography, etching or other disclosed techniques. The first substrate is then bonded to the second substrate such that the layer of the first material on the first substrate is adjacent to the plurality of slots on the second substrate to define a plurality of enclosed nanofluidic channels there-through.
- This method uses a combination of nanoimprint lithography and reactive ion etching and requires a mold to be made in polymer for pattern transfer. The method also requires the use of thermal plastic material (PMMA). The channel dimension is dependant on Uthographic resolution while the surface properties are dependant on the type of polymer material used.
- the present invention is made in view of the prior arts described above where the process does not require high end lithographic tool and therefore able to provide a simple and practical solution for low cost fabrication of nanofluidic channel.
- the method is a single lithography process which uses nanowires to form the required channels and the resolution of the channels is dependent on the nanowires resolution and not on the lithographic tool or type of resist used. This method is also compatible with standard CMOS process which makes it easy to be integrated on the same platform as other nanofluidic devices and systems fabricated using similar methods.
- NEM nanoelectromechanical
- the present invention relates to a method to fabricate nanofluidic channels where a combination of silicon and oxide based nanowires and wafer planarization techniques are utilized to form the required channels.
- the process provides a simple and practical solution for low cost fabrication of nanofluidic channel with well controlled dimensions.
- the method is a single lithography process which uses nanowires to form the required channels and the resolution of the channels is dependent on the resolution of the nanowires instead of on the lithographic tool or type of resist used as required in the prior art methods. This is a very cost effective method to produce final high resolution final structures with extremely good alignment which is also compatible with standard CMOS process allowing easy integration on the same platform with other nanofluidic devices and systems fabricated using similar methods.
- Fig. 1 is a flow chart showing the fabrication process of nanofluidic channels as described according to the method of this invention.
- Fig. 2A is a cross-sectional drawing of nitride layer deposition on to substrate.
- Fig. 2B is a cross-sectional drawing of lithographically pattern etching of nitride layer on substrate.
- Fig. 2C is a cross-sectional drawing of oxide layer deposition on to substrate.
- Fig. 2D is a cross-sectional drawing of oxide spacer formation.
- Fig. 2E is a cross-sectional drawing of oxide nanowire formation.
- Fig. 2F is a cross-sectional drawing of polysilicon layer deposition on to entire
- Fig. 2G is a cross-sectional drawing of polysilicon layer planarization to form a planar layer with the oxide nanowires.
- Fig. 2H is a cross-sectional drawing of nano-channels formation.
- Fig. 21 is a cross-sectional drawing of channel encapsulation completing the embodiment of nano-channels utilizing oxide nanowires.
- Fig. 3A is a cross-sectional drawing of oxide layer deposition on to substrate.
- Fig. 3B is a cross-sectional drawing of lithographically pattern etching of oxide layer on substrate.
- Fig. 3C is a cross-sectional drawing of polysilicon layer deposition on to substrate.
- Fig. 3D is a cross-sectional drawing of polysilicon spacer formation.
- Fig. 3E is a cross-sectional drawing of polysilicon nanowire formation.
- Fig. 3F is a cross-sectional drawing of oxide layer deposition on to entire substrate surface.
- Fig. 3G is a cross-sectional drawing of oxide layer planarization to form a planar layer with the polysilicon nanowires.
- Fig. 3H is a cross-sectional drawing of nano-channels formation.
- Fig. 31 is a cross-sectional drawing of channel encapsulation completing the embodiment of nano-channels utilizing polysilicon nanowires.
- Fig. 4A is a cross-sectional drawing of nitride layer deposition on to substrate.
- Fig. 4B is a cross-sectional drawing of polysilicon layer deposition on to nitride layer.
- Fig. 4C is a cross-sectional drawing of lithographically pattern etching of polysilicon layer.
- Fig. 4D is a cross-sectional drawing of oxide layer deposition on to substrate.
- Fig. 4E is a cross-sectional drawing of oxide spacer formation.
- Fig. 4F is a cross-sectional drawing of oxide nanowire formation.
- Fig. 4G is a cross-sectional drawing of polysilicon layer deposition on to entire nitride layer surface.
- Fig. 4H is a cross-sectional drawing of polysilicon layer planarization to form a planar layer with the oxide nanowires.
- Fig. 41 is a cross-sectional drawing of nano-channels formation.
- Fig. 4J is a cross-sectional drawing of channel encapsulation completing the embodiment of nano-channels on nitride insulator utilizing oxide nanowires.
- the invention involves a method to greatly simplify the fabrication of nanofluidic channels with well controlled dimensions.
- the key process is the ability to integrate a CMOS based nanowire offering a high throughput and cheaper solution compared to other methods.
- the main feature of the method is the utilization of nanowires to form the channels and the dimension of the wires dictates the final dimensions of the channels.
- silicon or oxide based nanowires can be used to produce the channel structures. Resolution of nanowires is defined by thin film deposition process and not by high end lithographic tools.
- the nano-channels can also be fabricated directly on the substrate [20] or on an intermediate insulating layer.
- FIG. 1 A typical process flow chart is presented in Fig. 1. The fabrication process is split into 3 stages comprising of nanowire formation [22], nano-fluidic channel structure formation [23] and finally channel encapsulation [25].
- Fig. 2A to Fig. 21 shows a typical fabrication process of the nanofluidic channels directly on silicon or glass substrates [20] utilizing oxide nanowires [22].
- stage 1 oxide nanowires are formed within 5 steps.
- a layer of insulator such as nitride [24] is deposited on to the substrate [20].
- This is followed by lithographic patterning and etching of the nitride layer [24].
- the mask leaves a pattern where nanowires or nanofluidic channels are to be located.
- a thin layer of oxide [26] is deposited. The thickness of the oxide layer [26] will determine the final channel dimensions.
- the next step is to dry etch the oxide to form spacer type structures, oxide spacer [28] and lastly the removal of nitride in phosphoric acid, leaving only oxide nanowires [22] structures.
- stage 2 formation of nanofluidic channel, achieved within three steps. Firstly, a thick layer of polysilicon [30] is deposited to cover the entire substrate [20] surface. Then the polysilicon [30] is planarized to form a planar layer with the oxide nanowires [22]. Planarization is achieved through either an etch-back type process or by chemical mechanical polishing (CMP). Lastly, the nano-channels [23] are formed by selectively removing or etching of the oxide nanowires [22].
- CMP chemical mechanical polishing
- stage 3 The last stage completes the fabrication of nanofluidic channel of this invention.
- channel encapsulation is conducted by bonding another substrate [20] or polymer film on to the nanofluidic channel substrate.
- nanofluidic channel [23] is encapsulated between both structures [20].
- stage 1 polysilicon nanowires are formed within 5 steps. Firstly, a layer of oxide [26] is deposited on to the substrate [20]. This is followed by lithographic patterning and etching of the oxide layer [26]. The mask leaves a pattern where nanowires are to be located. Then, a thin layer of polysilicon [30] is deposited. The thickness of the polysilicon layer [30] will determine the final channel dimensions. The next step is to dry etch the polysilicon to form spacer type structures, polysilicon spacer [34] and lastly the removal of oxide in phosphoric acid, leaving only polysilicon nanowires [22B] structures.
- stage 2 formation of nanofluidic channel, achieved within three steps. Firstly, a thick layer of oxide [26] is deposited to cover the entire substrate [20] surface. Then the oxide layer [26] is planarized to form a planar layer with the polysilicon nanowires [22B]. Planarization is achieved through either an etch-back type process or by chemical mechanical polishing (CMP). Lastly, the nano-channels [23] are formed by selectively removing or etching of the polysilicon nanowires [22B].
- CMP chemical mechanical polishing
- stage 3 channel encapsulation is conducted by bonding another substrate [20] or polymer film on to the channel substrate. Hence, nanofluidic channel [23] is created between both structures [20].
- the nano-fluidic channels are not formed directly onto a silicon substrate [20]. Therefore, an insulating layer such as nitride [24] is required as an interim material between the fluid and substrate.
- stage 1 which is the inclusion of the required nitride passivation layer [24] as shown in Fig. 4B.
- Fig. 4 A to Fig. 4J shows the typical fabrication process of the nanofluidic channels on nitride insulator [24] utilizing oxide nanowires [22].
- any combination of nanowires and materials can be used to form the desired channels.
- the invention disclosed a method to fabricate nanofluidic channel. It is the combination of the above features and its technical advantages give rise to the uniqueness of such invention.
- the descriptions above contain much specificity, these should not be construed as limiting the scope of the embodiment but as merely providing illustrations of some of the presently preferred embodiments.
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Analytical Chemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dispersion Chemistry (AREA)
- General Health & Medical Sciences (AREA)
- Hematology (AREA)
- Clinical Laboratory Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Thin Film Transistor (AREA)
- Physical Or Chemical Processes And Apparatus (AREA)
Abstract
La présente invention concerne un procédé de fabrication de canaux nanofluidiques (23) combinant la formation de nanofils de silicium (22B) ou de nanofils d'oxyde (22) sur un substrat de traitement (20) revêtu ou non de matériau isolant, au moyen de techniques de planarisation de plaquettes. Le procédé de l'invention offre une solution simple et pratique de fabrication à faible coût d'un canal nanofluidique aux dimensions bien maîtrisées, la résolution des canaux étant tributaire de celle des nanofils plutôt que de l'outil lithographique ou du type de résistance utilisé. Ce procédé est compatible avec le procédé CMOS standard, ce qui permet une intégration facile sur la même plate-forme avec d'autres dispositifs et systèmes nanofluidiques fabriqués par des méthodes similaires.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI20097035 | 2009-12-22 | ||
MYPI20097035A MY168162A (en) | 2009-12-22 | 2009-12-22 | Method for fabricating nanofluidic channels |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2011078650A2 true WO2011078650A2 (fr) | 2011-06-30 |
WO2011078650A3 WO2011078650A3 (fr) | 2011-12-22 |
Family
ID=44196366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/MY2010/000316 WO2011078650A2 (fr) | 2009-12-22 | 2010-12-13 | Procédé de fabrication de canaux nanofluidiques |
Country Status (2)
Country | Link |
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MY (1) | MY168162A (fr) |
WO (1) | WO2011078650A2 (fr) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9643179B1 (en) | 2016-06-24 | 2017-05-09 | International Business Machines Corporation | Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors |
DE102020202262A1 (de) | 2020-02-21 | 2021-08-26 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer nanoskaligen Kanalstruktur |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7077725B2 (en) * | 1999-11-29 | 2006-07-18 | Applied Materials, Inc. | Advanced electrolytic polish (AEP) assisted metal wafer planarization method and apparatus |
US7189635B2 (en) * | 2004-09-17 | 2007-03-13 | Hewlett-Packard Development Company, L.P. | Reduction of a feature dimension in a nano-scale device |
US20090263912A1 (en) * | 2004-05-13 | 2009-10-22 | The Regents Of The University Of California | Nanowires and nanoribbons as subwavelength optical waveguides and their use as components in photonic circuits and devices |
-
2009
- 2009-12-22 MY MYPI20097035A patent/MY168162A/en unknown
-
2010
- 2010-12-13 WO PCT/MY2010/000316 patent/WO2011078650A2/fr active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7077725B2 (en) * | 1999-11-29 | 2006-07-18 | Applied Materials, Inc. | Advanced electrolytic polish (AEP) assisted metal wafer planarization method and apparatus |
US20090263912A1 (en) * | 2004-05-13 | 2009-10-22 | The Regents Of The University Of California | Nanowires and nanoribbons as subwavelength optical waveguides and their use as components in photonic circuits and devices |
US7189635B2 (en) * | 2004-09-17 | 2007-03-13 | Hewlett-Packard Development Company, L.P. | Reduction of a feature dimension in a nano-scale device |
Non-Patent Citations (1)
Title |
---|
CHOI, YANG-KYU. ET AL.: 'Sub-Lithographic Patterning Technology for Nanowire Model Catalysts and D NA Label-Free Hybridization Detection' PROCEEDINGS OF SPIE vol. 5220, 2003, BELLINGHAM, WA, page 17 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9643179B1 (en) | 2016-06-24 | 2017-05-09 | International Business Machines Corporation | Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors |
US9891189B2 (en) | 2016-06-24 | 2018-02-13 | International Business Machines Corporation | Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors |
DE102020202262A1 (de) | 2020-02-21 | 2021-08-26 | Robert Bosch Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer nanoskaligen Kanalstruktur |
WO2021165191A1 (fr) * | 2020-02-21 | 2021-08-26 | Robert Bosch Gmbh | Procédé de fabrication d'une structure de canal d'échelle nanométrique |
Also Published As
Publication number | Publication date |
---|---|
MY168162A (en) | 2018-10-11 |
WO2011078650A3 (fr) | 2011-12-22 |
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