WO2011026298A1 - Amplificateur de puissance multi-modes - Google Patents

Amplificateur de puissance multi-modes Download PDF

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Publication number
WO2011026298A1
WO2011026298A1 PCT/CN2009/076243 CN2009076243W WO2011026298A1 WO 2011026298 A1 WO2011026298 A1 WO 2011026298A1 CN 2009076243 W CN2009076243 W CN 2009076243W WO 2011026298 A1 WO2011026298 A1 WO 2011026298A1
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Prior art keywords
stage
output stage
switch
matching network
power output
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PCT/CN2009/076243
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English (en)
Chinese (zh)
Inventor
余正明
Original Assignee
惠州市正源微电子有限公司
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Publication of WO2011026298A1 publication Critical patent/WO2011026298A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0277—Selecting one or more amplifiers from a plurality of amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/387—A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21136—An input signal of a power amplifier being on/off switched
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21139—An impedance adaptation circuit being added at the output of a power amplifier stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21142—Output signals of a plurality of power amplifiers are parallel combined to a common output
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7215—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by a switch at the input of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7236—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers by (a ) switch(es)

Definitions

  • the present invention relates to the field of power amplifiers, and more particularly to a multi-mode power amplifier having a switch control load.
  • a power amplifier is a key module in a wireless communication system. It is mainly used to amplify a modulated RF signal to a specific power value and then transmit it through an antenna. In TD-SCDMA/CDMA/WCDMA systems, many users share the same spectrum. In order to increase the capacity of the entire system, the base station sends a control command to the mobile phone through the radio frequency signal, and then each mobile phone must follow this control command. Adjust its transmit power.
  • the field statistics show that the transmission power of most of the TD-SCDMA/CDMA/WC DMA mobile phones is in the medium and low power level mode; and because the power amplifier is the most power-consuming module in the wireless transceiver, it reduces Its own power consumption also increases its efficiency, especially in low-power mode, which is especially important for extending the use of mobile phone batteries.
  • the parallel dual-channel power amplifier is not the same.
  • the first-channel power amplifier operates, and the second-channel power amplifier is turned off.
  • the switch-controlled load-matching network is given according to the received control signal.
  • the first channel power amplifier provides a lower impedance load; in the low power mode, the first channel power amplifier Shutdown, while the second channel power amplifier is operating normally, the switch control load matching network provides a higher impedance load to the second channel power amplifier based on the control signal.
  • the advantage of Chen's invention over the prior art is that it uses a parallel dual-channel power amplifier with a switch-controlled load that includes a high-power mode and a low-power mode. In high power mode, the low power mode channel is inactive, passing power from the high power mode channel to the output, and vice versa.
  • Chen proposed a power amplifier circuit that improves the efficiency of the power amplifier in low-power mode by controlling the load-matching network by using a switch to improve the battery life of the handset.
  • Chen's inventive circuit (see Figure 3 of Chen's invention) is cited in Figure 1 as a patent.
  • the switch control load matching network uses 1/4 transmission line to achieve impedance transformation.
  • the high resistance R_H at port Z2 is equal to (Z_ m)2 /R_L, when we want to adjust the impedance R_H Value ⁇ , without affecting the high power mode, we can only achieve by changing Z_m.
  • the resistance value at the point is adjusted to the value we want.
  • the present invention aims to solve the low-power mode efficiency of the radio frequency power amplifier caused by the switch insertion loss and the like in the prior art, and the average efficiency is low, and the matching network circuit is complicated and the design difficulty is The big problem is to provide a multi-mode power amplifier with stable performance, high average efficiency and relatively simple circuit.
  • a power amplifier comprising:
  • a switch connected to the output stage controls the load matching network, which provides an optimum output load impedance to the output stage based on the power range.
  • driver stage has a variable gain mode
  • the output stage comprises a high power output stage and a low power output stage.
  • impedance transformation network one whose first node is connected to a low power output stage, and the second node is connected to a high power output stage;
  • impedance transformation network 2 the first node is connected to the high power output stage, the second node is connected to the load; [20] a switch whose first node is connected to the low power output stage;
  • a capacitor having a first node connected to a second node of the switch and a second node connected to ground, the switch being controlled by a bias switch controller.
  • the power amplifier further includes an inter-stage matching network for reducing signal reflection between the driver stage and the output stage.
  • the inter-stage matching network includes a switch for increasing the isolation between the high power mode channel and the low power mode channel, and an interstage matching network. 1.
  • Inter-stage matching network 1 The inter-stage matching network 2 is sequentially connected in series between the driving stage and the high power output stage, and the switching and inter-stage matching network 1 and the inter-stage matching network have a common point and are connected to the low power output stage through the inter-stage matching network 3, the switch Controlled by a bias switch controller.
  • Peer, switch control load matching network includes,
  • impedance transformation network one, the first node is connected to the low power output stage, and the second node is connected to the high power output stage;
  • impedance transformation network 2 the first node is connected to the high power output stage, and the second node is connected to the load; [26] a switch whose first node is connected to the third node of the impedance transformation network one, the second node Connected to the ground
  • the impedance conversion network includes an inductor connected to the high power output stage and the low power output stage, and a grounded capacitor is connected between the inductor and the low power output stage.
  • the impedance transformation network 2 includes an inductor and a capacitor connected in series therewith, and a grounded capacitor is connected between the inductor and the capacitor.
  • the present invention can improve the efficiency in the low power mode without affecting the efficiency of the power amplifier in the high power mode, thereby prolonging the use of the battery, stable performance, high average efficiency, and relatively simple circuit.
  • Figure 1 is a circuit diagram of the invention of U.S. Patent 7,135,919 B2;
  • FIG. 2 is a block schematic diagram of a power amplifier of the present invention
  • FIG. 3 is a circuit schematic diagram of the power amplifier of the present invention.
  • FIG. 4 is a schematic diagram of another switch control load matching network circuit of the present invention.
  • FIG. 2 illustrates a multi-mode power amplifier 200 of the present invention.
  • the power amplifier 200 includes a driver stage 210, an output stage, an inter-stage matching network 275 connected between the driver stage 210 and the output stage, and an input matching network 205 at the front end of the driver stage 210.
  • the output stage includes two output stages of a high power output stage 225 and a low power output stage 240; the drive stage 2 10 has a variable gain amplification mode.
  • Each output stage, variable gain drive stage 210, interstage matching network 275, and switch control load matching network 280 are controlled by a bias switch controller 270 coupled thereto.
  • the high power output stage 225 operates, while the low power output stage 240 is turned off, and the driver stage operates in a high gain mode, and the switch control load matching network 280 selectively selects high based on the received control signal.
  • Power output stage 225 provides a low resistance load; in low power mode, low power output stage 240 operates, while high power output stage 225 is turned off, and driver stage 210 operates in a low gain mode, and switch control load matching network 280 is bias based.
  • the control signal provided by switch controller 270 provides a high impedance load to low power output stage 240.
  • the high power mode shares a driver stage with the low power mode. Therefore, the power amplifier requires only one input matching network 205 to reduce input signal reflection, and the ⁇ drive stage uses variable gain.
  • the driver stage 210 amplifies the input signal, and in the high power mode, the driver stage 210 operates in a high gain mode; in the low power mode, based on receiving a control signal from the bias switch controller 270, the driver stage 210 reduces itself by The bias current operates in a low gain mode. ⁇ In this way, can Improve the efficiency of the power amplifier in low power mode without affecting the efficiency of the power amplifier's high power mode.
  • the interstage matching network 275 is connected between the driver stage and the output stage. First, it can convert the input resistance of the output stage to a higher impedance to provide load to the driver stage 210. A higher load impedance helps. In order to improve the gain of the driver stage 210, the same can also improve the efficiency of the power amplifier. Second, the interstage matching network 275 can also reduce the reflection of the signal from the output stage to the driver stage 210 to improve the stability of the power amplifier.
  • the inter-stage matching network 275 further includes an inter-stage matching network 215, an inter-stage matching network 220, an inter-stage matching network 235, and an inter-stage matching network 215 and an inter-stage.
  • Matching switch 230 between network three 235, this switch is used to increase the isolation of the low power channel relative to the high power channel.
  • the inter-stage matching network 215 is directly connected to the driver stage 210, and the inter-stage matching network 220 is connected between the inter-stage matching network 215 and the high power output stage 225, and the inter-stage matching network 235 and the low power output stage 240. connection.
  • switch 230 In the high power mode, switch 230 is turned off so that the signal output from driver stage 210 does not leak to low power output stage 240; in low power mode, switch 230 conducts and delivers a signal to the output. Considering that at low power levels, the signal leakage from the driver stage 210 to the off output stage 225 is negligible, there is no need to add a switch to the high power path to increase isolation.
  • the two output stages of the parallel connection include a high power output stage 225 and a low power output stage 240 for further amplifying the signal amplified by the driver stage 210.
  • high power output stage 225 operates, low power output stage 240 is turned off, high power output stage 225 is used to amplify the signal and deliver a high level of power to a low impedance load; in low power mode, low power output stage
  • the 240 operation high power output stage 225 is turned off, and the low power output stage 240 is used to amplify the signal and deliver a medium to low level power to a high impedance load.
  • the low-resistance and high-resistance loads mentioned above are controlled by the switch-controlled load matching network 280 based on the control signal. In this way, the power amplifier can efficiently amplify a signal over a wide power range.
  • the switch control load matching network 280 includes an impedance transformation network 255, an impedance transformation network 260, a switch 245, and a capacitor 250 for providing an optimum load to the output stage.
  • the impedance transformation network 255 includes an impedance transformation network 255, an impedance transformation network 260, a switch 245, and a capacitor 250 for providing an optimum load to the output stage.
  • the impedance transformation network 255 includes an impedance transformation network 255, an impedance transformation network 260, a switch 245, and a capacitor 250 for providing an optimum load to the output stage.
  • the first node is connected to the high power output stage 225, the second node is connected to the load; the first node of the switch 245 is connected to the low power output stage 240; the first node of the capacitor 250 is connected to the second node of the switch 245, and the second node is connected to the ground.
  • switch 245 is controlled by a bias switch controller, i.e., switch 245 and capacitor 250 are connected in series between impedance transform network 255 and ground.
  • the impedance transformation network two 260 is used to convert the load impedance (for example, a 50 ⁇ antenna) into a low resistance; the impedance transformation network 255 is used to convert the low resistance at the port Z1 in the high power mode to the high resistance at the port Z2, And converting the low resistance at port Z3 in low power mode to the high impedance at port Z1; capacitor 250 is a bypass capacitor that is used to provide an alternating ground for switch 245.
  • switch 245 is turned on, and the impedance conversion network converts 255 the ground resistance to a high impedance at port Z2 (relative to the impedance at port Z3), thus leaking from high power output stage 225 to low The signal of the power channel is negligible.
  • the high power output stage 225 transmits a high level of power to the low impedance load at port Z3; in the low power mode, switch 245 is turned off, and the impedance conversion network 255 converts the low resistance at port Z3 to a high at port Z1. Resistance.
  • the low power output stage 240 will deliver a medium to low level of power to the high impedance at port Z1. In this way, the power amplifier will achieve high efficiency over a wide power range, thus extending the battery life of the mobile phone as much as possible.
  • the switch control load matching network 280 in this embodiment does not include any transmission line, and thus the switch control load matching network 280 conforms to the current trend toward small size and high integration.
  • the second point is that in the high power mode, since the output of the low power output stage 240 is an effective AC ground, the voltage swing at the output node of the low power output stage 240 is small, which helps to improve the amplifier. Stability.
  • FIG 3 is a detailed circuit diagram of the power amplifier of Figure 2 in the present invention.
  • the power amplifier includes an input matching network 305, a driver stage 310, an interstage matching network 315, two output stages, a switch control load matching network 360, and a bias switch controller 370.
  • the high power output stage 320 operates, the low power output stage 325 is turned off, and the driver stage 310 operates in a high gain mode.
  • the switch control load matching network 360 selectively provides a low impedance load to the high power output stage 320 based on the received control signal; in the low power mode, the low power output stage 325 operates, the high power output stage 320 is turned off, and the driver stage 310 operates in a low gain mode by reducing its own bias current in accordance with a control signal of the bias switch controller 370.
  • the switch control load matching network 360 is based on a control signal of the bias switch controller The number provides a high resistance load to the low power output stage 325.
  • both the driver stage and the output stage are transistors, and the size and bias current of the transistor are optimized according to the power range to be amplified; the input matching network 305 and the inter-stage matching network 315 The network is implemented so that the harmonics in the signal can be effectively reduced while reducing the signal reflection.
  • the input matching network 305 is composed of two capacitors connected in series and an inductor grounded between the two capacitors.
  • the inter-stage matching network 315 The inter-stage matching network 1, the inter-stage matching network 2 and the inter-stage matching network are all capacitors; the switch control load matching network 360 includes a switch 330, a capacitor 335, an impedance transformation network 340, and an impedance transformation network 2350.
  • the two impedance transformation networks are composed of an inductor and a capacitor; the low power output stage 325 and the high power output stage 320 are both transistors.
  • switch 330 is turned on, and impedance conversion network 340 converts the ground resistance at port Z1 to a high impedance at port Z2 (relative to the resistance at port Z3), thus moving from high power output stage 320
  • the impedance of the switch control load matching network 360 is mainly determined by the impedance at the port Z3, and the impedance at the port Z3 is a low resistance converted by the impedance conversion network 2350 to the antenna load, and therefore, from the high power output stage.
  • the signal that 320 leaks into the low power channel is small.
  • switch 330 In the low power mode, switch 330 is turned off and the impedance conversion network 340 converts the low impedance at port Z3 to a high impedance at port Z1 and provides it to the low power output stage 325 as an output load. Because the low power output stage requires only one medium and low level of power to be delivered in low power mode, a relatively large output load helps improve the efficiency of the low power output stage. It should be noted that the parasitic capacitance of the switch 330 in the off state can be incorporated into the impedance conversion network as a whole, so that the performance of the power amplifier is not deteriorated.
  • the switch control load matching network 480 includes an impedance transformation network one 450, an impedance transformation network two 460, and a switch 430.
  • the first node of the impedance transformation network 450 is connected to the low power output stage 420, and the second node is connected to the high power output stage 4 10; the first node of the impedance transformation network 460 is connected to the high power output stage 410, and the second node is connected to The load is connected; the first node of the switch 430 is connected to the third node of the impedance transformation network 450, and the second node is connected to the ground.
  • Impedance Transform Network 460 is used to convert the antenna load to a low impedance.
  • the high power output stage 410 operates while the low power output stage 420 is turned off, in order to reduce the high power output stage 410 to low power.
  • the signal leakage of the rate channel, the impedance seen from the high power output stage 410 to the impedance conversion network 450 at port Z2 must be a high impedance.
  • the switch 430 Since the switch 430 is turned on in the high power mode, and the capacitor 435 is a bypass capacitor that is much larger than the capacitor 440, the output port of the low power output stage 420 appears as a good AC ground, and then the impedance transform network A 450 ground resistance is converted to a high resistance.
  • the high power output stage 410 amplifies the signal and delivers a high level of power to a low impedance load. In the low power mode, the low power output stage 420 operates and the high power output stage 410 turns off.
  • the switch 430 is turned off, and the impedance conversion network 450 converts the low resistance of the port Z3 from the high power output stage 410 to the impedance conversion network 460 into a high resistance, and a higher output load impedance contributes to lowering Efficiency in power mode.
  • the low power output stage 420 amplifies the signal and delivers a medium to low level of power to a high impedance load.
  • the impedance transformation network 450 and the impedance transformation network 460 are composed of inductance and capacitance, and do not include any transmission line, so that it has low cost and easy integration.
  • adding a switch to the switch-controlled load-matching network can effectively improve the stability of the power amplifier, because in the high-power mode, the switch is turned on, and the voltage swing at the output of the low-power output stage 420 is small, thereby contributing to Improve the stability of the power amplifier.
  • the parasitic capacitance on the switch can be incorporated into the impedance conversion network as a whole, thus not affecting the performance of the power amplifier.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention porte sur un amplificateur de puissance multi-modes (200, 300) comprenant un étage d'attaque (210, 310) avec un mode à gain variable toujours en mode de fonctionnement, une pluralité d'étages de sortie (225, 240, 320, 325) connectés en parallèle et destinés à délivrer des sorties multi-modes, et un réseau d'adaptation de charge commandé par commutateur (280, 340) et connecté aux étages de sortie (225, 240, 320, 325) et délivrant une impédance de charge de sortie optimale aux étages de sortie (225, 240, 320, 325) conformément à une plage de puissance. On améliore le rendement du mode basse puissance sans affecter le rendement d'un mode grande puissance de l'amplificateur de puissance, tout en prolongeant la durée de vie des cellules, l'amplificateur ayant en outre des performances stables, un rendement moyen élevé et étant constitué de circuits simples.
PCT/CN2009/076243 2009-09-04 2009-12-30 Amplificateur de puissance multi-modes WO2011026298A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN200910192109.9 2009-09-04
CN200910192109A CN101656509A (zh) 2009-09-04 2009-09-04 射频功率放大器高低功率合成电路

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WO2011026298A1 true WO2011026298A1 (fr) 2011-03-10

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CN (1) CN101656509A (fr)
WO (1) WO2011026298A1 (fr)

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