WO2011024337A1 - Digital-analog convertor and delta sigma type digital-analog conversion device - Google Patents

Digital-analog convertor and delta sigma type digital-analog conversion device Download PDF

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Publication number
WO2011024337A1
WO2011024337A1 PCT/JP2010/002108 JP2010002108W WO2011024337A1 WO 2011024337 A1 WO2011024337 A1 WO 2011024337A1 JP 2010002108 W JP2010002108 W JP 2010002108W WO 2011024337 A1 WO2011024337 A1 WO 2011024337A1
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circuit
node
reference voltage
ring
digital
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PCT/JP2010/002108
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French (fr)
Japanese (ja)
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後藤陽介
岡本賢治
小林仁
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パナソニック株式会社
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Publication of WO2011024337A1 publication Critical patent/WO2011024337A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0656Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
    • H03M1/066Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching
    • H03M1/0663Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching using clocked averaging
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/76Simultaneous conversion using switching tree
    • H03M1/765Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/50Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502Details of the final digital/analogue conversion following the digital delta-sigma modulation

Definitions

  • the present invention relates to a digital-analog converter (hereinafter referred to as a DA converter) that performs an operation for converting a digital signal into an analog signal, and a delta-sigma digital-analog converter (hereinafter referred to as a delta-sigma type) using the same.
  • a DA converter digital-analog converter
  • a delta-sigma digital-analog converter (hereinafter referred to as a delta-sigma type) using the same.
  • it relates to the reduction of resistance mismatch due to manufacturing variations.
  • resistor string type DA converter As an example, a resistor string type DA converter as shown in FIG. 4 is generally known. This resistor string type DA converter has a number of resistor elements (resistor elements R 1 , R 2 ,..., R N) between two reference voltage terminals V ref1 and V ref2 according to the required resolution. Are arranged in series. Each node between the resistance elements is connected to the analog signal output terminal V out via the switches S 1 , S 2 ,..., S N ⁇ 1 .
  • resistor string type DA converter includes a small differential nonlinearity error, excellent monotonicity, and a large integral nonlinearity error due to manufacturing variations.
  • a large integral nonlinearity error leads to worsening of distortion of the output waveform.
  • resistive DA converter As another example, there is a resistance type DA converter as shown in FIG.
  • This resistive DA converter has two reference voltage terminals V ref1 and V ref2 and a group of resistive elements having the same resistance value R (resistive elements R 1 , R 2 ,..., R according to the required resolution). to consist of N), 1-bit DA performing selectively connected to control in accordance with a value of one and the converted digital signal of the resistance element group at one end and a reference voltage terminal V ref1 and the reference voltage terminal V ref2 converter DA 1, DA 2, ⁇ , comprising a DA N.
  • resistance elements R 1 , R 2 ,..., R k are connected in parallel between the analog signal output terminal V out and the reference voltage terminal V ref1 , and the analog signal output terminal V out and the reference voltage terminal V between ref2 resistive element R k + 1, R k + 2, ⁇ , because R N are connected in parallel, the analog signal output terminal V out at two resistance values R / k, R / (N -K) The voltage divided by is obtained.
  • the DEM is a technique for improving distortion characteristics by circulating the output node of the DA converter, thereby randomizing mismatch due to manufacturing variation, that is, variation in the resistance value R.
  • k resistance elements are connected to the reference voltage terminal V ref1 and (N ⁇ k) resistance elements are connected to the reference voltage terminal V ref2 as in the previous example.
  • Nk resistance elements are connected to the reference voltage terminal V ref1 every time conversion is performed, and similarly, different resistance elements (Nk) are connected to the reference voltage terminal V ref2 , which is caused by manufacturing variations. Mismatches are randomized and distortion deterioration is reduced.
  • the use of DEM can reduce deterioration of distortion due to manufacturing variations.
  • the resistance component of the reference voltage terminals V ref1 and V ref2 is connected in series to the two parallel resistance element groups used for the voltage division of the DA converter, and thus flows through the DA converter.
  • the current value deviates from the ideal value and the distortion becomes worse.
  • the delta sigma type DA converter includes a digital interpolation filter 10 that interpolates a digital input Din, a delta sigma modulator 20 that performs delta sigma modulation of a digital signal output from the digital interpolation filter 10, and a delta sigma modulator 20.
  • This is constituted by a general DA converter 30 typified by the resistance type DA converter, which converts an output signal from digital to analog. An analog output Aout is output from the DA converter 30.
  • the digital interpolation filter 10 outputs a digital signal having a certain oversampling frequency f os while preventing aliasing with respect to a certain sampling frequency f s and an n-bit digital input signal DIN.
  • the oversampling frequency f os is between the sampling frequency f s and the oversampling rate OSR.
  • f os OSR ⁇ f s
  • the oversampling frequency f os generally 64f s, the frequency of such 128f s used.
  • the delta sigma modulator 20 performs noise shaping on the digital signal obtained from the digital interpolation filter 10 and converts the digital signal into a lower resolution digital signal having a frequency higher than the sampling frequency f s .
  • the DA converter 30 DA-converts the high-frequency, low-resolution digital signal obtained from the delta-sigma modulator 20, and outputs an analog signal.
  • reference numeral 40 denotes a DEM circuit
  • reference numeral 50 denotes a DA converter with a current compensation circuit.
  • JP-A-7-99451 Japanese translation of PCT publication No. 2004-510381 Japanese Patent No. 3323460
  • the resistor string type DA converter shown in FIG. 4 has a small differential nonlinearity error, is excellent in monotonicity, and is a widely used circuit.
  • the resistance values of the resistance elements arranged in series vary due to the influence of manufacturing variations of the semiconductor integrated circuit, the output voltage deviates from a desired voltage due to mismatch of the resistance elements.
  • the integral nonlinearity error of the DA converter becomes large and the distortion of the output signal deteriorates.
  • the conversion accuracy is lowered due to manufacturing variations and current value fluctuations.
  • the influence can be reduced by inserting the DEM circuit and the current compensation circuit, but the circuit scale and current consumption increase.
  • Manufacturing variation in the semiconductor process is an unavoidable issue, and a design method that reduces the influence of manufacturing variation with a simpler structure is required to reduce the size and power consumption of the DA converter.
  • an object of the present invention is to provide a DA converter and a delta-sigma type DA converter that can perform high-accuracy DA conversion without causing deterioration in conversion accuracy due to manufacturing variations, and can prevent an increase in circuit scale and current consumption. Is to provide a device.
  • a DA converter includes any one of a resistor circuit including a plurality of resistor elements, first and second reference voltage terminals, an analog signal output terminal, and the resistor circuit.
  • a first connection circuit that selectively connects the first reference voltage terminal to a node of the second connection circuit, and a second connection circuit that selectively connects the second reference voltage terminal to any node of the resistance circuit.
  • a third connection circuit for selectively connecting the analog signal output terminal to any one of the corresponding nodes.
  • the nodes of the resistor circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are respectively changed by the first and second connection circuits, and the third connection circuit is correspondingly changed.
  • the node of the resistor circuit to which the analog signal output terminal is connected is changed, so that highly accurate DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations.
  • the first, second, and third connection circuits are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and an increase in circuit scale and current consumption can be prevented.
  • the resistor circuit is a ring resistor circuit composed of a plurality of resistor elements connected in a ring shape, and the connection between the resistor elements is selected at any node of the ring resistor circuit. It is preferable to provide an open circuit that opens automatically.
  • a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits.
  • Each node of the ring-shaped resistor circuit is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit, and any of the ring-shaped resistor circuits is changed by the open circuit. Since the connection between the resistive elements is released at the position of the node, high-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations.
  • the first, second and third connection circuits and an open circuit are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are not required, and an increase in circuit scale and current consumption can be prevented. Can do.
  • the nodes of the ring resistance circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are changed by the first and second connection circuits, respectively.
  • the node of the ring-shaped resistor circuit to which the output terminal is connected is changed by the third connection circuit, and the first reference is changed from the node to which the second reference voltage terminal is connected in the ring-shaped resistor circuit by the open circuit. It is preferable that the connection between the resistive elements is opened at the position of any node in the path returning to the node to which the voltage terminal is connected.
  • a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits.
  • the node of the ring-shaped resistor circuit is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit correspondingly, and the node in the ring-shaped resistor circuit is changed by the open circuit, Since the connection between the resistive elements is released at the position of any node in the path from the node to which the second reference voltage terminal is connected to the node to which the first reference voltage terminal is connected, conversion due to manufacturing variations High-precision DA conversion can be performed without causing a decrease in accuracy.
  • a DEM circuit such as a resistive DA converter and a current compensation circuit are not required, and an increase in circuit scale and current consumption can be prevented. Can do.
  • the first connection circuit includes a first switch group connected between each node of the ring-shaped resistor circuit and the first reference voltage terminal.
  • the circuit includes a second switch group connected between each node of the ring resistance circuit and the second reference voltage terminal, and the third connection circuit includes each node of the ring resistance circuit and an analog signal.
  • the open circuit is composed of a fourth switch group inserted between adjacent resistor elements in the ring-shaped resistor circuit, and is connected to the first output terminal.
  • the connection circuit is connected to each node of the ring-shaped resistor circuit on one end side of each switch of the fourth switch group, and the second and third connection circuits are the other end side of each switch of the fourth switch group.
  • the node to which the first reference voltage terminal is connected the node to which the second reference voltage terminal is connected, the node to which the analog signal output terminal is connected, and the resistor It is preferable to cycle between the nodes where the elements are opened.
  • a node to which the first reference voltage terminal is connected a node to which the second reference voltage terminal is connected, a node to which the analog signal output terminal is connected, and a node in which the resistor element is opened
  • the first and second references in the ring resistance circuit As viewed from the node to which one of the voltage terminals is connected, the node having the maximum resistance value between the two nodes connected to the first and second reference voltage terminals is designated as the first and second reference voltage terminals. It is preferable that either one of the nodes is connected.
  • the resistance is set by the fourth switch group.
  • the open end of the resistance element on one side of the node where the element is opened is a node to which the first reference voltage terminal is connected, and the open end of the resistor element on the other side of the node where the element is opened is the second.
  • the reference voltage terminal may be connected to a node.
  • a delta sigma type DA converter is a delta sigma type digital-analog converter that converts a first digital signal sampled at a predetermined sampling frequency into an analog signal, and interpolates the first digital signal.
  • a digital interpolation filter that converts the second digital signal to a second digital signal having a frequency higher than the sampling frequency, and a delta-sigma modulator that noise-shapes the second digital signal and converts the second digital signal to a third digital signal having a lower bit number;
  • a digital-analog converter for converting the third digital signal into an analog signal.
  • the digital-analog converter includes a ring-shaped resistor circuit composed of a plurality of resistor elements connected in a ring shape, first and second reference voltage terminals, an analog signal output terminal, and a ring-shaped resistor circuit.
  • a first connection circuit that selectively connects the first reference voltage terminal to any node, and a second connection that selectively connects the second reference voltage terminal to any node of the ring-shaped resistance circuit In the circuit and the ring-shaped resistor circuit, the value of the digital signal to be converted from digital to analog in the path from the node connected to the first reference voltage terminal to the node connected to the second reference voltage terminal
  • a third connection circuit that selectively connects an analog signal output terminal to one of the corresponding nodes, and an opening that selectively opens the connection between the resistance elements at the position of one of the nodes of the ring resistance circuit.
  • Each of the nodes of the ring-like resistor circuit to which the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits, respectively, and a third connection corresponding thereto The node of the ring resistance circuit to which the analog signal output terminal is connected is changed by the circuit, and the first reference voltage terminal is connected from the node to which the second reference voltage terminal is connected in the ring resistance circuit by the open circuit.
  • the connection between the resistive elements is released at the position of any node in the path returning to the node.
  • the first connection circuit includes a first switch group connected between each node of the ring-shaped resistance circuit and the first reference voltage terminal.
  • the second connection circuit includes a second switch group connected between each node of the ring-shaped resistor circuit and the second reference voltage terminal, and the third connection circuit includes each node of the ring-shaped resistor circuit.
  • the analog signal output terminal, respectively, and the open circuit is composed of a fourth switch group inserted between the adjacent resistance elements in the ring-shaped resistance circuit.
  • the first connection circuit is connected to each node of the ring-shaped resistance circuit on one end side of each switch of the fourth switch group, and the second and third connection circuits are connected to each switch of the fourth switch group.
  • the other end side Each of the switches constituting the first, second, third and fourth switch groups connected to each node of the ring resistance circuit is switched between a short-circuit state and an open state according to a digital signal to be converted. It is preferred that
  • the decoder preferably switches the first, second, third, and fourth switch groups so as to randomize the influence due to the manufacturing variation.
  • the decoder preferably switches the first, second, third, and fourth switch groups so that the same switch group is not always selected.
  • a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage are configured by the first and second connection circuits.
  • the node of the ring-shaped resistor circuit to which the voltage terminal is connected is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit, and the ring shape is changed by the open circuit.
  • the resistor circuit since the connection between the resistive elements is released at the position of any node in the path returning from the node to which the second reference voltage terminal is connected to the node to which the first reference voltage terminal is connected, High-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations.
  • a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and an increase in circuit scale and current consumption can be prevented.
  • the delta-sigma type DA converter of the present invention since it is configured using the above-described DA converter of the present invention, the same effects as the DA converter of the present invention are exhibited.
  • FIG. 1 is a circuit diagram showing a configuration of a DA converter according to Embodiment 1 of the present invention.
  • FIG. 2 is a block diagram showing a configuration of a DA converter configured using the DA converter according to the first embodiment of the present invention.
  • FIG. 3 is a block diagram showing a configuration of a delta-sigma type DA converter according to Embodiment 2 of the present invention configured using the DA converter of the present invention.
  • FIG. 4 is a circuit diagram showing a configuration of a general resistor string type DA converter.
  • FIG. 5 is a circuit diagram showing a configuration of a general resistance type DA converter.
  • FIG. 6 is a block diagram showing a configuration of a general delta-sigma type DA converter.
  • FIG. 7 is a block diagram showing a configuration of a delta-sigma type conversion device to which a DEM circuit and a current compensation circuit are added.
  • (Embodiment 1) DA converter of the first embodiment of the present invention, as shown in FIG. 1, a plurality of resistive elements connected in a ring R 1, R 2, ⁇ ⁇ ⁇ , a ring-shaped resistor circuit 1 consisting of R N , First and second reference voltage terminals V ref1 , V ref2 , analog signal output terminal V out, and any one of the nodes of the ring resistance circuit 1 (resistance elements R 1 , R 2 ,..., R A first connection circuit 2 that selectively connects the first reference voltage terminal V ref1 to the connection point between N and a second reference voltage terminal V ref2 that is selected at any node of the ring-shaped resistance circuit 1 In the second connection circuit 3 and the ring resistance circuit 1 in the path from the node to which the first reference voltage terminal V ref1 is connected to the node to which the second reference voltage terminal V ref2 is connected Any of the nos corresponding to the value of the digital signal to be converted from digital to analog In a third connecting circuit 4 for selectively connecting the analog signal
  • the first connection circuit 2 includes a first switch group (switch S) connected between each node of the ring-shaped resistor circuit 1 and the first reference voltage terminal V ref1. d_1 , S d_2 ,..., S d_N ).
  • the second connection circuit 3 includes a second switch group (switches S g_1 , S g_2 ,...) Connected between each node of the ring resistance circuit 1 and the second reference voltage terminal V ref2 . Sg_N ).
  • Third connection circuit 4 a third switch group that is connected between each node and the analog signal output terminal V out of the ring-shaped resistor circuit 1 (switch S o_1, S o_2, ⁇ , S o_N Consist of).
  • Open circuit 5 the ring-shaped resistor circuit 1, the resistance element R 1 adjacent, R 2, ⁇ ⁇ ⁇ , a fourth group of switches respectively inserted between the adjacent R N (switch S r_1, S r_2, ⁇ ⁇ , Sr_N ).
  • the first connection circuit 2 is connected to each node of the ring-shaped resistance circuit 1 on one end side of each switch S r_1 , S r_2 ,..., S r_N of the fourth switch group serving as the open circuit 5.
  • the second and third connection circuits 3 and 4 are connected to each of the ring-shaped resistance circuits 1 on the other end side of the switches S r_1 , S r_2 ,. Connected to the node. And each switch which comprises the 1st, 2nd, 3rd and 4th switch group is switched to a short circuit state and an open state according to the digital signal used as conversion object.
  • the node to which V out is connected and the node in which the resistance elements R 1 , R 2 ,..., R N are opened are circulated each time DA conversion of one digital signal is performed.
  • the patrol is performed as follows, for example. That is, when digital signals to be converted into digital-analog are input in time series, a ring connected to the analog signal output terminal Vout corresponding to the value of the digital signal at the previous digital-analog conversion. A cycle is performed in which the node of the resistor circuit 1 is used as a node to which one of the first and second reference voltage terminals V ref1 and V ref2 is connected during the current analog-digital conversion.
  • the resistance value between both nodes connected to the first and second reference voltage terminals V ref1, V ref2 is The maximum node is a node to which the other of the first and second reference voltage terminals V ref1 and V ref2 is connected.
  • the ring-shaped resistor circuit 1 has an open circuit. Any one of the nodes in which the resistance elements R 1 , R 2 ,..., R N are opened by a fourth switch group (consisting of switches S r_1 , S r_2 ,.
  • the open end of the resistor element on one side is a node to which the first reference voltage terminal V ref1 is connected, and the open end of the resistor element on the other side of the node where the resistor elements are open is the second reference voltage terminal V. It is a node to which ref2 is connected.
  • This DA converter has a reference voltage terminal V ref1 to which a high voltage is supplied, a reference voltage terminal V ref2 to which a low voltage is supplied, and the same resistance value R in a number corresponding to the necessary resolution for DA conversion.
  • resistive element group having (ring-shaped (resistor connected in a loop) element R 1, R 2, ⁇ ⁇ ⁇ , consists R N) and the reference voltage terminal V ref1 and the resistor element group and a switch group that connects ( switch S d_1, S d_2, ⁇ ⁇ ⁇ , consists S d_n) and the reference voltage terminal V ref2 and the resistor element group and a switch group that connects (switch S g_1, S g_2, ⁇ ⁇ ⁇ , consists S G - n)
  • switch S g_1, S g_2, ⁇ ⁇ ⁇ , consists S G - n When the resistance element R 1 connected in a ring, R 2, ⁇ ⁇ ⁇ , each inserted switches between the adjacent resistive elements adjacent to each other in R N (switch S r_1, S r_2, ⁇ ⁇ ⁇ , and S consists of R_n), to connect the analog signal output terminal V out and the resistive element group
  • the k-th resistance element R k has one terminal connected to the k-th switches S g_k , S r_k , S o_k , and the other terminal connected to the (k + 1) -th switches S d_k + 1 , S r_k + 1 .
  • the k-th switch S d_k has one terminal connected to the reference voltage terminal V ref1 and the other terminal connected to the (k ⁇ 1) -th resistance element R k-1 and the k-th switch S r_k. Yes.
  • the k-th switch S g_k has one terminal connected to the reference voltage terminal V ref2 and the other terminal connected to the k-th resistance element R k and the k-th switches S r_k and So_k .
  • the kth switch S r_k has one terminal connected to the (k ⁇ 1) th resistor element R k ⁇ 1 and the kth switch S d_k, and the other terminal connected to the kth resistor element R k .
  • the kth switches S g_k and S o_k are connected.
  • the k-th switch S o_k has one terminal connected to the k-th resistance element R k and the k-th switches S r_k and S g_k, and the other terminal connected to the analog signal output terminal V out . .
  • the k-th switch S d_k is short-circuited, and the other N ⁇ 1 switches S d_1 , S d_2 ,..., S d_k ⁇ 1 , S d_k + 1 ,..., S d_N are open, and in the switch group connecting the reference voltage terminal V ref2 and the resistance element group, the kth switch S g_k is short-circuited, and the other N ⁇ one switch S g_1, S g_2, ⁇ , S g_k-1, S g_k + 1, ⁇ , and S g_N is open.
  • the k-th switch S r_k is opened, and the other N ⁇ 1 switches S r_1 , S r_2 ,..., S r_k ⁇ 1 , S r_k + 1. ..., Sr_N are short-circuited.
  • the resistance element R l-1 and the resistance element R l are, (k + l ) Divided by N is m, the m-th switch S o_m of the switch group connecting the analog signal output terminal V out and the resistance element group is short-circuited, and the other N ⁇ 1 switches S o_1 , S o_2 ,..., S o_m ⁇ 1 , S o_m + 1 ,.
  • the resistance element R N resistive elements R k-1 connected to the switch S d_k is of a conventional resistor string type DA converter
  • the resistor R 1 resistive element R k which are connected to the switch S G_k is of a conventional resistor string type DA converter
  • the resistance element is connected to a switch S o_m R m-1
  • R m is the conventional, respectively resistance in the resistor string type DA converter element R l-1, corresponds to R l, can be taken out a desired voltage.
  • the DA converter of the first embodiment of the present invention shown in FIG. 1 the reference voltage terminal V ref1 and the resistor element group (resistive element R 1, R 2, ⁇ ⁇ ⁇ , consists R N ) switches for connecting the (switch S d_1, S d_2, ⁇ , consists S d_n), the reference voltage terminal V ref2 and the resistor element group (resistive element R 1, R 2, ⁇ , from R N becomes) a switch group that connects (switch S g_1, S g_2, ⁇ , consists S G - n), resistive element group (resistive element R 1, R 2, ⁇ , consists R N) adjacent the A group of switches (consisting of switches S r_1 , S r_2 ,..., S r_N ) that connect the resistance elements, and an analog signal output terminal V out and a group of resistance elements (resistance elements R 1 , R 2 ,...
  • switches for connecting the consisting R N) (switch S o_1, S o_2, ⁇ , consists S o_N) Therefore, the two reference voltage terminals V ref1, V ref2, resistive element group for performing the DA conversion by partial pressure is cyclically the connection point of the (resistive element R 1, R 2, ⁇ ⁇ ⁇ , consists R N)
  • the effects of manufacturing variations can be randomized.
  • the DA converter according to the first embodiment of the present invention performs DA conversion based on the same operation principle as that of the resistor string type DA converter, the current value does not change due to the influence of the resistance component of the reference voltage terminal. .
  • a plurality of resistance elements R 1, R 2, ⁇ ⁇ ⁇ , by connecting R N in a ring shape and a ring-shaped resistor circuit 1, the first and The nodes of the ring-shaped resistor circuit 1 to which the first reference voltage terminal V ref1 and the second reference voltage terminal V ref2 are connected are changed by the second connection circuits 2 and 3, respectively. Since the node at which the connection is released is changed, and the node of the ring-shaped resistor circuit 1 to which the analog signal output terminal Vout is connected is changed by the third connection circuit 4 correspondingly, the conversion accuracy due to manufacturing variations is improved. High-precision DA conversion can be performed without causing a decrease.
  • the first, second and third connection circuits 2, 3, 4 and the open circuit 5 are added, a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and the circuit scale is An increase in current consumption can also be prevented.
  • the DA converter according to the first embodiment of the present invention can randomize the influence due to the manufacturing variation like the DEM, and can reduce the increase of the integral nonlinearity error and the deterioration of the distortion. Further, there is no change in current value due to digital data input, and an increase in circuit scale and current consumption due to insertion of a current compensation circuit can be prevented.
  • the operation of a DA converter as shown in FIG. 2 that performs 7-value DA conversion will be described.
  • the digital input Din specifically, the 3-bit digital signals D 1 , D 2 and D 3 are converted into control signals for the respective switches for driving the DA converter shown in FIG. 1 and the DA converter 70 shown in FIG.
  • An analog output Aout is output from the DA converter 70.
  • the decoder 60 receives 3-bit digital signals D 1 , D 2 , D 3 as input, and receives eight digital signals D v_1 , D v_2 ,..., D v_8 and eight digital signals D r_1 , D r_2 ,. .. , D r_8 and eight digital signals D o_1 , D o_2 ,..., D o_8 are output.
  • the digital signals D r_1 , D r_2 ,..., D r_8 are control signals for a switch group (consisting of switches S r_1 , S r_2 ,..., S r_8 ) connecting the resistance elements in the DA converter 70. Used as
  • Digital signals D o_1 , D o_2 ,..., D o_8 control the switch group ( consisting of switches S o_1 , S o_2 ,..., S o_8 ) that connects the analog signal output terminal V out and the resistor element group. Used as a signal.
  • the decoder 60 decodes the digital input signal with a certain rule, and outputs a digital signal so that the same switch is not always selected.
  • the voltage of the reference voltage terminal V ref1 is 1 and the voltage of the reference voltage terminal V ref2 is 0.
  • Table 1 shows the digital output of the decoder 60 and the analog output of the DA converter 70 at this time.
  • the digital signals D v_1 , D v_2 ,..., D v_8 use the digital signals D o_1 , D o_2 , ..., D o_8 of the previous conversion as they are, and the digital signals D r_1 , D r_2 , .. , D r_8 is obtained by inverting the digital signals D v_1 , D v_2,.
  • the digital signals D o_1 , D o_2 ,..., D o_8 are converted to a desired analog output determined by the digital signals D 1 , D 2 , and D 3 input to the decoder 60, It is decided in the same way.
  • this cyclic method uses the number of the switch used to connect the analog signal output terminal Vout and the resistive element group in the previous conversion, and the two reference voltage terminals Vref1 , Vref in the next conversion.
  • the number of the switch that connects ref2 and the resistive element group is the same, and the switch that connects the resistive elements is controlled in the reverse manner to the switch that connects the two reference voltage terminals and the resistive element group. ,realizable.
  • the switches S d_1 , S d_2 ,..., S d_N the reference voltage terminal connecting the reference voltage terminal V ref1 and the resistor element group.
  • switch S g_1 connecting a resistive element group and V ref2, S g_2, ⁇ , S g_N, switch S O_1 for connecting the analog signal output terminal V out resistance element group, S o_2, ⁇ , the S O_N While circulating, an analog signal can be taken out by the same mechanism as the resistor string DA converter.
  • DA conversion is performed by a mechanism similar to that of a resistance string type DA converter by circulating a connection point between two reference voltage terminals V ref1 and V ref2. I do.
  • the effects of manufacturing variations can be randomized, integration nonlinearity can be increased, distortion can be reduced, and there is no change in the current value due to digital data input. An increase in current consumption can also be prevented.
  • the above-described DA converter can also be used as a 9-value DA converter by directly outputting the voltages of the reference voltage terminals V ref1 and V ref2 .
  • the 7-value DA conversion is shown as an example, but the DA conversion may have any resolution.
  • a number of decoder controls can be considered. For example, as described in Patent Document 3, what is written in a document related to DEM can be applied.
  • the node that opens the connection between the resistive elements and the node that is connected to the first and second reference voltage terminals are the same node, but it is not necessary to be the same node. That is, at least one of the first and second reference voltage terminals may be connected to a node other than both ends of the series circuit of all the resistive elements in the resistive element group. In this case, the resistance element located outside the node to which the first and second reference voltage terminals are connected does not contribute to DA conversion.
  • any node of the ring-shaped resistor circuit 1 is selectively opened by the open circuit 5, but the resistor circuit is constituted by a series circuit of a plurality of resistors, An example in which is omitted can be given as an example.
  • This configuration is equivalent to a fixed open node in the ring resistance circuit.
  • the delta sigma type DA converter in FIG. 3 is a delta sigma type DA converter that converts a first digital signal sampled at a predetermined sampling frequency into an analog signal.
  • a digital interpolation filter 80 that interpolates Din and converts it to a second digital signal having a frequency higher than the sampling frequency, and noise-shapes the second digital signal to convert it to a third digital signal having a lower bit number.
  • the delta-sigma modulator 90, the decoder 100 that decodes the third digital signal output from the delta-sigma modulator 90, and the third digital signal is converted into an analog signal, that is, an analog output Aout using the output of the decoder 100 as a drive signal.
  • the DA converter 110 is provided. As the decoder 100 and the digital-analog converter 110, those described in the first embodiment are used.
  • the digital interpolation filter 80 has the same configuration as that shown in FIGS. 7 and 8, and a digital signal having an oversampling frequency f os while preventing aliasing with respect to a digital input signal having a certain sampling frequency f s and n bits. Is output.
  • the oversampling frequency f os depends on the oversampling rate OSR.
  • F os OSR ⁇ f s
  • the oversampling frequency f os generally 64f s, the frequency of such 128f s used.
  • the delta sigma modulator 90 converts the data obtained from the digital interpolation filter 80 into lower resolution data at a frequency higher than the sampling frequency f s with the same configuration as that shown in FIGS. 7 and 8. At the same time, noise shaping is performed. Further, the decoder 100 converts the high-frequency, low-resolution data obtained from the delta-sigma modulator 90 into a digital signal for driving the DA converter 110 of the present invention by the decoder 100. The DA converter 110 of the present invention Based on the output of the decoder 100, an analog signal corresponding to the high-frequency, low-resolution data obtained from the delta-sigma modulator 90 is output.
  • this DA converter can reduce deterioration of conversion error due to manufacturing variations and current value changes, the delta sigma type DA converter is provided with this DA converter.
  • the DA converter By using the DA converter, high-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations.
  • a current compensation circuit is unnecessary, an increase in circuit scale and current consumption can be prevented.
  • the DA converter and the delta-sigma modulation type DA converter according to the present invention can reduce the deterioration of the conversion error due to the manufacturing variation and the change of the current value, and the high-precision DA conversion without causing the deterioration of the conversion accuracy due to the manufacturing variation.
  • the current compensation circuit is unnecessary, the circuit scale and current consumption can be prevented from increasing, which is useful as a DA conversion processing circuit in a digital music player or the like.

Abstract

Highly accurate DA conversion can be performed, and the increase in circuit scale and consumption current can be prevented, without decreasing the conversion accuracy due to variation in production. A ring-shaped resistive circuit (1) composed of resistive elements (R1 to RN) is provided, and a node of the ring-shaped resistive circuit (1) to which reference voltage terminals (Vref1, Vref2) are connected by connection circuits (2, 3), a node of the ring-shaped resistive circuit (1) connected to an analog signal output terminal (Vout) by a connection circuit (4), and a node of the ring-shaped resistive circuit (1) opened by an open circuit (5), are circulated at each AD conversion of a digital signal. In one of the circulation methods, at the time of present conversion, the state of the connection circuits (2, 3) which connect the two reference voltage terminals (Vref1, Vref2) with the resistive element group is set to the same state as the state of the connection circuit (4) which has been used for connecting the analog signal output terminal (Vout) with the resistive element group in the previous conversion. With respect to the open circuit (5) which connects the resistive elements is set to a state opposite to the state of the connection circuits (2, 3) which connect the two reference voltage terminals with the resistive element group.

Description

デジタル-アナログ変換器およびデルタシグマ型デジタル-アナログ変換装置Digital-analog converter and delta-sigma type digital-analog converter
 本発明は、デジタル信号をアナログ信号に変換するための演算を行うデジタル-アナログ変換器(以下、DA変換器と記す)およびそれを用いたデルタシグマ型デジタル-アナログ変換装置(以下、デルタシグマ型DA変換装置と記す)に関するものであり、特に製造バラツキによる抵抗ミスマッチの低減に関するものである。 The present invention relates to a digital-analog converter (hereinafter referred to as a DA converter) that performs an operation for converting a digital signal into an analog signal, and a delta-sigma digital-analog converter (hereinafter referred to as a delta-sigma type) using the same. In particular, it relates to the reduction of resistance mismatch due to manufacturing variations.
 デジタル信号をアナログ信号に変換するDA変換器には様々な構成がある。その中の一例として、図4のような抵抗ストリング型DA変換器が一般的に知られている。この抵抗ストリング型DA変換器は、2つの基準電圧端子Vref1、Vref2の間に、必要な分解能に応じた個数の抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)を直列に配置することで構成される。抵抗素子間のそれぞれのノードは、スイッチS1、S2、・・・、SN-1を介してアナログ信号出力端子Voutに接続される。変換対象の入力デジタル信号の値に応じて、これらのスイッチS1、S2、・・・、SN-1のうちオンにする一つのスイッチを選択することによって、基準電圧端子Vref1、Vref2の電圧差を(N-1)分圧したアナログ出力電圧が得られる。 There are various configurations of DA converters that convert digital signals into analog signals. As an example, a resistor string type DA converter as shown in FIG. 4 is generally known. This resistor string type DA converter has a number of resistor elements (resistor elements R 1 , R 2 ,..., R N) between two reference voltage terminals V ref1 and V ref2 according to the required resolution. Are arranged in series. Each node between the resistance elements is connected to the analog signal output terminal V out via the switches S 1 , S 2 ,..., S N−1 . By selecting one of the switches S 1 , S 2 ,..., S N-1 to be turned on according to the value of the input digital signal to be converted, the reference voltage terminals V ref1 , V An analog output voltage obtained by dividing the voltage difference of ref2 by (N−1) is obtained.
 抵抗ストリング型DA変換器の特徴としては、微分非直線性誤差が小さく、単調性に優れていること、製造ばらつきによる積分非直線性誤差が大きいことが挙げられる。積分非直線性誤差が大きいことは、出力波形の歪みの悪化に繋がる。 Features of the resistor string type DA converter include a small differential nonlinearity error, excellent monotonicity, and a large integral nonlinearity error due to manufacturing variations. A large integral nonlinearity error leads to worsening of distortion of the output waveform.
 また、他の例として、図5のような抵抗型DA変換器がある。この抵抗型DA変換器は、2つの基準電圧端子Vref1、Vref2と、必要な分解能に応じた、同じ抵抗値Rを持つ抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)と、抵抗素子群の一端と基準電圧端子Vref1および基準電圧端子Vref2のいずれか一方とを変換対象のデジタル信号の値に応じて選択的に接続する制御を行う1ビットDA変換器DA1、DA2、・・・、DANとからなる。 As another example, there is a resistance type DA converter as shown in FIG. This resistive DA converter has two reference voltage terminals V ref1 and V ref2 and a group of resistive elements having the same resistance value R (resistive elements R 1 , R 2 ,..., R according to the required resolution). to consist of N), 1-bit DA performing selectively connected to control in accordance with a value of one and the converted digital signal of the resistance element group at one end and a reference voltage terminal V ref1 and the reference voltage terminal V ref2 converter DA 1, DA 2, ···, comprising a DA N.
 今、ある入力信号D1、D2、・・・、DNが入力され、1ビットDA変換器DA1、DA2、・・・、DAkが基準電圧端子Vref2の電圧を出力し、1ビットDA変換器DAk+1、DAk+2、・・・、DANが基準電圧端子Vref1の電圧を出力したと仮定する。この時、アナログ信号出力端子Voutと基準電圧端子Vref1の間には抵抗素子R1、R2、・・・、Rkが並列に接続され、アナログ信号出力端子Voutと基準電圧端子Vref2の間には抵抗素子Rk+1、Rk+2、・・・、RNが並列に接続されるので、アナログ信号出力端子Voutでは2つの抵抗値
  R/k、R/(N-k)
により分圧された電圧が得られる。
Now, certain input signals D 1 , D 2 ,..., DN are inputted, and the 1-bit DA converters DA 1 , DA 2 ,..., DA k output the voltage of the reference voltage terminal V ref2 , 1-bit DA converter DA k + 1, DA k + 2, it is assumed ..., and DA N has output voltage of the reference voltage terminal V ref1. At this time, resistance elements R 1 , R 2 ,..., R k are connected in parallel between the analog signal output terminal V out and the reference voltage terminal V ref1 , and the analog signal output terminal V out and the reference voltage terminal V between ref2 resistive element R k + 1, R k + 2, ···, because R N are connected in parallel, the analog signal output terminal V out at two resistance values R / k, R / (N -K)
The voltage divided by is obtained.
 上記した図5のような抵抗型DA変換器においては、製造ばらつきによる影響を低減する方法として、特許文献1に示すDynamic Element Matching(DEM)という手法が知られている。DEMとは、DA変換器の出力ノードを巡回させることで、製造ばらつきによるミスマッチ、すなわち抵抗値Rのばらつきをランダマイズし、歪み特性の改善を図る手法である。 In the resistive DA converter as shown in FIG. 5 described above, as a method for reducing the influence due to manufacturing variations, a method called Dynamic Element Matching (DEM) shown in Patent Document 1 is known. The DEM is a technique for improving distortion characteristics by circulating the output node of the DA converter, thereby randomizing mismatch due to manufacturing variation, that is, variation in the resistance value R.
 上記抵抗型DA変換器において、抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)が製造ばらつきによるミスマッチを持っていると仮定すると、実際に得られる電圧は、そのばらつきにより所望の電圧からずれてしまい、出力信号の歪みは悪化する。しかし、先に紹介したDEMを用いることにより、先の例と同じようにk個の抵抗素子が基準電圧端子Vref1に、(N-k)個の抵抗素子が基準電圧端子Vref2に接続される場合においても、変換の度に異なる抵抗素子k個が基準電圧端子Vref1に接続され、同様に異なる抵抗素子(N-k)個が基準電圧端子Vref2に接続されるため、製造ばらつきによるミスマッチがランダマイズされ、歪みの悪化が低減される。 In the resistance type DA converter, the resistor element group Assuming (resistive element R 1, R 2, · · ·, consists R N) has a mismatch due to manufacturing variations, the voltage actually obtained is the Deviation from the desired voltage causes variations in the output signal. However, by using the DEM introduced earlier, k resistance elements are connected to the reference voltage terminal V ref1 and (N−k) resistance elements are connected to the reference voltage terminal V ref2 as in the previous example. In this case, k different resistance elements are connected to the reference voltage terminal V ref1 every time conversion is performed, and similarly, different resistance elements (Nk) are connected to the reference voltage terminal V ref2 , which is caused by manufacturing variations. Mismatches are randomized and distortion deterioration is reduced.
 このように、図5の抵抗型DA変換器では、DEMを用いることで製造ばらつきによる歪みの悪化を低減することができる。しかし、一方で、基準電圧端子Vref1、Vref2の持つ抵抗成分がDA変換器の分圧に用いられている2つの並列抵抗素子群に対して直列に繋がってしまうため、DA変換器を流れる電流値が理想値からずれてしまい、歪みが悪化するという別の課題も存在する。 As described above, in the resistance type DA converter of FIG. 5, the use of DEM can reduce deterioration of distortion due to manufacturing variations. However, on the other hand, the resistance component of the reference voltage terminals V ref1 and V ref2 is connected in series to the two parallel resistance element groups used for the voltage division of the DA converter, and thus flows through the DA converter. There is another problem that the current value deviates from the ideal value and the distortion becomes worse.
 この問題に対しては、特許文献2に示すように、電流補償回路を用いることで歪みの悪化を低減できることが知られている。電流補償回路は、電流値にデータ依存性のあるDA変換器に、DA変換器と同じ電流特性を持つ電流補償回路を並列に接続し、電流補償回路をDA変換器と逆相で動作させることで、流れる電流値の合計を一定に保つ手法である。しかし、この手法の問題点としては、回路規模が約2倍になることと、回路を流れる電流値が約2倍になることが挙げられる。なお、抵抗ストリング型DA変換器では、流れる電流は常に一定となるため、このような課題は発生しない。 For this problem, as disclosed in Patent Document 2, it is known that the deterioration of distortion can be reduced by using a current compensation circuit. In the current compensation circuit, a current compensation circuit having the same current characteristics as the DA converter is connected in parallel to a DA converter whose current value is data-dependent, and the current compensation circuit is operated in a phase opposite to that of the DA converter. This is a technique for keeping the total of the current values flowing constant. However, the problems with this method are that the circuit scale is approximately doubled and the current value flowing through the circuit is approximately doubled. In the resistor string type DA converter, since the flowing current is always constant, such a problem does not occur.
 ところで、高速な変換を必要としない場合、低消費電力かつ高精度な変換を実現しやすいことから、図6のようなデルタシグマ型DA変換装置がよく用いられている。このデルタシグマ型DA変換装置は、デジタル入力Dinを補間するデジタル補間フィルタ10と、デジタル補間フィルタ10から出力されるデジタル信号のデルタシグマ変調を行うデルタシグマ変調器20と、デルタシグマ変調器20の出力信号をデジタル-アナログ変換する、上記抵抗型DA変換器に代表される一般的なDA変換器30とによって構成される。DA変換器30からアナログ出力Aoutが出力される。 Incidentally, when high-speed conversion is not required, a delta-sigma type DA converter as shown in FIG. 6 is often used because low-power consumption and high-precision conversion can be easily realized. The delta sigma type DA converter includes a digital interpolation filter 10 that interpolates a digital input Din, a delta sigma modulator 20 that performs delta sigma modulation of a digital signal output from the digital interpolation filter 10, and a delta sigma modulator 20. This is constituted by a general DA converter 30 typified by the resistance type DA converter, which converts an output signal from digital to analog. An analog output Aout is output from the DA converter 30.
 デジタル補間フィルタ10では、あるサンプリング周波数fs、nビットのデジタル入力信号DINに対し、折り返しを防止しながら、あるオーバーサンプリング周波数fosのデジタル信号を出力する。なお、オーバーサンプリング周波数fosは、オーバーサンプリング率OSRによって、サンプリング周波数fsとの間に、
 fos = OSR × fs
の関係を持っている。オーバーサンプリング周波数fosとしては、一般的に64fs、128fs等の周波数が用いられる。
The digital interpolation filter 10 outputs a digital signal having a certain oversampling frequency f os while preventing aliasing with respect to a certain sampling frequency f s and an n-bit digital input signal DIN. The oversampling frequency f os is between the sampling frequency f s and the oversampling rate OSR.
f os = OSR × f s
Have a relationship. The oversampling frequency f os, generally 64f s, the frequency of such 128f s used.
 デルタシグマ変調器20は、デジタル補間フィルタ10から得られたデジタル信号に対してノイズシェイピングを施し、サンプリング周波数fsより高い周波数のより低分解能のデジタル信号へと変換する。 The delta sigma modulator 20 performs noise shaping on the digital signal obtained from the digital interpolation filter 10 and converts the digital signal into a lower resolution digital signal having a frequency higher than the sampling frequency f s .
 DA変換器30は、デルタシグマ変調器20から得られた高周波数、低分解能のデジタル信号をDA変換し、アナログ信号を出力する。 The DA converter 30 DA-converts the high-frequency, low-resolution digital signal obtained from the delta-sigma modulator 20, and outputs an analog signal.
 上記のように、デルタシグマ型DA変換装置を用いることで、高精度なDA変換を行うことができる。しかし、デルタシグマ型DA変換装置内のDA変換器30に製造ばらつきやデジタルデータ入力に依存する電流値の変動が存在すると、変換誤差が生じ、意図した変換精度が得られなくなってしまう。 As described above, highly accurate DA conversion can be performed by using a delta-sigma type DA converter. However, if the DA converter 30 in the delta sigma type DA converter has manufacturing variations or fluctuations in the current value depending on the digital data input, a conversion error occurs and the intended conversion accuracy cannot be obtained.
 そこで、先に紹介したDEMや電流補償回路を用い、図7のような構成とすることで、変換精度を保つことがなされている。図7において、符号40はDEM回路を示し、符号50は電流補償回路付DA変換器を示している。 Therefore, the conversion accuracy is maintained by using the DEM and the current compensation circuit introduced earlier and adopting the configuration shown in FIG. In FIG. 7, reference numeral 40 denotes a DEM circuit, and reference numeral 50 denotes a DA converter with a current compensation circuit.
 しかし、上記抵抗型DA変換器と同様に、変換精度が改善する一方で、回路規模と消費電流とが増加するというトレードオフが存在する。 However, like the above resistance type DA converter, there is a trade-off in which the conversion accuracy is improved while the circuit scale and the current consumption are increased.
特開平7-99451号公報JP-A-7-99451 特表2004-510381号公報Japanese translation of PCT publication No. 2004-510381 特許第3323460号公報Japanese Patent No. 3323460
 図4に示した抵抗ストリング型DA変換器は、微分非直線性誤差が小さく、単調性に優れ、広く用いられている回路である。しかし、半導体集積回路の製造ばらつきの影響などによって、直列に配置した抵抗素子の抵抗値にばらつきが生じると、抵抗素子のミスマッチによって出力電圧が所望の電圧からずれてしまう。その結果、DA変換器の積分非直線性誤差が大きくなり、出力信号の歪みが悪化するという課題がある。 The resistor string type DA converter shown in FIG. 4 has a small differential nonlinearity error, is excellent in monotonicity, and is a widely used circuit. However, when the resistance values of the resistance elements arranged in series vary due to the influence of manufacturing variations of the semiconductor integrated circuit, the output voltage deviates from a desired voltage due to mismatch of the resistance elements. As a result, there is a problem that the integral nonlinearity error of the DA converter becomes large and the distortion of the output signal deteriorates.
 また、図5に示した抵抗型DA変換器を用いれば、DEMを用いることで製造ばらつきの影響を低減できることが知られている。しかし、この抵抗型DA変換器には、電流値のデータ依存性による歪みの悪化という別の課題が存在する。この課題の対処法としては、電流補償回路の挿入が知られているが、この手法を用いると回路面積、消費電流が約2倍になってしまう。 Further, it is known that if the resistance type DA converter shown in FIG. 5 is used, the influence of manufacturing variations can be reduced by using DEM. However, this resistive DA converter has another problem of distortion deterioration due to the data dependence of the current value. As a countermeasure for this problem, the insertion of a current compensation circuit is known. However, when this method is used, the circuit area and current consumption are approximately doubled.
 また、図6に示すデルタシグマ型DA変換装置では、製造ばらつきや電流値の変動によって変換精度が低下してしまう。図7に示すように、DEM回路と電流補償回路との挿入によってその影響を低減することはできるが、回路規模や消費電流が増加してしまう。 Further, in the delta-sigma type DA converter shown in FIG. 6, the conversion accuracy is lowered due to manufacturing variations and current value fluctuations. As shown in FIG. 7, the influence can be reduced by inserting the DEM circuit and the current compensation circuit, but the circuit scale and current consumption increase.
 半導体プロセスにおける製造ばらつきは避けることのできない課題であり、またDA変換器の小型化および低消費電力化を目指すため、より簡素な構造によって製造ばらつきの影響を低減する設計手法が求められる。 Manufacturing variation in the semiconductor process is an unavoidable issue, and a design method that reduces the influence of manufacturing variation with a simpler structure is required to reduce the size and power consumption of the DA converter.
 したがって、本発明の目的は、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行え、しかも回路規模、消費電流の増大も防ぐことができるDA変換器およびデルタシグマ型DA変換装置を提供することである。 Accordingly, an object of the present invention is to provide a DA converter and a delta-sigma type DA converter that can perform high-accuracy DA conversion without causing deterioration in conversion accuracy due to manufacturing variations, and can prevent an increase in circuit scale and current consumption. Is to provide a device.
 上記課題を解決するために、本発明のDA変換器は、複数個の抵抗素子からなる抵抗回路と、第1および第2の基準電圧端子と、アナログ信号出力端子と、前記抵抗回路のいずれかのノードに前記第1の基準電圧端子を選択的に接続する第1の接続回路と、前記抵抗回路のいずれかのノードに前記第2の基準電圧端子を選択的に接続する第2の接続回路と、前記抵抗回路における、前記第1の基準電圧端子が接続されたノードから前記第2の基準電圧端子が接続されたノードへ至る経路中の、デジタル-アナログ変換対象となるデジタル信号の値に対応したいずれかのノードに前記アナログ信号出力端子を選択的に接続する第3の接続回路とを備えることを特徴とする。 In order to solve the above-described problems, a DA converter according to the present invention includes any one of a resistor circuit including a plurality of resistor elements, first and second reference voltage terminals, an analog signal output terminal, and the resistor circuit. A first connection circuit that selectively connects the first reference voltage terminal to a node of the second connection circuit, and a second connection circuit that selectively connects the second reference voltage terminal to any node of the resistance circuit. And a value of a digital signal to be converted from digital to analog in a path from the node to which the first reference voltage terminal is connected to the node to which the second reference voltage terminal is connected in the resistor circuit. And a third connection circuit for selectively connecting the analog signal output terminal to any one of the corresponding nodes.
 この構成によれば、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続される抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によってアナログ信号出力端子が接続される抵抗回路のノードが変更されるので、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。しかも、第1、第2および第3の接続回路が必要となるものの、抵抗型DA変換器のようなDEM回路や電流補償回路が不要で回路規模、消費電流の増大も防ぐことができる。 According to this configuration, the nodes of the resistor circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are respectively changed by the first and second connection circuits, and the third connection circuit is correspondingly changed. As a result, the node of the resistor circuit to which the analog signal output terminal is connected is changed, so that highly accurate DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations. In addition, although the first, second, and third connection circuits are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and an increase in circuit scale and current consumption can be prevented.
 上記構成のDA変換器においては、抵抗回路は、リング状に接続された複数個の抵抗素子からなるリング状抵抗回路であり、リング状抵抗回路のいずれかのノードで抵抗素子間の接続を選択的に開放する開放回路を備えることが好ましい。 In the DA converter configured as described above, the resistor circuit is a ring resistor circuit composed of a plurality of resistor elements connected in a ring shape, and the connection between the resistor elements is selected at any node of the ring resistor circuit. It is preferable to provide an open circuit that opens automatically.
 この構成によれば、複数個の抵抗素子をリング状に接続してリング状抵抗回路を構成し、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続されるリング状抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によってアナログ信号出力端子が接続されるリング状抵抗回路のノードが変更され、開放回路によってリング状抵抗回路のいずれかのノードの位置で抵抗素子間の接続が開放されるので、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。しかも、第1、第2および第3の接続回路と開放回路とが必要となるものの、抵抗型DA変換器のようなDEM回路や電流補償回路が不要で回路規模、消費電流の増大も防ぐことができる。 According to this configuration, a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits. Each node of the ring-shaped resistor circuit is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit, and any of the ring-shaped resistor circuits is changed by the open circuit. Since the connection between the resistive elements is released at the position of the node, high-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations. In addition, although the first, second and third connection circuits and an open circuit are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are not required, and an increase in circuit scale and current consumption can be prevented. Can do.
 また、開放回路を有するDA変換器においては、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続されるリング状抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によって出力端子が接続されるリング状抵抗回路のノードが変更され、開放回路によってリング状抵抗回路における、第2の基準電圧端子が接続されたノードから第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放されることが好ましい。 Further, in the DA converter having an open circuit, the nodes of the ring resistance circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are changed by the first and second connection circuits, respectively. Correspondingly, the node of the ring-shaped resistor circuit to which the output terminal is connected is changed by the third connection circuit, and the first reference is changed from the node to which the second reference voltage terminal is connected in the ring-shaped resistor circuit by the open circuit. It is preferable that the connection between the resistive elements is opened at the position of any node in the path returning to the node to which the voltage terminal is connected.
 この構成によれば、複数個の抵抗素子をリング状に接続してリング状抵抗回路を構成し、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続されるリング状抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によってアナログ信号出力端子が接続されるリング状抵抗回路のノードが変更され、開放回路によってリング状抵抗回路における、第2の基準電圧端子が接続されたノードから第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放されるので、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。しかも、第1、第2および第3の接続回路と開放回路とが必要となるものの、抵抗型DA変換器のようなDEM回路や電流補償回路が不要で回路規模、消費電流の増大も防ぐことができる。 According to this configuration, a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits. The node of the ring-shaped resistor circuit is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit correspondingly, and the node in the ring-shaped resistor circuit is changed by the open circuit, Since the connection between the resistive elements is released at the position of any node in the path from the node to which the second reference voltage terminal is connected to the node to which the first reference voltage terminal is connected, conversion due to manufacturing variations High-precision DA conversion can be performed without causing a decrease in accuracy. In addition, although the first, second and third connection circuits and an open circuit are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are not required, and an increase in circuit scale and current consumption can be prevented. Can do.
 上記構成のDA変換器においては、第1の接続回路は、リング状抵抗回路の各ノードと第1の基準電圧端子との間にそれぞれ接続された第1のスイッチ群からなり、第2の接続回路は、リング状抵抗回路の各ノードと第2の基準電圧端子との間にそれぞれ接続された第2のスイッチ群からなり、第3の接続回路は、リング状抵抗回路の各ノードとアナログ信号出力端子との間にそれぞれ接続された第3のスイッチ群からなり、開放回路は、リング状抵抗回路において、隣接する抵抗素子同士の間にそれぞれ挿入された第4のスイッチ群からなり、第1の接続回路は、第4のスイッチ群の各スイッチの一端側でリング状抵抗回路の各ノードに接続され、第2および第3の接続回路は、第4のスイッチ群の各スイッチの他端側でリング状抵抗回路の各ノードに接続され、第1、第2、第3および第4のスイッチ群を構成する各スイッチは、変換対象となるデジタル信号に応じて、短絡状態と開放状態とが切り替えられることが好ましい。 In the DA converter having the above-described configuration, the first connection circuit includes a first switch group connected between each node of the ring-shaped resistor circuit and the first reference voltage terminal. The circuit includes a second switch group connected between each node of the ring resistance circuit and the second reference voltage terminal, and the third connection circuit includes each node of the ring resistance circuit and an analog signal. The open circuit is composed of a fourth switch group inserted between adjacent resistor elements in the ring-shaped resistor circuit, and is connected to the first output terminal. The connection circuit is connected to each node of the ring-shaped resistor circuit on one end side of each switch of the fourth switch group, and the second and third connection circuits are the other end side of each switch of the fourth switch group. With ring resistance times The switches constituting the first, second, third and fourth switch groups are preferably switched between a short-circuit state and an open state in accordance with a digital signal to be converted. .
 上記構成のDA変換器においては、リング状抵抗回路において、第1の基準電圧端子が接続されるノードと第2の基準電圧端子が接続されるノードとアナログ信号出力端子が接続されるノードと抵抗素子間が開放されるノードとをそれぞれ巡回させることが好ましい。 In the DA converter having the above configuration, in the ring-shaped resistor circuit, the node to which the first reference voltage terminal is connected, the node to which the second reference voltage terminal is connected, the node to which the analog signal output terminal is connected, and the resistor It is preferable to cycle between the nodes where the elements are opened.
 また、リング状抵抗回路において、第1の基準電圧端子が接続されるノードと第2の基準電圧端子が接続されるノードとアナログ信号出力端子が接続されるノードと抵抗素子間が開放されるノードとをそれぞれ巡回させる構成においては、巡回は例えば以下のように行うことが好ましい。すなわち、デジタル-アナログ変換対象となるデジタル信号が時系列的に入力される場合において、前回のデジタル-アナログ変換時においてデジタル信号の値に対応してアナログ信号出力端子に接続されたリング状抵抗回路のノードを、今回のアナログ-デジタル変換時において第1および第2の基準電圧端子のいずれか一方が接続されるノードとする巡回を行うことが好ましい。 In the ring-shaped resistor circuit, a node to which the first reference voltage terminal is connected, a node to which the second reference voltage terminal is connected, a node to which the analog signal output terminal is connected, and a node in which the resistor element is opened In the configuration in which the above and the like are circulated, it is preferable to perform the lap as follows, for example. That is, when a digital signal to be converted into digital-analog is input in time series, a ring-shaped resistor circuit connected to the analog signal output terminal corresponding to the value of the digital signal at the time of the previous digital-analog conversion It is preferable to perform a circulation in which one of the first and second reference voltage terminals is connected to this node during the current analog-digital conversion.
 また、上記のように、第1の基準電圧端子が接続されるノードと第2の基準電圧端子が接続されるノードとを巡回させる場合に、リング状抵抗回路において、第1および第2の基準電圧端子のいずれか一方が接続されるノードから見て、第1および第2の基準電圧端子に接続される両ノード間の抵抗値が最大となるノードを、第1および第2の基準電圧端子のいずれか他方が接続されるノードとすることが好ましい。 Further, as described above, when the node connected to the first reference voltage terminal and the node connected to the second reference voltage terminal are circulated, the first and second references in the ring resistance circuit As viewed from the node to which one of the voltage terminals is connected, the node having the maximum resistance value between the two nodes connected to the first and second reference voltage terminals is designated as the first and second reference voltage terminals. It is preferable that either one of the nodes is connected.
 また、上記のように、第1の基準電圧端子が接続されるノードと第2の基準電圧端子が接続されるノードとを巡回させる場合に、リング状抵抗回路において、第4のスイッチ群によって抵抗素子間が開放されるノードの一側の抵抗素子の開放端を第1の基準電圧端子が接続されるノードとし、抵抗素子間が開放されるノードの他側の抵抗素子の開放端を第2の基準電圧端子が接続されるノードとしてもよい。 Further, as described above, when the node connected to the first reference voltage terminal and the node connected to the second reference voltage terminal are circulated as described above, in the ring-shaped resistor circuit, the resistance is set by the fourth switch group. The open end of the resistance element on one side of the node where the element is opened is a node to which the first reference voltage terminal is connected, and the open end of the resistor element on the other side of the node where the element is opened is the second. The reference voltage terminal may be connected to a node.
 本発明のデルタシグマ型DA変換装置は、所定のサンプリング周波数でサンプリングされた第1のデジタル信号をアナログ信号に変換するデルタシグマ型デジタル-アナログ変換装置であって、第1のデジタル信号を補間して、サンプリング周波数より高い周波数の第2のデジタル信号に変換するデジタル補間フィルタと、第2のデジタル信号をノイズシェイピングして、より低ビット数の第3のデジタル信号に変換するデルタシグマ変調器と、第3のデジタル信号をアナログ信号に変換するデジタル-アナログ変換器と、を備えている。 A delta sigma type DA converter according to the present invention is a delta sigma type digital-analog converter that converts a first digital signal sampled at a predetermined sampling frequency into an analog signal, and interpolates the first digital signal. A digital interpolation filter that converts the second digital signal to a second digital signal having a frequency higher than the sampling frequency, and a delta-sigma modulator that noise-shapes the second digital signal and converts the second digital signal to a third digital signal having a lower bit number; And a digital-analog converter for converting the third digital signal into an analog signal.
 そして、デジタル-アナログ変換器は、リング状に接続された複数個の抵抗素子からなるリング状抵抗回路と、第1および第2の基準電圧端子と、アナログ信号出力端子と、リング状抵抗回路のいずれかのノードに第1の基準電圧端子を選択的に接続する第1の接続回路と、リング状抵抗回路のいずれかのノードに第2の基準電圧端子を選択的に接続する第2の接続回路と、リング状抵抗回路における、第1の基準電圧端子が接続されたノードから第2の基準電圧端子が接続されたノードへ至る経路中の、デジタル-アナログ変換対象となるデジタル信号の値に対応したいずれかのノードにアナログ信号出力端子を選択的に接続する第3の接続回路と、リング状抵抗回路のいずれかのノードの位置で抵抗素子間の接続を選択的に開放する開放回路とを備え、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続されるリング状抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によってアナログ信号出力端子が接続されるリング状抵抗回路のノードが変更され、開放回路によってリング状抵抗回路における、第2の基準電圧端子が接続されたノードから第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放される。 The digital-analog converter includes a ring-shaped resistor circuit composed of a plurality of resistor elements connected in a ring shape, first and second reference voltage terminals, an analog signal output terminal, and a ring-shaped resistor circuit. A first connection circuit that selectively connects the first reference voltage terminal to any node, and a second connection that selectively connects the second reference voltage terminal to any node of the ring-shaped resistance circuit In the circuit and the ring-shaped resistor circuit, the value of the digital signal to be converted from digital to analog in the path from the node connected to the first reference voltage terminal to the node connected to the second reference voltage terminal A third connection circuit that selectively connects an analog signal output terminal to one of the corresponding nodes, and an opening that selectively opens the connection between the resistance elements at the position of one of the nodes of the ring resistance circuit. Each of the nodes of the ring-like resistor circuit to which the first reference voltage terminal and the second reference voltage terminal are connected by the first and second connection circuits, respectively, and a third connection corresponding thereto The node of the ring resistance circuit to which the analog signal output terminal is connected is changed by the circuit, and the first reference voltage terminal is connected from the node to which the second reference voltage terminal is connected in the ring resistance circuit by the open circuit. The connection between the resistive elements is released at the position of any node in the path returning to the node.
 この構成によれば、本発明のDA変換器と同様の作用効果を奏する。 According to this configuration, the same effects as the DA converter of the present invention are exhibited.
 上記構成のデルタシグマ型DA変換装置においては、第1の接続回路は、リング状抵抗回路の各ノードと第1の基準電圧端子との間にそれぞれ接続された第1のスイッチ群からなり、第2の接続回路は、リング状抵抗回路の各ノードと第2の基準電圧端子との間にそれぞれ接続された第2のスイッチ群からなり、第3の接続回路は、リング状抵抗回路の各ノードとアナログ信号出力端子との間にそれぞれ接続された第3のスイッチ群からなり、開放回路は、リング状抵抗回路において、隣接する抵抗素子同士の間にそれぞれ挿入された第4のスイッチ群からなり、第1の接続回路は、第4のスイッチ群の各スイッチの一端側でリング状抵抗回路の各ノードに接続され、第2および第3の接続回路は、第4のスイッチ群の各スイッチの他端側でリング状抵抗回路の各ノードに接続され、第1、第2、第3および第4のスイッチ群を構成する各スイッチは、変換対象となるデジタル信号に応じて、短絡状態と開放状態とが切り替えられることが好ましい。 In the delta-sigma type DA converter having the above-described configuration, the first connection circuit includes a first switch group connected between each node of the ring-shaped resistance circuit and the first reference voltage terminal. The second connection circuit includes a second switch group connected between each node of the ring-shaped resistor circuit and the second reference voltage terminal, and the third connection circuit includes each node of the ring-shaped resistor circuit. And the analog signal output terminal, respectively, and the open circuit is composed of a fourth switch group inserted between the adjacent resistance elements in the ring-shaped resistance circuit. The first connection circuit is connected to each node of the ring-shaped resistance circuit on one end side of each switch of the fourth switch group, and the second and third connection circuits are connected to each switch of the fourth switch group. The other end side Each of the switches constituting the first, second, third and fourth switch groups connected to each node of the ring resistance circuit is switched between a short-circuit state and an open state according to a digital signal to be converted. It is preferred that
 上記構成のデルタシグマ型DA変換装置においては、デコーダは、製造ばらつきによる影響をランダマイズするように、第1、第2、第3および第4のスイッチ群を切り替えることが好ましい。 In the delta-sigma type DA converter having the above configuration, the decoder preferably switches the first, second, third, and fourth switch groups so as to randomize the influence due to the manufacturing variation.
 また、上記構成のデルタシグマ型DA変換装置においては、デコーダは、常に同じスイッチ群が選択されないように、第1、第2、第3および第4のスイッチ群を切り替えることが好ましい。 In the delta-sigma type DA converter having the above configuration, the decoder preferably switches the first, second, third, and fourth switch groups so that the same switch group is not always selected.
 本発明のDA変換器によれば、複数個の抵抗素子をリング状に接続してリング状抵抗回路を構成し、第1および第2の接続回路によって第1の基準電圧端子および第2の基準電圧端子が接続されるリング状抵抗回路のノードがそれぞれ変更され、それに対応して第3の接続回路によってアナログ信号出力端子が接続されるリング状抵抗回路のノードが変更され、開放回路によってリング状抵抗回路における、第2の基準電圧端子が接続されたノードから第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放されるので、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。しかも、第1、第2および第3の接続回路が必要となるものの、抵抗型DA変換器のようなDEM回路や電流補償回路が不要で回路規模、消費電流の増大も防ぐことができる。 According to the DA converter of the present invention, a plurality of resistance elements are connected in a ring shape to form a ring-shaped resistance circuit, and the first reference voltage terminal and the second reference voltage are configured by the first and second connection circuits. The node of the ring-shaped resistor circuit to which the voltage terminal is connected is changed, and the node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by the third connection circuit, and the ring shape is changed by the open circuit. In the resistor circuit, since the connection between the resistive elements is released at the position of any node in the path returning from the node to which the second reference voltage terminal is connected to the node to which the first reference voltage terminal is connected, High-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations. In addition, although the first, second, and third connection circuits are required, a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and an increase in circuit scale and current consumption can be prevented.
 また、本発明のデルタシグマ型DA変換装置によれば、上記した本発明のDA変換器を用いて構成されるので、上記本発明のDA変換器と同様の作用効果を奏する。 Further, according to the delta-sigma type DA converter of the present invention, since it is configured using the above-described DA converter of the present invention, the same effects as the DA converter of the present invention are exhibited.
図1は本発明の実施の形態1のDA変換器の構成を示す回路図である。FIG. 1 is a circuit diagram showing a configuration of a DA converter according to Embodiment 1 of the present invention. 図2は本発明の実施の形態1のDA変換器を用いて構成したDA変換装置の構成を示すブロック図である。FIG. 2 is a block diagram showing a configuration of a DA converter configured using the DA converter according to the first embodiment of the present invention. 図3は本発明のDA変換器を用いて構成した本発明の実施の形態2のデルタシグマ型DA変換装置の構成を示すブロック図である。FIG. 3 is a block diagram showing a configuration of a delta-sigma type DA converter according to Embodiment 2 of the present invention configured using the DA converter of the present invention. 図4は一般的な抵抗ストリング型DA変換器の構成を示す回路図である。FIG. 4 is a circuit diagram showing a configuration of a general resistor string type DA converter. 図5は一般的な抵抗型DA変換器の構成を示す回路図である。FIG. 5 is a circuit diagram showing a configuration of a general resistance type DA converter. 図6は一般的なデルタシグマ型DA変換装置の構成を示すブロック図である。FIG. 6 is a block diagram showing a configuration of a general delta-sigma type DA converter. 図7はDEM回路と電流補償回路とが追加されたデルタシグマ型変換装置の構成を示すブロック図である。FIG. 7 is a block diagram showing a configuration of a delta-sigma type conversion device to which a DEM circuit and a current compensation circuit are added.
 以下、本発明の実施の形態を、図面を参照しながら説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
 (実施の形態1)
 本発明の実施の形態1のDA変換器は、図1に示すように、リング状に接続された複数個の抵抗素子R1、R2、・・・、RNからなるリング状抵抗回路1と、第1および第2の基準電圧端子Vref1、Vref2と、アナログ信号出力端子Voutと、リング状抵抗回路1のいずれかのノード(抵抗素子R1、R2、・・・、RN同士の接続点)に第1の基準電圧端子Vref1を選択的に接続する第1の接続回路2と、リング状抵抗回路1のいずれかのノードに第2の基準電圧端子Vref2を選択的に接続する第2の接続回路3と、リング状抵抗回路1における、第1の基準電圧端子Vref1が接続されたノードから第2の基準電圧端子Vref2が接続されたノードへ至る経路中の、デジタル-アナログ変換対象となるデジタル信号の値に対応したいずれかのノードにアナログ信号出力端子Voutを選択的に接続する第3の接続回路4と、リング状抵抗回路1のいずれかのノードの位置で抵抗素子R1、R2、・・・、RN間の接続を選択的に開放する開放回路5とを備えている。
(Embodiment 1)
DA converter of the first embodiment of the present invention, as shown in FIG. 1, a plurality of resistive elements connected in a ring R 1, R 2, · · ·, a ring-shaped resistor circuit 1 consisting of R N , First and second reference voltage terminals V ref1 , V ref2 , analog signal output terminal V out, and any one of the nodes of the ring resistance circuit 1 (resistance elements R 1 , R 2 ,..., R A first connection circuit 2 that selectively connects the first reference voltage terminal V ref1 to the connection point between N and a second reference voltage terminal V ref2 that is selected at any node of the ring-shaped resistance circuit 1 In the second connection circuit 3 and the ring resistance circuit 1 in the path from the node to which the first reference voltage terminal V ref1 is connected to the node to which the second reference voltage terminal V ref2 is connected Any of the nos corresponding to the value of the digital signal to be converted from digital to analog In a third connecting circuit 4 for selectively connecting the analog signal output terminal V out, the resistance element R 1 at the position of any node of the ring-shaped resistor circuit 1, R 2, ···, between R N And an open circuit 5 for selectively releasing the connection.
 そして、このDA変換器では、第1および第2の接続回路2、3によって第1の基準電圧端子Vref1および第2の基準電圧端子Vref2が接続されるリング状抵抗回路1のノードがそれぞれ変更され、開放回路5によってリング状抵抗回路1における、第2の基準電圧端子Vref2が接続されたノードから第1の基準電圧端子Vref1が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子R1、R2、・・・、RN間の接続が開放され、それに対応して第3の接続回路によってアナログ信号出力端子Voutが接続されるリング状抵抗回路1のノードが変更される。 In this DA converter, the nodes of the ring-shaped resistance circuit 1 to which the first reference voltage terminal V ref1 and the second reference voltage terminal V ref2 are connected by the first and second connection circuits 2 and 3 respectively. Any node in the path changed and returned from the node connected to the second reference voltage terminal V ref2 to the node connected to the first reference voltage terminal V ref1 in the ring-shaped resistance circuit 1 by the open circuit 5 Of the ring-shaped resistance circuit 1 in which the connection between the resistance elements R 1 , R 2 ,..., R N is opened and the analog signal output terminal V out is correspondingly connected by the third connection circuit. The node is changed.
 上記構成のDA変換器においては、第1の接続回路2は、リング状抵抗回路1の各ノードと第1の基準電圧端子Vref1との間にそれぞれ接続された第1のスイッチ群(スイッチSd_1、Sd_2、・・・、Sd_Nからなる)からなる。第2の接続回路3は、リング状抵抗回路1の各ノードと第2の基準電圧端子Vref2との間にそれぞれ接続された第2のスイッチ群(スイッチSg_1、Sg_2、・・・、Sg_Nからなる)からなる。第3の接続回路4は、リング状抵抗回路1の各ノードとアナログ信号出力端子Voutとの間にそれぞれ接続された第3のスイッチ群(スイッチSo_1、So_2、・・・、So_Nからなる)からなる。開放回路5は、リング状抵抗回路1において、隣接する抵抗素子R1、R2、・・・、RN同士の間にそれぞれ挿入された第4のスイッチ群(スイッチSr_1、Sr_2、・・・、Sr_Nからなる)からなる。 In the DA converter configured as described above, the first connection circuit 2 includes a first switch group (switch S) connected between each node of the ring-shaped resistor circuit 1 and the first reference voltage terminal V ref1. d_1 , S d_2 ,..., S d_N ). The second connection circuit 3 includes a second switch group (switches S g_1 , S g_2 ,...) Connected between each node of the ring resistance circuit 1 and the second reference voltage terminal V ref2 . Sg_N ). Third connection circuit 4, a third switch group that is connected between each node and the analog signal output terminal V out of the ring-shaped resistor circuit 1 (switch S o_1, S o_2, ···, S o_N Consist of). Open circuit 5, the ring-shaped resistor circuit 1, the resistance element R 1 adjacent, R 2, · · ·, a fourth group of switches respectively inserted between the adjacent R N (switch S r_1, S r_2, · ··· , Sr_N ).
 第1の接続回路2は、開放回路5となる第4のスイッチ群の各スイッチSr_1、Sr_2、・・・、Sr_Nの一端側でリング状抵抗回路1の各ノードに接続される。第2および第3の接続回路3、4は、開放回路5となる第4のスイッチ群の各スイッチSr_1、Sr_2、・・・、Sr_Nの他端側でリング状抵抗回路1の各ノードに接続される。そして、第1、第2、第3および第4のスイッチ群を構成する各スイッチは、変換対象となるデジタル信号に応じて、短絡状態と開放状態とが切り替えられる。 The first connection circuit 2 is connected to each node of the ring-shaped resistance circuit 1 on one end side of each switch S r_1 , S r_2 ,..., S r_N of the fourth switch group serving as the open circuit 5. The second and third connection circuits 3 and 4 are connected to each of the ring-shaped resistance circuits 1 on the other end side of the switches S r_1 , S r_2 ,. Connected to the node. And each switch which comprises the 1st, 2nd, 3rd and 4th switch group is switched to a short circuit state and an open state according to the digital signal used as conversion object.
 また、上記構成のDA変換器においては、リング状抵抗回路1において、第1の基準電圧端子Vref1が接続されるノードと第2の基準電圧端子Vref2が接続されるノードとアナログ信号出力端子Voutが接続されるノードと抵抗素子R1、R2、・・・、RN間が開放されるノードとを一つのデジタル信号のDA変換を行う毎にそれぞれ巡回させる構成としている。 In the DA converter configured as described above, in the ring-shaped resistor circuit 1, a node to which the first reference voltage terminal V ref1 is connected, a node to which the second reference voltage terminal V ref2 is connected, and an analog signal output terminal. The node to which V out is connected and the node in which the resistance elements R 1 , R 2 ,..., R N are opened are circulated each time DA conversion of one digital signal is performed.
 また、巡回は例えば以下のように行われる。すなわち、デジタル-アナログ変換対象となるデジタル信号が時系列的に入力される場合において、前回のデジタル-アナログ変換時においてデジタル信号の値に対応してアナログ信号出力端子Voutに接続されたリング状抵抗回路1のノードを、今回のアナログ-デジタル変換時において第1および第2の基準電圧端子Vref1、Vref2のいずれか一方が接続されるノードとする巡回を行っている。 The patrol is performed as follows, for example. That is, when digital signals to be converted into digital-analog are input in time series, a ring connected to the analog signal output terminal Vout corresponding to the value of the digital signal at the previous digital-analog conversion. A cycle is performed in which the node of the resistor circuit 1 is used as a node to which one of the first and second reference voltage terminals V ref1 and V ref2 is connected during the current analog-digital conversion.
 また、上記のように、第1の基準電圧端子Vref1が接続されるノードと第2の基準電圧端子Vref2が接続されるノードとを巡回させる場合に、リング状抵抗回路1において、第1および第2の基準電圧端子Vref1、Vref2のいずれか一方が接続されるノードから見て、第1および第2の基準電圧端子Vref1、Vref2に接続される両ノード間の抵抗値が最大となるノードを、第1および第2の基準電圧端子Vref1、Vref2のいずれか他方が接続されるノードとしている。 Further, as described above, in the case where the node connected to the first reference voltage terminal V ref1 and the node connected to the second reference voltage terminal V ref2 are circulated, and when viewed from any node one is connected to the second reference voltage terminal V ref1, V ref2, the resistance value between both nodes connected to the first and second reference voltage terminals V ref1, V ref2 is The maximum node is a node to which the other of the first and second reference voltage terminals V ref1 and V ref2 is connected.
 また、上記のように、第1の基準電圧端子Vref1が接続されるノードと第2の基準電圧端子Vref2が接続されるノードとを巡回させる場合に、リング状抵抗回路1において、開放回路5となる第4のスイッチ群(スイッチSr_1、Sr_2、・・・、Sr_Nからなる)によって抵抗素子R1、R2、・・・、RN間が開放されるいずれか一つのノードの一側の抵抗素子の開放端を第1の基準電圧端子Vref1が接続されるノードとし、抵抗素子間が開放されるノードの他側の抵抗素子の開放端を第2の基準電圧端子Vref2が接続されるノードとしている。 Further, as described above, when the node connected to the first reference voltage terminal V ref1 and the node connected to the second reference voltage terminal V ref2 are circulated, the ring-shaped resistor circuit 1 has an open circuit. Any one of the nodes in which the resistance elements R 1 , R 2 ,..., R N are opened by a fourth switch group (consisting of switches S r_1 , S r_2 ,. The open end of the resistor element on one side is a node to which the first reference voltage terminal V ref1 is connected, and the open end of the resistor element on the other side of the node where the resistor elements are open is the second reference voltage terminal V. It is a node to which ref2 is connected.
 以下、この実施の形態1のDA変換器についてさらに詳細に説明する。このDA変換器は、高電圧が供給される基準電圧端子Vref1、低電圧が供給される基準電圧端子Vref2と、DA変換のための必要な分解能に応じた個数の、同じ抵抗値Rを持つ抵抗素子群(リング状(ループ状)に接続された抵抗素子R1、R2、・・・、RNからなる)と、基準電圧端子Vref1と抵抗素子群とを接続するスイッチ群(スイッチSd_1、Sd_2、・・・、Sd_Nからなる)と、基準電圧端子Vref2と抵抗素子群とを接続するスイッチ群(スイッチSg_1、Sg_2、・・・、Sg_Nからなる)と、リング状に接続された抵抗素子R1、R2、・・・、RNにおいて互いに隣接した抵抗素子同士の間に各々挿入されたスイッチ群(スイッチSr_1、Sr_2、・・・、Sr_Nからなる)と、アナログ信号出力端子Voutと抵抗素子群とを接続するスイッチ群(スイッチSo_1、So_2、・・・、So_Nからなる)とからなる。 Hereinafter, the DA converter according to the first embodiment will be described in more detail. This DA converter has a reference voltage terminal V ref1 to which a high voltage is supplied, a reference voltage terminal V ref2 to which a low voltage is supplied, and the same resistance value R in a number corresponding to the necessary resolution for DA conversion. resistive element group having (ring-shaped (resistor connected in a loop) element R 1, R 2, · · ·, consists R N) and the reference voltage terminal V ref1 and the resistor element group and a switch group that connects ( switch S d_1, S d_2, · · ·, consists S d_n) and the reference voltage terminal V ref2 and the resistor element group and a switch group that connects (switch S g_1, S g_2, · · ·, consists S G - n) When the resistance element R 1 connected in a ring, R 2, · · ·, each inserted switches between the adjacent resistive elements adjacent to each other in R N (switch S r_1, S r_2, · · ·, and S consists of R_n), to connect the analog signal output terminal V out and the resistive element group The switch group consisting of (switch S o_1, S o_2, ···, consisting of S o_N) and.
 抵抗素子とそれぞれのスイッチは、(N-1)値のDA変換器の場合、それぞれN個ある。k番目の抵抗素子Rkは、一方の端子がk番目のスイッチSg_k、Sr_k、So_kに接続され、他方の端子が(k+1)番目のスイッチSd_k+1、Sr_k+1に接続されている。k番目のスイッチSd_kは、一方の端子が基準電圧端子Vref1に接続され、他方の端子が(k-1)番目の抵抗素子Rk-1とk番目のスイッチSr_kとに接続されている。k番目のスイッチSg_kは、一方の端子が基準電圧端子Vref2に接続され、他方の端子がk番目の抵抗素子Rkと、k番目のスイッチSr_k、So_kとに接続されている。k番目のスイッチSr_kは、一方の端子が(k-1)番目の抵抗素子Rk-1とk番目のスイッチSd_kとに接続され、他方の端子がk番目の抵抗素子Rkと、k番目のスイッチSg_k、So_kとに接続されている。k番目のスイッチSo_kは、一方の端子がk番目の抵抗素子Rkと、k番目のスイッチSr_k、Sg_kとに接続され、他方の端子がアナログ信号出力端子Voutに接続されている。 In the case of the (N−1) value DA converter, there are N resistance elements and respective switches. The k-th resistance element R k has one terminal connected to the k-th switches S g_k , S r_k , S o_k , and the other terminal connected to the (k + 1) -th switches S d_k + 1 , S r_k + 1 . Has been. The k-th switch S d_k has one terminal connected to the reference voltage terminal V ref1 and the other terminal connected to the (k−1) -th resistance element R k-1 and the k-th switch S r_k. Yes. The k-th switch S g_k has one terminal connected to the reference voltage terminal V ref2 and the other terminal connected to the k-th resistance element R k and the k-th switches S r_k and So_k . The kth switch S r_k has one terminal connected to the (k−1) th resistor element R k−1 and the kth switch S d_k, and the other terminal connected to the kth resistor element R k . The kth switches S g_k and S o_k are connected. The k-th switch S o_k has one terminal connected to the k-th resistance element R k and the k-th switches S r_k and S g_k, and the other terminal connected to the analog signal output terminal V out . .
 本発明の実施の形態1のDA変換器は、各スイッチSd_1、Sd_2、・・・、Sd_N、Sg_1、Sg_2、・・・、Sg_N、Sr_1、Sr_2、・・・、Sr_N、So_1、So_2、・・・、So_Nを制御することによって、図4に示した抵抗ストリング型DA変換器と同様に、基準電圧端子Vref1と基準電圧端子Vref2の電圧差を(N-1)分圧した電圧を得ることができる。 DA converter of the first embodiment of the present invention, each of the switches S d_1, S d_2, ···, S d_N, S g_1, S g_2, ···, S g_N, S r_1, S r_2, ··· , S r_N , S o_1 , S o_2 ,..., S o_N , the voltages at the reference voltage terminal V ref1 and the reference voltage terminal V ref2 are the same as in the resistor string DA converter shown in FIG. A voltage obtained by dividing the difference by (N−1) can be obtained.
 この電圧を得るためのスイッチSd_1、Sd_2、・・・、Sd_N、Sg_1、Sg_2、・・・、Sg_N、Sr_1、Sr_2、・・・、Sr_N、So_1、So_2、・・・、So_Nの制御について、以下に説明する。 Switch S d_1 to obtain this voltage, S d_2, ···, S d_N , S g_1, S g_2, ···, S g_N, S r_1, S r_2, ···, S r_N, S o_1, S The control of o_2 ,..., S o_N will be described below.
 今、基準電圧端子Vref1と抵抗素子群とを接続するスイッチ群において、k番目のスイッチSd_kが短絡され、他のN-1個のスイッチSd_1、Sd_2、・・・、Sd_k-1、Sd_k+1、・・・、Sd_Nが開放されており、基準電圧端子Vref2と抵抗素子群を接続するスイッチ群においても、k番目のスイッチSg_kが短絡され、他のN-1個のスイッチSg_1、Sg_2、・・・、Sg_k-1、Sg_k+1、・・・、Sg_Nが開放されているとする。この時、抵抗素子同士を接続するスイッチ群では、k番目のスイッチSr_kが開放され、他のN-1個のスイッチSr_1、Sr_2、・・・、Sr_k-1、Sr_k+1、・・・、Sr_Nは短絡される。 Now, in the switch group connecting the reference voltage terminal V ref1 and the resistor element group, the k-th switch S d_k is short-circuited, and the other N−1 switches S d_1 , S d_2 ,..., S d_k− 1 , S d_k + 1 ,..., S d_N are open, and in the switch group connecting the reference voltage terminal V ref2 and the resistance element group, the kth switch S g_k is short-circuited, and the other N− one switch S g_1, S g_2, ···, S g_k-1, S g_k + 1, ···, and S g_N is open. At this time, in the switch group connecting the resistance elements, the k-th switch S r_k is opened, and the other N−1 switches S r_1 , S r_2 ,..., S r_k−1 , S r_k + 1. ..., Sr_N are short-circuited.
 本発明のDA変換器において、図4に示した従来の抵抗ストリング型DA変換器における、抵抗素子Rl-1と抵抗素子Rlの間の電圧に相当する電圧を取り出す際には、(k+l)をNで割った余りをmとすると、アナログ信号出力端子Voutと抵抗素子群を接続するスイッチ群のm番目のスイッチSo_mが短絡され、他のN-1個のスイッチSo_1、So_2、・・・、So_ m -1、So_m+1、・・・、So_Nは開放される。 In the DA converter of the present invention, when taking out a voltage corresponding to the voltage between the conventional resistor string type DA converter shown in FIG. 4, the resistance element R l-1 and the resistance element R l are, (k + l ) Divided by N is m, the m-th switch S o_m of the switch group connecting the analog signal output terminal V out and the resistance element group is short-circuited, and the other N−1 switches S o_1 , S o_2 ,..., S o_m −1 , S o_m + 1 ,.
 このようにスイッチを制御することで、この実施の形態1のDA変換器において、スイッチSd_kに接続されている抵抗素子Rk-1が従来の抵抗ストリング型DA変換器における抵抗素子RNに、スイッチSg_kに接続されている抵抗素子Rkが従来の抵抗ストリング型DA変換器における抵抗素子R1に、スイッチSo_mに接続されている抵抗素子Rm-1、Rmがそれぞれ従来の抵抗ストリング型DA変換器における抵抗素子Rl-1、Rlに相当し、所望の電圧を取り出すことができる。 By thus controlling the switches, in the DA converter of the first embodiment, the resistance element R N resistive elements R k-1 connected to the switch S d_k is of a conventional resistor string type DA converter , the resistor R 1 resistive element R k which are connected to the switch S G_k is of a conventional resistor string type DA converter, the resistance element is connected to a switch S o_m R m-1, R m is the conventional, respectively resistance in the resistor string type DA converter element R l-1, corresponds to R l, can be taken out a desired voltage.
 このように構成した結果、図1に示す本発明の実施の形態1のDA変換器において、基準電圧端子Vref1と抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)とを接続するスイッチ群(スイッチSd_1、Sd_2、・・・、Sd_Nからなる)、基準電圧端子Vref2と抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)とを接続するスイッチ群(スイッチSg_1、Sg_2、・・・、Sg_Nからなる)、抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)の隣り合う抵抗素子同士を接続するスイッチ群(スイッチSr_1、Sr_2、・・・、Sr_Nからなる)、および、アナログ信号出力端子Voutと抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)とを接続するスイッチ群(スイッチSo_1、So_2、・・・、So_Nからなる)によって、2つの基準電圧端子Vref1、Vref2と、分圧によってDA変換を行う抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)との接続点を巡回させることにより、製造ばらつきによる影響をランダマイズできる。また、本発明の実施の形態1のDA変換器は、抵抗ストリング型DA変換器と同様の動作原理によりDA変換を行うので、基準電圧端子の抵抗成分の影響によって電流値が変化することはない。 Thus constituted result, the DA converter of the first embodiment of the present invention shown in FIG. 1, the reference voltage terminal V ref1 and the resistor element group (resistive element R 1, R 2, · · ·, consists R N ) switches for connecting the (switch S d_1, S d_2, ···, consists S d_n), the reference voltage terminal V ref2 and the resistor element group (resistive element R 1, R 2, ···, from R N becomes) a switch group that connects (switch S g_1, S g_2, ···, consists S G - n), resistive element group (resistive element R 1, R 2, ···, consists R N) adjacent the A group of switches (consisting of switches S r_1 , S r_2 ,..., S r_N ) that connect the resistance elements, and an analog signal output terminal V out and a group of resistance elements (resistance elements R 1 , R 2 ,... , switches for connecting the consisting R N) (switch S o_1, S o_2, ···, consists S o_N) Therefore, the two reference voltage terminals V ref1, V ref2, resistive element group for performing the DA conversion by partial pressure is cyclically the connection point of the (resistive element R 1, R 2, · · ·, consists R N) Thus, the effects of manufacturing variations can be randomized. Further, since the DA converter according to the first embodiment of the present invention performs DA conversion based on the same operation principle as that of the resistor string type DA converter, the current value does not change due to the influence of the resistance component of the reference voltage terminal. .
 以上のように、この実施の形態1によれば、複数個の抵抗素子R1、R2、・・・、RNをリング状に接続してリング状抵抗回路1を構成し、第1および第2の接続回路2、3によって第1の基準電圧端子Vref1および第2の基準電圧端子Vref2が接続されるリング状抵抗回路1のノードがそれぞれ変更され、開放回路5によって抵抗素子間の接続が開放されるノードが変更され、それに対応して第3の接続回路4によってアナログ信号出力端子Voutが接続されるリング状抵抗回路1のノードが変更されるので、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。しかも、第1、第2および第3の接続回路2、3、4と、開放回路5とが追加されるものの、抵抗型DA変換器のようなDEM回路や電流補償回路が不要で回路規模、消費電流の増大も防ぐことができる。 As described above, according to the first embodiment, a plurality of resistance elements R 1, R 2, · · ·, by connecting R N in a ring shape and a ring-shaped resistor circuit 1, the first and The nodes of the ring-shaped resistor circuit 1 to which the first reference voltage terminal V ref1 and the second reference voltage terminal V ref2 are connected are changed by the second connection circuits 2 and 3, respectively. Since the node at which the connection is released is changed, and the node of the ring-shaped resistor circuit 1 to which the analog signal output terminal Vout is connected is changed by the third connection circuit 4 correspondingly, the conversion accuracy due to manufacturing variations is improved. High-precision DA conversion can be performed without causing a decrease. In addition, although the first, second and third connection circuits 2, 3, 4 and the open circuit 5 are added, a DEM circuit such as a resistive DA converter and a current compensation circuit are unnecessary, and the circuit scale is An increase in current consumption can also be prevented.
 すなわち、本発明の実施の形態1のDA変換器はDEMと同様に製造ばらつきによる影響をランダマイズし、積分非直線性誤差の増大、歪みの悪化を低減できる。また、デジタルデータ入力による電流値の変化もなく、電流補償回路の挿入による回路規模、消費電流の増大も防ぐことができる。 That is, the DA converter according to the first embodiment of the present invention can randomize the influence due to the manufacturing variation like the DEM, and can reduce the increase of the integral nonlinearity error and the deterioration of the distortion. Further, there is no change in current value due to digital data input, and an increase in circuit scale and current consumption due to insertion of a current compensation circuit can be prevented.
 本発明の具体的実施例として、7値のDA変換を行う図2のようなDA変換装置の動作を説明する。図2の実施例では、デジタル入力Din、具体的には、3ビットのデジタル信号D1、D2、D3を図1に示したDA変換器を駆動するための各スイッチの制御信号に変換するデコーダ60と、図1に示したDA変換器70とからなる。DA変換器70からアナログ出力Aoutが出力される。 As a specific embodiment of the present invention, the operation of a DA converter as shown in FIG. 2 that performs 7-value DA conversion will be described. In the embodiment of FIG. 2, the digital input Din, specifically, the 3-bit digital signals D 1 , D 2 and D 3 are converted into control signals for the respective switches for driving the DA converter shown in FIG. 1 and the DA converter 70 shown in FIG. An analog output Aout is output from the DA converter 70.
 デコーダ60は、3ビットのデジタル信号D1、D2、D3を入力とし、8つのデジタル信号Dv_1、Dv_2、・・・、Dv_8と、8つのデジタル信号Dr_1、Dr_2、・・・、Dr_8と、8つのデジタル信号Do_1、Do_2、・・・、Do_8とを出力する。 The decoder 60 receives 3-bit digital signals D 1 , D 2 , D 3 as input, and receives eight digital signals D v_1 , D v_2 ,..., D v_8 and eight digital signals D r_1 , D r_2 ,. .. , D r_8 and eight digital signals D o_1 , D o_2 ,..., D o_8 are output.
 デジタル信号Dv_1、Dv_2、・・・、Dv_8は、DA変換器70において、各基準電圧端子Vref1、Vref2と抵抗素子群(抵抗素子R1、R2、・・・、RNからなる)を接続するスイッチ群(スイッチSd_1、Sd_2、・・・、Sd_8からなる)とスイッチ群(スイッチSg_1、Sg_2、・・・、Sg_8からなる)の制御信号として用いられる。 Digital signal D v_1, D v_2, ···, D v_8 , in the DA converter 70, the reference voltage terminal V ref1, V ref2 and the resistor element group (resistive element R 1, R 2, ···, R N switch group that connects from the consisting) (switch S d_1, S d_2, using · · ·, S consists D_8) and switch group (switches S g_1, S g_2, ···, as a control signal consisting of S G_8) It is done.
 デジタル信号Dr_1、Dr_2、・・・、Dr_8は、DA変換器70において、抵抗素子同士を接続するスイッチ群(スイッチSr_1、Sr_2、・・・、Sr_8からなる)の制御信号として用いられる。 The digital signals D r_1 , D r_2 ,..., D r_8 are control signals for a switch group (consisting of switches S r_1 , S r_2 ,..., S r_8 ) connecting the resistance elements in the DA converter 70. Used as
 デジタル信号Do_1、Do_2、・・・、Do_8は、アナログ信号出力端子Voutと抵抗素子群を接続するスイッチ群(スイッチSo_1、So_2、・・・、So_8からなる)の制御信号として用いられる。 Digital signals D o_1 , D o_2 ,..., D o_8 control the switch group ( consisting of switches S o_1 , S o_2 ,..., S o_8 ) that connects the analog signal output terminal V out and the resistor element group. Used as a signal.
 デコーダ60は、ある法則を持ってデジタル入力信号をデコードし、常に同じスイッチが選択されないようなデジタル信号を出力する。 The decoder 60 decodes the digital input signal with a certain rule, and outputs a digital signal so that the same switch is not always selected.
 デコーダの入力として、例えば“011”、“110”、“100”、“011”、“101”、“011”、“100”、“010”、“001”、“110”というデジタル信号を連続して変換する場合を考える。 As a decoder input, for example, digital signals “011”, “110”, “100”, “011”, “101”, “011”, “100”, “010”, “001”, “110” are consecutive. Then, consider the case of conversion.
 今、デコーダ60は、「1つ前の変換でDo_k=1の時、今回の変換でDv_k=1とし、1つ前の変換でDo_l=0の時、今回の変換でDv_l=0とする」という変換法則を持っているとする。なお、簡単のため、DA変換器70の2つの基準電圧端子Vref1、Vref2について、基準電圧端子Vref1の電圧を1、基準電圧端子Vref2の電圧を0とする。この時のデコーダ60のデジタル出力、DA変換器70のアナログ出力を表1に示す。 Now, the decoder 60 reads “When D o_k = 1 in the previous conversion, D v_k = 1 in the current conversion, and when D o_l = 0 in the previous conversion, D v_l = Suppose that it has a conversion law of “0”. For simplicity, regarding the two reference voltage terminals V ref1 and V ref2 of the DA converter 70, the voltage of the reference voltage terminal V ref1 is 1 and the voltage of the reference voltage terminal V ref2 is 0. Table 1 shows the digital output of the decoder 60 and the analog output of the DA converter 70 at this time.
 デジタル信号Dv_1、Dv_2、・・・、Dv_8は、1つ前の変換のデジタル信号Do_1、Do_2、・・・、Do_8をそのまま用いており、デジタル信号Dr_1、Dr_2、・・・、Dr_8は、デジタル信号Dv_1、Dv_2、・・・、Dv_8が反転されたものである。デジタル信号Do_1、Do_2、・・・、Do_8は、デコーダ60に入力されるデジタル信号D1、D2、D3によって定まる所望のアナログ出力を変換するため、抵抗ストリング型DA変換器と同じ要領で決められる。 The digital signals D v_1 , D v_2 ,..., D v_8 use the digital signals D o_1 , D o_2 , ..., D o_8 of the previous conversion as they are, and the digital signals D r_1 , D r_2 , .. , D r_8 is obtained by inverting the digital signals D v_1 , D v_2,. The digital signals D o_1 , D o_2 ,..., D o_8 are converted to a desired analog output determined by the digital signals D 1 , D 2 , and D 3 input to the decoder 60, It is decided in the same way.
 簡単に言えば、この巡回方法は、1つ前の変換でアナログ信号出力端子Voutと抵抗素子群の接続に用いていたスイッチの番号と、次の変換で2つの基準電圧端子Vref1、Vref2と抵抗素子群とを接続するスイッチの番号を同じとし、また抵抗素子間を接続するスイッチについては上記2つの基準電圧端子と抵抗素子群とを接続するスイッチとは逆の制御を行うことで、実現できる。 Simply put, this cyclic method uses the number of the switch used to connect the analog signal output terminal Vout and the resistive element group in the previous conversion, and the two reference voltage terminals Vref1 , Vref in the next conversion. The number of the switch that connects ref2 and the resistive element group is the same, and the switch that connects the resistive elements is controlled in the reverse manner to the switch that connects the two reference voltage terminals and the resistive element group. ,realizable.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 以上のように、本発明の実施の形態1のDA変換器を用いることで、基準電圧端子Vref1と抵抗素子群を接続するスイッチSd_1、Sd_2、・・・、Sd_N、基準電圧端子Vref2と抵抗素子群を接続するスイッチSg_1、Sg_2、・・・、Sg_N、アナログ信号出力端子Voutと抵抗素子群を接続するスイッチSo_1、So_2、・・・、So_Nを巡回させながら、抵抗ストリング型DA変換器と同じ仕組みでアナログ信号を取り出すことができる。すなわち、本発明ではリング状に接続された複数の抵抗素子において、2つの基準電圧端子Vref1、Vref2との接続点を巡回させることで、抵抗ストリング型DA変換器と同様の仕組みでDA変換を行う。その結果、そのため、製造ばらつきによる影響をランダマイズし、積分非直線性の増大、歪みの悪化を低減でき、また、デジタルデータ入力による電流値の変化もないため、電流補償回路の挿入による回路規模、消費電流の増大も防ぐことができる。 As described above, by using the DA converter according to the first embodiment of the present invention, the switches S d_1 , S d_2 ,..., S d_N , the reference voltage terminal connecting the reference voltage terminal V ref1 and the resistor element group. switch S g_1 connecting a resistive element group and V ref2, S g_2, ···, S g_N, switch S O_1 for connecting the analog signal output terminal V out resistance element group, S o_2, ···, the S O_N While circulating, an analog signal can be taken out by the same mechanism as the resistor string DA converter. In other words, in the present invention, in a plurality of resistance elements connected in a ring shape, DA conversion is performed by a mechanism similar to that of a resistance string type DA converter by circulating a connection point between two reference voltage terminals V ref1 and V ref2. I do. As a result, the effects of manufacturing variations can be randomized, integration nonlinearity can be increased, distortion can be reduced, and there is no change in the current value due to digital data input. An increase in current consumption can also be prevented.
 なお、上述のDA変換器は、基準電圧端子Vref1、Vref2の電圧を直接出力させることにより、9値のDA変換器として用いることもできる。また、上述の説明では7値のDA変換を例として示したが、DA変換の分解能はいくつであっても良い。また、デコーダの制御については、実施例で示した巡回方法以外にいくつも考えることができ、例えば、特許文献3のように、DEMに関する文献に書かれているものを応用することができる。 The above-described DA converter can also be used as a 9-value DA converter by directly outputting the voltages of the reference voltage terminals V ref1 and V ref2 . In the above description, the 7-value DA conversion is shown as an example, but the DA conversion may have any resolution. In addition to the cyclic method shown in the embodiment, a number of decoder controls can be considered. For example, as described in Patent Document 3, what is written in a document related to DEM can be applied.
 また、上記の実施の形態では、抵抗素子間の接続を開放するノードと、第1および第2の基準電圧端子に接続するノードとが同じノードであったが、同じノードである必要はない。つまり、抵抗素子群の全ての抵抗素子の直列回路の両端以外のノードに第1および第2の基準電圧端子の何れか少なくとも一方を接続する構成であってもよい。この場合、第1および第2の基準電圧端子が接続されたノードより外側に位置する抵抗素子は、DA変換に寄与しない状態となる。 In the above-described embodiment, the node that opens the connection between the resistive elements and the node that is connected to the first and second reference voltage terminals are the same node, but it is not necessary to be the same node. That is, at least one of the first and second reference voltage terminals may be connected to a node other than both ends of the series circuit of all the resistive elements in the resistive element group. In this case, the resistance element located outside the node to which the first and second reference voltage terminals are connected does not contribute to DA conversion.
 なお、上記の実施の形態では、リング状抵抗回路1のいずれかのノードを開放回路5で選択的に開放するようにしたが、抵抗回路を複数個の抵抗の直列回路で構成し、開放回路を省いたものを実施例としてあげることができる。この構成は、リング状抵抗回路における開放ノードを固定したものと等価である。 In the above embodiment, any node of the ring-shaped resistor circuit 1 is selectively opened by the open circuit 5, but the resistor circuit is constituted by a series circuit of a plurality of resistors, An example in which is omitted can be given as an example. This configuration is equivalent to a fixed open node in the ring resistance circuit.
 (実施の形態2)
 つぎに、本発明のDA変換器を用いた実施の形態2のデルタシグマ型DA変換装置について、図3を用いて説明する。図3のデルタシグマ型DA変換装置は、所定のサンプリング周波数でサンプリングされた第1のデジタル信号をアナログ信号に変換するデルタシグマ型DA変換装置であり、入力された第1のデジタル信号すなわちデジタル入力Dinを補間して、サンプリング周波数より高い周波数の第2のデジタル信号に変換するデジタル補間フィルタ80と、第2のデジタル信号をノイズシェイピングして、より低ビット数の第3のデジタル信号に変換するデルタシグマ変調器90と、デルタシグマ変調器90から出力される第3のデジタル信号をデコードするデコーダ100と、デコーダ100の出力を駆動信号として第3のデジタル信号をアナログ信号すなわちアナログ出力Aoutに変換するDA変換器110とを備えている。そして、デコーダ100およびデジタル-アナログ変換器110は、実施の形態1で説明したものが使用される。
(Embodiment 2)
Next, a delta-sigma type DA converter according to Embodiment 2 using the DA converter of the present invention will be described with reference to FIG. The delta sigma type DA converter in FIG. 3 is a delta sigma type DA converter that converts a first digital signal sampled at a predetermined sampling frequency into an analog signal. A digital interpolation filter 80 that interpolates Din and converts it to a second digital signal having a frequency higher than the sampling frequency, and noise-shapes the second digital signal to convert it to a third digital signal having a lower bit number. The delta-sigma modulator 90, the decoder 100 that decodes the third digital signal output from the delta-sigma modulator 90, and the third digital signal is converted into an analog signal, that is, an analog output Aout using the output of the decoder 100 as a drive signal. The DA converter 110 is provided. As the decoder 100 and the digital-analog converter 110, those described in the first embodiment are used.
 デジタル補間フィルタ80は、図7および図8で示したものと同じ構成で、あるサンプリング周波数fs、nビットのデジタル入力信号に対し、折り返しを防止しながら、あるオーバーサンプリング周波数fosのデジタル信号を出力する。なお、オーバーサンプリング周波数fosは、オーバーサンプリング率OSRによって
 fos = OSR × fs
の関係を持っている。オーバーサンプリング周波数fosとしては、一般的に64fs、128fs等の周波数が用いられる。
The digital interpolation filter 80 has the same configuration as that shown in FIGS. 7 and 8, and a digital signal having an oversampling frequency f os while preventing aliasing with respect to a digital input signal having a certain sampling frequency f s and n bits. Is output. The oversampling frequency f os depends on the oversampling rate OSR. F os = OSR × f s
Have a relationship. The oversampling frequency f os, generally 64f s, the frequency of such 128f s used.
 デルタシグマ変調器90は、図7および図8で示したものと同じ構成で、デジタル補間フィルタ80から得られたデータを、サンプリング周波数fsより高い周波数によってより低分解能のデータへと変換し、また同時にノイズシェイピングが施される。さらに、デコーダ100では、デルタシグマ変調器90から得られた高周波数、低分解能のデータをデコーダ100によって本発明のDA変換器110を駆動するデジタル信号に変換し、本発明のDA変換器110では、デコーダ100の出力に基づいて、デルタシグマ変調器90から得られた高周波数、低分解能のデータに対応したアナログ信号を出力する。 The delta sigma modulator 90 converts the data obtained from the digital interpolation filter 80 into lower resolution data at a frequency higher than the sampling frequency f s with the same configuration as that shown in FIGS. 7 and 8. At the same time, noise shaping is performed. Further, the decoder 100 converts the high-frequency, low-resolution data obtained from the delta-sigma modulator 90 into a digital signal for driving the DA converter 110 of the present invention by the decoder 100. The DA converter 110 of the present invention Based on the output of the decoder 100, an analog signal corresponding to the high-frequency, low-resolution data obtained from the delta-sigma modulator 90 is output.
 この実施の形態2によれば、実施の形態1で述べたように、このDA変換器は、製造ばらつきや電流値の変化による変換誤差の悪化を低減できるので、デルタシグマ型DA変換装置にこのDA変換器を使用することで、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行える。また、電流補償回路が不要なため、回路規模、消費電流の増大も防ぐことができる。 According to the second embodiment, as described in the first embodiment, since this DA converter can reduce deterioration of conversion error due to manufacturing variations and current value changes, the delta sigma type DA converter is provided with this DA converter. By using the DA converter, high-accuracy DA conversion can be performed without causing deterioration in conversion accuracy due to manufacturing variations. In addition, since a current compensation circuit is unnecessary, an increase in circuit scale and current consumption can be prevented.
 本発明にかかるDA変換器およびデルタシグマ変調型DA変換装置は、製造ばらつきや電流値の変化による変換誤差の悪化を低減でき、製造ばらつきによる変換精度の低下を招くことなく、高精度なDA変換を行え、また電流補償回路が不要なため、回路規模、消費電流の増大も防ぐことができるという効果を有し、デジタル音楽プレーヤなどにおけるDA変換処理回路として有用である。 The DA converter and the delta-sigma modulation type DA converter according to the present invention can reduce the deterioration of the conversion error due to the manufacturing variation and the change of the current value, and the high-precision DA conversion without causing the deterioration of the conversion accuracy due to the manufacturing variation. In addition, since the current compensation circuit is unnecessary, the circuit scale and current consumption can be prevented from increasing, which is useful as a DA conversion processing circuit in a digital music player or the like.
 1  リング状抵抗回路
 2  第1の接続回路
 3  第2の接続回路
 4  第3の接続回路
 5  開放回路
 80  デジタル補間フィルタ
 90  デルタシグマ変調器
 100  デコーダ
 110  DA変換器
 Vref1  第1の基準電圧端子
 Vref2  第2の基準電圧端子
 R1、R2、・・・、RN  抵抗素子
 Sd_1、Sd_2、・・・、Sd_N  スイッチ
 Sg_1、Sg_2、・・・、Sg_N  スイッチ
 So_1、So_2、・・・、So_N  スイッチ
 Sr_1、Sr_2、・・・、Sr_N  スイッチ
DESCRIPTION OF SYMBOLS 1 Ring-shaped resistance circuit 2 1st connection circuit 3 2nd connection circuit 4 3rd connection circuit 5 Open circuit 80 Digital interpolation filter 90 Delta-sigma modulator 100 Decoder 110 DA converter V ref1 1st reference voltage terminal V ref2 second reference voltage terminal R 1, R 2, ···, R N resistive elements S d_1, S d_2, ···, S d_N switch S g_1, S g_2, ···, S g_N switch S O_1, S o_2 , ..., S o_N switch S r_1 , S r_2 , ..., S r_N switch

Claims (12)

  1.  複数個の抵抗素子からなる抵抗回路と、
     第1および第2の基準電圧端子と、
     アナログ信号出力端子と、
     前記抵抗回路のいずれかのノードに前記第1の基準電圧端子を選択的に接続する第1の接続回路と、
     前記抵抗回路のいずれかのノードに前記第2の基準電圧端子を選択的に接続する第2の接続回路と、
     前記抵抗回路における、前記第1の基準電圧端子が接続されたノードから前記第2の基準電圧端子が接続されたノードへ至る経路中の、デジタル-アナログ変換対象となるデジタル信号の値に対応したいずれかのノードに前記アナログ信号出力端子を選択的に接続する第3の接続回路とを備えたデジタル-アナログ変換器。
    A resistance circuit composed of a plurality of resistance elements;
    First and second reference voltage terminals;
    An analog signal output terminal;
    A first connection circuit that selectively connects the first reference voltage terminal to any node of the resistance circuit;
    A second connection circuit for selectively connecting the second reference voltage terminal to any node of the resistance circuit;
    Corresponding to the value of the digital signal to be converted from digital to analog in the path from the node to which the first reference voltage terminal is connected to the node to which the second reference voltage terminal is connected in the resistor circuit And a third connection circuit for selectively connecting the analog signal output terminal to any one of the nodes.
  2.  前記抵抗回路は、リング状に接続された複数個の抵抗素子からなるリング状抵抗回路であり、前記リング状抵抗回路のいずれかのノードで抵抗素子間の接続を選択的に開放する開放回路を備えた請求項1記載のデジタル-アナログ変換器。 The resistor circuit is a ring resistor circuit composed of a plurality of resistor elements connected in a ring shape, and an open circuit that selectively opens a connection between the resistor elements at any node of the ring resistor circuit. The digital-analog converter according to claim 1, further comprising:
  3.  前記第1および第2の接続回路によって前記第1の基準電圧端子および前記第2の基準電圧端子が接続される前記リング状抵抗回路のノードがそれぞれ変更され、それに対応して前記第3の接続回路によって前記出力端子が接続される前記リング状抵抗回路のノードが変更され、前記開放回路によって前記リング状抵抗回路における、前記第2の基準電圧端子が接続されたノードから前記第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放される請求項2記載のデジタル-アナログ変換器。 The nodes of the ring-shaped resistance circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are respectively changed by the first and second connection circuits, and the third connection is correspondingly changed. The node of the ring-shaped resistor circuit to which the output terminal is connected is changed by a circuit, and the first reference voltage from the node to which the second reference voltage terminal is connected in the ring-shaped resistor circuit by the open circuit 3. The digital-analog converter according to claim 2, wherein the connection between the resistive elements is opened at the position of any node in the path returning to the node to which the terminal is connected.
  4.  前記第1の接続回路は、前記リング状抵抗回路の各ノードと前記第1の基準電圧端子との間にそれぞれ接続された第1のスイッチ群からなり、
     前記第2の接続回路は、前記リング状抵抗回路の各ノードと前記第2の基準電圧端子との間にそれぞれ接続された第2のスイッチ群からなり、
     前記第3の接続回路は、前記リング状抵抗回路の各ノードと前記アナログ信号出力端子との間にそれぞれ接続された第3のスイッチ群からなり、
     前記開放回路は、前記リング状抵抗回路において、隣接する抵抗素子同士の間にそれぞれ挿入された第4のスイッチ群からなり、
     前記第1の接続回路は、前記第4のスイッチ群の各スイッチの一端側で前記リング状抵抗回路の各ノードに接続され、
     前記第2および第3の接続回路は、前記第4のスイッチ群の各スイッチの他端側で前記リング状抵抗回路の各ノードに接続され、
     前記第1、第2、第3および第4のスイッチ群を構成する各スイッチは、前記変換対象となるデジタル信号に応じて、短絡状態と開放状態とが切り替えられる請求項3記載のデジタル-アナログ変換器。
    The first connection circuit includes a first switch group connected between each node of the ring resistance circuit and the first reference voltage terminal,
    The second connection circuit includes a second switch group connected between each node of the ring resistance circuit and the second reference voltage terminal,
    The third connection circuit includes a third switch group connected between each node of the ring resistance circuit and the analog signal output terminal,
    The open circuit comprises a fourth switch group inserted between adjacent resistance elements in the ring resistance circuit,
    The first connection circuit is connected to each node of the ring resistance circuit on one end side of each switch of the fourth switch group,
    The second and third connection circuits are connected to each node of the ring resistance circuit on the other end side of each switch of the fourth switch group,
    4. The digital-analog device according to claim 3, wherein each of the switches constituting the first, second, third, and fourth switch groups is switched between a short circuit state and an open state according to the digital signal to be converted. converter.
  5.  前記リング状抵抗回路において、前記第1の基準電圧端子が接続されるノードと前記第2の基準電圧端子が接続されるノードと前記アナログ信号出力端子が接続されるノードと抵抗素子間が開放されるノードとをそれぞれ巡回させる請求項3記載のデジタル-アナログ変換器。 In the ring-shaped resistance circuit, a node between the first reference voltage terminal, a node to which the second reference voltage terminal is connected, a node to which the analog signal output terminal is connected, and a resistance element are opened. 4. The digital-analog converter according to claim 3, wherein each of the nodes is circulated.
  6.  前記デジタル-アナログ変換対象となるデジタル信号は時系列的に入力され、前回のデジタル-アナログ変換時においてデジタル信号の値に対応して前記アナログ信号出力端子に接続された前記リング状抵抗回路のノードを、今回のアナログ-デジタル変換時において前記第1および第2の基準電圧端子のいずれか一方が接続されるノードとする請求項5記載のデジタル-アナログ変換器。 The digital signal to be converted into digital to analog is input in time series, and the node of the ring-shaped resistance circuit connected to the analog signal output terminal corresponding to the value of the digital signal at the time of the previous digital to analog conversion 6. The digital-analog converter according to claim 5, wherein at least one of the first and second reference voltage terminals is connected at the time of the current analog-digital conversion.
  7.  前記リング状抵抗回路において、前記第1および第2の基準電圧端子のいずれか一方が接続されるノードから見て、前記第1および第2の基準電圧端子に接続される両ノード間の抵抗値が最大となるノードを、前記第1および第2の基準電圧端子のいずれか他方が接続されるノードとする請求項5、6のいずれか1項記載のデジタル-アナログ変換器。 In the ring resistance circuit, when viewed from a node to which one of the first and second reference voltage terminals is connected, a resistance value between both nodes connected to the first and second reference voltage terminals 7. The digital-analog converter according to claim 5, wherein a node having the largest value is a node to which one of the first and second reference voltage terminals is connected.
  8.  前記リング状抵抗回路において、前記第4のスイッチ群によって抵抗素子間が開放されるノードの一側の抵抗素子の開放端を前記第1の基準電圧端子が接続されるノードとし、前記抵抗素子間が開放されるノードの他側の抵抗素子の開放端を前記第2の基準電圧端子が接続されるノードとした請求項5、6のいずれか1項記載のデジタル-アナログ変換器。 In the ring-shaped resistor circuit, an open end of a resistor element on one side of a node where the resistor element is opened by the fourth switch group is a node to which the first reference voltage terminal is connected, and the resistor element is connected. 7. The digital-analog converter according to claim 5, wherein the open end of the resistance element on the other side of the node where the second reference voltage terminal is connected is a node to which the second reference voltage terminal is connected.
  9.  所定のサンプリング周波数でサンプリングされた第1のデジタル信号をアナログ信号に変換するデルタシグマ型デジタル-アナログ変換装置であって、
     前記第1のデジタル信号を補間して、前記サンプリング周波数より高い周波数の第2のデジタル信号に変換するデジタル補間フィルタと、
     前記第2のデジタル信号をノイズシェイピングして、より低ビット数の第3のデジタル信号に変換するデルタシグマ変調器と、
     前記第3のデジタル信号を前記アナログ信号に変換するデジタル-アナログ変換器と、を備え、
     前記デジタル-アナログ変換器は、
     リング状に接続された複数個の抵抗素子からなるリング状抵抗回路と、
     第1および第2の基準電圧端子と、
     アナログ信号出力端子と、
     前記リング状抵抗回路のいずれかのノードに前記第1の基準電圧端子を選択的に接続する第1の接続回路と、
     前記リング状抵抗回路のいずれかのノードに前記第2の基準電圧端子を選択的に接続する第2の接続回路と、
     前記リング状抵抗回路における、前記第1の基準電圧端子が接続されたノードから前記第2の基準電圧端子が接続されたノードへ至る経路中の、デジタル-アナログ変換対象となるデジタル信号の値に対応したいずれかのノードに前記アナログ信号出力端子を選択的に接続する第3の接続回路と、
     前記リング状抵抗回路のいずれかのノードの位置で抵抗素子間の接続を選択的に開放する開放回路とを備え、
     前記第1および第2の接続回路によって前記第1の基準電圧端子および前記第2の基準電圧端子が接続される前記リング状抵抗回路のノードがそれぞれ変更され、それに対応して前記第3の接続回路によって前記アナログ信号出力端子が接続される前記リング状抵抗回路のノードが変更され、前記開放回路によって前記リング状抵抗回路における、前記第2の基準電圧端子が接続されたノードから前記第1の基準電圧端子が接続されたノードへ戻る経路中のいずれかのノードの位置で抵抗素子間の接続が開放されることを特徴とするデルタシグマ型デジタル-アナログ変換装置。
    A delta-sigma type digital-analog conversion device for converting a first digital signal sampled at a predetermined sampling frequency into an analog signal,
    A digital interpolation filter that interpolates the first digital signal and converts it to a second digital signal having a frequency higher than the sampling frequency;
    A delta-sigma modulator that noise-shapes the second digital signal to convert it to a third digital signal having a lower number of bits;
    A digital-analog converter for converting the third digital signal into the analog signal;
    The digital-analog converter is:
    A ring-shaped resistance circuit composed of a plurality of resistance elements connected in a ring shape;
    First and second reference voltage terminals;
    An analog signal output terminal;
    A first connection circuit that selectively connects the first reference voltage terminal to any node of the ring-shaped resistance circuit;
    A second connection circuit for selectively connecting the second reference voltage terminal to any node of the ring resistance circuit;
    In the ring-shaped resistance circuit, the value of the digital signal to be converted into digital to analog in the path from the node to which the first reference voltage terminal is connected to the node to which the second reference voltage terminal is connected. A third connection circuit for selectively connecting the analog signal output terminal to one of the corresponding nodes;
    An open circuit that selectively opens the connection between the resistive elements at the position of any node of the ring-shaped resistance circuit,
    The nodes of the ring-shaped resistance circuit to which the first reference voltage terminal and the second reference voltage terminal are connected are respectively changed by the first and second connection circuits, and the third connection is correspondingly changed. A node of the ring-shaped resistor circuit to which the analog signal output terminal is connected is changed by a circuit, and the first reference voltage terminal is connected to the first resistor in the ring-shaped resistor circuit by the open circuit. A delta-sigma type digital-analog converter characterized in that a connection between resistive elements is opened at a position of any node in a path returning to a node to which a reference voltage terminal is connected.
  10.  前記第1の接続回路は、前記リング状抵抗回路の各ノードと前記第1の基準電圧端子との間にそれぞれ接続された第1のスイッチ群からなり、
     前記第2の接続回路は、前記リング状抵抗回路の各ノードと前記第2の基準電圧端子との間にそれぞれ接続された第2のスイッチ群からなり、
     前記第3の接続回路は、前記リング状抵抗回路の各ノードと前記アナログ信号出力端子との間にそれぞれ接続された第3のスイッチ群からなり、
     前記開放回路は、前記リング状抵抗回路において、隣接する抵抗素子同士の間にそれぞれ挿入された第4のスイッチ群からなり、
     前記第1の接続回路は、前記第4のスイッチ群の各スイッチの一端側で前記リング状抵抗回路の各ノードに接続され、
     前記第2および第3の接続回路は、前記第4のスイッチ群の各スイッチの他端側で前記リング状抵抗回路の各ノードに接続され、
     前記第1、第2、第3および第4のスイッチ群を構成する各スイッチは、前記変換対象となるデジタル信号に応じて、短絡状態と開放状態とが切り替えられる請求項9記載のデルタシグマ型デジタル-アナログ変換装置。
    The first connection circuit includes a first switch group connected between each node of the ring resistance circuit and the first reference voltage terminal,
    The second connection circuit includes a second switch group connected between each node of the ring resistance circuit and the second reference voltage terminal,
    The third connection circuit includes a third switch group connected between each node of the ring resistance circuit and the analog signal output terminal,
    The open circuit comprises a fourth switch group inserted between adjacent resistance elements in the ring resistance circuit,
    The first connection circuit is connected to each node of the ring resistance circuit on one end side of each switch of the fourth switch group,
    The second and third connection circuits are connected to each node of the ring resistance circuit on the other end side of each switch of the fourth switch group,
    The delta-sigma type switch according to claim 9, wherein each of the switches constituting the first, second, third, and fourth switch groups is switched between a short-circuit state and an open state according to the digital signal to be converted. Digital-analog converter.
  11.  前記デコーダは、製造ばらつきによる影響をランダマイズするように、前記第1、第2、第3および第4のスイッチ群を切り替える請求項10記載のデルタシグマ型デジタル-アナログ変換装置。 11. The delta sigma type digital-analog conversion device according to claim 10, wherein the decoder switches the first, second, third and fourth switch groups so as to randomize the influence due to manufacturing variation.
  12.  前記デコーダは、常に同じスイッチ群が選択されないように、前記第1、第2、第3および第4のスイッチ群を切り替える請求項10記載のデルタシグマ型デジタル-アナログ変換装置。 11. The delta-sigma type digital-analog conversion device according to claim 10, wherein the decoder switches the first, second, third and fourth switch groups so that the same switch group is not always selected.
PCT/JP2010/002108 2009-08-27 2010-03-25 Digital-analog convertor and delta sigma type digital-analog conversion device WO2011024337A1 (en)

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Publication number Priority date Publication date Assignee Title
JP2002009621A (en) * 2000-06-22 2002-01-11 Mitsubishi Electric Corp Digital/analog converter

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002009621A (en) * 2000-06-22 2002-01-11 Mitsubishi Electric Corp Digital/analog converter

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