WO2010146863A1 - Icパッケージ - Google Patents
Icパッケージ Download PDFInfo
- Publication number
- WO2010146863A1 WO2010146863A1 PCT/JP2010/004044 JP2010004044W WO2010146863A1 WO 2010146863 A1 WO2010146863 A1 WO 2010146863A1 JP 2010004044 W JP2010004044 W JP 2010004044W WO 2010146863 A1 WO2010146863 A1 WO 2010146863A1
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- WIPO (PCT)
- Prior art keywords
- conductor plate
- package
- chip
- magnetic body
- magnetic
- Prior art date
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- 239000004020 conductor Substances 0.000 claims abstract description 136
- 230000002238 attenuated effect Effects 0.000 description 21
- 238000000034 method Methods 0.000 description 16
- 230000005672 electromagnetic field Effects 0.000 description 13
- 239000000696 magnetic material Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000007747 plating Methods 0.000 description 6
- 239000007921 spray Substances 0.000 description 5
- 229910000859 α-Fe Inorganic materials 0.000 description 5
- 239000011347 resin Substances 0.000 description 4
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- 239000003566 sealing material Substances 0.000 description 4
- 239000006096 absorbing agent Substances 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000035699 permeability Effects 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- -1 SnAgCu Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910018605 Ni—Zn Inorganic materials 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 229910008433 SnCU Inorganic materials 0.000 description 1
- 229910007116 SnPb Inorganic materials 0.000 description 1
- 229910005728 SnZn Inorganic materials 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000000443 aerosol Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000011295 pitch Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Definitions
- the present invention relates to an IC package that suppresses electromagnetic noise using a magnetic body and a conductor plate.
- an electromagnetic absorber is used to reinforce the electromagnetic shield inside the package.
- a dielectric material or a magnetic material is used.
- a method of constructing an electromagnetic shield structure in which a conductor is electrically connected to a printed wiring board on which a high-frequency circuit is printed to prevent leakage of electromagnetic waves is also generally used.
- the inside of an IC package has a structure in which a flat IC chip and an interposer are laminated, and the IC chip and the interposer electrodes are connected by bonding wires. These have a three-dimensional shape with irregularities. Even if the conductor layer is formed on the upper layer of the IC chip or IC package in order to strengthen the electromagnetic shield, a gap exists on the side surface of the IC package. Although a method of adopting a three-dimensional mounting method and connecting the conductor layer and the ground layer of the package to form an electromagnetic shield structure is also conceivable, there is a disadvantage that the manufacturing process becomes complicated.
- the electromagnetic field leaking from the side of the IC package forms an electromagnetic field outside the IC package and may affect adjacent circuits. Moreover, it is radiated
- the present invention has been made in view of such circumstances, and an object of the present invention is to provide an IC package capable of suppressing electromagnetic waves leaking from a gap on the side surface of the IC package.
- an IC package of the present invention is provided at a position facing an electronic circuit board on which the IC chip is mounted and the electronic circuit board on the electronic circuit board across the IC chip. And a magnetic body disposed on the side of the first conductor plate on which the IC chip is provided, and the magnetic body is disposed at least at an end of the first conductor plate. ing.
- the shield structure that shields the entire IC package can be configured by configuring the shield structure with the magnetic body and the first conductor plate.
- the magnetic body that attenuates the electromagnetic wave is disposed at least at the end of the first conductor plate, even when there is a gap on the side surface of the IC package, leakage of the electromagnetic wave from the gap can be suppressed.
- FIG. 1A and 1B are schematic views showing a mounted state of the IC package 1 according to the first embodiment of the present invention.
- FIG. 1A is a plan view showing a mounted state of the IC package 1.
- FIG. 1B is a front view showing a mounted state of the IC package 1.
- the IC package 1 has a rectangular shape in plan view, and is electrically connected to the printed circuit board 20 via a plurality of conductor balls 30 provided along four sides thereof.
- the IC package 1 is a SiP (System in a Package) in which a plurality of LSI chips are integrated and sealed in one package.
- the conductor ball 30 is a solder ball made of a material such as Sn, SnPb, SnAg, SnAgCu, SnCu, Snln, SnZn, SnBi, or SnZnBi.
- flip chip mounting in which the IC package 1 is mounted on the printed circuit board 20 via a plurality of conductive balls 30 is employed.
- FIG. 2 is a diagram showing an internal structure of the IC package 1 according to the present embodiment.
- the IC package 1 includes an IC chip 10, an interposer (electronic circuit board) 11, a wire 12, a first conductor plate 15, a magnetic body 14, a sealing material 13, and a sealing And a resin 17.
- the IC chip 10 is disposed on the interposer 11 and is electrically connected to the printed circuit board 20 (see FIGS. 1A and 1B) by the conductor balls 30 and the wire wires 12.
- a DRAM Dynamic Random Access Memory
- a storage element such as a flash memory
- various arithmetic processing elements processors
- the interposer 11 is a printed wiring board on which signal wiring (not shown) for connecting the IC chip 10 to the conductor ball 30 is formed.
- the interposer 11 relays electrical connection between the IC chip 10 and the printed circuit board 20 having different terminal pitches. Further, the interposer 11 has a role of connecting the LSI chips when mounting a plurality of LSI chips like SiP.
- the wire 12 is made of, for example, Al or Au as a main material, and electrically connects an external terminal (not shown) of the IC chip 10 and a signal wiring on the interposer 11. In this way, the IC chip 10 is electrically connected to the printed circuit board 20 via the wire line 12, the interposer 11, and the conductive ball 30.
- the first conductor plate 15 is provided at a position facing the interposer 11 with the IC chip 10 on the interposer 11 interposed therebetween.
- the first conductor plate 15 shields unnecessary electromagnetic waves that become noise emitted from the IC chip 10.
- the magnetic body 14 is disposed below the first conductor plate 15 (the side on which the IC chip 10 is provided).
- the magnetic body 14 attenuates electromagnetic waves emitted from the IC chip 10.
- the relative permeability of the magnetic body 14 is in the range of 1 to 1000.
- the thickness (distance in the short direction) of the magnetic body 14 is in the range of 0.1 ⁇ m to 1 mm. These values are determined according to the size of each part of the IC package and the expected amount of noise reduction.
- the magnetic body 14 for example, Ni—Zn-based ferrite having high permeability in a high frequency band can be used.
- the magnetic body 14 is disposed on the entire surface of the first conductor plate 15.
- the magnetic body 14 may be processed into a plate shape and adhered to the first conductor plate 15, or may be directly formed on the first conductor plate 15.
- the magnetic body 14 does not have conductivity, the effect can be obtained even if the first conductor plate 15 and the magnetic body 14 are not in close contact with each other.
- the method for forming the magnetic body 14 include a spray ferrite plating method and an aerosol deposition method. In particular, according to the spray ferrite plating method, it is possible to perform ferrite plating even on a three-dimensional component.
- the magnetic material 14 can be formed even if the surface of the first conductor plate 15 is uneven. Furthermore, since a thin film of several micrometers can be formed by the spray ferrite plating method, the magnetic permeability of the magnetic body 14 can be maintained even in a high frequency band exceeding gigahertz.
- the magnetic body 14 has conductivity
- the first conductor plate 15 and the magnetic body 14 are brought into close contact with each other by the above-described film forming method, and the first conductor plate 15 is caused by the resistance of the magnetic body 14.
- the current 40b flowing through 15 is attenuated, and a greater effect is obtained.
- the sealing material 13 is for bonding the interposer 11 on which the IC chip 10 is mounted, the first conductor plate 15 provided at a position facing the interposer 11, and the magnetic body 14.
- the sealing resin 17 is a resin for forming the outer shape of the IC package 1. Note that the sealing resin 17 can also serve as the adhesive function of the sealing material 13.
- the IC package 1 of the present embodiment has a structure in which an IC chip 10 is mounted on an interposer 11, and electrical connection between the IC chip 10 and the interposer 11 is bonded by a wire line 12.
- a first conductor plate 15 that shields electromagnetic waves is provided in the upper layer of the IC package 1. Thereby, a gap 19 is formed on the side surface of the IC package 1.
- the electromagnetic wave 40 a of the magnetic field component when a high frequency electromagnetic field is generated from the IC chip 10, a part of the electromagnetic wave 40 a of the magnetic field component is directed toward the magnetic body 14.
- the magnetic body 14 has a function of attenuating the electromagnetic wave 40a.
- the thickness distance in the short direction
- the electromagnetic wave 40a cannot be sufficiently attenuated.
- a part of the electromagnetic wave 40 a passes through the magnetic body 14 and enters the vicinity of the central portion of the first conductor plate 15.
- a part of the electromagnetic wave 40 a incident on the first conductor plate 15 becomes a current 40 b inside the first conductor plate 15.
- the current 40 b is attenuated by the magnetic body 14 formed on the entire surface of the first conductor plate 15 while flowing along the longitudinal direction of the first conductor plate 15.
- a part of the electromagnetic wave 40c of the magnetic field component of the electromagnetic field emitted from the IC chip 10 is incident on the magnetic body 14 and then bent by 90 ° by the first conductor plate 15.
- the electromagnetic wave 40 c whose path is bent by the first conductor plate 15 passes through the inside of the magnetic body 14 along the longitudinal direction of the first conductor plate 15 and is formed on the entire surface of the first conductor plate 15. 14 is attenuated.
- the electromagnetic wave 40 d of the magnetic field component of the electromagnetic field emitted from the IC chip 10 is bent by the magnetic body 14 in a 90 ° direction before entering the magnetic body 14.
- the electromagnetic wave 40 d whose path is bent by the magnetic body 14 is attenuated by the magnetic body 14 formed on the entire surface of the first conductor plate 15 while passing through the inside of the sealing material 13 along the longitudinal direction of the magnetic body 14.
- the current 40b and the electromagnetic waves 40c and 40d derived from the electromagnetic wave 40a are attenuated by the magnetic body 14 formed on the entire surface of the first conductor plate 15 without leaking from the gap 19 on the side surface of the IC package 1.
- the magnetic body 14 for attenuating electromagnetic waves is disposed on the entire surface of the first conductor plate 15, even if there is a gap 19 on the side surface of the IC package 1, the gap 19 Leakage of electromagnetic waves can be suppressed.
- the first conductor plate 15 that shields electromagnetic waves is provided, leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside can be suppressed. And it can prevent that secret information is intercepted from the leaked electromagnetic waves. Therefore, it is possible to obtain an IC package 1 that is effective against electromagnetic interference by suppressing leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside.
- the magnetic body 14 is formed on the entire surface of the first conductor plate 15, and the end of the magnetic body 14 and the end of the first conductor plate 15 are at substantially the same position. Not limited to this.
- the magnetic body 14 may be extended so that the end of the magnetic body 14 is located outside the signal wiring on the interposer 11. Thereby, electromagnetic waves generated from the signal wiring on the interposer 11 can be reduced.
- the first conductor plate 15 and the magnetic body 14 are in contact with each other, but the present invention is not limited to this.
- a minute gap may exist between the first conductor plate 15 and the magnetic body 14. Even when a minute gap exists between the first conductor plate 15 and the magnetic body 14, the current 40 b inside the first conductor plate 15 flows while flowing along the longitudinal direction of the first conductor plate 15. It is attenuated by the magnetic body 14 formed on the entire surface of the first conductor plate 15.
- FIG. 3 is a diagram showing an internal structure of the IC package 2 according to the second embodiment of the present invention.
- FIG. 3 is a cross-sectional view showing a schematic configuration of the IC package 2 in the second embodiment corresponding to FIG.
- the IC package 2 of this embodiment is different from the IC package 1 described in the first embodiment in that a second conductor plate 16 that shields electromagnetic waves is provided. Since the other points are the same as in the first embodiment, the same elements as those in FIG.
- the second conductor plate 16 that shields electromagnetic waves is provided at a position facing the first conductor plate 15 with the IC chip 10 on the interposer 11 interposed therebetween.
- the second conductor plate 16 is used as a power source (a power supply conductor) or a ground, and is formed inside the interposer 11.
- the second conductor plate 16 shields electromagnetic waves from the IC chip 10 toward the lower side (the side opposite to the side on which the magnetic body 14 is provided). That is, electromagnetic waves generated from the IC chip 10 are shielded by the first conductor plate 15 and the second conductor plate 16. Then, the directivity of the electromagnetic wave generated from the IC chip 10 becomes sharper toward the gap 19 on the side surface of the IC package 2. The electromagnetic wave with sharp directivity is attenuated by the magnetic body 14 formed on the entire surface of the first conductor plate 15 while going to the gap 19 on the side surface of the IC package 2.
- the electromagnetic wave generated from the IC chip 10 is shielded by the first conductor plate 15 and the second conductor plate 16 and directed toward the gap 19 on the side surface of the IC package 2.
- the electromagnetic wave generated from the IC chip 10 is guided in the longitudinal direction of the magnetic body 14 that attenuates the electromagnetic wave formed on the entire surface of the first conductor plate 15. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside, and obtain an IC package 2 that is effective against electromagnetic interference.
- FIG. 4A and 4B are views showing an IC package 3 according to a third embodiment of the present invention.
- FIG. 4A is a plan view of the IC package 3.
- 4B is a cross-sectional view taken along line AA in FIG. 4A.
- FIG. 4B is a cross-sectional view showing a schematic configuration of the IC package 3 according to the third embodiment, corresponding to FIG.
- the IC package 3 of the present embodiment is the same as that of the second embodiment described above in that a magnetic body 24 that attenuates electromagnetic waves is provided along two sides of the first conductor plate 15. It differs from the IC package 2 described. Since the other points are the same as those of the second embodiment, the same elements as those in FIG.
- the first conductor plate 15 has a rectangular shape in plan view, and the magnetic body 24 that attenuates electromagnetic waves faces one side of the first conductor plate 15 and this one side. Are arranged along two sides.
- the magnetic body 24 provided along the two sides of the first conductor plate 15 has a stripe shape in plan view.
- the electromagnetic waves generated from the IC chip 10 and sharpened in directivity toward the gap 19 on the side surface of the IC package 2 are directed toward the gap 19 on the side surface of the IC package 2. It is attenuated by the magnetic body 24 provided along the two sides of the first conductor plate 15.
- the electromagnetic wave generated from the IC chip 10 is strong in a specific direction, the minimum necessary countermeasure against leakage of the electromagnetic wave can be taken by arranging the magnetic body 24 in that direction.
- the influence of the magnetic material on the operation of the IC chip 10 can be suppressed. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside with a minimum necessary configuration, and to obtain an IC package 3 effective against electromagnetic interference.
- the magnetic body 24 is provided along the two sides of the first conductor plate 15, but is not limited thereto.
- the magnetic body 24 may be provided outside the signal wiring on the interposer 11 in a region overlapping the first conductor plate 15 in plan view. Thereby, electromagnetic waves generated from the signal wiring on the interposer 11 can be reliably reduced.
- FIG. 5 is a diagram showing the internal structure of the IC package 4 according to the fourth embodiment of the present invention.
- FIG. 5 is a cross-sectional view showing a schematic configuration of the IC package 4 according to the fourth embodiment, corresponding to FIG. 4B.
- the magnetic body 34 is embedded in the first conductor plate 25, and the magnetic bodies 34 are arranged in a plurality of rows on the two sides of the first conductor plate 25. This is different from the IC package 3 described in the third embodiment. Since the other points are the same as in the third embodiment, the same reference numerals are given to the same elements as in FIGS.
- two rows of grooves 21 are formed on each of the two sides of the first conductor plate 25, and a magnetic material is formed in each of the two rows of grooves 21.
- 34 is formed.
- a spin spray plating method is exemplified. According to this spin spray plating method, it is possible to grow a crystal within the groove 21 of the first conductor plate 25 by a diffusion process and form the magnetic body 34.
- the current 41 b flowing in the first conductor plate 25 due to the electromagnetic field generated from the IC chip 10 flows while flowing along the longitudinal direction of the first conductor plate 25. It is attenuated by the magnetic bodies 34 provided in two rows along the two sides of the conductor plate 25, respectively. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside, and obtain an IC package 4 that is effective against electromagnetic interference.
- the magnetic bodies 34 are provided in two rows along the two sides of the first conductor plate 25, but the present invention is not limited to this.
- the magnetic bodies 34 may be provided in three rows and four rows. That is, the magnetic bodies 34 may be provided in a plurality of rows along the two sides of the first conductor plate 25.
- FIG. 6 is a diagram showing an internal structure of the IC package 5 according to the fifth embodiment of the present invention.
- FIG. 6 is a cross-sectional view showing a schematic configuration of the IC package 5 according to the fifth embodiment, corresponding to FIG. 4B.
- the magnetic body 24 a of the magnetic bodies 24 a and 24 b arranged in two rows along the two sides of the first conductor plate 15 is connected to the wire 12.
- the IC package 3 is different from the IC package 3 described in the above-described third embodiment in that the IC package 3 is disposed at an opposed position. Since the other points are the same as in the third embodiment, the same reference numerals are given to the same elements as in FIG.
- magnetic bodies 24 a and 24 b are arranged along two sides of the first conductor plate 15, respectively.
- One magnetic body 24 a is disposed at a position facing the wire 12
- the other magnetic body 24 b is disposed at the end of the first conductor plate 15.
- the thickness of the magnetic body 24 a disposed at a position facing the wire 12 is thinner than the thickness of the magnetic body 24 b disposed at the end of the first conductor plate 15. Since the wire wire 12 has a mountain shape and its apex is higher than the height (distance in the short direction) of the IC chip 10, the magnetic material 24a is wired by reducing the thickness of the magnetic material 24a. The line 12 can be approached.
- the electromagnetic wave generated from the wire 12 is attenuated by the relatively thin magnetic body 24a, and the directivity is sharpened by the signal wiring on the IC chip 10 and the interposer 11.
- the electromagnetic wave is attenuated by the relatively thick magnetic body 24b. That is, even if the wire 12 that generates electromagnetic waves, the IC chip 10, and the signal wiring on the interposer 11 are not in the same plane (arranged in irregularities), the thickness of the magnetic bodies 24 a and 24 b is appropriately set. By changing, the electromagnetic wave can be attenuated. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside, and obtain an IC package 5 that is effective against electromagnetic interference.
- FIG. 7A and 7B are views showing an IC package 6 according to a sixth embodiment of the present invention.
- FIG. 7A is a plan view of the IC package 6.
- FIG. 7B is a cross-sectional view taken along line AA in FIG. 7A.
- FIG. 7B is a cross-sectional view showing a schematic configuration of the IC package 6 in the sixth embodiment corresponding to FIG. 4B.
- the IC package 6 of this embodiment is different from the IC package 3 described in the third embodiment in that the magnetic body 44 is arranged in a closed ring shape. Since the other points are the same as in the third embodiment, the same elements as those in FIG.
- magnetic bodies 44 are arranged in a closed ring along the four sides of the first conductor plate 15.
- the magnetic body 44 since the magnetic body 44 has a closed ring shape, the entire side surface of the IC package 6 rather than the IC package 3 in which the magnetic body 24 is disposed along the two sides of the first conductor plate 15 described above. Leakage of electromagnetic waves from the gap 19 can be suppressed.
- the magnetic body 44 since the magnetic body 44 has a closed ring shape, electromagnetic waves can be reliably suppressed from leaking from the gaps 19 on all side surfaces of the IC package 6. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside, and obtain an IC package 6 that is effective against electromagnetic interference.
- FIG. 8 is a diagram showing an internal structure of the IC package 7 according to the seventh embodiment of the present invention.
- FIG. 8 is a cross-sectional view showing a schematic configuration of the IC package 7 according to the seventh embodiment corresponding to FIG.
- the IC package 7 of the present embodiment has the IC described in the above-described fourth embodiment in that magnetic bodies 34 and dielectric bodies 35 that reduce electromagnetic waves are alternately arranged in two rows. Different from package 4. Since the other points are the same as in the fourth embodiment, the same elements as those in FIG.
- grooves 21a and 21b are formed on two sides of the first conductor plate 25, respectively, and the inner side (IC chip) of each of the grooves 21a and 21b.
- a dielectric 35 is formed in the groove 21a on the 10th side.
- the magnetic body 34 is formed in the groove 21b on the outer side (side surface side of the IC package 7) of the grooves 21a and 21b.
- the magnetic body 34 mainly acts on the magnetic field to attenuate the electromagnetic wave
- the dielectric body 35 mainly acts on the electric field to attenuate the electromagnetic wave.
- the current 41b flowing inside the first conductor plate 25 by the electromagnetic field generated from the IC chip 10 flows along the two sides of the first conductor plate 25 while flowing along the longitudinal direction of the first conductor plate 25. It is attenuated by the provided dielectric 35 and magnetic body 34. Specifically, since the dielectric 35 and the magnetic body 34 are embedded in the first conductor plate 25, the current 41 b flows so as to go around the dielectric 35 and the magnetic body 34, and the dielectric 35 and the magnetic body 34. The surrounding high frequency impedance is increased. Further, since the dielectric 35 and the magnetic body 34 are provided, the path through which the current 41b flows becomes longer, and the current 41b can be attenuated than when the dielectric 35 or the magnetic body 34 is provided in one row.
- the current 41 b flowing in the first conductor plate 25 due to the electromagnetic field generated from the IC chip 10 flows while flowing along the longitudinal direction of the first conductor plate 25. It is attenuated by the dielectric 35 and the magnetic body 34 provided along the two sides of the conductor plate 25, respectively. Therefore, it is possible to reliably suppress leakage of electromagnetic waves emitted from the IC chip 10 and intrusion of electromagnetic waves from the outside, and obtain an IC package 7 that is effective against electromagnetic interference.
- FIG. 9 is a diagram showing an internal structure of the IC package 8 according to the eighth embodiment of the present invention.
- FIG. 9 is a cross-sectional view showing a schematic configuration of the IC package 8 according to the eighth embodiment corresponding to FIG.
- the IC package 8 of the present embodiment is mounted with two IC chips, an IC chip 10A in which an electronic circuit 23 that generates an electromagnetic wave as noise is housed, and an IC chip 10B.
- the point is that the magnetic body 14A and the first conductor plate 15A are stacked on the IC chip 10A and are different from the IC package 1 described in the first embodiment. Since the other points are the same as in the first embodiment, the same elements as those in FIG.
- the IC package 8 of this embodiment has a side-by-side mounting system in which two IC chips, an IC chip 10A and an IC chip 10B, are mounted.
- An electronic circuit 23 that generates electromagnetic waves is housed inside the IC chip 10A.
- a magnetic body 14A having a size larger than that of the electronic circuit 23 and the first conductor plate 15A are stacked in this order from the IC chip 10A side.
- electromagnetic waves generated from the electronic circuit 23 accommodated in the IC chip 10A are attenuated by the magnetic body 14A and the first conductor plate 15A provided to be stacked on the IC chip 10A. Is done. Accordingly, it is possible to reliably suppress leakage of electromagnetic waves emitted from the electronic circuit 23 and intrusion of electromagnetic waves from the outside, and to obtain an IC package 8 that is effective against electromagnetic interference.
- the present invention is not limited to this.
- a magnetic body and a conductor plate may be laminated on the IC chip 10B as well as the IC chip 10A. As a result, it is possible to reliably prevent electromagnetic interference to the IC chip 10B of the electronic circuit 23.
- FIG. 10 is a diagram showing an internal structure of the IC package 9 according to the ninth embodiment of the present invention.
- FIG. 9 is a cross-sectional view showing a schematic configuration of the IC package 9 according to the ninth embodiment, corresponding to FIG.
- the IC package 9 of this embodiment is different from the IC package 7 described in the eighth embodiment in that a step 46 is provided near the end of the first conductor plate 45. Is different. Since the other points are the same as in the eighth embodiment, the same elements as those in FIG.
- the IC package 9 of the present embodiment has a distance (interval) between the first conductor plate 45 and the second conductor plate 16 near the end of the first conductor plate 45.
- a stepped portion 46 that is narrower at the end than at the center of 45.
- two rows of grooves 41 are formed on each of the two sides, and the magnetic body 47 is embedded in each of the two rows of grooves 41.
- the gap between the first conductor plate 45 and the second conductor plate 16 is narrowed by the step portion 46.
- the gap between the first conductor plate 45 and the second conductor plate 16 is narrowed by the step portion 46, so that the magnetic body 47 is effective without protruding from the first conductor plate 45.
- the magnetic field in the vicinity of the second conductor plate 16 can be attenuated.
- a magnetic film is formed on the first conductor plate 45, it is difficult to form a thick magnetic film.
- the present invention can suppress electromagnetic noise in, for example, various electronic devices using an IC package.
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Abstract
Description
本願は、2009年6月17日に、日本に出願された特願2009-144282号に基づき優先権を主張し、その内容をここに援用する。
図1A及び図1Bは本発明の第1実施形態に係るICパッケージ1の実装状態を示す模式図である。図1Aは、ICパッケージ1の実装状態を示す平面図である。図1Bは、ICパッケージ1の実装状態を示す正面図である。
図3は、本発明の第2実施形態に係るICパッケージ2の内部構造を示す図である。図3は、図2に対応した、第2実施形態におけるICパッケージ2の概略構成を示した断面図である。図3に示すように、本実施形態のICパッケージ2は、電磁波を遮蔽する第2導体板16が設けられている点で、上述の第1実施形態で説明したICパッケージ1と異なっている。その他の点は第1実施形態と同様であるので、図2と同様の要素には同一の符号を付し、詳細な説明は省略する。
図4A及び図4Bは、本発明の第3実施形態に係るICパッケージ3を示す図である。図4Aは、ICパッケージ3の平面図である。図4Bは、図4AのA-A線に沿った断面図である。図4Bは、図3に対応した、第3実施形態におけるICパッケージ3の概略構成を示した断面図である。図4Bに示すように、本実施形態のICパッケージ3は、電磁波を減衰させる磁性体24が第1導体板15の2つの辺に沿って設けられている点で、上述の第2実施形態で説明したICパッケージ2と異なっている。その他の点は第2実施形態と同様であるので、図3と同様の要素には同一の符号を付し、詳細な説明は省略する。
図5は、本発明の第4実施形態に係るICパッケージ4の内部構造を示す図である。図5は、図4Bに対応した、第4実施形態におけるICパッケージ4の概略構成を示した断面図である。図5に示すように、本実施形態のICパッケージ4は、磁性体34が第1導体板25に埋め込まれている点、磁性体34が第1導体板25の2つの辺にそれぞれ複数列配置されている点で、上述の第3実施形態で説明したICパッケージ3と異なっている。その他の点は第3実施形態と同様であるので、図4A及び図4Bと同様の要素には同一の符号を付し、詳細な説明は省略する。
図6は、本発明の第5実施形態に係るICパッケージ5の内部構造を示す図である。図6は、図4Bに対応した、第5実施形態におけるICパッケージ5の概略構成を示した断面図である。図6に示すように、本実施形態のICパッケージ5は、第1導体板15の2つの辺に沿ってそれぞれ2列配置された磁性体24a,24bのうちの磁性体24aがワイヤー線12に対向する位置に配置されている点で、上述の第3実施形態で説明したICパッケージ3と異なっている。その他の点は第3実施形態と同様であるので、図4Bと同様の要素には同一の符号を付し、詳細な説明は省略する。
図7A及び図7Bは、本発明の第6実施形態に係るICパッケージ6を示す図である。図7Aは、ICパッケージ6の平面図である。図7Bは、図7AのA-A線に沿った断面図である。図7Bは、図4Bに対応した、第6実施形態におけるICパッケージ6の概略構成を示した断面図である。図7Aに示すように、本実施形態のICパッケージ6は、磁性体44が閉環状に配置されている点で、上述の第3実施形態で説明したICパッケージ3と異なっている。その他の点は第3実施形態と同様であるので、図4Bと同様の要素には同一の符号を付し、詳細な説明は省略する。
図8は、本発明の第7実施形態に係るICパッケージ7の内部構造を示す図である。図8は、図5に対応した、第7実施形態におけるICパッケージ7の概略構成を示した断面図である。図8に示すように、本実施形態のICパッケージ7は、電磁波を低減させる磁性体34と誘電体35とが交互に2列配置されている点で、上述の第4実施形態で説明したICパッケージ4と異なっている。その他の点は第4実施形態と同様であるので、図5と同様の要素には同一の符号を付し、詳細な説明は省略する。
図9は、本発明の第8実施形態に係るICパッケージ8の内部構造を示す図である。図9は、図2に対応した、第8実施形態におけるICパッケージ8の概略構成を示した断面図である。図9に示すように、本実施形態のICパッケージ8は、内部にノイズとしての電磁波を発生する電子回路23が収容されたICチップ10A、及びICチップ10Bの2つのICチップが実装されている点、ICチップ10A上に磁性体14Aと第1導体板15Aとが積層されて配置されている点で、上述の第1実施形態で説明したICパッケージ1と異なっている。その他の点は第1実施形態と同様であるので、図2と同様の要素には同一の符号を付し、詳細な説明は省略する。
図10は、本発明の第9実施形態に係るICパッケージ9の内部構造を示す図である。図9は、図8に対応した、第9実施形態におけるICパッケージ9の概略構成を示した断面図である。図10に示すように、本実施形態のICパッケージ9は、第1導体板45の端部付近に段差部46が設けられている点で、上述の第8実施形態で説明したICパッケージ7と異なっている。その他の点は第8実施形態と同様であるので、図8と同様の要素には同一の符号を付し、詳細な説明は省略する。
10,10A,10B…ICチップ
11…インターポーザ(電子回路基板)
12…ワイヤー線
14,14A,24,24a,24b,34,44,47…磁性体
15,15A,45…第1導体板
16…第2導体板
35…誘電体
46…段差部
Claims (10)
- ICチップが実装された電子回路基板と、
前記電子回路基板上の前記ICチップを挟んで前記電子回路基板と対向する位置に設けられた第1導体板と、
前記第1導体板の前記ICチップの設けられた側に配置され、前記第1導体板の少なくとも端部の一部に配置された少なくとも1つの磁性体と、を有するICパッケージ。 - 前記磁性体が前記第1導体板の全面に配置されている請求項1に記載のICパッケージ。
- 前記電子回路基板上の前記ICチップを挟んで前記第1導体板と対向する位置に第2導体板が設けられている請求項1に記載のICパッケージ。
- 前記磁性体が少なくとも第1及び第2の磁性体を具備し、
前記第1導体板が平面視矩形状であり、
前記第1の磁性体が前記第1導体板の第1の辺に沿って配置され、
前記第2の磁性体が前記第1導体板の第2の辺に沿って配置されている、請求項1に記載のICパッケージ。 - 前記第1及び第2の磁性体がそれぞれ少なくとも2個の磁性体を具備し、
前記第1の磁性体がそれぞれ前記第1の辺に沿って配置され、
前記第2の磁性体がそれぞれ前記第2の辺に沿って配置されている、請求項4に記載のICパッケージ。 - 前記ICチップが前記電子回路基板に対してワイヤー線で電気的に接続され、
前記第1導体板に列配置された前記第1及び第2の磁性体のうちの少なくとも1つが前記ワイヤー線と対向する位置に配置されている請求項5に記載のICパッケージ。 - 前記磁性体が閉環状に配置されている請求項1に記載のICパッケージ。
- 前記第1導体板の前記ICチップの設けられた側に配置された少なくとも1つの誘電体を更に具備し、
前記磁性体と前記誘電体とが交互に配置されている請求項1に記載のICパッケージ。 - 前記第1導体板は、前記第1導体板と前記第2導体板との間の距離が、前記第1導体板の中央部よりも、前記第1導体板の前記端部において狭い、請求項3に記載のICパッケージ。
- ICチップが実装された電子回路基板と、
前記電子回路基板上の前記ICチップの少なくとも一方の面に、前記電子回路基板と対向する位置に設けられた第1導体板と、
前記第1導体板と前記ICチップの間に設けられた磁性体とを具備し、
前記第1導体板及び前記磁性体は、少なくとも前記ICチップに内蔵されたダイをおおう大きさである、ICパッケージ。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US13/378,344 US20120086110A1 (en) | 2009-06-17 | 2010-06-17 | Ic package |
JP2011519571A JP5408253B2 (ja) | 2009-06-17 | 2010-06-17 | Icパッケージ |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2009144282 | 2009-06-17 | ||
JP2009-144282 | 2009-06-17 |
Publications (1)
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WO2010146863A1 true WO2010146863A1 (ja) | 2010-12-23 |
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PCT/JP2010/004044 WO2010146863A1 (ja) | 2009-06-17 | 2010-06-17 | Icパッケージ |
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US (1) | US20120086110A1 (ja) |
JP (1) | JP5408253B2 (ja) |
WO (1) | WO2010146863A1 (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2013004947A (ja) * | 2011-06-22 | 2013-01-07 | Nec Tokin Corp | インターポーザ |
JP2014167991A (ja) * | 2013-02-28 | 2014-09-11 | Canon Inc | 電子部品および電子機器。 |
JP5988004B1 (ja) * | 2016-04-12 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
JP5988003B1 (ja) * | 2016-03-23 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
JP2017034086A (ja) * | 2015-07-31 | 2017-02-09 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP2017063123A (ja) * | 2015-09-25 | 2017-03-30 | Tdk株式会社 | 半導体パッケージ及びその製造方法 |
US11769708B2 (en) | 2021-02-20 | 2023-09-26 | Innogrit Technologies Co., Ltd. | Packaging-level chip and chip module packaged with magnetic cover, and electronic product |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101896435B1 (ko) | 2016-11-09 | 2018-09-07 | 엔트리움 주식회사 | 전자파차폐용 전자부품 패키지 및 그의 제조방법 |
DE202022103105U1 (de) | 2022-06-01 | 2023-06-07 | Frank Vogelsang | Magnetvorrichtung |
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JP2001358493A (ja) * | 2000-04-10 | 2001-12-26 | Hitachi Ltd | 電磁波吸収材とその製造法及びそれを用いた各種用途 |
JP2003335921A (ja) * | 2002-05-17 | 2003-11-28 | Mitsui Chemicals Inc | エポキシ樹脂組成物およびそれを用いた半導体装置 |
JP2004221463A (ja) * | 2003-01-17 | 2004-08-05 | Sony Corp | 磁気メモリ装置 |
JP2007157891A (ja) * | 2005-12-02 | 2007-06-21 | Murata Mfg Co Ltd | 回路モジュールおよびその製造方法 |
JP2010087058A (ja) * | 2008-09-30 | 2010-04-15 | Sanyo Electric Co Ltd | 高周波モジュール |
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WO2004114409A1 (ja) * | 2003-06-20 | 2004-12-29 | Nec Corporation | 磁気ランダムアクセスメモリ |
CN1755929B (zh) * | 2004-09-28 | 2010-08-18 | 飞思卡尔半导体(中国)有限公司 | 形成半导体封装及其结构的方法 |
US7545662B2 (en) * | 2005-03-25 | 2009-06-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and system for magnetic shielding in semiconductor integrated circuit |
JP4492454B2 (ja) * | 2005-06-20 | 2010-06-30 | 富士電機システムズ株式会社 | パワー半導体モジュール |
CN101471329B (zh) * | 2007-12-29 | 2012-06-20 | 清华大学 | 半导体封装件 |
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2010
- 2010-06-17 US US13/378,344 patent/US20120086110A1/en not_active Abandoned
- 2010-06-17 JP JP2011519571A patent/JP5408253B2/ja not_active Expired - Fee Related
- 2010-06-17 WO PCT/JP2010/004044 patent/WO2010146863A1/ja active Application Filing
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JP2001358493A (ja) * | 2000-04-10 | 2001-12-26 | Hitachi Ltd | 電磁波吸収材とその製造法及びそれを用いた各種用途 |
JP2003335921A (ja) * | 2002-05-17 | 2003-11-28 | Mitsui Chemicals Inc | エポキシ樹脂組成物およびそれを用いた半導体装置 |
JP2004221463A (ja) * | 2003-01-17 | 2004-08-05 | Sony Corp | 磁気メモリ装置 |
JP2007157891A (ja) * | 2005-12-02 | 2007-06-21 | Murata Mfg Co Ltd | 回路モジュールおよびその製造方法 |
JP2010087058A (ja) * | 2008-09-30 | 2010-04-15 | Sanyo Electric Co Ltd | 高周波モジュール |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013004947A (ja) * | 2011-06-22 | 2013-01-07 | Nec Tokin Corp | インターポーザ |
JP2014167991A (ja) * | 2013-02-28 | 2014-09-11 | Canon Inc | 電子部品および電子機器。 |
US9225882B2 (en) | 2013-02-28 | 2015-12-29 | Canon Kabushiki Kaisha | Electronic component packaging that can suppress noise and electronic apparatus |
JP2017034086A (ja) * | 2015-07-31 | 2017-02-09 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP2017063123A (ja) * | 2015-09-25 | 2017-03-30 | Tdk株式会社 | 半導体パッケージ及びその製造方法 |
JP5988003B1 (ja) * | 2016-03-23 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
JP5988004B1 (ja) * | 2016-04-12 | 2016-09-07 | Tdk株式会社 | 電子回路パッケージ |
US11769708B2 (en) | 2021-02-20 | 2023-09-26 | Innogrit Technologies Co., Ltd. | Packaging-level chip and chip module packaged with magnetic cover, and electronic product |
Also Published As
Publication number | Publication date |
---|---|
JPWO2010146863A1 (ja) | 2012-11-29 |
US20120086110A1 (en) | 2012-04-12 |
JP5408253B2 (ja) | 2014-02-05 |
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