WO2010088802A1 - Dtx比特的映射方法和设备 - Google Patents

Dtx比特的映射方法和设备 Download PDF

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Publication number
WO2010088802A1
WO2010088802A1 PCT/CN2009/070431 CN2009070431W WO2010088802A1 WO 2010088802 A1 WO2010088802 A1 WO 2010088802A1 CN 2009070431 W CN2009070431 W CN 2009070431W WO 2010088802 A1 WO2010088802 A1 WO 2010088802A1
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symbol
dtx
binary
value
bit
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PCT/CN2009/070431
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English (en)
French (fr)
Inventor
杨波
贺传峰
李靖
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to BRPI0924333-0A priority Critical patent/BRPI0924333B1/pt
Priority to CN200980154926.3A priority patent/CN102668411B/zh
Priority to IN2769KON2011 priority patent/IN2011KN02769A/en
Priority to EP09839519.7A priority patent/EP2381589B1/en
Publication of WO2010088802A1 publication Critical patent/WO2010088802A1/zh
Priority to US12/982,239 priority patent/US20110085613A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/08Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0078Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0084Formats for payload data
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/3405Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • H04L27/362Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a DTX (Discontinuous Transmission) bit mapping method and device.
  • DTX Continuous Transmission
  • a downlink transmission channel FACH Formal Access Channel
  • FACH Forward Access Channel
  • DTX bits are used to indicate the off time of the transmitter.
  • the inserted DTX bits can be divided into a flexible position insertion DTX bit and a fixed position insertion DTX bit.
  • the DTX bit finger is inserted in a flexible position, and a certain number of DTX bits are inserted at the end of the frame after multiplexing of the respective transmission channels; the DTX bit finger is inserted at a fixed position, and each transmission channel is in the TTI (Time Transmission Interval) A certain number of DTX bits are added at the end of the data to ensure that the position of each transport channel in the CCTrCH is unchanged.
  • TTI Time Transmission Interval
  • the mapped downlink physical channel is an S-CCPCH (Secondary Common Control Physical Channel), and the S- The CCPCH can be modulated with 16QAM (Quadature Amplitude Modulation).
  • 16QAM Quadrature Amplitude Modulation
  • the symbols input by the downlink transmission channel are four consecutive binary symbols, which are divided into two paths (I and Q), each channel has two symbols, and each symbol is modulated and mapped. Form real values of the I and Q paths.
  • the purpose of the embodiments of the present invention is to provide a DTX bit mapping method and device, so as to solve the problem that the existing DTX bit value is single and cannot improve the non-DTX bit reception performance.
  • the embodiment of the present invention provides the following technical solutions:
  • a modulation mapping method for DTX bits including:
  • a modulation mapping method for DTX bits comprising:
  • one binary symbol in the binary symbol is a DTX bit, and another binary symbol includes a non-DTX bit
  • the symbol value of the DTX bit in one binary symbol that is both DTX bits is taken as the other binary symbol.
  • the symbol value of the non-DTX bit, and the updated binary symbol is obtained;
  • a modulation mapping method for DTX bits including: Receiving a binary symbol of a downlink physical channel;
  • a modulation mapping device for DTX bits comprising:
  • a receiving unit configured to receive a binary symbol of a downlink physical channel
  • An operation unit configured to use a symbol value of a DTX bit in the binary symbol as a symbol value of a non-DTX bit to obtain an updated binary symbol
  • mapping unit configured to perform modulation mapping on the updated binary symbol.
  • a modulation mapping device for DTX bits comprising:
  • a receiving unit configured to receive a binary symbol of a downlink physical channel
  • mapping unit configured to: when the binary symbols located in the same way in the binary symbol are DTX bits, perform modulation mapping on the same binary symbol that is the DTX bits, and output a real value of 0.
  • the symbol value of the DTX bit in the binary symbol is taken as the symbol value of the non-DTX bit, and the updated symbol is obtained.
  • Binary symbols, and modulation mapping of the updated binary symbols Since the DTX bits are used to repeat non-DTX bits, the DTX bits are provided as redundant information of non-DTX bits to the receiving end, which improves the demodulation of the receiving end. The performance of DTX bits.
  • the same binary symbol in the binary symbol is a DTX bit
  • the same binary symbol can be modulated and mapped to output a real value of 0, thereby knowing that there is only one way
  • the transmission of the channel can be separately turned off, thereby reducing the system transmission power and saving system resources accordingly.
  • FIG. 1 is a flowchart of a first embodiment of a DTX bit mapping method according to the present invention
  • FIG. 2 is a flowchart of a second embodiment of a DTX bit mapping method according to the present invention.
  • FIG. 3 is a flowchart of a third embodiment of a method for mapping DTX bits according to the present invention.
  • FIG. 4 is a flowchart of a fourth embodiment of a method for mapping DTX bits according to the present invention
  • FIG. 5 is a flowchart of a fifth embodiment of a method for mapping DTX bits according to the present invention.
  • FIG. 6 is a flowchart of a sixth embodiment of a DTX bit mapping method according to the present invention.
  • FIG. 8 is a block diagram of a device structure of a DTX bit mapping method according to the present invention.
  • FIG. 8 is a block diagram of a first embodiment of a DTX bit mapping device according to the present invention.
  • FIG. 9 is a block diagram of a second embodiment of a DTX bit mapping device of the present invention.
  • Figure 10 is a block diagram of a third embodiment of a DTX bit mapping device of the present invention.
  • Embodiments of the present invention provide a mapping method and device for DTX bits.
  • FIG. 1 The flow of the first embodiment of the DTX bit mapping method of the present invention is as shown in FIG. 1:
  • Step 101 Receive a binary symbol of a downlink physical channel.
  • Step 102 The symbol value of the DTX bit in the binary symbol is taken as the symbol value of the non-DTX bit to obtain the updated binary symbol.
  • the following method may be adopted: taking the symbol value of the DTX bit in the binary symbol as the symbol value of the non-DTX bit adjacent thereto; or, according to the reliability of each bit in the binary symbol, determining the symbol value of the DTX bit is reliable.
  • the symbol value of the lowest non-DTX bit; or, the symbol value of the DTX bit in the binary symbol is taken as the symbol value of the non-DTX bit located in the same way as the DTX bit; or the symbol of the DTX bit in the same way in the binary symbol
  • the value takes the value of the symbol of the other non-DTX bit.
  • Step 103 Perform modulation mapping on the updated binary symbols.
  • the modulation mapping may be a 16QAM modulation mapping, a 64QAM modulation mapping, or a higher order modulation mapping.
  • the DTX bit is used to repeat the non-DTX bit, the DTX bit is provided as the non-DTX bit redundancy information to the receiving end, which improves the performance of the receiving end to demodulate the non-DTX bit.
  • FIG. 2 The flow of the second embodiment of the DTX bit mapping method of the present invention is as shown in FIG. 2:
  • Step 201 Receive a binary symbol of a downlink physical channel.
  • Step 202 When the binary symbols in the same way in the binary symbol are all DTX bits, the same binary symbols that are DTX bits are modulated and mapped to output a real value of 0.
  • the modulation mapping may be a 16QAM modulation mapping, a 64QAM modulation mapping, or a higher order modulation mapping.
  • the symbol value of the DTX bit in the same binary symbol may be taken as the symbol value of the non-DTX bit of the path to obtain the updated binary symbol; or the same road
  • the symbol value of the DTX bit in the binary symbol takes a value of 0 or 1, and the updated binary symbol is obtained; or the symbol value of the DTX bit in the same binary symbol is taken as the symbol value of the non-DTX bit adjacent thereto.
  • FIG. 3 A third embodiment of the DTX bit mapping method of the present invention is shown in FIG. 3.
  • This embodiment shows a modulation mapping process in which the symbol value of the DTX bit is taken as the symbol value of the non-DTX bit:
  • Step 301 Receive a binary symbol of a downlink physical channel.
  • Step 302 Determine whether the binary symbols are all DTX bits. If yes, go to step 307; otherwise, go to step 303.
  • Step 303 Determine whether the forward-ordered adjacent bits of the DTX bit are non-DTX bits. If yes, go to step 304; otherwise, go to step 305.
  • Step 304 The symbol value of the DTX bit is taken as the symbol value of the first non-DTX bit adjacent in the forward order to obtain the updated binary symbol, and step 306 is performed.
  • Step 305 Taking the symbol value of the DTX bit as the first non-DTX ratio adjacent in the backward order The special symbol value, get the updated binary symbol.
  • Step 306 Perform modulation mapping on the updated binary symbol and output a modulation mapping value, and end the current process.
  • Step 307 The output modulation map value is a real value of 0, and the current flow is ended.
  • the adjacent bits in the forward direction of the DTX bit are non-DTX bits, and if so, the value is taken as the symbol value of the non-DTX bits adjacent in the forward order, and if not, the value is the first in the backward order.
  • the symbol value of a non-DTX bit is taken as the symbol value of the non-DTX bits adjacent in the forward order, and if not, the value is the first in the backward order.
  • the following manner may be adopted: first, whether the sequentially adjacent bits of the DTX bit are non-DTX bits, and if yes, the value is a symbol value of the non-DTX bits adjacent to the backward order. If not, the value is the symbol value of the first non-DTX bit adjacent in the forward order.
  • the symbol value of the DTX bit takes the value of the symbol of the first non-DTX bit adjacent to it, for example, the four binary symbols are "1, DTX, 0, DTX", respectively, and the DTX bit is The value of the binary symbol after the value of the symbol is "1, 1, 0, 0"; if there is no forward adjacent non-DTX bit, then the symbol value of the first non-DTX bit adjacent to the next value is taken For example, if the four binary symbols are "DTX, 1, DTX, 0", then the value of the binary symbol after the value of DTX is "1, 1, 1, 0".
  • Performing modulation mapping on the updated binary symbols that is, looking up the existing 16QAM modulation mapping table, can obtain real values of the two-way modulation mapping.
  • the number of DTX bits in n k , n k+1 , n k+2 , n k+3 is equal to 4, both real values of the output after modulation mapping are 0.
  • the DTX bits can be provided as redundant information of non-DTX bits to the receiving end, which improves the performance of the receiving end for demodulating non-DTX bits.
  • FIG. 4 A fourth embodiment of the DTX bit mapping method of the present invention is shown in FIG. 4. This embodiment shows another method of taking the symbol value of the DTX bit as a non-DTX bit.
  • Step 401 Receive a binary symbol of a downlink physical channel.
  • Step 402 Determine whether the binary symbols are all DTX bits. If yes, go to step 406; otherwise, go to step 403.
  • Step 403 Taking the symbol value of the DTX bit as the symbol value of the first non-DTX bit adjacent to the DTX bit sequence among the least reliable non-DTX bits, to obtain the updated binary symbol.
  • QAM-based modulation is usually mapped using a constellation diagram.
  • its constellation is divided into four quadrants, each quadrant consisting of four constellation points, including a total of 16 constellation points.
  • the mapping of the constellation diagram among the four consecutive binary symbols received, the values of the first two binary symbols determine the quadrant in which the mapped constellation points are located, and the values of the latter two binary symbols determine that the mapped constellation points are the quadrants.
  • the constellation point may change due to the fading and interference of the wireless channel, but the probability that the constellation point is changed in the quadrant is smaller than in a certain quadrant
  • the probability that a particular constellation point changes, so the reliability of the latter two binary symbols can be said to be lower than the reliability of the first two binary symbols, so the symbol value of the DTX bit is usually taken as the last two symbols (that is, The symbol value of the first non-DTX bit adjacent to the DTX bit order in the non-DTX bits of the least reliable).
  • Step 404 Perform modulation mapping on the updated binary symbol and output a modulation mapping value, and end the current process.
  • Step 405 The output modulation map value is a real value of 0, and the current flow ends.
  • the symbol value of the DTX bit takes the symbol value of the first non-DTX bit adjacent to its order in the values n k+2 , n k+3 , for example, four binary symbols respectively For "1, DTX, 0, 1", the value of the binary symbol after the value of the DTX bit is "1, 0, 0, 1"; if there is no non-DTX in n k+2 , n k+3 Bit, then the symbol value of the DTX bit takes the symbol value of the first non-DTX bit in the sequence n k , n k+1 adjacent thereto.
  • both real values of the output after modulation mapping are 0.
  • the above embodiment adopts the method of repeating non-DTX bits by DTX bits, it is possible to provide DTX bits as redundant information of non-DTX bits to the receiving end, thereby improving the demodulation of the receiving end.
  • the performance of DTX bits since the above embodiment adopts the method of repeating non-DTX bits by DTX bits, it is possible to provide DTX bits as redundant information of non-DTX bits to the receiving end, thereby improving the demodulation of the receiving end. The performance of DTX bits.
  • FIG. 5 The flow of the fifth embodiment of the DTX bit mapping method of the present invention is shown in FIG. 5.
  • This embodiment shows a modulation mapping process when all binary symbols are DTX bits:
  • Step 501 Receive a binary symbol of a downlink physical channel.
  • Step 502 Determine whether the two binary symbols are all DTX bits, and if yes, perform steps
  • Step 503 Determine whether all the binary symbols are DTX bits. If yes, execute step 504; otherwise, go to step 507.
  • Step 504 Perform modulation mapping on the binary symbols whose binary symbols are DTX bits, and output a real value of 0.
  • Step 505 Taking the symbol value of the DTX bit in the other binary symbol as the symbol value of the non-DTX bit of the path to obtain the updated binary symbol.
  • the symbol value of the DTX bit in the same binary symbol may be 0 or 1, to obtain the updated binary symbol; or the same binary symbol;
  • the symbol value of the DTX bit in the value is the symbol value of the non-DTX bit adjacent thereto, to obtain the updated binary symbol; or the symbol of the DTX bit in the same binary symbol according to the reliability of each bit in the binary symbol
  • the value is the symbol value of the least reliable non-DTX bit, and the updated binary symbol is obtained.
  • Step 506 Perform modulation mapping on the updated binary symbol and output a modulation mapping value, and end the current process.
  • Step 507 Taking the symbol value of the DTX bit in the two binary symbols as the symbol value of the non-DTX bit of the local path, and obtaining the updated binary symbol.
  • Step 508 Perform modulation mapping on the updated two binary symbols and output a modulation mapping value, and end the current process.
  • Step 509 The output modulation map value is a real value of 0, and the current flow is ended.
  • the output of the modulation map is The real value is 0, or similarly, if n k+1 and n k+3 are both DTX bits, the output value of the modulation map is also a real value of 0, that is: when only one binary symbol is DTX, The road launch can be turned off. For another binary symbol containing non-DTX bits, a flexible value can be adopted for the symbol value of the DTX bit in the path.
  • the symbol value of the DTX bit corresponding to n k+2 is taken as the symbol value "1" of the non-DTX bit of the same way, or may be directly taken as “0” or "1” according to the preset, or combined with the foregoing
  • the values of the values of the third embodiment and the fourth embodiment are set and are not described here.
  • the number of DTX bits in 3 ⁇ 4, 3 ⁇ 4 +1 , 3 ⁇ 4+ 2 , 3 ⁇ 4+3 is equal to 4, then the two real values of the output after modulation mapping are both 0.
  • the same binary symbol in the binary symbol is a DTX bit
  • the same binary symbol can be modulated and mapped to output a real value of 0, so that when only one input symbol is DTX bit
  • the transmission of the channel can be separately turned off, thereby reducing the system transmission power, correspondingly saving system resources, and by using DTX bits to repeat non-DTX bits, the DTX bits can be provided as redundant information of non-DTX bits to the reception.
  • the performance of demodulating non-DTX bits at the receiving end is improved.
  • FIG. 6 A sixth embodiment of the DTX bit mapping method of the present invention is shown in FIG. 6. This embodiment shows a modulation mapping process when binary symbols are DTX bits:
  • Step 601 Receive a binary symbol of a downlink physical channel.
  • Step 602 Determine whether the two binary symbols are all DTX bits. If yes, go to step 609; otherwise, go to step 603.
  • Step 603 Determine whether all the binary symbols are DTX bits. If yes, execute step 604; otherwise, go to step 607.
  • Step 604 The binary symbol of the DTX bit of one binary symbol is taken as the symbol value of the other non-DTX bit.
  • step 604 if the other binary symbol has only one non-DTX bit, the binary symbol of one DTX bit takes the symbol value of the other non-DTX bit, and if the other binary symbol is a non-DTX bit, then The symbol values of the DTX bits of a binary symbol that are all DTX bits are sequentially taken as the symbol values of the non-DTX bits in the other binary symbol.
  • the following is still taking 16QAM as an example to illustrate the value process of step 604 above.
  • the two binary symbols n k and n k+2 of the I path are DTX bits
  • q 2 l
  • Step 605 Taking the symbol value of the DTX bit in the other binary symbol as the symbol value of the non-DTX bit of the path to obtain the updated binary symbol.
  • the symbol value of the DTX bit in the same binary symbol may be 0 or 1 to obtain the updated binary symbol; or the same binary symbol may be used.
  • the symbol value of the DTX bit in the value is the symbol value of the non-DTX bit adjacent thereto, to obtain the updated binary symbol; or the symbol of the DTX bit in the same binary symbol according to the reliability of each bit in the binary symbol
  • the value is the symbol value of the least reliable non-DTX bit, and the updated binary symbol is obtained.
  • Step 606 Perform modulation mapping on the updated two binary symbols and output a modulation mapping value, and end the current process.
  • Step 607 Taking the symbol value of the DTX bit in the two binary symbols as the symbol value of the non-DTX bit of the local path, and obtaining the updated binary symbol.
  • Step 608 Perform modulation mapping on the updated two binary symbols and output a modulation mapping value, and end the current process.
  • Step 609 The modulation mapping value of the two outputs is a real value of 0, and the current flow is ended.
  • the value of one binary symbol that is a DTX bit can be taken as the value of the other non-DTX bit, and the DTX bit can be regarded as a non-
  • the redundant information of the DTX bits is provided to the receiving end, which improves the performance of the receiving end for demodulating non-DTX bits.
  • the modulation mappings of the third embodiment to the sixth embodiment are all described in detail by taking a 16QAM modulation mapping as an example. In fact, the 64QAM modulation mapping or the higher-order modulation mapping process is similar thereto, and is not mentioned here.
  • a schematic diagram of a device structure of an embodiment of a mapping method using the DTX bits of the present invention is shown in FIG.
  • a binary symbol of a downlink physical channel is input to a serial-to-parallel conversion module 710, and the serial-to-parallel conversion module 710 converts the serial binary symbols into Corresponding parallel binary symbols, the parallel binary symbols are divided into two paths, namely I and Q, respectively, and the two binary symbols are respectively input into a modulation mapping module 720, and the modulation mapping module 720 sets the DTX bits in the two binary symbols.
  • the modulation map is searched and two real values are output. After the two real values are spread by the spreading code C ch , SF, m , the I and Q are combined. Generate I + jQ, then pass the scrambling code l + jQ performs scrambling, and after scrambling, it forms a wireless signal transmission through modulation.
  • the modulation mapping module 620 takes the symbol values of the DTX bits in the two binary symbols according to any of the foregoing embodiments, and searches for the pre-stored modulation shown in Table 1 below.
  • the mapping table is output, and two real values are output, and after the subsequent spreading and scrambling, the modulated transmitting signal is output.
  • the present invention also provides an embodiment of a DTX bit modulation mapping device.
  • FIG. 8 A block diagram of a first embodiment of a DTX bit modulation mapping device of the present invention is shown in FIG. 8.
  • the device includes: a receiving unit 810, an operating unit 820, and a mapping unit 830.
  • the receiving unit 810 is configured to receive a binary symbol of the downlink physical channel, and the operation unit 820 is configured to: use a symbol value of the DTX bit in the binary symbol as a symbol value of the non-DTX bit to obtain an updated binary symbol; 830 is configured to perform modulation mapping on the updated binary symbol.
  • the operation unit 820 may include at least one of the following units (not shown in FIG. 8): a first operation unit, configured to take a symbol value of a DTX bit in the binary symbol as a non-DTX bit adjacent thereto Symbolic value
  • a second operation unit configured to: use a symbol value of the DTX bit as a symbol value of the least reliable non-DTX bit according to reliability of each bit in the binary symbol;
  • a third operation unit configured to: use a symbol value of a DTX bit in the binary symbol as a symbol value of a non-DTX bit that is in the same path as the DTX bit;
  • a fourth operating unit configured to use a symbol value of the DTX bit in the binary symbol as a symbol value of a non-DTX bit located in another path with the DTX bit.
  • mapping unit 830 is further configured to: when the binary symbols located in the same way in the binary symbol are DTX bits, the output of the same binary symbol that is the DTX bits is modulated and mapped to a real value of 0; or And the same binary symbol that is the DTX bit is taken as the symbol value of the non-DTX bit in the other binary symbol, and the updated binary symbol is obtained, and then the updated binary symbol is modulated and mapped.
  • FIG. 9 A block diagram of a second embodiment of a DTX bit modulation mapping device of the present invention is shown in FIG. 9, the device comprising: a receiving unit 910 and a mapping unit 920.
  • the receiving unit 910 is configured to receive a binary symbol of the downlink physical channel
  • the mapping unit 920 is configured to: when the binary symbols in the same way of the binary symbol are DTX bits, the same binary symbol that is the DTX bit
  • the real value 0 is output after the modulation mapping.
  • a first operating unit configured to: when a non-DTX bit is included in a binary symbol of the same way in the binary symbol, use a symbol value of a DTX bit in the same binary symbol as a symbol of the non-DTX bit Value, get the updated binary symbol;
  • a second operation unit configured to: when the non-DTX bit is included in the binary symbol of the same way in the binary symbol, the symbol value of the DTX bit in the same binary symbol is 0 or 1 Binary symbol
  • a third operation unit configured to: when a non-DTX bit is included in a binary symbol of the same way in the binary symbol, use a value of a DTX bit in the same binary symbol as a non-DTX bit adjacent thereto Symbol value, get the updated binary symbol;
  • a fourth operation unit configured to: when the non-DTX bits are included in the binary symbols of the same binary symbol, the symbol value of the DTX bit in the same binary symbol according to the reliability of each bit in the binary symbol Taking the symbol value of the non-DTX bit with the lowest reliability, and obtaining the updated binary symbol;
  • mapping unit 920 is further configured to perform modulation mapping on the updated binary symbols.
  • mapping unit 920 is further configured to perform modulation mapping on the updated binary symbols.
  • the symbol value of the DTX bit in the binary symbol is taken as the symbol value of the non-DTX bit, and the updated binary symbol is obtained.
  • the modulation mapping is performed on the updated binary symbols. Since the DTX bits are used to repeat non-DTX bits, the DTX bits are provided as redundant information of non-DTX bits to the receiving end, which improves the demodulation of non-DTX bits by the receiving end. performance.
  • the same binary symbol in the binary symbol is a DTX bit
  • the same binary symbol can be modulated and mapped to output a real value of 0, thereby knowing that there is only one input symbol.
  • both are DTX bits the transmission of the channel can be turned off separately, thereby reducing the system transmit power and saving system resources accordingly.
  • FIG. 10 A block diagram of a third embodiment of a DTX bit modulation mapping device of the present invention is shown in FIG. 10, the device comprising: a receiving unit 1010 and a mapping unit 1020.
  • the receiving unit 1010 is configured to receive a binary symbol of a downlink physical channel
  • the mapping unit 1020 is configured to: when two binary symbols in the binary symbol are DTX bits, perform the two binary symbols that are all DTX bits. The real value is 0 after the modulation map.
  • the mapping unit 1020 is further configured to: when the DTX bit and the non-DTX bit are included in the two binary symbols, the DTX bit symbol in the binary symbol is taken as the symbol value of the non-DTX bit in the local binary symbol, and is updated. The latter two binary symbols, and the modulation mapping of the updated two binary symbols.
  • the mapping unit 1020 is further configured to: when one of the two binary symbols is a DTX bit, and the other path includes a non-DTX bit, the DTX bit in one binary symbol that is a DTX bit is taken as another binary symbol. The symbol value of the DTX bit in the middle, the updated binary symbol is obtained, and the updated binary symbol is modulated and mapped.
  • the value of one binary symbol that is a DTX bit can be taken as the value of the other non-DTX bit, and the DTX bit can be regarded as a non-
  • the redundant information of the DTX bits is provided to the receiving end, which improves the performance of the receiving end for demodulating non-DTX bits.
  • the present invention can be implemented by means of software plus the necessary general purpose hardware platform. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product in essence or in the form of a software product, which may be stored in a storage medium such as a ROM/RAM or a disk. , an optical disk, etc., includes instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to perform the methods described in various embodiments of the present invention or portions of the embodiments.
  • a computer device which may be a personal computer, server, or network device, etc.

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Description

DTX比特的映射方法和设备 本申请要求于 2009 年 2 月 9 日提交中国专利局、 申请号为 PCT/CN2009/070383发明名称为" DTX比特的映射方法和设备"的专利申请的 优先权, 其全部内容通过引用结合在本申请中。 技术领域
本发明涉及通信技术领域, 特别涉及 DTX ( Discontinuous Transmission, 非连续传输) 比特的映射方法和设备。
背景技术
在无线通信系统中, 下行传输信道 FACH ( Forward Access Channel, 前向 接入信道)在编码和复用时, 通过插入 DTX比特来填满无线帧, 以适应不同 业务速率下各个传输信道每帧数据的长度变化, 其中 DTX比特用来指示发射 机的关闭时间。 才 据各个传输信道在 CCTrCH ( Coded Composite Transport Channel, 码复合传输信道)中的位置, 可以将插入 DTX比特分为灵活位置插 入 DTX比特和固定位置插入 DTX比特两种方式。其中 ,在灵活位置插入 DTX 比特指, 各个传输信道复接完毕后在帧尾处插入一定数量的 DTX比特; 在固 定位置插入 DTX比特指 , 各个传输信道在本 TTI ( Time Transmission Interval, 传输时间间隔)数据末尾处加入一定数量的 DTX比特, 以保证各个传输信道 在 CCTrCH中的位置不变。
FACH在承载 MBSFN ( MBMS over a Single Frequency Network, 多播组 播单频网 )传输时, 所映射的下行物理信道是 S-CCPCH ( Secondary Common Control Physical Channel , 辅公共控制物理信道), 该 S-CCPCH 可以采用 16QAM ( Quadrature Amplitude Modulation, 正交幅度调制) 进行调制。 在 16QAM调制映射过程中 , 下行传输信道每次输入的码元为四个连续的二进制 符号, 分为两路(I路和 Q路), 每一路有两个符号, 每一路符号经过调制映 射后形成 I路和 Q路的实数值符号。 下面以四个连续符号中包含 DTX比特为 例描述现有技术的调制映射过程,假设四个连续的二进制符号为 nk、 nk+1、 nk+2、 nk+3, 其中 DTX比特的个数为 NDra (k), 当 0≤ ΝΌΤΧ (k)≤ 3时, DTX比特的取 值为二进制符号 " 1", 例如, 四个符号为 "0、 DTX、 1、 DTX" , 将 DTX比 特的符号值取值为 " 1"后, 对应的四个二进制符号为 "0、 1、 1、 1" ; 当 NDTX (k) = 4时, 则调制映射后输出 I路和 Q路均为实数值 0,此时关闭 I路和 Q路 的发射通道。
发明人在对现有技术的研究过程中发现, 现有 16QAM调制映射过程中, 当一个码元中的连续二进制符号不全为 DTX比特时,无论其它非 DTX比特的 符号值如何取值, DTX 比特的符号值均取值为 " 1" , 这种单一取值方式难以 提高非 DTX比特的接收性能; 另外, 只有当一个码元中所有二进制符号均为 DTX时,才能关闭 I路和 Q路的发射 ,因此在仅有一路输入符号均为 DTX时 , 将会浪费不必要的发射功率, 浪费系统资源。
发明内容
本发明实施例的目的在于提供 DTX比特的映射方法和设备, 以解决现有 DTX比特取值方式单一, 无法提高非 DTX比特接收性能的问题。
为解决上述技术问题, 本发明实施例提供如下技术方案:
一种 DTX比特的调制映射方法, 包括:
接收下行物理信道的二进制符号;
将所述二进制符号中 DTX比特的符号值取值为非 DTX比特的符号值,得 到更新后的二进制符号;
对所述更新后的二进制符号进行调制映射。
一种 DTX比特的调制映射方法, 其特征在于, 包括:
接收下行物理信道的二进制符号;
当所述二进制符号中一路二进制符号均为 DTX比特, 另一路二进制符号 包含非 DTX比特时, 将均为 DTX比特的一路二进制符号中的 DTX比特的符 号值取值为所述另一路二进制符号中非 DTX比特的符号值, 得到更新后的一 路二进制符号;
对所述更新后的一路二进制符号进行调制映射。
一种 DTX比特的调制映射方法, 包括: 接收下行物理信道的二进制符号;
当所述二进制符号中位于同一路的二进制符号均为 DTX比特时, 对所述 均为 DTX比特的同一路二进制符号进行调制映射后输出实数值 0。
一种 DTX比特的调制映射设备, 包括:
接收单元, 用于接收下行物理信道的二进制符号;
操作单元, 用于将所述二进制符号中 DTX 比特的符号值取值为非 DTX 比特的符号值, 得到更新后的二进制符号;
映射单元, 用于对所述更新后的二进制符号进行调制映射。
一种 DTX比特的调制映射设备, 包括:
接收单元, 用于接收下行物理信道的二进制符号;
映射单元, 用于当所述二进制符号中位于同一路的二进制符号均为 DTX 比特时, 对所述均为 DTX比特的同一路二进制符号进行调制映射后输出实数 值 0。
由以上本发明实施例提供的技术方案可见,本发明实施例中当接收下行物 理信道的二进制符号后, 将二进制符号中 DTX 比特的符号值取值为非 DTX 比特的符号值,得到更新后的二进制符号, 并对更新后的二进制符号进行调制 映射, 由于采用了 DTX比特重复非 DTX比特的方式, 因此把 DTX比特作为 非 DTX比特的冗余信息提供给接收端,提高了接收端解调非 DTX比特的性能。 另夕卜,接收下行物理信道的二进制符号后, 当二进制符号中的同一路二进制符 号均为 DTX比特时,可以对同一路二进制符号进行调制映射后输出实数值 0, 由此可知在仅有一路输入符号均为 DTX比特时, 可以单独关闭该路的发射, 由此降低了系统发射功率, 相应节约了系统资源。
附图说明
图 1为本发明 DTX比特的映射方法的第一实施例流程图;
图 2为本发明 DTX比特的映射方法的第二实施例流程图;
图 3为本发明 DTX比特的映射方法的第三实施例流程图;
图 4为本发明 DTX比特的映射方法的第四实施例流程图; 图 5为本发明 DTX比特的映射方法的第五实施例流程图;
图 6为本发明 DTX比特的映射方法的第六实施例流程图;
图 Ί为采用本发明 DTX比特的映射方法实施例的设备结构示意图; 图 8为本发明 DTX比特的映射设备的第一实施例框图;
图 9为本发明 DTX比特的映射设备的第二实施例框图;
图 10为本发明 DTX比特的映射设备的第三实施例框图。
具体实施方式
本发明实施例提供了 DTX比特的映射方法和设备。
为了使本技术领域的人员更好地理解本发明方案 , 并使本发明的上述目 的、特征和优点能够更加明显易懂, 下面结合附图和具体实施方式对本发明作 进一步伴细的说明。
本发明 DTX比特的映射方法的第一实施例流程如图 1所示:
步骤 101 : 接收下行物理信道的二进制符号。
步骤 102:将二进制符号中 DTX比特的符号值取值为非 DTX比特的符号 值, 得到更新后的二进制符号。
可以采用如下方式: 将二进制符号中 DTX比特的符号值取值为与其相邻 的非 DTX比特的符号值; 或者, 按照二进制符号中各比特的可靠性, 将 DTX 比特的符号值取值为可靠性最低的非 DTX比特的符号值; 或者, 将二进制符 号中 DTX比特的符号值取值为与 DTX比特位于同一路的非 DTX比特的符号 值;或者将二进制符号中同一路的 DTX比特的符号值取值为另一路的非 DTX 比特的符号值。
步骤 103 : 对更新后的二进制符号进行调制映射。
其中, 调制映射可以为 16QAM调制映射、 64QAM调制映射或更高阶的 调制映射。
由上述实施例可知, 由于采用了 DTX比特重复非 DTX比特的方式, 因此 把 DTX比特作为非 DTX比特的冗余信息提供给接收端,提高了接收端解调非 DTX比特的性能。
本发明 DTX比特的映射方法的第二实施例流程如图 2所示:
步骤 201 : 接收下行物理信道的二进制符号。 步骤 202: 当二进制符号中位于同一路的二进制符号均为 DTX比特时, 对均为 DTX比特的同一路二进制符号进行调制映射后输出实数值 0。
其中, 调制映射可以为 16QAM调制映射、 64QAM调制映射或更高阶的 调制映射。
进一步, 当同一路二进制符号中包括非 DTX比特时, 可以将同一路二进 制符号中的 DTX比特的符号值取值为该路非 DTX比特的符号值,得到更新后 的二进制符号; 或者将同一路二进制符号中的 DTX比特的符号值取值为 0或 1 ,得到更新后的二进制符号;或者将同一路二进制符号中的 DTX比特的符号 值取值为与其相邻的非 DTX比特的符号值, 得到更新后的二进制符号; 或者 按照二进制符号中各比特的可靠性, 将同一路二进制符号中的 DTX比特的符 号值取值为可靠性最低的非 DTX比特的符号值, 得到更新后的二进制符号; 或者将同一路二进制符号中的 DTX比特的符号值取值为另一路二进制符号中 的非 DTX比特的符号值, 得到更新后的二进制符号。 然后对上述更新后的二 进制符号进行调制映射。
由上述实施例可知, 当二进制符号中的同一路二进制符号均为 DTX比特 时, 可以对同一路二进制符号进行调制映射后输出实数值 0, 由此可以单独关 闭该路的发射, 降低系统发射功率。
本发明 DTX比特的映射方法的第三实施例流程如图 3所示, 该实施例示 出了一种将 DTX比特的符号值取值为非 DTX比特的符号值后的调制映射过 程:
步骤 301 : 接收下行物理信道的二进制符号。
步骤 302: 判断二进制符号是否全为 DTX比特, 若是, 则执行步骤 307; 否则, 执行步骤 303。
步骤 303:判断 DTX比特前向顺序相邻的比特是否为非 DTX比特,若是, 则执行步骤 304; 否则, 执行步骤 305。
步骤 304:将 DTX比特的符号值取值为前向顺序相邻的第一个非 DTX比 特的符号值, 得到更新后的二进制符号, 执行步骤 306。
步骤 305:将 DTX比特的符号值取值为后向顺序相邻的第一个非 DTX比 特的符号值, 得到更新后的二进制符号。
步骤 306: 对更新后的二进制符号进行调制映射并输出调制映射值, 结束 当前流程。
步骤 307: 输出调制映射值为实数值 0, 结束当前流程。
需要说明的是,上述实施例中步骤 303至步骤 305采用的方式为: 先判断
DTX比特前向顺序相邻的比特是否为非 DTX比特, 如果是, 则值取为前向顺 序相邻的非 DTX比特的符号值, 如果不是, 再取值为后向顺序相邻的第一个 非 DTX比特的符号值。
本发明其它实施例中, 还可以采用如下方式: 先判断 DTX比特后向顺序 相邻的比特是否为非 DTX 比特, 如果是, 则值取为后向顺序相邻的非 DTX 比特的符号值, 如果不是, 再取值为前向顺序相邻的第一个非 DTX比特的符 号值。
下面以 16QAM为例, 说明上述第三实施例的调制映射过程, 假设四个连 续的二进制符号为 nk、 nk+1、 nk+2、 nk+3, 如果其中 DTX比特的个数小于 4, 则 DTX比特的符号值取值为其前向相邻的第一个非 DTX比特的符号值, 例如, 四个二进制符号分别为 "1、 DTX、 0、 DTX" , 则对 DTX 比特的符号值取值 后的二进制符号值为 "1、 1、 0、 0"; 如果没有前向相邻的非 DTX比特, 则取 值其后向相邻的第一个非 DTX比特的符号值, 例如, 四个二进制符号分别为 "DTX、 1、 DTX, 0" , 则对 DTX的符号值取值后的二进制符号值为 "1、 1、 1、 0"。 对上述更新后的二进制符号进行调制映射, 即查找现有 16QAM调制 映射表即可得到两路调制映射的实数值。 另外, 如果 nk, nk+1, nk+2, nk+3中 DTX 比特的个数等于 4, 则调制映射后输出的两路实数值均为 0。
由于上述实施例采用了 DTX比特重复非 DTX比特的方式, 因此能够把 DTX 比特作为非 DTX 比特的冗余信息提供给接收端, 提高了接收端解调非 DTX比特的性能。
本发明 DTX比特的映射方法的第四实施例流程如图 4所示, 该实施例示 出了另一种将 DTX比特的符号值取值为非 DTX比特的^
程: 步骤 401 : 接收下行物理信道的二进制符号。
步骤 402: 判断二进制符号是否全为 DTX比特, 若是, 则执行步骤 406; 否则, 执行步骤 403。
步骤 403: 将 DTX比特的符号值取值为可靠性最低的非 DTX比特中与 DTX比特顺序相邻的第一个非 DTX比特的符号值,得到更新后的二进制符号。
基于 QAM的调制通常采用星座图进行映射, 以 16QAM为例, 其星座图 中分为四个象限, 每个象限包括四个星座点, 共包括 16个星座点。 根据星座 图的映射,在接收到的四个连续二进制符号中, 前两个二进制符号的取值决定 所映射星座点所在的象限,后两个二进制符号的取值决定所映射星座点是该象 限中的哪一个点, 当映射到星座点的二进制符号经过调制和无线传输后, 由于 无线信道的衰落和干扰, 星座点可能发生变化,但是星座点所在象限发生变化 的概率要小于在某个象限内具体星座点发生变化的概率,因此可称后两个二进 制符号的可靠性比前两个二进制符号的可靠性低, 所以通常将 DTX比特的符 号值取值为后两个符号中(也就是可靠性最低 )的非 DTX比特中与 DTX比特 顺序相邻的第一个非 DTX比特的符号值。
步骤 404: 对更新后的二进制符号进行调制映射并输出调制映射值, 结束 当前流程。
步骤 405: 输出调制映射值为实数值 0, 结束当前流程。
下面仍然以 16QAM为例, 说明上述第四实施例的调制映射过程, 假设四 个连续的二进制符号为 nk、 nk+1、 nk+2、 nk+3, 其中 nk、 nk+1的可靠性高于 nk+2、 nk+3。 如果其中 DTX比特的个数小于 4, 则 DTX比特的符号值取值 nk+2、 nk+3 中与其顺序相邻的第一个非 DTX比特的符号值, 例如, 四个二进制符号分别 为 "1、 DTX、 0、 1" , 则对 DTX比特的符号值取值后的二进制符号值为 "1、 0、 0、 1"; 如果 nk+2、 nk+3中没有非 DTX比特, 则 DTX比特的符号值取值 nk、 nk+1中与其顺序相邻的第一个非 DTX比特的符号值。 另外, 如果 nk,nk+1,nk+2, nk+3中 DTX比特的个数等于 4, 则调制映射后输出的两路实数值均为 0。
由于上述实施例采用了 DTX比特重复非 DTX比特的方式, 因此能够把 DTX 比特作为非 DTX 比特的冗余信息提供给接收端, 提高了接收端解调非 DTX比特的性能。
本发明 DTX比特的映射方法的第五实施例流程如图 5所示, 该实施例示 出了一路二进制符号均为 DTX比特时的调制映射过程:
步骤 501 : 接收下行物理信道的二进制符号。
步骤 502: 判断两路二进制符号是否全为 DTX比特, 若是, 则执行步骤
509; 否则, 执行步骤 503。
步骤 503: 判断是否有一路二进制符号均为 DTX比特, 若是, 则执行步 骤 504; 否则, 执行步骤 507。
步骤 504: 对该一路二进制符号均为 DTX比特的二进制符号进行调制映 射后输出实数值 0。
步骤 505:将另一路二进制符号中的 DTX比特的符号值取值为该路非 DTX 比特的符号值, 得到更新后的二进制符号。
步骤 505除了采用上述取值方式得到更新后的二进制符号外,还可以将同 一路二进制符号中的 DTX比特的符号值取值为 0或 1, 得到更新后的二进制 符号; 或者将同一路二进制符号中的 DTX比特的符号值取值为与其相邻的非 DTX 比特的符号值, 得到更新后的二进制符号; 或者按照二进制符号中各比 特的可靠性, 将同一路二进制符号中的 DTX比特的符号值取值为可靠性最低 的非 DTX比特的符号值, 得到更新后的二进制符号。
步骤 506: 对更新后的另一路二进制符号进行调制映射并输出调制映射 值, 结束当前流程。
步骤 507: 将两路二进制符号中的 DTX比特的符号值取值为本路非 DTX 比特的符号值, 得到更新后的二进制符号。
步骤 508: 对更新后的两路二进制符号进行调制映射并输出调制映射值, 结束当前流程。
步骤 509: 输出调制映射值为实数值 0, 结束当前流程。
下面仍然以 16QAM为例, 说明上述第五实施例的调制映射过程, 假设四 个连续的二进制符号为 nk、 nk+1、 nk+2、 nk+3,其中, nk、 nk+2作为一路输入, nk+1、 nk+3作为另一路输入。 如果 nk、 nk+2均为 DTX比特, 则该路调制映射后输出为 实数值 0, 或者同理, 如果 nk+1、 nk+3均为 DTX比特, 则该路调制映射后输出 值也为实数值 0, 即: 在仅有一路二进制符号均为 DTX时, 可以关闭该路发 射。对于另一路包含非 DTX比特的二进制符号,可以对该路中的 DTX比特的 符号值采取灵活的取值方式, 例如, 四个二进制符号分别为 "1、 DTX、 DTX, DTX" , 则可以将 nk+2对应的 DTX比特的符号值取值为与其同一路的非 DTX 比特的符号值 "1" , 或者也可以按照预设直接取值为 "0" 或 "1" , 或者结合 前述第三实施例和第四实施例的取值方式进行取值, 在此不再赘述。 另外, 如 果 ¾, ¾+1, ¾+2, ¾+3中 DTX比特的个数等于 4, 则调制映射后输出的两路实数 值均为 0。
由上述实施例可知, 当二进制符号中的同一路二进制符号均为 DTX比特 时, 可以对同一路二进制符号进行调制映射后输出实数值 0, 由此可知在仅有 一路输入符号均为 DTX比特时, 可以单独关闭该路的发射, 由此降低了系统 发射功率,相应节约了系统资源, 另外通过采用 DTX比特重复非 DTX比特的 方式, 能够把 DTX比特作为非 DTX比特的冗余信息提供给接收端,提高了接 收端解调非 DTX比特的性能。
本发明 DTX比特的映射方法的第六实施例流程如图 6所示, 该实施例示 出了二进制符号均为 DTX比特时的调制映射过程:
步骤 601 : 接收下行物理信道的二进制符号。
步骤 602: 判断两路二进制符号是否全为 DTX比特, 若是, 则执行步骤 609; 否则, 执行步骤 603。
步骤 603: 判断是否有一路二进制符号均为 DTX比特, 若是, 则执行步 骤 604; 否则, 执行步骤 607。
步骤 604: 对该一路二进制符号均为 DTX比特的二进制符号取值为另一 路的非 DTX比特的符号值。
步骤 604中, 如果另一路二进制符号只有一个非 DTX比特, 则均为 DTX 比特一路的二进制符号取值为另一路的非 DTX比特的符号值, 如果另一路二 进制符号均为非 DTX比特, 则该一路均为 DTX比特的二进制符号的 DTX比 特的符号值按顺序取值为另一路二进制符号中的非 DTX比特的符号值。 下面仍然以 16QAM为例, 说明上述步骤 604的取值过程, ϋ史四个连续 的二进制符号为 nk、 nk+1、 nk+2、 nk+3,其中的 nk、 nk+2作为一路输入 I路, ii= nk , i2= nk+2,其中的 nk+1、 nk+3作为另一路输入 Q路, qf iik+i , q2= nk+3。 如果 I路 的两个二进制符号 nk、nk+2 均为 DTX比特, Q路的两个二进制符号均为非 DTX 比特, 如^= 0 , q2= l, 则令 = =0, i2= q2=l, 即 nk= nk+1= 0, nk+2= nk+3= l。 也不排除其他的取值方式, 如顺序相反的方式, 即 if q^l , i2= qi=0o
步骤 605:将另一路二进制符号中的 DTX比特的符号值取值为该路非 DTX 比特的符号值, 得到更新后的二进制符号。
步骤 605除了采用上述取值方式得到更新后的二进制符号外,还可以将同 一路二进制符号中的 DTX比特的符号值取值为 0或 1 , 得到更新后的二进制 符号;或者将同一路二进制符号中的 DTX 比特的符号值取值为与其相邻的非 DTX比特的符号值, 得到更新后的二进制符号;或者按照二进制符号中各比特 的可靠性, 将同一路二进制符号中的 DTX比特的符号值取值为可靠性最低的 非 DTX比特的符号值, 得到更新后的二进制符号。
步骤 606: 对更新后的两路二进制符号进行调制映射并输出调制映射值, 结束当前流程。
步骤 607: 将两路二进制符号中的 DTX比特的符号值取值为本路非 DTX 比特的符号值, 得到更新后的二进制符号。
步骤 608: 对更新后的两路二进制符号进行调制映射并输出调制映射值, 结束当前流程。
步骤 609: 两路输出的调制映射值为实数值 0, 结束当前流程。
由上述实施例可知, 当二进制符号中的同一路二进制符号均为 DTX比特 时,可以对均为 DTX比特的一路二进制符号取值为另一路的非 DTX比特的取 值, 能够把 DTX比特作为非 DTX比特的冗余信息提供给接收端,提高了接收 端解调非 DTX比特的性能。
上述第三实施例至第六实施例的调制映射均以 16QAM调制映射为例具体 描述了调制映射过程, 实际上 64QAM调制映射或更高阶的调制映射过程与其 类似, 在此不再赞述。 一种采用本发明 DTX比特的映射方法实施例的设备结构示意图如图 Ί所 示,下行物理信道的二进制符号输入串并转换模块 710,由该串并转换模块 710 将串行的二进制符号转换为对应的并行二进制符号 ,该并行二进制符号分为两 路, 分别为 I路和 Q路, 将上述两路二进制符号分别输入调制映射模块 720, 调制映射模块 720将两路二进制符号中的 DTX比特的符号值按照前述任意实 施例进行取值后, 查找调制映射表并输出两路实数值,这两路实数值经扩频码 Cch,SF,m扩频后, 进行 I、 Q两路的合并生成 I + jQ, 然后通过扰码
Figure imgf000013_0001
l + jQ 进行加扰, 加扰后通过调制形成无线信号发射。
下面以 16QAM为例, 假设输入的四个二进制符号为 nk,nk+1,nk+2,nk+3 , 经 过串并转换模块 610后, nk,nk+2作为 I路输入, 即 = nk, i2= nk+2, nk+1,nk+3作 为 Q路输入, 即 qi= nk+1, q2= nk+3。 将 I路和 Q路输入调制映射模块 620后, 调制映射模块 620将两路二进制符号中的 DTX比特的符号值按照前述任意实 施例进行取值后, 查找预先保存的如下表 1所示的调制映射表, 并输出两路实 数值, 后续进行扩频和加扰后, 输出调制发射信号。
表 1 iiqii2q2 I路 Q路
0000 0.4472 0.4472
0001 0.4472 1.3416
0010 1.3416 0.4472
0011 1.3416 1.3416
0100 0.4472 -0.4472
0101 0.4472 -1.3416
0110 1.3416 -0.4472
0111 1.3416 -1.3416
1000 -0.4472 0.4472
1001 -0.4472 1.3416
1010 -1.3416 0.4472
1011 -1.3416 1.3416
1100 -0.4472 -0.4472
1101 -0.4472 -1.3416
1110 -1.3416 -0.4472
1111 -1.3416 -1.3416 与本发明 DTX比特的调制映射方法的实施例流程相对应, 本发明还提供 了 DTX比特的调制映射设备的实施例。
本发明 DTX比特的调制映射设备的第一实施例框图如图 8所示, 该设备 包括: 接收单元 810、 操作单元 820和映射单元 830。
其中, 接收单元 810用于接收下行物理信道的二进制符号; 操作单元 820 用于将所述二进制符号中 DTX比特的符号值取值为非 DTX比特的符号值,得 到更新后的二进制符号;映射单元 830用于对所述更新后的二进制符号进行调 制映射。
具体的, 操作单元 820可以包括至少一个下述单元(图 8中未示出): 第一操作单元, 用于将所述二进制符号中 DTX比特的符号值取值为与其 相邻的非 DTX比特的符号值;
第二操作单元,用于按照所述二进制符号中各比特的可靠性,将所述 DTX 比特的符号值取值为所述可靠性最低的非 DTX比特的符号值;
第三操作单元, 用于将所述二进制符号中 DTX比特的符号值取值为与所 述 DTX比特位于同一路的非 DTX比特的符号值;
第四操作单元, 用于将所述二进制符号中 DTX比特的符号值取值为与所 述 DTX比特位于另一路的非 DTX比特的符号值。
进一步,映射单元 830还用于当所述二进制符号中位于同一路的二进制符 号均为 DTX比特时,对所述均为 DTX比特的同一路二进制符号进行调制映射 后的输出为实数值 0; 或者, 将所述均为 DTX比特的同一路二进制符号取值 为另一路二进制符号中的非 DTX比特的符号值, 得到更新后的二进制符号, 然后对更新后的二进制符号进行调制映射。
本发明 DTX比特的调制映射设备的第二实施例框图如图 9所示, 该设备 包括: 接收单元 910和映射单元 920。
其中, 接收单元 910用于接收下行物理信道的二进制符号; 映射单元 920 用于当所述二进制符号中位于同一路的二进制符号均为 DTX比特时, 对所述 均为 DTX比特的同一路二进制符号进行调制映射后输出实数值 0。
进一步, 还可以包括至少一个下述单元(图 9中未示出): 第一操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时,将所述同一路二进制符号中的 DTX比特的符号值取值为所述 非 DTX比特的符号值, 得到更新后的二进制符号;
第二操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时, 将所述同一路二进制符号中的 DTX比特的符号值取值为 0 或 1 , 得到更新后的二进制符号;
第三操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时,将所述同一路二进制符号中的 DTX比特的符号值取值为与其 相邻的非 DTX比特的符号值, 得到更新后的二进制符号;
第四操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时, 按照二进制符号中各比特的可靠性, 将所述同一路二进制符 号中的 DTX比特的符号值取值为所述可靠性最低的非 DTX比特的符号值,得 到更新后的二进制符号;
进一步,映射单元 920还用于,对所述更新后的二进制符号进行调制映射。 通过以上的实施方式的描述可知,本发明实施例中当接收下行物理信道的 二进制符号后,将二进制符号中 DTX比特的符号值取值为非 DTX比特的符号 值, 得到更新后的二进制符号, 并对更新后的二进制符号进行调制映射, 由于 采用了 DTX比特重复非 DTX比特的方式, 因此把 DTX比特作为非 DTX比 特的冗余信息提供给接收端, 提高了接收端解调非 DTX比特的性能。 另外, 接收下行物理信道的二进制符号后,当二进制符号中的同一路二进制符号均为 DTX比特时,可以对同一路二进制符号进行调制映射后输出实数值 0, 由此可 知在仅有一路输入符号均为 DTX比特时, 可以单独关闭该路的发射, 由此降 低了系统发射功率, 相应节约了系统资源。
本发明 DTX比特的调制映射设备的第三实施例框图如图 10所示,该设备 包括: 接收单元 1010和映射单元 1020。
其中,接收单元 1010用于接收下行物理信道的二进制符号;映射单元 1020 用于当所述二进制符号中两路的二进制符号均为 DTX 比特时, 对所述均为 DTX比特的两路二进制符号进行调制映射后输出实数值 0。 所述映射单元 1020, 还用于当两路二进制符号中均包含 DTX 比特和非 DTX 比特时, 将二进制符号中的 DTX 比特符号取值为本路二进制符号中非 DTX 比特的符号值, 得到更新后的两路二进制符号, 并对更新后的两路二进 制符号进行调制映射。
所述映射单元 1020 ,还用于当两路二进制符号中其中一路均为 DTX比特 , 另一路包含非 DTX比特时, 将均为 DTX比特的一路二进制符号中的 DTX比 特取值为另一路二进制符号中非 DTX比特的符号值, 得到更新后的二进制符 号, 并对更新后的二进制符号进行调制映射。
由上述实施例可知, 当二进制符号中的同一路二进制符号均为 DTX比特 时,可以对均为 DTX比特的一路二进制符号取值为另一路的非 DTX比特的取 值, 能够把 DTX比特作为非 DTX比特的冗余信息提供给接收端,提高了接收 端解调非 DTX比特的性能。
本领域的技术人员可以清楚地了解到本发明可借助软件加必需的通用硬 件平台的方式来实现。基于这样的理解,本发明的技术方案本质上或者说对现 有技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品可 以存储在存储介质中, 如 ROM/RAM、磁碟、 光盘等, 包括若干指令用以使得 一台计算机设备(可以是个人计算机, 服务器, 或者网络设备等)执行本发明 各个实施例或者实施例的某些部分所述的方法。
以上所述的本发明实施方式, 并不构成对本发明保护范围的限定。任何在 本发明的精神和原则之内所作的修改、等同替换和改进等, 均应包含在本发明 的保护范围之内。

Claims

权 利 要 求
1、 一种 DTX比特的调制映射方法, 其特征在于, 包括:
接收下行物理信道的二进制符号;
将所述二进制符号中 DTX比特的符号值取值为非 DTX比特的符号值,得 到更新后的二进制符号;
对所述更新后的二进制符号进行调制映射。
2、 根据权利要求 1所述的方法, 其特征在于, 所述将二进制符号中 DTX 比特的符号值取值为非 DTX比特的符号值包括: 符号值; 或
按照所述二进制符号中各比特的可靠性, 将所述 DTX比特的符号值取值 为所述可靠性最低的非 DTX比特的符号值; 或
将所述二进制符号中 DTX比特的符号值取值为与所述 DTX比特位于同一 路的非 DTX比特的符号值; 或
将所述二进制符号中同一路的 DTX比特的符号值取值为另一路的非 DTX 比特的符号值。
3、 根据权利要求 2所述的方法, 其特征在于, 所述将二进制符号中 DTX 比特的符号值取值为与其相邻的非 DTX比特的符号值包括:
当所述 DTX比特前向顺序相邻的比特为非 DTX比特时, 将所述 DTX比 特的符号值取值为所述前向顺序相邻的第一个非 DTX比特的符号值, 当所述 DTX比特前向顺序相邻的比特为 DTX比特时, 将所述 DTX比特的符号值取 值为后向顺序相邻的第一个非 DTX比特的符号值; 或
当所述 DTX比特后向顺序相邻的比特为非 DTX比特时 , 将所述 DTX比 特的符号值取值为所述后向顺序相邻的第一个非 DTX比特的符号值, 当所述 DTX比特后向顺序相邻的比特为 DTX比特时, 将所述 DTX比特的符号值取 值为前向顺序相邻的第一个非 DTX比特的符号值。
4、根据权利要求 2所述的方法, 其特征在于, 所述将 DTX比特的符号值 取值为所述可靠性最低的非 DTX比特的符号值包括: 将所述 DTX比特的符号值取值为所述可靠性最低的非 DTX比特中与所述 DTX比特顺序相邻的第一个非 DTX比特的符号值。
5、 根据权利要求 2所述的方法, 其特征在于, 还包括: 当所述二进制符 号中位于同一路的二进制符号均为 DTX比特时,对所述均为 DTX比特的同一 路二进制符号进行调制映射后的输出为实数值 0。
6、 一种 DTX比特的调制映射方法, 其特征在于, 包括:
接收下行物理信道的二进制符号;
当所述二进制符号中一路二进制符号均为 DTX比特, 另一路二进制符号 包含非 DTX比特时, 将均为 DTX比特的一路二进制符号中的 DTX比特的符 号值取值为所述另一路二进制符号中非 DTX比特的符号值, 得到更新后的一 路二进制符号;
对所述更新后的一路二进制符号进行调制映射。
7、 如权利要求 6所述的方法, 其特征在于, 还包括:
当所述包含非 DTX比特的另一路二进制符号中包含 DTX比特时,将所述 另一路二进制符号中 DTX比特的符号值取值为本路二进制符号中非 DTX比特 的符号值, 得到更新后的另一路二进制符号;
对所述更新后的另一路二进制符号进行调制映射。
8、 一种 DTX比特的调制映射方法, 其特征在于, 包括:
接收下行物理信道的二进制符号;
当所述二进制符号中位于同一路的二进制符号均为 DTX比特时, 对所述 均为 DTX比特的同一路二进制符号进行调制映射后输出实数值 0。
9、 根据权利要求 8所述的方法, 其特征在于, 还包括:
当所述二进制符号中位于同一路的二进制符号中包括非 DTX比特时, 将 值, 得到更新后的二进制符号; 或
当所述二进制符号中位于同一路的二进制符号中包括非 DTX比特时, 将 所述同一路二进制符号中的 DTX比特的符号值取值为 0或 1 , 得到更新后的 二进制符号; 或
当所述二进制符号中位于同一路的二进制符号中包括非 DTX比特时, 将 的符号值, 得到更新后的二进制符号; 或
当所述二进制符号中位于同一路的二进制符号中包括非 DTX比特时, 按 照二进制符号中各比特的可靠性, 将所述同一路二进制符号中的 DTX比特的 符号值取值为所述可靠性最低的非 DTX比特的符号值, 得到更新后的二进制 符号;
对所述更新后的二进制符号进行调制映射。
10、 一种 DTX比特的调制映射设备, 其特征在于, 包括:
接收单元, 用于接收下行物理信道的二进制符号;
操作单元, 用于将所述二进制符号中 DTX 比特的符号值取值为非 DTX 比特的符号值, 得到更新后的二进制符号;
映射单元, 用于对所述更新后的二进制符号进行调制映射。
11、 根据权利要求 10所述的设备, 其特征在于, 所述操作单元包括至少 一个下述单元:
第一操作单元 , 用于将所述二进制符号中 DTX比特的符号值取值为与其 相邻的非 DTX比特的符号值;
第二操作单元,用于按照所述二进制符号中各比特的可靠性,将所述 DTX 比特的符号值取值为所述可靠性最低的相邻的第一个非 DTX比特的符号值; 第三操作单元, 用于将所述二进制符号中 DTX比特的符号值取值为与所 述 DTX比特位于同一路的非 DTX比特的符号值;
第四操作单元, 用于将所述二进制符号中同一路的 DTX比特的符号值取 值为另一路的非 DTX比特的符号值。
12、 根据权利要求 11所述的设备, 其特征在于, 所述映射单元还用于, 当所述二进制符号中位于同一路的二进制符号均为 DTX比特时, 对所述均为 DTX比特的同一路二进制符号进行调制映射后的输出为实数值 0。
13、 一种 DTX比特的调制映射设备, 其特征在于, 包括:
接收单元, 用于接收下行物理信道的二进制符号;
映射单元, 用于当所述二进制符号中位于同一路的二进制符号均为 DTX 比特时, 对所述均为 DTX比特的同一路二进制符号进行调制映射后输出实数 值 0。
14、 根据权利要求 13所述的设备, 其特征在于, 还包括至少一个下述单 元:
第一操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时,将所述同一路二进制符号中的 DTX比特的符号值取值为所述 非 DTX比特的符号值, 得到更新后的二进制符号;
第二操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时, 将所述同一路二进制符号中的 DTX比特的符号值取值为 0 或 1 , 得到更新后的二进制符号;
第三操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时,将所述同一路二进制符号中的 DTX比特的符号值取值为与其 相邻的非 DTX比特的符号值, 得到更新后的二进制符号;
第四操作单元,用于当所述二进制符号中位于同一路的二进制符号中包括 非 DTX比特时, 按照二进制符号中各比特的可靠性, 将所述同一路二进制符 号中的 DTX比特的符号值取值为所述可靠性最低的非 DTX比特的符号值,得 到更新后的二进制符号;
所述映射单元还用于, 对所述更新后的二进制符号进行调制映射。
PCT/CN2009/070431 2009-02-09 2009-02-13 Dtx比特的映射方法和设备 WO2010088802A1 (zh)

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BRPI0924333-0A BRPI0924333B1 (pt) 2009-02-09 2009-02-13 método e dispositivo de mapeamento para bits de trasmissão descontínua
CN200980154926.3A CN102668411B (zh) 2009-02-09 2009-02-13 Dtx比特的映射方法和设备
IN2769KON2011 IN2011KN02769A (zh) 2009-02-09 2009-02-13
EP09839519.7A EP2381589B1 (en) 2009-02-09 2009-02-13 Modulating and mapping method and device for dtx bits
US12/982,239 US20110085613A1 (en) 2009-02-09 2010-12-30 Mapping method and device for discontinuous transmission bits

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BRPI0924333B1 (pt) 2020-11-17
EP2381589B1 (en) 2016-10-05
BRPI0924333A2 (pt) 2018-10-16
US20110085613A1 (en) 2011-04-14
IN2011KN02769A (zh) 2015-07-10
EP2381589A4 (en) 2012-02-29

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