WO2010067958A2 - Solar battery with a reusable substrate, and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a solar battery with a reusable substrate, and to a manufacturing method thereof. The solar battery comprises i) a plurality of nanostructures spaced apart from each other and arranged in one direction, ii) a first conductor layer which covers one end of one or more nanostructures from among the plurality of nanostructures, iii) a second conductor layer which is spaced apart from the first conductor layer, and which covers the other end of the nanostructure, and iv) a dielectric layer interposed between the first conductor layer and the second conductor layer.

Description

Solar cell capable of reusing substrate and manufacturing method thereof

The present invention relates to a solar cell and a method of manufacturing the same. More specifically, the present invention relates to a solar cell capable of reusing a substrate and a method of manufacturing the same.

Recently, due to resource depletion and rising resource prices, clean energy research and development has been actively conducted. Examples of clean energy include solar energy, wind energy and tidal energy. In particular, research and development of solar cells are being made continuously in order to use solar energy efficiently.

Solar cells are devices that convert the sun's light energy into electrical energy. When sunlight shines on a solar cell, electrons and holes are generated inside the solar cell. The generated electrons and holes move to the P pole and the N pole included in the solar cell, and the electric current flows because all positions are generated between the P pole and the N pole.

It is an object of the present invention to provide a solar cell that can reuse a substrate. It is also an object of the present invention to provide a method of manufacturing the solar cell.

A solar cell according to an embodiment of the present invention comprises: i) a plurality of nanostructures spaced apart from each other and extending in one direction, ii) a first conductor layer covering one end of at least one of the plurality of nanostructures, iii A second conductor layer spaced apart from the first conductor layer and covering the other end of the nanostructure, and iv) a dielectric layer positioned between the first conductor layer and the second conductor layer.

A silicide layer may be formed at one end of the nanostructure, and a high concentration of p-type doped region may be formed in the nanostructure in contact with the silicide layer. The high concentration p-type doped region may be located in the first conductive layer.

The solar cell according to an embodiment of the present invention may further include i) a transparent contact layer positioned in contact with the first conductor layer, and ii) a light transmitting substrate positioned in contact with the transparent contact layer. The transparent contact layer may include indium tin oxide (ITO).

Metal nanoparticles may be located on the surface of one or more nanostructures of the plurality of nanostructures. A nanostructure in contact with at least one layer selected from the group consisting of a second conductor layer and a dielectric layer comprises: i) a first doped region, and ii) a second doped region surrounding the first doped region in a direction parallel to the plate surface of the second conductor layer. It may include a doped region. The second doped region may be doped n-type.

A nanostructure in contact with at least one layer selected from the group consisting of a second conductor layer and a dielectric layer may comprise i) a first doped region and ii) a second doped region in contact with the first doped region in the longitudinal direction of the nanostructure. have. The nanostructures in contact with at least one layer selected from the group consisting of a second conductor layer and a dielectric layer may comprise i) a first doped region, ii) an intrinsic region in contact with the first doped region in the longitudinal direction of the nanostructure, and iii) a nanostructure And a second doped region in contact with the intrinsic region in the longitudinal direction.

The silicide layer may be formed at one end of the nanostructure and the other end of the nanostructure, respectively. The plurality of nanostructures may comprise i) a first diameter in contact with the first conductive layer, and ii) a second diameter in contact with the second conductive layer, wherein the first diameter may be smaller than the second diameter. The diameters of the plurality of nanostructures may be gradually smaller as they are closer to the first conductive layer along the length direction of the nanostructures. A high concentration doped region is formed at one end of the nanostructure, and the high concentration doped region may contact the first conductive layer.

The solar cell according to the exemplary embodiment of the present invention may further include a blocking layer positioned on the first conductive layer between the nanostructures and covering a high concentration of the p-type doped region. The solar cell according to the exemplary embodiment of the present invention may further include another dielectric layer positioned opposite the dielectric layer with the second conductive layer interposed therebetween. Another dielectric layer may have a thickness of 0.5 mm to 30 mm. The dielectric layer and another dielectric layer may each comprise polydimethylsiloxane (PDMS).

The plurality of nanostructures may have a concentration gradient along its length direction. The plurality of nanostructures have a composition of Si _1-x Ge _x (0 < _x ≦ 0.5), and x may be sequentially smaller as the second conductive layer is closer to the second conductive layer along the length direction of the nanostructure. The plurality of nanostructures may have a composition of Si _1-x Ge _x (0 < _x ≦ 0.3).

The solar cell according to the exemplary embodiment of the present invention may further include a transparent conductive layer covering the surfaces of the plurality of nanostructures and contacting the dielectric layer and the second conductive layer.

In the solar cell manufacturing method according to an embodiment of the present invention, i) a plurality of nanostructures extending in a direction substantially perpendicular to the plate surface of the substrate on the substrate on which the mask layer on which the plurality of openings are formed is located; Growing through, ii) plating metal on the bottom of one or more of the nanostructures to fill the openings, iii) heat treating the nanostructure to form a silicide layer on the bottom of the nanostructure, iv) Forming a plurality of doped regions in the nanostructure, v) providing a dielectric layer over the mask layer to bond the dielectric layer and the nanostructure, vi) separating the nanostructure associated with the dielectric layer from the mask layer and the substrate, vii) Forming a heavily doped region in the nanostructure in contact with the silicide layer, and viii) a dielectric Providing a first conductor layer and a second conductor layer on the back side of the layer and the front side of the dielectric layer, respectively.

In the forming of the silicide layer, the silicide layer may be formed by combining a metal and a material of the substrate. As the silicide layer is formed, a groove may be formed in the substrate, and the silicide layer may be seated in the groove. The step of forming the heavily doped region may be performed by injecting boron (B) to the externally exposed nanostructure.

The method of manufacturing a solar cell according to an embodiment of the present invention may further include providing metal nanoparticles on the surface of the nanostructure after forming a plurality of doped regions in the nanostructure. Forming a plurality of doped regions in the nanostructure comprises: i) forming a first doped region in the nanostructure, and ii) a second doped region surrounding the first doped region in a direction parallel to the plate surface of the substrate. It may include forming in the nanostructures. In the forming of the second doped region in the nanostructure, the second doped region may be formed in an n-type.

Forming a plurality of doped regions in the nanostructure comprises: i) forming a first doped region in the nanostructure, and ii) forming a second doped region adjacent to the first doped region in the longitudinal direction of the nanostructure. It may include. Forming a plurality of doped regions in the nanostructure comprises: i) forming a first doped region in the nanostructure, ii) forming an intrinsic region adjacent to the first doped region in the longitudinal direction of the nanostructure, and iii ) Forming a second doped region adjacent to the intrinsic region in the longitudinal direction of the nanostructure.

A method of manufacturing a solar cell according to an embodiment of the present invention, i) providing a plurality of nanostructures on the substrate extending in a direction substantially perpendicular to the plate surface of the substrate, ii) doping between the plurality of nanostructures Providing a layer, iii) providing a barrier layer over the doped layer, iv) doping the surfaces of the plurality of nanostructures, and doping one end of the plurality of nanostructures in contact with the substrate by the doping layer to form a high concentration doped region. Providing, v) providing a dielectric layer between the plurality of nanostructures on the substrate, vi) providing a first electrode covering the other end of the plurality of nanostructures exposed over the dielectric layer, vii) over the first electrode Providing another dielectric layer, viii) gripping another dielectric layer to separate the substrate from the dielectric layer to externally expose the heavily doped region, ix) a step of covering the high concentration doped region providing a second electrode in contact with the dielectric layer.

In the providing of the plurality of nanostructures, the plurality of nanostructures may be formed by etching the base material forming the substrate. The etching region formed during the etching of the base material may be larger as it is closer to the plate surface of the substrate. Providing the dielectric layer may include i) covering the other end of the plurality of nanostructures, and ii) plasma etching the dielectric layer covering the other end to externally expose the other end.

The method of manufacturing a solar cell according to an embodiment of the present invention further includes forming a transparent conductive layer covering a surface of the plurality of nanostructures exposed over the blocking layer after providing the high concentration doped region, and the first electrode. In the providing of the transparent conductive layer may be in contact with the first electrode. In the providing of the second electrode, the second electrode may be spaced apart from the conductive layer by the blocking layer.

In the solar cell manufacturing method according to an embodiment of the present invention, i) providing a substrate, ii) sequentially stacking a plurality of compound semiconductor layers on the substrate, iii) an oxide induction pattern on the plurality of compound semiconductor layers Iv) providing a plurality of nanostructures by partially etching the plurality of compound semiconductor layers, v) doping the plurality of nanostructures, vi) depositing a dielectric layer between the plurality of nanostructures on the substrate. Providing, vii) providing a transparent conductive layer over the dielectric layer, viii) providing a first electrode over the transparent conductive layer, ix) separating the substrate from the plurality of nanostructures to externally terminate one end of the plurality of nanostructures. Exposing, and x) providing a second electrode contacting the dielectric layer while covering one end.

The plurality of compound semiconductor layers may have a concentration gradient along the stacking direction. In providing the transparent conductive layer, the transparent conductive layer may cover the other end of the plurality of nanostructures exposed over the dielectric layer.

 Since the substrate can be reused, a large amount of solar cells can be manufactured at low cost. Therefore, the manufacturing efficiency of a solar cell can be increased. Since the flexibility of the solar cell can be secured using the dielectric layer, the solar cell can be applied to clothing, a flexible display, and the like. In addition, since all the advantages of the organic solar cell and the silicon solar cell can be used, the photoelectric conversion efficiency is excellent and the bending characteristic can be secured. And a low purity silicon can be used to manufacture a solar cell.

1 is a schematic cross-sectional view of a solar cell according to a first embodiment of the present invention.

2 is a schematic cross-sectional view of a solar cell according to a second embodiment of the present invention.

3 is a schematic cross-sectional view of a solar cell according to a third embodiment of the present invention.

4 is a schematic cross-sectional view of a solar cell according to a fourth embodiment of the present invention.

FIG. 5 is a schematic flowchart illustrating a manufacturing process of the solar cell of FIG. 1.

6 to 13 are schematic diagrams of manufacturing processes of a solar cell corresponding to respective steps of FIG. 5.

14 is a schematic cross-sectional view of a solar cell according to a fifth embodiment of the present invention.

FIG. 15 is a schematic flowchart illustrating a manufacturing process of the solar cell of FIG. 14.

16 to 24 are schematic diagrams of manufacturing processes of a solar cell corresponding to respective steps of FIG. 15.

25 is a schematic cross-sectional view of a solar cell according to a sixth embodiment of the present invention.

FIG. 26 is a schematic flowchart illustrating a manufacturing process of the solar cell of FIG. 25.

27 to 35 are schematic diagrams of manufacturing processes of a solar cell corresponding to respective steps of FIG. 26.

36 is a schematic cross-sectional view of a solar cell according to a seventh embodiment of the present invention.

FIG. 37 is a schematic flowchart illustrating a manufacturing process of the solar cell of FIG. 36.

38 to 41 are schematic diagrams of manufacturing processes of a solar cell corresponding to respective steps of FIG. 37.

42 is a scanning electron micrograph of the nanostructures included in the solar cell prepared according to the experimental example of the present invention.

FIG. 43 is a side scanning electron micrograph of the nanostructure of FIG. 42.

DETAILED DESCRIPTION Embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As can be easily understood by those of ordinary skill in the art to which the present invention pertains, the following embodiments are only intended to illustrate the present invention, and various forms without departing from the spirit and scope of the present invention. It can be modified. Where possible, the same or similar parts are represented using the same reference numerals in the drawings.

All terms including technical terms and scientific terms used hereinafter have the same meaning as commonly understood by one of ordinary skill in the art. Terms defined in advance are further interpreted to have a meaning consistent with the related technical literature and the presently disclosed contents, and are not interpreted in an ideal or very formal sense unless defined.

When a portion is referred to as being "above" another portion, it may be just above the other portion or may be accompanied by another portion in between. In contrast, when a part is mentioned as "directly above" another part, no other part is involved between them.

Terms such as first, second, and third are used to describe various parts, components, regions, layers, and / or sections, but are not limited to these. These terms are only used to distinguish one part, component, region, layer or section from another part, component, region, layer or section. Accordingly, the first portion, component, region, layer or section described below may be referred to as the second portion, component, region, layer or section without departing from the scope of the invention.

The terminology used herein is for reference only to specific embodiments and is not intended to limit the invention. As used herein, the singular forms “a,” “an,” and “the” include plural forms as well, unless the phrases clearly indicate the opposite. As used herein, the meaning of "comprising" embodies a particular characteristic, region, integer, step, operation, element and / or component, and the presence of other characteristics, region, integer, step, operation, element and / or component It does not exclude the addition.

Terms indicating relative space such as "below" and "above" may be used to more easily explain the relationship of one part to another part shown in the drawings. These terms are intended to include other meanings or operations of the device in use with the meanings intended in the figures. For example, turning the device in the figure upside down, some parts described as being "below" of the other parts are described as being "above" the other parts. Thus, the exemplary term "below" encompasses both up and down directions. The device may be rotated 90 degrees or at other angles, the terms representing relative space being interpreted accordingly.

The term "nano" described in the specification means nano-scale, and may include micro units. In addition, the term "nanostructure" described herein refers to nanoscale objects including all structures, such as nanorods, nanotubes, nanowalls and nanowires.

1 is a schematic cross-sectional view of a solar cell 100 according to a first embodiment of the present invention. The structure of the solar cell 100 of FIG. 1 is merely for illustrating the present invention, and the present invention is not limited thereto. Therefore, the structure of the solar cell 100 can be modified in other forms.

As shown in FIG. 1, the solar cell 100 includes a plurality of nanostructures 20, a first conductor layer 40, a second conductor layer 42, and a dielectric layer 60. In addition, the solar cell 100 may further include other elements. For example, the solar cell 100 further includes a catalyst 50, a transparent contact layer 10, a light transmitting substrate 90, and contact portions 80, 82.

Although FIG. 1 illustrates nanorod-shaped nanostructures 20 extending in the z-axis direction, the nanostructures 20 may be manufactured in a different shape. Since the plurality of nanostructures 20 are spaced apart from each other and extend in the z-axis direction, the plurality of nanostructures 20 may absorb sunlight well.

As the material of the nanostructure 20, silicon (Si), germanium (Ge), or silicon germanium (SiGe) may be used. By using such a material, a doped region may be formed in the nanostructure 20.

As shown in FIG. 1, the nanostructure 20 includes a first doped region 201 and a second doped region 203. The second doped region 203 surrounds the first doped region 201. In particular, the second doped region 203 surrounds the first doped region 201 in a direction parallel to the plate surface 421 of the second conductor layer 42, that is, in the xy plane direction. Here, the first doped region 201 may be formed in an n-type, and the second doped region 203 may be formed in a p-type. Therefore, when electrons are coupled to the first doped region 201 by the incident sunlight and holes are coupled to the second doped region 203, electromotive force is generated. Since the nanostructure 20 directly contacts only the second conductor layer 42 and the dielectric layer 60, a short circuit due to electrical connection with the first conductor layer 40 does not occur.

As shown in FIG. 1, a silicide layer 22 is formed at one end 20a of the nanostructure 20. The silicide layer 23 formed on the other end 20b of the nanostructure 20 functions as a catalyst and is used to grow the nanostructure 20.

When manufacturing the solar cell 100, part of the silicide layer 22 may again function as the silicide layer 23, which is a catalyst for manufacturing the nanostructure 20. Therefore, since the solar cell 100 can be continuously manufactured by reusing the substrate 70 (shown in FIG. 6), the manufacturing cost of the solar cell 100 can be reduced. This will be explained in more detail later.

As illustrated in FIG. 1, a high concentration of p-type doped region 205, that is, p + type doped region, is formed in nanostructure 20 in contact with silicide layer 22. As a result, holes generated in the nanostructure 20 by the incident sunlight can be transferred to the transparent contact layer 10 through the p + type doped region 205 well, so that the photoelectric conversion efficiency of the solar cell 100 Can increase. Furthermore, since the p + type doped region 205 is located in the first conductive layer 40, the transport efficiency of the holes can be increased through the first conductive layer 40.

As shown in FIG. 1, the first conductor layer 40 and the second conductor layer 42 are spaced apart from each other. The dielectric layer 60 is positioned between the first conductor layer 40 and the second conductor layer 42 to insulate the first conductor layer 40 and the second conductor layer 42 from each other. For example, zinc oxide (ZnO), silicon oxide (SiO ₂ ), PDMS (polydimethylsiloxane) or a mixture thereof may be used as the material of the dielectric layer 60.

The first conductor layer 40 covers one end 20a of the nanostructure 20, and the second conductor layer 42 covers the other end 20b of the nanostructure 20. Here, the first conductor layer 40 and the second conductor layer 42 may be formed of a transparent conductive oxide (TCO) so that sunlight can be transmitted well. As a result, the sunlight penetrates the first conductor layer 40 and the second conductor layer 42 well and enters the plurality of nanostructures 20 well. Therefore, the light absorption rate of the solar cell 100 may be increased.

As shown in FIG. 1, the transparent contact layer 10 is positioned in contact with the first conductor layer 40 and the light transmitting substrate 90. Therefore, the light transmitting substrate 90, for example, can pass through the nanostructure 20 as it is without blocking the sunlight passing through the glass. For example, the transparent contact layer 10 may include electrically indium tin oxide (ITO), and may electrically connect the first conductor layer 40 and the first contact portion 80 while transmitting light.

As shown in FIG. 1, the second contact portion 82 and the first contact portion 80 are formed on the upper portion of the second conductor layer 42 and the transparent contact layer 10, respectively. ). Therefore, the solar cell 100 may be driven by supplying power to the passive element P.

2 is a schematic cross-sectional view of a solar cell 200 according to a second embodiment of the present invention. Since the structure of the solar cell 200 of FIG. 2 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 2, the nanostructure 21 includes a first doped region 211 and a second doped region 213 formed along its longitudinal direction, that is, along the z-axis direction. The first doped region 211 and the second doped region 213 are adjacent to each other along the z-axis direction. Here, the first doped region 211 may be formed in an n-type, and the second doped region 213 may be formed in a p-type. Therefore, when electrons are coupled to the first doped region 211 by the incident sunlight and holes are coupled to the second doped region 213, electromotive force is generated. Although not shown in FIG. 2, a doped region in the form of p + / p / n / n + or a doped region in the form of p + / p / i / n / n + may be formed along the length direction of the nanostructure 21.

3 is a schematic cross-sectional view of a solar cell 300 according to a third embodiment of the present invention. Since the structure of the solar cell 300 of FIG. 3 is similar to that of the solar cell 200 of FIG. 2, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 3, the nanostructure 25 includes a first doped region 211, an intrinsic region 212, and a second doped region 213 formed along its length direction. The first doped region 211, the intrinsic region 212, and the second doped region 213 are in contact with each other. The band gap of the nanostructure 25 may be minimized by forming the intrinsic region 212 between the first doped region 211 and the second doped region 213. As a result, since the transport efficiency of holes and free electrons increases through the nanostructure 25, the photoelectric conversion efficiency of the solar cell 300 may be increased.

4 is a schematic cross-sectional view of a solar cell 400 according to a fourth embodiment of the present invention. Since the structure of the solar cell 400 of FIG. 4 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 4, the solar cell 400 further includes metal nanoparticles 30. The metal nanoparticles 30 may contact the dielectric layer 60 to further maximize the surface plasmon effect. As a result, the light absorption rate of the solar cell 400 can be further improved.

The metal nanoparticles 30 are positioned on the surface of the nanostructure 20. The metal nanoparticles 30 having a hemispherical shape are attached to the surface of the nanostructure 20 to induce surface plasmon effects. Plasmons are analogous particles in which free electrons in the metal vibrate collectively, and are partially present on the surface of the metal nanoparticles 30.

Therefore, by using the surface plasmon effect using the metal nanoparticles (30) it is possible to implement a high transmittance in the visible light region. As a result, the light absorption rate of the solar cell 300 can be greatly improved. For example, silver (Ag), gold (Au), aluminum (Al), copper (Cu), nickel (Ni), or an alloy thereof may be used as the material of the metal nanoparticles 30. have. Since the material of the metal nanoparticles 30 is excellent in the surface plasmon effect, it is suitable for use in the solar cell 400.

FIG. 5 schematically illustrates a flowchart of a manufacturing process of the solar cell 100 of FIG. 1, and FIGS. 6 to 13 are schematic views illustrating respective steps of the manufacturing process of the solar cell 100 of FIG. 1. Hereinafter, a portion in which the first conductor layer 40, the second conductor layer 42, and the dielectric layer 20 are bonded to each other in the solar cell 100 of FIG. 1 with reference to FIGS. 6 to 13 along with FIG. 5. The process will be described in order. Since the manufacturing process of the remaining parts of the solar cell 100 except for the above-described portion can be easily understood by those skilled in the art to which the present invention belongs, detailed description thereof will be omitted.

First, in step S10 of FIG. 5, as shown in FIG. 6, a plurality of nanostructures 20 are grown on the substrate 70 through the mask layer 72 positioned on the substrate 70. Since the plurality of openings 721 are formed in the mask layer 72, the plurality of nanostructures 20 are grown through the plurality of openings 721. The plurality of nanostructures 20 extend in a direction substantially perpendicular to the plate surface 701 of the substrate 70.

The plurality of nanostructures 20 are manufactured by injecting a precursor into a chamber (not shown) using the silicide layer 23 as a catalyst. Here, the doped p-type silicon may be used as the material of the substrate 70, and silicon oxide (SiO ₂ ) may be used as the material of the mask layer 72. For example, nickel silicide (NiSi _x ) may be used as the material of the silicide layer 23. The nanostructure 20 may be made of silicon.

Next, in step S20 of FIG. 5, the opening 24 is filled by plating the metal 24 on the lower end of the nanostructure 20. For example, as shown in FIG. 7, the metal 24 such as nickel is electroless plated to fill the lower end of the nanostructure 20.

In step S30 of FIG. 5, the nanostructure 20 is heat treated to form the silicide layer 22 at the bottom of the nanostructure 20. That is, as shown in FIG. 8, the substrate 70 and the metal 24 (shown in FIG. 7) interact to form the silicide layer 22 at the bottom of the nanostructure 20. The silicide layer 22 is formed by combining a metal 24 (shown in FIG. 7) with silicon, which is a material of the substrate 70. Therefore, since the silicide layer 22 is formed by using a part of the material of the substrate 70, the groove 701 is formed in the substrate 70. The silicide layer 22 is positioned in the groove 701.

Next, in step S40 of FIG. 5, a plurality of doped regions 201 and 203 are formed in the nanostructure 20. As shown in FIG. 9, the plurality of doped regions 201 and 203 include a first doped region 201 and a second doped region 203.

In order to form the first doped region 201, the nanostructure 20 may be coated with boron. In this case, as the boron coated on the surface of the nanostructure 20 is diffused into the nanostructure 20 by heat, the nanostructure 20 is entirely replaced with the first doped region 201. Accordingly, the nanostructure 20 uniformly doped into the first doped region 201 may be manufactured.

Next, phosphorus (P) is injected into the nanostructure 20 while heat-treating the nanostructure 20 on which the first doped region 201 is formed. That is, when the nanostructure 20 is heat-treated after phosphorus is coated on the surface of the nanostructure 20, phosphorus is injected while being diffused into the nanostructure 20. In addition, the plasma-doped nanostructure 20 implanted with phosphorus is formed to form a second doped region 203 in the nanostructure 20. As a result, the outer region of the first doped region 201 is converted to the second doped region 203 while the second doped region 203 is first doped in a direction parallel to the plate surface 701 of the substrate 70. Surround area 201. The second doped region 203 may be formed in an n-type to increase free electron transfer efficiency of the nanostructure 20. Meanwhile, in order to prevent the first doped region 201 from being completely replaced by the second doped region 203, the heat treatment time of the nanostructure 20 for forming the second doped region 203 may be defined as the first doped region ( 201) is kept shorter than the heat treatment time of the nanostructure 20 for formation.

Alternatively, in step S40 of FIG. 5, as shown in FIGS. 2 and 3, the first doped region 211 and the second doped region 213 are formed along the length direction of the nanostructure 20. Can be. In this case, before the conductor layers 40 and 42 are formed, both ends of the nanostructure 20 are doped and diffused to form a pn junction structure or a pin junction structure. Here, the pin junction structure includes an undoped intrinsic region.

The nanostructure 20 is doped in a state where the dielectric layer 60 serving as a mask is formed. Organic materials containing phosphorus (P) and boron (B) may be spin-coated and deposited on both ends of the nanostructure 20, and then thermally treated to form the first doped region 211 and the second doped region 213. have. Alternatively, both ends of the nanostructure 20 may be doped into p-type and n-type through ion implantation, and then diffused by heat treatment to form a pn junction or a pin junction.

Meanwhile, the metal nanoparticles 30 (shown in FIG. 4) may be provided on the surface of the nanostructure 20. In this case, the metal nanoparticles 30 may be deposited on the surface of the nanostructure 20 using a target source such as silver (Ag) in a chamber (not shown).

Alternatively, the metal nanoparticles 30 may be provided on the surface of the nanostructure 20 by supporting the nanostructure 20 in a plating bath (not shown) containing a metal plating solution. The metal nanoparticles 30 are attached onto the surface of the nanostructure 20 by an electroless plating method. When the nanostructure 20 is dried, the metal nanoparticles 30 are attached in a hemispherical shape on the surface of the nanostructure 20.

Next, in step S50 of FIG. 5, as shown in FIG. 10, the dielectric layer 60 is provided on the mask layer 72 to couple the dielectric layer 60 to the nanostructure 20. Since the dielectric layer 60 is made of a material having high curability such as PDMS, the dielectric layer 60 is supported by the mask layer 72 and does not penetrate into the opening 721. Therefore, a boundary surface extending in a direction parallel to the plate surface 701 of the substrate 70 is formed between the mask layer 72 and the dielectric layer 60.

Next, in step S60 of FIG. 5, as illustrated by arrows in FIG. 11, the nanostructure 20 coupled with the dielectric layer 60 is separated from the mask layer 72 and the substrate 70. Here, only the nanostructure 20 combined with the dielectric layer 60 may be used to fabricate the solar cell 100 (shown in FIG. 1).

On the other hand, the remaining silicide layer 22 is present in the opening 721 of the substrate 70 separated from the nanostructure 20. Thus, the substrate 70 on which the mask layer 72 is located can be reused. That is, when the substrate 70 is placed in a chamber (not shown) and the precursor is injected, the remaining silicide layer 22 may function as a catalyst to manufacture the nanostructure 20 again through the opening 721. As a result, the manufacturing cost of the solar cell 100 (shown in FIG. 1) can be reduced by continuous reuse of the substrate 70.

Next, in step S70 of FIG. 4, as shown in FIG. 12, a highly doped region, that is, a p + doped region 205 is formed in the nanostructure 20 in contact with the silicide layer 22. That is, the p + doped region 205 may be formed by injecting and diffusing boron (B) into one end of the externally exposed nanostructure 20. As a result, it is possible to increase the transport efficiency of holes through the p + doped region 205.

In step S80 of FIG. 4, as shown in FIG. 13, a first conductor layer 40 and a second conductor layer 42 are provided on the back surface 601 and the front surface 603 of the dielectric layer 60, respectively. . As a result, the dielectric layer 60 is positioned in contact with the first conductor layer 40 and the second conductor layer 42. The first conductor layer 40 and the second conductor layer 42 may be formed by spin coating the dielectric layer 60. Through these methods, a solar cell 100 (shown in FIG. 1) capable of reusing the substrate 70 may be manufactured.

14 schematically shows a cross-sectional structure of a solar cell 500 according to a fifth embodiment of the present invention. Since the structure of the solar cell 500 of FIG. 14 is similar to that of the solar cell 100 of FIG. 1, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 14, the solar cell 500 includes a plurality of nanostructures 25, a first conductive layer 40, a second conductive layer 42, a metal grid 44, and a first dielectric layer 60. ) And a second dielectric layer 62. The nanostructure 25 includes a first doped region 251, a second doped region 253, and a high concentration of p-type doped region 255. Some of the above-described devices may be omitted in the solar cell 500. In addition, other devices may be added to the solar cell 500.

As shown in FIG. 14, the nanostructure 25 has an inverted trapezoidal shape. Therefore, the diameter of the nanostructure 25 is gradually smaller as it approaches the first conductive layer 40 along the length direction of the nanostructure 25, that is, the z-axis direction. In addition, the first diameter D1 of the nanostructure 25 in contact with the first conductive layer 40 is smaller than the second diameter D2 of the nanostructure 25 in contact with the second conductive layer 42. Since nanostructure 25 has this structure, it is convenient to separate nanostructure 25 from a substrate (not shown). That is, since the area where the nanostructure 25 contacts the substrate (not shown) is small, the nanostructure 25 is easily separated from the substrate (not shown).

As shown in FIG. 14, a high concentration of p-type doped region 255 is formed at one end of nanostructure 25. In this case, the first doped region 251 may be formed in a p-type, and the second doped region 253 may be formed in an n-type. As a result, by implementing a pn junction in the nanostructure 25 can be generated a sufficient amount of electromotive force by the sunlight. The high concentration p-type doped region 255 is positioned in contact with the first conductive layer 40. Therefore, the high concentration p-type doped region 255 may efficiently transfer electrons or holes required for power generation to the first conductive layer 40.

The second dielectric layer 62 is positioned over the metal grid 44 and the second conductive layer 42. That is, the second dielectric layer 62 is positioned opposite the first dielectric layer 60 with the second conductive layer 42 interposed therebetween. The thickness of the second dielectric layer 62 may be 0.5 mm to 30 mm. If the thickness of the second dielectric layer 62 is too small, it is difficult to support the underlying silicon wire array. In addition, when the thickness of the second dielectric layer 62 is too large, the solar cell 500 does not bend well. Therefore, the thickness of the second dielectric layer 62 is maintained in the above range. The second dielectric layer 62 may be gripped to separate the plurality of nanostructures 25 from the substrate (not shown).

The first dielectric layer 60 and the second dielectric layer 62 described above may include PDMS. PDMS is an organic support, which causes the solar cell 500 to bend well. Therefore, the solar cell 500 can be attached well to the outside of the curved building. Hereinafter, a manufacturing method of the solar cell 500 will be described in more detail with reference to FIGS. 15 and 16 to 24.

FIG. 15 is a flowchart schematically illustrating a method of manufacturing the solar cell 500 of FIG. 14, and FIGS. 16 to 24 are schematic cross-sectional views of the solar cell 500 corresponding to the respective steps of FIG. 15.

As shown in FIG. 15, the method of manufacturing the solar cell 500 includes: i) providing a base material (S15), ii) etching the base material to provide a plurality of nanostructures on the substrate (S25), and iii. ) Providing a doping layer and a blocking layer (S35), iv) doping the surfaces of the plurality of nanostructures, and providing a highly doped region at one end of the nanostructure (S45), v) between the plurality of nanostructures Providing a dielectric layer (S55), vi) providing a first conductive layer covering the other end of the nanostructure (S65), vii) providing another dielectric layer on the first conductive layer (S75), viii) Separating the substrate from the dielectric layer (S85), and ix) providing a second conductive layer in contact with the dielectric layer (S95). In addition, the manufacturing method of the solar cell 500 may further include other steps as necessary.

As shown in FIG. 15, first, in step S15, the base material 501 is provided. For example, as shown in FIG. 16, p-type silicon can be used as the material of the base material 501.

Next, in step S25 of FIG. 15, the base material 501 is etched to provide the plurality of nanostructures 25 on the substrate 70. That is, as shown in FIG. 17, the plurality of nanostructures 25 are formed by anisotropically etching the base material 501 using a mask. Therefore, the etching region located between the plurality of nanostructures 25 increases as the substrate 70 is closer to the substrate 70. As a result, an inverted trapezoidal nanostructure 25 is manufactured. Here, the plurality of nanostructures 25 extend in a direction substantially perpendicular to the plate surface 701 of the substrate 70. The nanostructure 25 may have a diameter of 2 μm to 10 μm. If the diameter of the nanostructure 25 is too small, the pn junction is unstable. In addition, when the diameter of the nanostructure 25 is too large, the density of the nanostructure 25 is low, the light absorption and photoelectric conversion efficiency of the nanostructure 25 is low.

In step S35 of FIG. 15, the doping layer 71 and the blocking layer 73 are provided. That is, as shown in FIG. 18, a doping layer 71 and a blocking layer 73 are sequentially formed between the plurality of nanostructures 25 on the substrate 70. The doped layer 71 is provided to form a heavily doped region at the bottom of the nanostructure 25. For example, the doped layer 71 is provided by using a method of coating a boron spin on dopatn (SOD).

Meanwhile, the blocking layer 73 is provided on the doped layer 71. The blocking layer 73 prevents a region, for example, phosphorous (P), heavily doped by the doping layer 71 from diffusing to the top of the nanostructure 25. The blocking layer 73 may be coated with spin on glass (SOG).

Next, in step S45 of FIG. 15, the surfaces of the plurality of nanostructures 25 are doped, and a high concentration doped region 255 is provided at one end of the nanostructure 25. That is, as shown in FIG. 19, by floating a phosphorous spin on glass (PSOD) 75 on the plurality of nanostructures (25) by heating (600 ° C to 1100 ° C) for 1 to 30 seconds The surface of the plurality of nanostructures 25 is doped. In this case, the surfaces of the plurality of nanostructures 25 may be doped n-type. In addition, the doped layer 71 (shown in FIG. 18) acts on one end of the nanostructure 25 in contact with the substrate 70 to form the heavily doped region 255. As a result, the nanostructure 25 including the first doped region 251, the second doped region 253, and the heavily doped region 255 is manufactured. For example, the first doped region 251 may be n-type, the second doped region 253 may be p-type, and the doped region 255 may be manufactured to a high concentration p-type. Meanwhile, when the above-described reaction is completed in step S45 of FIG. 15, the dilute hydrogen fluoride solution may be used to remove the barrier layer 71 (shown in FIG. 18) and the remaining residues.

15, in step S55, the dielectric layer 60 is provided between the plurality of nanostructures 25. That is, as shown in FIG. 20, the dielectric layer 60 is uniformly coated on the substrate 70 between the plurality of nanostructures 25 using a spin coater. The coating speed can be adjusted from 1000 rpm to 5000 rpm and is made for 10 seconds to 10 minutes. PDMS may be used as a material of the dielectric layer 60. PDMS uses the substrate diluted with methylene chloride. PDMS is diluted with a dilution concentration ratio of 1-4. After completing the PDMS coating, the PDMS is heated to 50 ° C to 150 ° C. Dielectric layer 60 passivates the surface of nanostructure 25.

Meanwhile, the upper end of the nanostructure 25 may be exposed to the outside. That is, the top of the nanostructure 25 may be exposed to the outside by covering the ends of the plurality of nanostructures 25 with the dielectric layer 60 and plasma etching the dielectric layer 60.

Next, in step S65 of FIG. 15, the first conductive layer 42 covering the upper ends of the plurality of nanostructures 25 is provided. That is, as shown in FIG. 21, since the plurality of nanostructures 25 are electrically connected to the first conductive layer 42, power may be supplied to the outside.

In step S75 of FIG. 15, the dielectric layer 62 is provided. As shown in FIG. 22, a metal grid 44 may be provided over the first conductive layer 42, and then a dielectric layer 62 may be provided thereon. In addition, the metal grid 44 may be omitted if unnecessary. The metal grid 44 is attached on the first conductive layer 42 to increase the conductivity of the first conductive layer 42.

Next, in step S85 of FIG. 16, the substrate 70 is separated from the dielectric layer 60. That is, as shown in FIG. 23, since the substrate 70 (shown in FIG. 22) is firmly supported by the dielectric layer 62, the substrate 70 is pulled off after the dielectric layer 62 is gripped and pulled off. Can be recycled.

Finally, in step S95, the second conductive layer 40 in contact with the dielectric layer 60 is provided. The second conductive layer 40 may be formed by depositing under the dielectric layer 60. That is, as shown in FIG. 24, the second conductive layer 40 is electrically connected to the nanostructure 25. Therefore, the solar cell 500 can be manufactured using the above-described method.

25 schematically shows a cross-sectional structure of a solar cell 600 according to the sixth embodiment of the present invention. Since the cross-sectional structure of the solar cell 600 of FIG. 25 is similar to that of the solar cell of FIG. 15, the same reference numerals are used for the same parts, and a detailed description thereof is omitted.

As shown in FIG. 25, the solar cell 600 includes a plurality of nanostructures 26, a first electrode 43, a second electrode 45, a transparent conductive layer 42, and a dielectric layer 60. do. In addition, the solar cell 600 may further include other elements as necessary. The substrate removed during fabrication of the solar cell 600 can be reused.

The nanostructure 26 has a concentration gradient along its longitudinal direction, that is, along the z-axis direction. That is, the nanostructure 26 has a composition of Si _1-x Ge _x (0 < _x ≦ 0.5). Here, x becomes smaller gradually as it approaches the second conductive layer 42. Preferably, x described above may be greater than zero and less than or equal to three. Since the nanostructure 26 having a concentration gradient can minimize the band gap, the photoelectric conversion efficiency can be greatly increased. In addition, since the surface of the nanostructure 26 is doped to form a pn junction, electrons and holes are formed by incident light, and electromotive force is generated as they move. Hereinafter, a method of manufacturing the solar cell 600 will be described in detail with reference to FIGS. 26 and 27 to 33.

FIG. 26 shows a schematic flowchart of a method of manufacturing the solar cell 600 of FIG. 25. The manufacturing method of the solar cell 600 of FIG. 26 is merely for illustrating the present invention, and the present invention is not limited thereto. Therefore, the manufacturing method of the solar cell 600 can be modified in other forms.

As shown in FIG. 26, the method of manufacturing the solar cell 600 includes: i) providing a substrate (S16), ii) sequentially stacking a plurality of compound semiconductor layers on the substrate (S26), and iii) a plurality of Forming an oxide induction pattern on the compound semiconductor layers (S36), iv) providing a plurality of nanostructures by partially etching the compound semiconductor layers (S46), and v) doping the plurality of nanostructures. (S56), vi) providing a dielectric layer between the plurality of nanostructures on the substrate (S66), vii) providing a transparent conductive layer over the dielectric layer (S76), viii) placing a first electrode over the transparent conductive layer Providing (S86), ix) separating the substrate from the plurality of nanostructures to externally expose one end of the plurality of nanostructures (S96), and x) providing a second electrode contacting the dielectric layer while covering one end thereof. Step S106 is included. In addition, the manufacturing method of the solar cell 600 may further include other steps.

As shown in FIG. 26, in step S16, the substrate 70 is provided. That is, various materials such as ceramics such as alumina, stainless steel (SUS), silicon, polymer, or aluminum foil may be used for the substrate 70 illustrated in FIG. 27.

Next, in step S26 of FIG. 26, the plurality of compound semiconductor layers 260 are sequentially stacked on the substrate 70. That is, the plurality of compound semiconductor layers 260 shown in FIG. 28 have a multilayer thin film structure whose composition is changed. The compound semiconductor layers 260 may be a gallium arsenide (GaAs) layer or a silicon germanium (SiGe) layer. When the compound semiconductor layer 260 is a gallium arsenide layer, the amount of N added may be adjusted. More specifically, the compound semiconductor layers 260 may have a composition of GaAs _1-x N _x , and x may be different for each compound semiconductor 260.

As shown in FIG. 26, in step S36, an oxide induction pattern 262 is formed on the plurality of compound semiconductor layers 260. After forming a mask pattern (not shown) on the compound semiconductor layer 260, an oxide induction layer (not shown) is formed thereon. The mask pattern (not shown) has a dot shape. The mask pattern (not shown) may be a photoresist pattern.

An oxide induction layer (not shown) may oxidize the compound semiconductor layer 260 by a galvanic effect. The reduction potential of the oxide induction layer (not shown) may be higher than that of the compound semiconductor layer 260. For example, the oxide induction layer (not shown) may be a noble metal such as Ag, Au, and Pt.

As illustrated in FIG. 29, an oxide induction pattern 262 is formed by removing a mask pattern (not shown). Accordingly, the oxide induction pattern 262 is disposed on the compound semiconductor layer 260.

26, in step S46, the plurality of nanostructures are provided by partially etching the plurality of compound semiconductor layers. That is, the electrolyte is contacted between the oxide induction pattern 262 and the compound semiconductor layer 260. Specifically, the substrate on which the oxide induction pattern 262 is formed may be immersed in the electrolyte. In this case, due to the reduction potential difference between the oxide induction pattern 262 and the compound semiconductor layer 260, the surface where the compound semiconductor layer 260 is in contact with the oxide induction pattern 262 is oxidized to generate an oxide. When the electrolyte further includes an etchant for etching the oxide, the surface of the compound semiconductor layer 260 in contact with the oxide induction pattern 262 may be selectively etched.

As a result, as shown in FIG. 30, the region of the compound semiconductor layer 260 not in contact with the oxide induction pattern 262 remains to form the nanostructure 26. In this case, the etching time may be adjusted so that the substrate 70 is not etched or the etching is minimized. When the compound semiconductor layer 260 is a silicon germanium layer having a composition change, the electrolyte including an etchant may be an HF / H ₂ O ₂ solution. On the other hand, the remaining oxide induction pattern 262 is removed using HF dilute aqueous solution.

When the substrate 70 is made of silicon, the lower region of the compound semiconductor layer 260 is formed of Si _0.5 Ge _0.5 or Si _0.7 Ge _0.3 material, and the upper region of the compound semiconductor layer 260 is formed of silicon, Strain due to lattice mismatch may occur between the substrate 70 and the lower region of the compound semiconductor layer 260. However, when the nanostructure 26 is manufactured by etching the compound semiconductor layer 260, deformation due to lattice mismatch may be relaxed. Therefore, the possibility of defects in the nanostructure 26 can be lowered.

26, in step S56, the core-shell nanostructure 26 is manufactured by doping the plurality of nanostructures 26. That is, as illustrated in FIG. 31, plasma ion doping or monolayer doping (MLD) may be used to manufacture the nanostructure 26. This method is used to form a conformal shallow pn junction within the surface of the nanostructure 26.

In step S66 of FIG. 26, the dielectric layer 60 is formed between the plurality of nanostructures 26 formed on the substrate 70. That is, as shown in FIG. 32, the dielectric layer 60 is formed with the upper ends of the plurality of nanostructures 26 exposed on the dielectric layer 60.

Next, in step S76 of FIG. 26, a transparent conductive layer 42 is provided over the dielectric layer 60. That is, as shown in FIG. 33, the transparent conductive layer 42 is provided on the dielectric layer 60 to cover the upper ends of the plurality of nanostructures 26 with the transparent conductive layer 42. Here, ZnO, ITO or a conductive polymer may be used as the material of the transparent conductive layer 42.

26, in step S86, the first electrode 43 is provided on the transparent conductive layer 42. As shown in FIG. 34, the first electrode 43 may be formed of a Ti / Al thin film. The first electrode 43 may be formed by forming an electrode film on the transparent conductive layer 42 and then patterning the electrode film.

Next, in step S96 of FIG. 26, the substrate 70 is separated from the plurality of nanostructures 26 to expose the plurality of nanostructures 26 to the outside. That is, as shown in FIG. 35, the substrate 70 (shown in FIG. 34) is separated from the plurality of nanostructures 26. Therefore, the substrate 70 can be recycled.

Finally, in step S106 of FIG. 26, a second electrode 45 (shown in FIG. 25) is provided to cover one end of the plurality of nanostructures 26 and contact the dielectric layer 60. That is, the second electrode 45 (shown in FIG. 25) made of an Al thin film is formed under the dielectric layer 60 (shown in FIG. 25).

The solar cell 600 (shown in FIG. 25) can be manufactured through the above-described manufacturing method. Since the substrate 70 (shown in FIG. 34) used in manufacturing the solar cell 600 can be reused, the manufacturing cost of the solar cell 600 can be greatly reduced.

Meanwhile, in addition to the above-described manufacturing method, after forming the opening by patterning the mask layer on the substrate, the nanostructure having a concentration gradient may be selectively grown while controlling the concentration of the deposited material. In this case, a solar cell having the same structure as that of the solar cell 600 of FIG. 25 can be manufactured.

36 schematically shows a cross-sectional structure of a solar cell 700 according to the seventh embodiment of the present invention. Since the structure of the solar cell 700 of FIG. 36 is similar to that of the solar cell 500 of FIG. 14, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted.

As shown in FIG. 36, the solar cell 700 includes a plurality of nanostructures 27, a first electrode 40, a second electrode 42, a dielectric layer 60, a blocking layer 71, and a transparent conductive material. Layer 29. The nanostructure 27 includes a first doped region 271, a second doped region 273, and a high concentration of p-type doped region 275. Some of the above-described devices may be omitted in the solar cell 700. In addition, other elements may be added to the solar cell 700.

As shown in FIG. 36, the transparent conductive layer 29 covers the surfaces of the plurality of nanostructures 27. The transparent conductive layer 29 is in contact with the dielectric layer 60 and the first electrode 40. ITO or the like can be used as a material of the transparent conductive layer 29. Since the transparent conductive layer 29 covers the surfaces of the plurality of nanostructures 27, photo-generated carriers formed in the nanostructure 27 may be efficiently collected. Meanwhile, the blocking layer 71 is positioned on the first conductive layer 40 and covers the high concentration p-type doped region 275. Therefore, the transparent conductive layer 29 is not electrically connected to the second electrode 42 due to the blocking layer 71, so that a short phenomenon does not occur.

37 is a flowchart schematically illustrating a method of manufacturing the solar cell 700 of FIG. 36. Since the manufacturing method of the solar cell 700 of FIG. 37 is similar to the manufacturing method of the solar cell 500 of FIG. 16, the same reference numerals are used for the same parts, and a detailed description thereof will be omitted. Hereinafter, a manufacturing method of the solar cell 700 will be described in detail with reference to FIGS. 37 and 38 to 45.

As shown in FIG. 37, the method of manufacturing the solar cell 700 includes: i) providing a plurality of nanostructures, a doping layer and a blocking layer (S17), ii) doping the surfaces of the plurality of nanostructures and Providing a high concentration doped region at one end of the nanostructure (S27), iii) providing a transparent conductive layer, a dielectric layer and a first electrode covering the plurality of nanostructures exposed over the blocking layer (S37), and iv ) Separating the substrate and forming a second electrode (S47). In addition, the manufacturing method of the solar cell 700 may further include other steps as necessary.

As shown in FIG. 37, in step S17, a plurality of nanostructures 27, a doping layer 71, and a blocking layer 73 are provided. The blocking layer 73 may be formed of undoped spin on glass (SOG). That is, as shown in FIG. 38, the doping layer 71 and the blocking layer 73 are stacked between the plurality of nanostructures 27.

Next, in step S27 of FIG. 37, the surfaces of the plurality of nanostructures 27 are doped and a high concentration doped region 275 is provided at one end of the nanostructure 27. For example, boron may be used to form the heavily doped region 275. As illustrated in FIG. 39, the surfaces of the plurality of nanostructures 27 are doped to form a first doped region 271 and a second doped region 273.

In operation S37 of FIG. 37, a transparent conductive layer 29, a dielectric layer 60, and a first electrode 40 covering the plurality of nanostructures 27 exposed on the blocking layer 73 are provided. Here, PDMS may be used as the material of the dielectric layer 60. That is, as shown in FIG. 40, the first electrode 40 is in electrical contact with the transparent conductive layer 29 protruding over the dielectric layer 60.

Next, in step S47 of FIG. 37, the substrate 70 is separated and a second electrode 40 in contact with the heavily doped region 275 is formed. The heavily doped region 275 is in good electrical contact with the second electrode 40. That is, as shown in FIG. 41, the substrate 70 (shown in FIG. 40) should be well separated from the blocking layer 73 in order to separate the substrate 70. Therefore, the thickness of the blocking layer 73 is preferably small so that the substrate 70 (shown in FIG. 40) is well separated from the blocking layer 73. FIG.

Hereinafter, the present invention will be described in more detail through experimental examples. Experimental examples of the present invention are merely for illustrating the present invention, the present invention is not limited thereto.

Experimental Example

The solar cell was manufactured using the same method as the manufacturing method of the solar cell according to Example 1 described above. First, a metal was deposited by providing a hole mask patterned oxide mask layer on the overdoped silicon substrate. Next, after the oxide mask layer was peeled off, the metal remained only on the silicon substrate exposed to the outside. In addition, through the chemical vapor deposition (CVD) process of supplying a source gas containing Si, the nanostructures were selectively grown vertically in one direction only at the metal catalyst.

Next, the metal was electroplated only on the lower end of the nanostructure grown vertically in one direction on the substrate. The nanostructure was heat-treated to form silicide at the lower end of the nanostructure. Other details of the manufacturing method of the solar cell can be easily understood by those skilled in the art, and the detailed description thereof will be omitted.

42 is a scanning electron micrograph of the nanostructures included in the solar cell prepared according to the experimental example of the present invention. FIG. 42 corresponds to FIG. 8.

As shown in FIG. 42, it was observed that nanostructures having a diameter of about 2 μm were grown on the substrate. Nanostructures grew in one direction on the substrate.

FIG. 43 is a magnified scanning electron micrograph of the nanostructure of FIG. 42.

As shown in FIG. 43, it was observed that silicide was formed at the bottom of the nanostructure. In other words, the nanostructures were fixed by silicide.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. It is natural to fall within the scope of

Claims (40)

1. A plurality of nanostructures spaced apart from each other and extending in one direction,

   A first conductor layer covering one end of one or more nanostructures of the plurality of nanostructures,

   A second conductor layer spaced apart from the first conductor layer and covering the other end of the nanostructure, and

   A dielectric layer located between the first conductor layer and the second conductor layer

   Solar cell comprising a.
2. The method of claim 1,

   A silicide layer is formed at one end of the nanostructure, and a high concentration of p-type doped region is formed in the nanostructure in contact with the silicide layer.
3. The method of claim 2,

   And the high concentration p-type doped region is located within the first conductive layer.
4. The method of claim 1,

   A transparent contact layer in contact with the first conductor layer, and

   A light transmitting substrate positioned in contact with the transparent contact layer

   Solar cell comprising more.
5. The method of claim 4, wherein

   The transparent contact layer is a solar cell including indium tin oxide (ITO).
6. The method of claim 1,

   The solar cell of claim 1, wherein the metal nanoparticles are positioned on a surface of one or more of the nanostructures.
7. The method of claim 1,

   The nanostructure in contact with at least one layer selected from the group consisting of the second conductor layer and the dielectric layer,

    A first doped region, and

    A second doped region surrounding the first doped region in a direction parallel to the plate surface of the second conductor layer

   Solar cell comprising a.
8. The method of claim 7, wherein

   And the second doped region is n-type doped.
9. The method of claim 1,

   The nanostructure in contact with at least one layer selected from the group consisting of the second conductor layer and the dielectric layer,

    A first doped region, and

    A second doped region in contact with the first doped region in a length direction of the nanostructure

   Solar cell comprising a.
10. The method of claim 1,

    The nanostructure in contact with at least one layer selected from the group consisting of the second conductor layer and the dielectric layer,

     The first doped region,

     An intrinsic region in contact with the first doped region in the longitudinal direction of the nanostructure, and

     A second doped region in contact with the intrinsic region in the longitudinal direction of the nanostructure

    Solar cell comprising a.
11. The method of claim 1,

    A solar cell having a silicide layer formed on one end of the nanostructure and the other end of the nanostructure, respectively.
12. The method of claim 1,

    The plurality of nanostructures,

     A first diameter in contact with the first conductive layer, and

     A second diameter in contact with the second conductive layer

    Including,

    And the first diameter is smaller than the second diameter.
13. The method of claim 12,

    The diameter of the plurality of nanostructures is gradually smaller as the closer to the first conductive layer in the longitudinal direction of the nanostructures.
14. The method of claim 12,

    A high concentration doped region is formed at one end of the nanostructure, the high concentration doped region is in contact with the first conductive layer.
15. The method of claim 14,

    And a blocking layer disposed on the first conductive layer between the nanostructures and covering the high concentration p-type doped region.
16. The method of claim 12,

    And another dielectric layer disposed opposite the dielectric layer with the second conductive layer interposed therebetween.
17. The method of claim 16,

    The thickness of the another dielectric layer is 0.5mm to 30mm solar cell.
18. The method of claim 17,

    Wherein said dielectric layer and another dielectric layer each comprise PDMS (polydimethylsiloxane).
19. The method of claim 1,

    The plurality of nanostructures have a concentration gradient along the length direction.
20. The method of claim 19,

    The plurality of nanostructures have a composition of Si _1-x Ge _x (0 < _x ≦ 0.5), wherein x is sequentially smaller as it approaches the second conductive layer along the length direction of the nanostructure.
21. The method of claim 20,

    The plurality of nanostructures have a composition of Si _1-x Ge _x (0 < _x ≦ 0.3).
22. The method of claim 1,

    And a transparent conductive layer covering a surface of the plurality of nanostructures and in contact with the dielectric layer and the second conductive layer.
23. Growing through the openings a plurality of nanostructures extending in a direction substantially perpendicular to the plate surface of the substrate on a substrate on which a mask layer having a plurality of openings formed is formed;

    Filling the openings by plating metal on a lower end of the one or more nanostructures of the plurality of nanostructures,

    Heat-treating the nanostructure to form a silicide layer on the bottom of the nanostructure,

    Forming a plurality of doped regions in the nanostructure,

    Providing a dielectric layer over the mask layer to bond the dielectric layer and the nanostructure,

    Separating the nanostructures associated with the dielectric layer from the mask layer and the substrate,

    Forming a highly doped region in the nanostructure in contact with the silicide layer, and

    Providing a first conductor layer and a second conductor layer on a back surface of the dielectric layer and on an entire surface of the dielectric layer, respectively.

    Method for manufacturing a solar cell comprising a.
24. The method of claim 23, wherein

    In the forming of the silicide layer, the silicide layer is a method of manufacturing a solar cell formed by combining the metal and the material of the substrate.
25. The method of claim 24,

    The groove is formed in the substrate according to the formation of the silicide layer, the silicide layer is a manufacturing method of a solar cell seated in the groove.
26. The method of claim 23, wherein

    The forming of the highly doped region may include forming boron (B) in the nanostructure exposed to the outside.
27. The method of claim 23, wherein

    And providing metal nanoparticles on the surface of the nanostructure after forming a plurality of doped regions in the nanostructure.
28. The method of claim 23, wherein

    Forming a plurality of doped regions in the nanostructures,

     Forming a first doped region in the nanostructure, and

     Forming a second doped region in the nanostructure that surrounds the first doped region in a direction parallel to the plate surface of the substrate

    Method for manufacturing a solar cell comprising a.
29. The method of claim 28,

    And forming the second doped region in the nanostructure, wherein the second doped region is formed in an n-type.
30. The method of claim 23, wherein

    Forming a plurality of doped regions in the nanostructures,

     Forming a first doped region in the nanostructure, and

     Forming a second doped region adjacent to the first doped region in a length direction of the nanostructure

    Method for manufacturing a solar cell comprising a.
31. The method of claim 23, wherein

    Forming a plurality of doped regions in the nanostructures,

     Forming a first doped region in the nanostructure,

     Forming an intrinsic region adjacent to the first doped region in the longitudinal direction of the nanostructure, and

     Forming a second doped region adjacent to the intrinsic region in the longitudinal direction of the nanostructures

    Method for manufacturing a solar cell comprising a.
32. Providing a plurality of nanostructures on the substrate extending in a direction substantially perpendicular to the plate surface of the substrate,

    Providing a doping layer between the plurality of nanostructures,

    Providing a blocking layer over the doped layer,

    Doping surfaces of the plurality of nanostructures and doping one end of the plurality of nanostructures in contact with the substrate by the doping layer to provide a highly doped region,

    Providing a dielectric layer between the plurality of nanostructures on the substrate,

    Providing a first electrode covering the other end of the plurality of nanostructures exposed over the dielectric layer,

    Providing another dielectric layer over said first electrode,

    Holding the another dielectric layer to separate the substrate from the dielectric layer to externally expose the heavily doped region, and

    Providing a second electrode covering the heavily doped region and in contact with the dielectric layer

    Method for manufacturing a solar cell comprising a.
33. 33. The method of claim 32,

    In the providing of the plurality of nanostructures, the plurality of nanostructures are formed by etching the base material forming the substrate.
34. The method of claim 33, wherein

    The etching region formed during the etching of the base material is larger the closer to the plate surface of the substrate manufacturing method of a solar cell.
35. 33. The method of claim 32,

    Providing the dielectric layer,

     The dielectric layer covering the other end of the plurality of nanostructures, and

     Plasma etching the dielectric layer covering the other end to externally expose the other end.

    Method for manufacturing a solar cell comprising a.
36. 33. The method of claim 32,

    After providing the heavily doped region, forming a transparent conductive layer covering a surface of the plurality of nanostructures exposed over the blocking layer, wherein in providing the first electrode, the transparent conductive layer is A method of manufacturing a solar cell in contact with the first electrode.
37. The method of claim 36,

    And providing the second electrode, wherein the second electrode is spaced apart from the conductive layer by the blocking layer.
38. Providing a substrate,

    Sequentially stacking a plurality of compound semiconductor layers on the substrate;

    Providing an oxide induction pattern on the plurality of compound semiconductor layers,

    Providing a plurality of nanostructures by partially etching the plurality of compound semiconductor layers,

    Doping the plurality of nanostructures,

    Providing a dielectric layer between the plurality of nanostructures on the substrate,

    Providing a transparent conductive layer over the dielectric layer,

    Providing a first electrode on the transparent conductive layer,

    Separating the substrate from the plurality of nanostructures to externally expose one end of the plurality of nanostructures, and

    Providing a second electrode covering said one end and in contact with said dielectric layer

    Method for manufacturing a solar cell comprising a.
39. The method of claim 38,

    The method of manufacturing a solar cell of the plurality of compound semiconductor layers has a concentration gradient along the stacking direction.
40. The method of claim 38,

    In the providing of the transparent conductive layer, the transparent conductive layer covers the other end of the plurality of nanostructures exposed over the dielectric layer.

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