WO2010041365A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2010041365A1
WO2010041365A1 PCT/JP2009/003510 JP2009003510W WO2010041365A1 WO 2010041365 A1 WO2010041365 A1 WO 2010041365A1 JP 2009003510 W JP2009003510 W JP 2009003510W WO 2010041365 A1 WO2010041365 A1 WO 2010041365A1
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WO
WIPO (PCT)
Prior art keywords
wiring
metal wiring
insulating film
metal
semiconductor device
Prior art date
Application number
PCT/JP2009/003510
Other languages
French (fr)
Japanese (ja)
Inventor
太田行俊
平野博茂
伊藤豊
石川和弘
小池功二
Original Assignee
パナソニック株式会社
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Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Publication of WO2010041365A1 publication Critical patent/WO2010041365A1/en

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Definitions

  • the present invention relates to a semiconductor device, and more particularly to a semiconductor device provided with a metal pad.
  • FIG. 16 is a plan view showing a configuration of a conventional semiconductor device.
  • FIG. 16 only the second opening 114a, the metal pad 113, the first opening 111a, the contact metal wiring 110, and the via plug 109 are illustrated for the sake of simplicity.
  • FIG. 17 is a cross-sectional view showing a configuration of a conventional semiconductor device, specifically, a cross-sectional view taken along line XVII-XVII shown in FIG.
  • the conventional semiconductor device includes interlayer insulating films 101, 103, 106, 108 sequentially formed on a semiconductor substrate 100, metal wirings 104 ⁇ / b> A, 104 ⁇ / b> B formed on the interlayer insulating film 103, Via plug 109 formed in insulating film 106, contact metal wiring 110 formed in interlayer insulating film 108, first protective insulating film 111 formed on interlayer insulating film 108, and first protective insulating film A metal pad 113 formed on the metal pad 113 via a barrier metal film 112 and a second protective insulating film 114 formed on the metal pad 113 are provided.
  • the first opening 111 a is formed in the first protective insulating film 111
  • the second opening 114 a is formed in the second protective insulating film 114.
  • the metal pad 113 is connected to the contact metal wiring 110 through a contact portion 113C formed through the barrier metal film 112 in the first opening 111a.
  • the contact metal wiring 110 is connected to the metal wiring 104B via the via plug 109.
  • the metal wiring 104 ⁇ / b> B is electrically connected to the metal pad 113 and has the same potential as the metal pad 113.
  • the metal wiring 104 ⁇ / b> A is not electrically connected to the metal pad 113 and is a wiring having a different potential from the metal pad 113.
  • each of the plurality of via plugs 109 is disposed below the contact metal wiring 110 so as to be separated from each other.
  • the contact metal wiring 110 is formed only in a region of the interlayer insulating film 108 formed above the metal wiring 104B, and the metal pad 113 is interposed between the metal pad 113 and the metal wiring 104A having a different potential.
  • the number of existing interlayer insulating films can be increased, and the metal wiring 104 ⁇ / b> A can be separated from the metal pad 113.
  • the probe needle 200 is applied to the metal pad 113 (see FIG. 18A), or when the wire bond 300 is connected to the metal pad 113 (see FIG. 18B), the probe needle or wire bond is used. Then, the metal pad 113 is cut and the barrier metal film 112 is broken, and further reaches the metal wiring 104A to the first protective insulating film 111 and the interlayer insulating films 108 and 106 located below the cut portion of the metal pad 113. Since the occurrence of cracks can be suppressed, the occurrence of a short circuit between the metal pad 113 and the metal pad 113 and the metal wiring 104A having a different potential can be suppressed.
  • the conventional semiconductor device has the following problems.
  • the first protective insulating film 111 is a film having a relatively high moisture resistance
  • the interlayer insulating films 108, 106, 103, and 101 are films having a relatively low moisture resistance. Therefore, the moisture that has entered the crack diffuses into the interlayer insulating film 108 and further sequentially diffuses into the interlayer insulating films 106, 103, 101 under the interlayer insulating film 108.
  • the object of the present invention is to reduce the reliability of the wiring in the vicinity of the metal pad even if a crack occurs in the interlayer insulating film located below the metal pad and moisture may enter the crack. Is to prevent it.
  • a semiconductor device includes an interlayer insulating film formed on a semiconductor substrate, a ring metal wiring provided through the interlayer insulating film, and an interlayer insulating film.
  • Contact metal wiring provided through the film, a first protective insulating film formed on the interlayer insulating film and on the entire upper surface of the ring metal wiring, and formed on the first protective insulating film
  • the metal wiring for the ring is provided in a ring shape in a region located below the metal pad in the interlayer insulating film, and the metal pad is a first protective insulating film formed on the first protective insulating film. It is characterized in that it is connected to the contact metal wiring through the opening.
  • the metal pad is scraped by the probe needle or the wire bond, and the metal pad Even if cracks occur in the interlayer insulating film located below the scraped portion and moisture enters the cracks, moisture that diffuses into the cracks, particularly in the lateral direction, due to the metal wiring for the ring However, since it can be prevented from diffusing to the outer region not surrounded by the ring metal wiring, it is possible to prevent the reliability of the wiring in the vicinity of the metal pad from being lowered.
  • the semiconductor device preferably further includes a base insulating film formed below the interlayer insulating film, and the base insulating film preferably has higher moisture resistance than the interlayer insulating film.
  • the base insulating film can prevent the water that has diffused into the cracks from diffusing downward, in particular, under the base insulating film. Accordingly, moisture can be retained in the inner region where the side surface is surrounded by the ring metal wiring and the bottom surface is surrounded by the base insulating film, so that the reliability of the wiring near the metal pad can be further prevented from being lowered. .
  • the base insulating film is preferably made of a nitride insulating film.
  • the wiring width of the contact metal wiring is equal to or larger than the wiring width of the ring metal wiring.
  • the semiconductor device further includes a second protective insulating film formed on the metal pad, and the second opening formed in the second protective insulating film is formed on the metal pad. In addition, it is preferably disposed above the inner region surrounded by the ring metal wiring.
  • the second opening is disposed above the inner region surrounded by the ring metal wiring, in other words, the ring metal wiring is located outside the second opening (i.e., Arranged below the second protective insulating film), the ring metal wiring exposes the region of the interlayer insulating film where cracks are likely to occur (that is, in the second opening of the metal pad). A region located below the region to be performed).
  • the contact metal wiring and the ring metal wiring are preferably made of copper wiring.
  • the metal pad is preferably made of an aluminum pad.
  • the contact metal wiring is between the first wiring portion and the center position between the first wiring portion and the second wiring portion facing each other in the ring metal wiring, And it is arrange
  • the contact metal wiring is disposed on the first wiring portion side of the ring metal wiring, for example, a wire bond is provided on the second wiring portion side of the ring metal wiring, and the wire bond is provided.
  • the contact metal wiring can be provided on the metal pad so as not to be disposed below the contact metal wiring.
  • the contact metal wiring is provided in an inner region surrounded by the ring metal wiring and is spaced apart from the ring metal wiring. Preferably, it is formed on the metal wiring and the interlayer insulating film.
  • the first opening is formed so that the entire upper surface of the contact metal wiring is exposed therein.
  • the bottom side corner of the first opening can be separated from the contact metal wiring. Therefore, the contact metal wiring does not contact the corner portion (thin film thickness portion) of the barrier metal film, so that the metal of the contact metal wiring passes through the corner portion of the barrier metal film. Precipitation can be prevented.
  • the first opening is preferably formed such that a part of the upper surface of the contact metal wiring is exposed inside.
  • the contact metal wiring is provided in an inner region surrounded by the ring metal wiring and is spaced apart from the ring metal wiring. It is preferable that it is formed only on the metal wiring.
  • the contact metal wiring is provided in an outer region not surrounded by the ring metal wiring and is separated from the ring metal wiring, and the first opening is It is preferably formed only on the contact metal wiring.
  • the ring metal wiring is preferably connected to the power supply wiring.
  • the potential of the ring metal wiring is fixed at a constant potential, it is possible to suppress the occurrence of noise on the metal pad due to the fluctuation of the potential of the ring metal wiring.
  • the metal pad is shielded by the metal wiring for the ring, and the noise of the metal pad causes other metal pads adjacent to the metal pad and the surroundings of the metal pad. Propagation to the wiring arranged in can be suppressed.
  • the ring metal wiring is preferably connected to a metal pad.
  • the potential of the ring metal wiring is fixed to a constant potential (the same potential as the metal pad), it is possible to suppress the occurrence of noise on the metal pad due to the fluctuation of the potential of the ring metal wiring.
  • the semiconductor device of the present invention for example, when a probe needle is applied to a metal pad or when a wire bond is connected to the metal pad, the metal pad is scraped by the probe needle or the wire bond, and the scraped portion of the metal pad is removed. Even if cracks occur in the interlayer insulating film located below, and moisture may enter the cracks, the moisture that has diffused in the lateral direction from the moisture that has entered the cracks due to the metal wiring for the ring, Since it is possible to prevent diffusion to the outer region not surrounded by the metal wiring, the reliability of the wiring in the vicinity of the metal pad can be prevented from being lowered.
  • FIG. 1 is a plan view showing a configuration of a device chip in the semiconductor device according to the first embodiment of the present invention.
  • 2A is a plan view showing a configuration of a region including a metal pad in the semiconductor device according to the first embodiment of the present invention.
  • FIG. 2B is a cross-sectional view, and FIG. It is a figure which shows the correspondence of the plane structure shown to ⁇ ⁇ and a cross-sectional structure.
  • FIG. 3 is a cross-sectional view showing the configuration of a region including a metal pad on the right side in the semiconductor device according to the first embodiment of the present invention, and showing the configuration of a partial region of the element formation region on the left side.
  • FIG. 1 is a plan view showing a configuration of a device chip in the semiconductor device according to the first embodiment of the present invention.
  • 2A is a plan view showing a configuration of a region including a metal pad in the semiconductor device according to the first embodiment of the present invention.
  • FIG. 2B is a cross
  • FIG. 4 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 1 of the first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 1 of the first embodiment of the present invention.
  • FIG. 6 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 2 of the first embodiment of the present invention.
  • FIG. 7 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 3 of the first embodiment of the present invention.
  • FIG. 8 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 4 of the first embodiment of the present invention.
  • FIG. 9A is a plan view showing the configuration of a device chip in a semiconductor device according to Modification 5 of the first embodiment of the present invention
  • FIG. 9B is a plan view of the first embodiment of the present invention.
  • FIG. 16 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to Modification Example 5 of FIG.
  • FIG. 10 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to Modification 6 of the first embodiment of the present invention.
  • FIG. 11 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to the second embodiment of the present invention.
  • FIG. 12 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to the second embodiment of the present invention.
  • FIG. 13 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to a modification of the second embodiment of the present invention.
  • FIG. 14 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to a modification of the second embodiment of the present invention.
  • FIG. 12 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to the second embodiment of the present invention.
  • FIG. 15 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to another embodiment of the present invention.
  • FIG. 16 is a plan view showing a configuration of a conventional semiconductor device.
  • FIG. 17 is a cross-sectional view showing a configuration of a conventional semiconductor device.
  • 18A is a cross-sectional view showing a probe needle applied to a metal pad, and
  • FIG. 18B is a cross-sectional view showing a wire bond connected to the metal pad.
  • FIG. 1 is a plan view showing the configuration of the semiconductor device according to the first embodiment of the present invention. Specifically, FIG. 1 is a plan view showing the configuration of a device chip in the semiconductor device.
  • the device chip D is provided with an element formation region Re in which elements are formed in the central region, and a pad arrangement region Rp in which a plurality of metal pads are arranged in the peripheral region. Yes.
  • FIG. 2A is a plan view showing the configuration of the semiconductor device according to the first embodiment of the present invention, specifically, an enlarged plan view showing the configuration of the region rp including the metal pad shown in FIG. It is.
  • FIG. 2 (a) only the second opening 24a, the metal pad 23, the first opening 21a, the ring metal wiring 20A, the contact metal wiring 20B, and the via plug 19 are shown for simplification.
  • Illustrated. 2 (b) is a cross-sectional view (the same cross-sectional view as the cross-sectional view shown on the right side of FIG.
  • FIG. 3 is a cross-sectional view showing the configuration of the semiconductor device according to the first embodiment of the present invention. Specifically, the configuration of the region rp including the metal pad in the semiconductor device is shown on the right side, while the element formation region It is sectional drawing which shows the structure of the partial area
  • FIG. 3 is a cross-sectional view taken along line IIIrp-IIIrp shown in FIG. b) The same cross-sectional view as shown in FIG. In FIG. 2 (a) and the following plan views, they are shown using solid lines and dotted lines, but there is no particular distinction due to the difference between these lines.
  • the semiconductor device includes an interlayer insulating film 11, a base insulating film 12, an interlayer insulating film 13, an interlayer insulating film 13, and an insulating film formed sequentially on a semiconductor substrate 10 made of silicon.
  • a first protective insulating film 21 metal pad 23 formed through a barrier metal film 22 is formed on, and a second protective insulating film 24 formed on the metal pad 23.
  • a first opening 21 a is formed in the first protective insulating film 21, and a second opening 24 a is formed in the second protective insulating film 24.
  • the metal pad 23 is connected to the contact metal wiring 20B through the first opening 21a formed in the first protective insulating film 21.
  • the contact portion 23C formed in the first opening 21a of the metal pad 23 is connected to the contact metal wiring 20B through the barrier metal film 22 (here, the present specification).
  • the contact portion of the metal pad in each of the embodiments means the entire portion of the metal pad formed in the first opening via the barrier metal film, and the contact portion of the metal pad 23 in the present embodiment. 23C is partially in contact with the contact metal wiring 20B via the barrier metal film 22).
  • the contact metal wiring 20B is connected to the lower metal wiring 14B through the via plug 19.
  • the metal wiring 14 ⁇ / b> B is electrically connected to the metal pad 23 and has the same potential as the metal pad 23.
  • the metal wiring 14 ⁇ / b> A is not electrically connected to the metal pad 23, and is a wiring having a different potential from the metal pad 23.
  • the signal wiring 20re is connected to the lower signal wiring 14re through the via plug 19re.
  • the metal wirings 14A and 14B and the signal wiring 14re are formed in a wiring groove penetrating the interlayer insulating film 13 and the base insulating film 12 via a barrier metal film (not shown).
  • the via plugs 19 and 19re are formed in a via hole penetrating the interlayer insulating film 16 and the base insulating film 15 via a barrier metal film (not shown).
  • the ring and contact metal wirings 20A and 20B and the signal wiring 20re are formed in a wiring groove penetrating the interlayer insulating film 18 and the base insulating film 17 through a barrier metal film (not shown). .
  • each of the plurality of via plugs 19 is arranged separately from each other under the contact metal wiring 20B.
  • the ring metal wiring 20A disposed below the metal pad 23 surrounds the region located below the second opening 24a in the region located outside and below the first and second openings 21a, 24a. Are arranged in a ring shape.
  • the contact metal wiring 20B disposed under the metal pad 23 is disposed in a region located below the first opening 21a, and is surrounded by the ring metal wiring 20A.
  • the interlayer insulating films 11, 13, 16, and 18 are, for example, a silicon oxide film (SiO 2 ), an oxide insulating film such as a TEOS oxide film using TEOS, or a silicon oxide film doped with carbon (SiOC film), Alternatively, it is made of a low dielectric constant insulating film such as a silicon oxide film (FSG film) doped with fluorine.
  • SiO 2 silicon oxide film
  • SiOC film silicon oxide film doped with carbon
  • FSG film silicon oxide film doped with fluorine.
  • the base insulating films 12, 15, 17 have higher moisture resistance than the interlayer insulating films 11, 13, 16, 18, and moisture passes through the base insulating films 12, 15, 17 and the base insulating films 12, 15, 17. It can be prevented from spreading outside.
  • Examples of the material of the base insulating films 12, 15, and 17 include nitride insulating films such as a silicon nitride film (SiN film), a silicon carbonitride film (SiCN film), and a silicon oxynitride film (SiON film).
  • the film thickness of the base insulating films 12, 15, and 17 is, for example, 10 nm to 300 nm.
  • the ring metal wiring 20 ⁇ / b> A is provided in a ring shape in a region located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18.
  • the ring metal wiring 20 ⁇ / b> A is disposed below a region (that is, the first protective insulating film 21) located outside the first opening 21 a, and the entire upper surface thereof is the first protective insulating film 21. Is in contact with.
  • the ring metal wiring 20A is disposed below a region (that is, the second protective insulating film 24) located outside the second opening 24a.
  • the barrier metal film of the ring metal wiring 20A is made of, for example, a tantalum nitride film (TaN film).
  • the contact metal wiring 20B is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A.
  • the inner region 18I refers to a region surrounded by the ring metal wiring 20A in the interlayer insulating film 18, as shown in FIG.
  • the entire upper surface of the contact metal wiring 20B is exposed in the first opening 21a, and a corner between the side surface and the bottom surface of the first opening 21a (hereinafter referred to as “bottom side corner”). It is separated from That is, the contact metal wiring 20B is in contact with the portion of the barrier metal film 22 formed on the bottom surface of the first opening 21a.
  • the barrier metal film of the contact metal wiring 20B is made of, for example, a tantalum nitride film (TaN film).
  • the contact metal wiring 20B is preferably arranged at the following position. That is, as shown in FIG. 2, portions of the ring metal wiring 20 ⁇ / b> A that face each other along the direction V perpendicular to the extending direction P of the contact metal wiring 20 ⁇ / b> B are defined as “first wiring portion 20 ⁇ / b> A ⁇ b> 1” and “second wiring Portion 20A2 ”, and the position of the partition line that divides the region between the first wiring portion 20A1 and the second wiring portion 20A2 in half is“ center position C ”, the contact metal wiring 20B is It is preferable that the first wiring portion 20A1 is disposed between the central position C and the first wiring portion 20A1 and closer to the first wiring portion 20A1 than the central position C. In other words, the contact metal wiring 20B is preferably not disposed between the central position C and the second wiring portion 20A2.
  • the ring metal wiring 20A and the contact metal wiring 20B are made of copper wiring made of copper or a copper alloy (for example, Cu—Al containing copper as a main component and a small amount of aluminum added). Further, the wiring width of the contact metal wiring 20B (see FIG. 3: W20B) is equal to or larger than the wiring width of the ring metal wiring 20A (see FIG. 3: W20A). For example, the wiring width of the ring metal wiring 20A is 0.1 ⁇ m to 10 ⁇ m, and the wiring width of the contact metal wiring 20B is 5 ⁇ m to 30 ⁇ m.
  • the first protective insulating film 21 is made of a single layer film of a silicon nitride film or a laminated film of a silicon nitride film and a TEOS oxide film. As shown in FIGS. 2 and 3, the first opening 21a is formed on the contact metal wiring 20B and the interlayer insulating film 18 so that the entire upper surface of the contact metal wiring 20B is exposed therein. The first opening 21a is formed, and the bottom side corner is provided away from the contact metal wiring 20B. That is, the first opening 21a is provided so that there is no wiring at the bottom side corner.
  • the metal pad 23 is made of, for example, aluminum or an aluminum alloy (for example, Al—Si containing aluminum as a main component with a small amount of silicon added, and Al—Si containing aluminum as a main component with a small amount of copper added). It is made of an aluminum pad made of Al or Si-Cu) containing Cu or aluminum as a main component and a slight amount of silicon and copper added.
  • the region exposed in the second opening 24a of the metal pad 23 is, for example, a region to which a probe needle (see FIG. 18 (a): 200 described above) is applied during probe inspection, and / or a wire. This is a region to which a bond (see FIG. 18B: 300 described above) is connected.
  • the barrier metal film 22 under the metal pad 23 is made of, for example, a laminated film (Ti film / TiN film) of a titanium film and a titanium nitride film.
  • the second protective insulating film 24 is made of, for example, a silicon nitride film.
  • the second opening 24a is formed on the metal pad 23 and is disposed above the inner region 18I surrounded by the ring metal wiring 20A.
  • the probe needle applied to the metal pad 23 exposed in the second opening 24a, or the wire bond connected to the metal pad 23 is the position X (see FIG. 3) of the contact metal wiring 20B and the second position. It is preferable that the opening 24a is disposed at a position closer to the side surface position Y than the side surface position X between the side surface position Y (see FIG. 3) of the opening 24a.
  • the contact metal wiring 20B is preferably disposed between the central position C and the first wiring part 20A1 at a position closer to the first wiring part 20A1 than to the central position C.
  • the contact metal wiring 20B is preferably disposed on the first wiring portion 20A1 side, while the wire bond is preferably disposed on the second wiring portion 20A2 side. In this way, the wire bond can be provided on the metal pad 23 so that the contact metal wiring 20B is not disposed below the wire bond.
  • an interlayer insulating film 11, a base insulating film 12, and an interlayer insulating film 13 are sequentially formed on the semiconductor substrate 10 by a CVD (Chemical Vapor Deposition) method.
  • a barrier metal film is formed on the interlayer insulating film 13 and on the bottom and side walls of the wiring groove by sputtering.
  • a seed film containing copper is formed on the barrier metal film by sputtering, and then a conductive film containing copper is formed on the seed film by electrolytic plating.
  • the metal wirings 14A and 14B are formed in the wiring trench via the barrier metal film (not shown).
  • the signal wiring 14re is formed in the signal wiring trench through a barrier metal film (not shown).
  • a base insulating film 15, an interlayer insulating film 16, a base insulating film 17, and an interlayer insulating film 18 are sequentially formed on the interlayer insulating film 13 by a CVD method. Thereafter, holes penetrating through the interlayer insulating film 18, the base insulating film 17, the interlayer insulating film 16, and the base insulating film 15 were formed by photolithography and etching, and via holes were formed in the base insulating film 15 and the interlayer insulating film 16.
  • contact wiring grooves communicating with the via holes are formed in the base insulating film 17 and the interlayer insulating film 18 by photolithography and etching, and ring wiring grooves are formed in the base insulating film 17 and the interlayer insulating film 18.
  • the interlayer insulating film 16 exposed in the contact wiring groove by photolithography and etching.
  • a via hole penetrating the base insulating film 15 and communicating with the contact wiring trench may be formed.
  • a signal wiring groove and a via hole communicating with the signal wiring groove are formed in the partial region re of the element formation region.
  • a barrier metal film is formed on the interlayer insulating film 18, on the bottom and side walls of the via hole, the bottom and side walls of the contact wiring groove, and the bottom and side walls of the ring wiring groove by, for example, sputtering.
  • a seed film containing copper (Cu) is formed on the barrier metal film by sputtering, and then a conductive film containing copper (Cu) is formed on the seed film by electrolytic plating.
  • portions of the conductive film, the seed film, and the barrier metal film formed outside the contact wiring groove and the ring wiring groove are removed by CMP.
  • the via plug 19 is formed in the via hole via the barrier metal film (not shown), and is connected to the via plug 19 in the contact wiring groove via the barrier metal film (not shown).
  • Contact metal wiring 20B is formed.
  • a ring metal wiring 20A is formed in the ring wiring groove through a barrier metal film (not shown).
  • a via plug 19re is formed in the via hole via a barrier metal film (not shown), and a barrier metal film (not shown) is formed in the signal wiring trench.
  • a signal wiring 20re connected to the via plug 19re is formed. Accordingly, the via plug 19 and the contact metal wiring 20B are integrally formed, while the via plug 19re and the signal wiring 20re are integrally formed.
  • the entire contact metal wiring 20B is formed on the first protective insulating film 21 by photolithography and etching.
  • a first opening 21a exposing the upper surface is formed.
  • a barrier metal film is formed on the first protective insulating film 21 and the bottom and side walls of the first opening 21a by sputtering, and then aluminum (on the barrier metal film by sputtering).
  • a conductive film containing Al) is formed.
  • the conductive film and the barrier metal film are sequentially patterned by, for example, photolithography and etching, and the barrier metal is formed on the first protective insulating film 21 located in the first opening portion 21a and the outer peripheral portion thereof.
  • a metal pad 23 made of an aluminum pad is formed through the film 22.
  • the second protective insulating film 24 is formed on the metal pad 23 by the CVD method, a part of the upper surface of the metal pad 23 is formed on the second protective insulating film 24 by photolithography and etching. A second opening 24a to be exposed is formed.
  • the semiconductor device according to this embodiment can be manufactured.
  • the metal pad 23 is formed by the probe needle or the wire bond. Even if the barrier metal film 22 is cracked and a crack is generated in the interlayer insulating film 18 located below the scraped portion of the metal pad 23, and moisture may enter the crack, the ring metal wiring 20A Further, it is possible to prevent the moisture that has diffused in the lateral direction from the moisture that has entered the cracks from diffusing into the outer region 18O that is not surrounded by the ring metal wiring 20A.
  • the outer region 18O refers to a region of the interlayer insulating film 18 that is not surrounded by the ring metal wiring 20A, as shown in FIG.
  • the base insulating film 17 having a moisture resistance higher than that of the interlayer insulating film 18 allows moisture that diffuses in the downward direction among the water that has entered the crack to diffuse into the interlayer insulating film 16 below the base insulating film 17. Can be prevented.
  • moisture can be retained in the inner region 18I whose side surface is surrounded by the ring metal wiring 20A and whose bottom surface is surrounded by the base insulating film 17, so that the reliability of the wiring in the vicinity of the metal pad 113 is improved as in the prior art.
  • moisture reaches a wiring arranged in an element formation region in the vicinity of the metal pad 113, and a portion of the wiring that is in contact with moisture is corroded or disconnected, or the wiring and another wiring. It is possible to prevent moisture from diffusing between them and causing the wiring to short-circuit with other wiring) (hereinafter referred to as “an effect of preventing a decrease in the reliability of the wiring”).
  • the first opening 21 a on the contact metal wiring 20 ⁇ / b> B and the interlayer insulating film 18, the upper surface of the first protective insulating film 21 in the metal pad 23.
  • the stepped portion Pd formed in the stepped portion between the first opening 21a and the bottom of the first opening 21a can be separated from the contact metal wiring 20B.
  • a wire bond can be provided on the metal pad 23 such that the contact metal wiring 20B is disposed on the left side and the step portion Pd of the metal pad 23 is disposed on the right side.
  • the current flowing between the wire bond and the contact metal wiring 20B does not flow through the stepped portion Pd of the metal pad 23 (in other words, a portion with poor coverage, that is, a portion with a small film thickness). Can be prevented from being lost, and the electromigration resistance of the metal pad 23 can be improved (hereinafter referred to as “the effect of preventing the metal pad 23 from being lost”).
  • the contact metal wiring is formed on the left side of the wire bond 300.
  • the stepped portion Pd of the metal pad 113 is disposed on the left side of the wire bond 300, so that the current flowing between the wirebond 300 and the contact metal wiring 110 flows through the stepped portion Pd of the metal pad 113.
  • the stepped portion Pd of the metal pad 113 may be lost.
  • the contact metal wiring 20B is in contact with the portion of the barrier metal film 22 formed on the bottom surface of the first opening 21a in the barrier metal film 22, and the bottom surface side of the first opening 21a in the barrier metal film 22 There is no contact with the corner portion Pe formed at the corner. Therefore, the metal of the contact metal wiring 20B is prevented from being deposited on the metal pad 23 through the corner portion Pe of the barrier metal film 22 (in other words, the portion with poor coverage, that is, the thin portion). it can.
  • a metal deposition preventing effect on the metal pad 23 it is possible to prevent the metal deposition region of the metal pad 23 from being corroded. Furthermore, for example, it is possible to prevent a connection failure between the metal deposition region and the wire bond in the metal pad 23 (hereinafter referred to as “a metal deposition preventing effect on the metal pad 23”).
  • the first opening 111a is formed so that a part of the upper surface of the contact metal wiring 110 is exposed in the first opening 111a.
  • the metal of the contact metal wiring 110 may be deposited on the metal pad 113 through the corner portion Pe of the barrier metal film 112.
  • the second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A.
  • the ring metal wiring 20A is disposed outside the second opening 24a.
  • the ring metal wiring 20A causes a region (i.e., metal) that is likely to cause cracks in the interlayer insulating film 18.
  • the pad 23 can be surrounded by a region located below the region exposed in the second opening 24a. In other words, even when a crack is generated in the interlayer insulating film 18 when, for example, a probe needle is applied to the metal pad 23 exposed in the second opening 24a or a wire bond is connected, the crack is generated. Can be generated in the inner region 18I surrounded by the ring metal wiring 20A.
  • FIG. 4 is a plan view showing a configuration of a semiconductor device according to Modification 1 of the first embodiment of the present invention, and specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device.
  • FIG. 5 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 1 of the first embodiment of the present invention, and specifically, a cross-sectional view taken along the line VV shown in FIG. 4 and 5, the same reference numerals as those shown in FIGS. 2 and 3 are attached to the same constituent elements as those in the first embodiment. Therefore, in the present modification, differences from the first embodiment will be described.
  • the contact metal wiring 20 ⁇ / b> Ba in this modification is partially exposed in the first opening 21 a (in other words, the first opening 21 a is It is formed in such a manner that a part of the upper surface of the contact metal wiring 20Ba is exposed).
  • the contact metal wiring 20B in the first embodiment has its entire upper surface exposed in the first opening 21a.
  • the arrangement positions of the contact metal wirings are different between the present modification and the first embodiment.
  • the effect of preventing the reliability of the wiring from being lowered can be exhibited.
  • the effect of preventing the metal pad 23 from being lost can be exhibited.
  • FIG. 6 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 2 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. .
  • FIG. 6 the same reference numerals as those shown in FIG. 3 are given to the same constituent elements as those in the first embodiment. Therefore, in the present modification, differences from the first embodiment will be described.
  • the semiconductor device according to the present modification penetrates the interlayer insulating film 13 and the base insulating film 12 located below the ring metal wiring 20A as shown in FIG. And a connection metal wiring 14b connected to a power supply wiring (not shown), and a via plug 19b provided through the interlayer insulating film 16 and the base insulating film 15.
  • the ring metal wiring 20A is connected to the connection metal wiring 14b connected to the power supply wiring via the via plug 19b.
  • the connection metal wiring 14b is connected to the power supply wiring formed in the element formation region (see Re in FIG. 1: D) of the device chip (see FIG. 1: D), and is connected to the pad arrangement region (FIG. 1). : Rp (see Rp)).
  • connection metal wiring 14b is made of a conductive film containing copper, and is formed in the wiring trench through a barrier metal film simultaneously with the formation of the metal wirings 14A and 14B.
  • the via plug 19b is made of a conductive film containing copper. Simultaneously with the formation of the via plug 19, the via plug 19b is formed in the via hole via a barrier metal film and integrally formed with the ring metal wiring 20A.
  • the characteristic point of this modification is that the ring metal wiring 20A is electrically connected to the power supply wiring, and the potential of the ring metal wiring 20A is fixed to the power supply potential.
  • the effect of preventing the reliability of the wiring from being lowered can be exhibited.
  • the effect of preventing the metal pad 23 from being lost can be exhibited.
  • the effect of preventing metal deposition on the metal pad 23 can be exhibited as in the first embodiment.
  • the potential of the ring metal wiring 20A to a constant potential (specifically, the power supply potential), it is possible to prevent noise from being generated on the metal pad 23 due to fluctuations in the potential of the ring metal wiring 20A. it can.
  • the metal pad 23 is shielded by the ring metal wiring 20A, and the noise of the metal pad 23 causes other metal pads adjacent to the metal pad 23, and Propagation to the wiring arranged around the metal pad 23 can be suppressed.
  • FIG. 7 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 3 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. .
  • the same components as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. Therefore, in the present modification, differences from the first embodiment will be described.
  • connection metal wiring 20c that connects the contact metal wirings 20B is further provided.
  • the ring metal wiring 20A is electrically connected to the metal pad 23 by the connection metal wiring 20c.
  • the connection metal wiring 20c is provided in a part of a narrowly spaced region in the region where the ring metal wiring 20A and the contact metal wiring 20B face each other.
  • the connection metal wiring 20c is made of a conductive film containing copper, and is formed in the wiring trench via a barrier metal film simultaneously with the formation of the ring metal wiring 20A and the contact metal wiring 20B.
  • the feature of this modification is that the ring metal wiring 20A is electrically connected to the metal pad 23, and the potential of the ring metal wiring 20A is fixed to the potential of the metal pad 23. .
  • the effect of preventing the reliability of the wiring from being lowered can be exhibited.
  • the effect of preventing the metal pad 23 from being lost can be exhibited.
  • the potential of the ring metal wiring 20A is fixed to a constant potential (specifically, the potential of the metal pad 23), noise is generated in the metal pad 23 due to fluctuations in the potential of the ring metal wiring 20A. This can be suppressed.
  • FIG. 8 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 4 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. .
  • the same components as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. Therefore, in the present modification, differences from the first embodiment will be described.
  • the semiconductor device according to the present modification is provided through the interlayer insulating film 13 and the base insulating film 12, as shown in FIG. 8, and is connected to the metal wiring 14B.
  • a connection metal wiring 14d and a via plug 19d provided through the interlayer insulating film 16 and the base insulating film 15 are further provided.
  • the ring metal wiring 20A is connected to the connection metal wiring 14d connected to the metal wiring 14B through the via plug 19d. That is, the ring metal wiring 20A is connected to the metal wiring 14B electrically connected to the metal pad 23 by the via plug 19d and the connection metal wiring 14d.
  • connection metal wiring 14d is made of a conductive film containing copper, and is formed in the wiring trench through the barrier metal film and formed integrally with the metal wiring 14B simultaneously with the formation of the metal wirings 14A and 14B.
  • the via plug 19d is made of a conductive film containing copper. At the same time as the via plug 19 is formed, the via plug 19d is formed in the via hole via a barrier metal film and integrally formed with the ring metal wiring 20A.
  • the feature of this modification is that the ring metal wiring 20A is electrically connected to the metal pad 23, and the potential of the ring metal wiring 20A is fixed to the potential of the metal pad 23. .
  • the difference between this modification and Modification 3 of the first embodiment is as follows.
  • a connection metal wiring 14d connected to the metal wiring 14B is provided, and the ring metal wiring 20A is connected to the connection metal wiring 14d via the via plug 19d, thereby providing a ring.
  • the metal wiring 20A is electrically connected to the metal pad 23.
  • the ring metal wiring 20A is connected to the metal pad 23 by providing the connection metal wiring 20c connecting the contact metal wiring 20B and the ring metal wiring 20A. Connect electrically.
  • the present modification and the third modification of the first embodiment differ in the configuration in which the ring metal wiring 20A is electrically connected to the metal pad 23.
  • the effect of preventing the reliability of the wiring from being lowered can be exhibited.
  • the effect of preventing the metal pad 23 from being lost can be exhibited.
  • the effect of preventing metal deposition on the metal pad 23 can be exhibited as in the first embodiment.
  • FIG. 9A is a plan view showing a configuration of a semiconductor device according to Modification 5 of the first embodiment of the present invention, specifically, a plan view showing a configuration of a device chip in the semiconductor device. .
  • FIG. 9B is a plan view showing a configuration of a semiconductor device according to Modification 5 of the first embodiment of the present invention, and specifically includes a plurality of metal pads shown in FIG. It is an enlarged plan view which shows the structure of area
  • the pad arrangement region Rp for example, in the extending direction of the pad arrangement region Rp (in other words, in the direction V perpendicular to the extending direction P of the contact metal wiring 20B).
  • the metal pads 23 are arranged in two rows.
  • FIG. 9B the planar configuration of the region including one metal pad 23 among the five metal pads 23 representatively shown in FIG. This is the same as the configuration shown in FIG.
  • this modification is an example showing an example of the layout of the metal pad 23 in the first embodiment.
  • the metal pads 23 are arranged in two rows in the pad arrangement region Rp along the direction V perpendicular to the extending direction P of the contact metal wiring 20B.
  • the present invention is not limited to this.
  • planar configuration of the region including one metal pad 23 is the same as the configuration shown in FIG. 2 in the first embodiment as shown in FIG. 9B.
  • the present invention is not limited to this, and may be the same as the configuration shown in FIG. 4 in Modification 1 of the first embodiment, for example.
  • the ring metal wiring 20A is provided below each of the five metal pads 23 has been described as a specific example. It is not limited to.
  • the ring metal wiring may be provided only below the selected metal pad among the five metal pads.
  • FIG. 10 is a plan view showing a configuration of a semiconductor device according to Modification 6 of the first embodiment of the present invention, specifically, a plan view showing a configuration of a region including a plurality of metal pads in the semiconductor device. It is.
  • the same reference numerals as those shown in FIG. 9B are assigned to the same constituent elements as those in the fifth modification of the first embodiment. Accordingly, in the present modification, differences from Modification 5 of the first embodiment will be described.
  • the ring metal wires 20A adjacent to each other along the direction V perpendicular to the direction P in which the contact metal wires 20B extend are shared by a common wiring portion 20Av.
  • the ring metal wirings 20A adjacent to each other along the direction P in which the contact metal wiring 20B extends are shared by a common wiring portion 20Ap.
  • the proportion of the ring metal wiring 20A in the device chip D can be made smaller than that in the modification 5 of the first embodiment, and thus the device chip D is reduced. be able to.
  • FIG. 11 is a plan view showing a configuration of a semiconductor device according to the second embodiment of the present invention, and more specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device.
  • FIG. 12 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment of the present invention, specifically, a cross-sectional view taken along line XII-XII shown in FIG.
  • FIG. 11 and FIG. 12 the same reference numerals as those shown in FIG. 2 and FIG. 3 are attached to the same constituent elements as those in the first embodiment. Therefore, in the present embodiment, points that differ from the first embodiment will be mainly described, and descriptions of points that are the same as those in the first embodiment will be omitted as appropriate.
  • the ring metal wiring 20A is located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18, as in the first embodiment. It is provided in a ring shape in the area to be. Further, the second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A, as in the first embodiment.
  • the contact metal wiring 20B is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A.
  • the arrangement position of the contact metal wiring 20B is between the central position C and the first wiring part 20A1 and closer to the first wiring part 20A than the central position C, as in the first embodiment. Preferably it is a position.
  • the first opening 21ae in the present embodiment is formed only on the contact metal wiring 20B as shown in FIGS.
  • the first opening 21a in the first embodiment is formed on the contact metal wiring 20B and the interlayer insulating film 18, as shown in FIG.
  • the entire bottom surface of the contact portion 23Ce of the metal pad 23 in this embodiment is in contact with the contact metal wiring 20B through the barrier metal film 22.
  • the contact portion 23C of the metal pad 23 in the first embodiment is partially in contact with the contact metal wiring 20B through the barrier metal film 22.
  • the present embodiment is different from the first embodiment in the configuration in which the contact portion of the metal pad 23 and the contact metal wiring 20B are connected.
  • the metal pad 23 is formed by the probe needle or the wire bond.
  • the barrier metal film 22 is cracked, cracks are generated in the first protective insulating film 21 and the interlayer insulating film 18 located below the scraped portion of the metal pad 23, and moisture may enter the cracks.
  • the ring metal wiring 20 ⁇ / b> A can prevent the moisture that has diffused into the crack, in particular in the lateral direction, from being diffused into the outer region 18 ⁇ / b> O that is not surrounded by the ring metal wiring 20 ⁇ / b> A.
  • the base insulating film 17 having a moisture resistance higher than that of the interlayer insulating film 18 allows moisture that diffuses in the downward direction among the water that has entered the crack to diffuse into the interlayer insulating film 16 below the base insulating film 17. Can be prevented.
  • FIG. 13 is a plan view showing a configuration of a semiconductor device according to a modification of the second embodiment of the present invention, specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device.
  • FIG. 14 is a cross-sectional view showing a configuration of a semiconductor device according to a modified example of the second embodiment of the present invention, specifically, a cross-sectional view taken along line XIV-XIV shown in FIG.
  • FIG. 13 and FIG. 14 the same reference numerals as those shown in FIG. 11 and FIG. 12 are attached to the same constituent elements as those in the second embodiment. Therefore, in this modification, points different from the second embodiment will be mainly described, and descriptions of points that are common to the second embodiment will be omitted as appropriate.
  • the ring metal wiring 20 ⁇ / b> A is located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18, as in the second embodiment.
  • the region is provided with a ring shape.
  • the second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A, as in the second embodiment.
  • the contact metal wiring 20Bf in this modification is formed in the outer region 18O not surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A. Yes.
  • the contact metal wiring 20B in the second embodiment is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is separated from the ring metal wiring 20A. Is provided.
  • the first opening 21af is formed only on the contact metal wiring 20Bf as in the second embodiment. In other words, the entire lower surface of the contact portion 23Cf of the metal pad 23 is in contact with the contact metal wiring 20Bf through the barrier metal film 22.
  • the arrangement position of the contact metal wiring is different between the present modification and the second embodiment.
  • all of the ring metal wiring 20A is provided in the first embodiment.
  • the protective insulating film 24 is disposed below the second protective insulating film 24 (that is, the region located outside the second opening 24a)
  • the present invention is not limited thereto.
  • the object of the present invention can be achieved even if only a part of the ring metal wiring is disposed below the second protective insulating film.
  • the planar shape of the ring metal wiring 20A is a shape along the periphery of the metal pad 23 (that is, a square shape).
  • the present invention is not limited to this, and may be, for example, a circle, an ellipse, or a polygon.
  • the case where the second protective insulating film 24 is formed on the metal pad 23 is taken as a specific example. Although described, the present invention is not limited to this, and the second protective insulating film may not be formed on the metal pad.
  • the metal pad 23 of the base insulating film 15 and the interlayer insulating film 16 is used.
  • a ring metal wiring may be further provided in a region located below the ring. In this case, even if a crack occurs in the interlayer insulating film 16 and moisture may enter the crack, the moisture is retained in the region surrounded by the ring metal wiring in the interlayer insulating film 16, It is possible to prevent moisture from diffusing outside the region.
  • FIG. 15 is a plan view showing a configuration of a semiconductor device according to another embodiment of the present invention. Specifically, FIG. 15 is a plan view showing a configuration of a region including a plurality of metal pads in the semiconductor device.
  • FIG. 15 the same components as those in the modification 5 of the first embodiment are denoted by the same reference numerals as those shown in FIG. 9B. Therefore, in the present embodiment, points that are different from Modification 5 of the first embodiment will be described.
  • one ring metal wiring 20X is provided so as to surround five metal pads 23 as shown in FIG.
  • five ring metal wirings 20A are provided below each of the five metal pads 23 as shown in FIG. 9B. It is provided so as to surround each of the metal pads 23. That is, the range surrounded by the ring metal wiring 20X in the present embodiment is a range including five metal pads 23 as shown in FIG. On the other hand, the range surrounded by the ring metal wiring 20 ⁇ / b> A in the modification 5 of the first embodiment is a range including one metal pad 23.
  • the present embodiment and the fifth modification of the first embodiment are different in the range surrounded by the ring metal wiring.
  • the ring metal wirings 20X adjacent to each other along the direction V perpendicular to the extending direction P of the contact metal wiring 20B are shared by a common wiring portion 20Xv as shown in FIG.
  • the structure shown in FIG. 15 excluding one ring metal wiring 20X is five parts from the structure shown in FIG. 9B in the modification 5 of the first embodiment. This is the same as the configuration excluding the ring metal wiring 20A.
  • the present invention is useful for a semiconductor device provided with a metal pad because it can prevent the reliability of the wiring near the metal pad from being lowered.
  • D device chip Re element formation region Rp pad arrangement region rp region including metal pad rpp region including a plurality of metal pads 10 semiconductor substrate 11, 13, 16, 18 interlayer insulating film 12, 15, 17 base insulating film 14A, 14B metal Wiring 14re Signal wiring 14b, 14d Connection metal wiring 19 Via plug 19re Via plug 19b, 19d Via plug 20A Ring metal wiring 20A1 First wiring section 20A2 Second wiring section 20Av, 20Ap Common wiring section 20B, 20Ba, 20Bf Metal wiring for contact 20re Signal wiring 20c Metal wiring for connection 20X Metal wiring for ring 20Xv Common wiring part 21 First protective insulating film 21a, 21ae, 21af First opening part 22 Barrier metal film 23 Metal pad 23C, 23C , 23Cf Contact portion 24 Second protective insulating film 24a Second opening 18I Inner region 18O Outer region Pd Stepped portion Pe Corner portion C Center position X, Y Side surface position W20A, W20B Wiring width P, V direction Wv, Wp interval

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

A semiconductor device is provided with: an interlayer insulting film (18) formed on a semiconductor substrate (10); metal wiring (20A) for a ring, which is arranged such that the wiring penetrates the interlayer insulating film (18); metal wiring (20B) for contact, which is arranged such that the wiring penetrates the interlayer insulating film (18); a first protecting insulating film (21) formed on the interlayer insulating film (18) and on the entire upper surface of the metal wiring (20A) for the ring; and a metal pad (23) formed on the first protecting insulating film (21).  The wiring (20A) for the ring is arranged in a ring shape in a region at a position below the metal pad (23) on the interlayer insulating film (18).  The metal pad (23) is connected to the metal wiring (20B) for contact through a first opening section (21a) formed on the first protecting insulating film (21).

Description

半導体装置Semiconductor device
　本発明は、半導体装置に関し、特に、金属パッドを備えた半導体装置に関するものである。 The present invention relates to a semiconductor device, and more particularly to a semiconductor device provided with a metal pad.
　近年、半導体装置の高機能化及び高集積化の進行に従い、デバイスチップにおいて、金属パッド数の増加、半導体素子の微細化、及び配線の多層化が進行している。そのため、デバイスチップのサイズを縮小化するために、金属パッドの下方領域に、配線又は半導体素子等を配置し、金属パッドの下方領域を有効活用することが重要になってきている。 In recent years, with the advancement of higher functionality and higher integration of semiconductor devices, the number of metal pads, the miniaturization of semiconductor elements, and the multilayering of wiring have been progressing in device chips. Therefore, in order to reduce the size of the device chip, it is important to arrange wirings or semiconductor elements in the lower region of the metal pad and effectively utilize the lower region of the metal pad.
　しかしながら、例えば、プローブ針等による検査工程、又はワイヤボンド等との接続工程において、金属パッドにプローブ針を当てる、又は金属パッドにワイヤボンドを接続する際に、金属パッドに比較的大きな外部圧力が印加されるため、金属パッドが削られたり、金属パッドの下方領域に、配線に到達するクラックが発生し、電圧印加によるエレクトロマイグレーション等により金属パッドと配線間にショートが発生するという問題があった。 However, a relatively large external pressure is applied to the metal pad when the probe needle is applied to the metal pad or the wire bond is connected to the metal pad, for example, in the inspection process using the probe needle or the connection process with the wire bond or the like. As a result, the metal pad is scraped, cracks reaching the wiring are generated in the lower region of the metal pad, and a short circuit occurs between the metal pad and the wiring due to electromigration caused by voltage application. .
　この問題の対策として、以下に示す半導体装置が提案されている（例えば特許文献１参照）。従来の半導体装置について、図１６及び図１７を参照しながら説明する。図１６は、従来の半導体装置の構成を示す平面図である。図１６において、簡略的に図示するために、第２の開口部１１４ａ、金属パッド１１３、第１の開口部１１１ａ、コンタクト用金属配線１１０、及びビアプラグ１０９のみを図示する。図１７は、従来の半導体装置の構成を示す断面図であり、具体的には、図１６に示すXVII-XVII線における断面図である。 As a countermeasure against this problem, the following semiconductor device has been proposed (for example, see Patent Document 1). A conventional semiconductor device will be described with reference to FIGS. FIG. 16 is a plan view showing a configuration of a conventional semiconductor device. In FIG. 16, only the second opening 114a, the metal pad 113, the first opening 111a, the contact metal wiring 110, and the via plug 109 are illustrated for the sake of simplicity. FIG. 17 is a cross-sectional view showing a configuration of a conventional semiconductor device, specifically, a cross-sectional view taken along line XVII-XVII shown in FIG.
　従来の半導体装置は、図１７に示すように、半導体基板１００上に順次形成された層間絶縁膜１０１，１０３，１０６，１０８と、層間絶縁膜１０３に形成された金属配線１０４Ａ，１０４Ｂと、層間絶縁膜１０６に形成されたビアプラグ１０９と、層間絶縁膜１０８に形成されたコンタクト用金属配線１１０と、層間絶縁膜１０８上に形成された第１の保護絶縁膜１１１と、第１の保護絶縁膜１１１上にバリアメタル膜１１２を介して形成された金属パッド１１３と、金属パッド１１３上に形成された第２の保護絶縁膜１１４とを備えている。第１の開口部１１１ａは第１の保護絶縁膜１１１に形成され、第２の開口部１１４ａは第２の保護絶縁膜１１４に形成されている。 As shown in FIG. 17, the conventional semiconductor device includes interlayer insulating films 101, 103, 106, 108 sequentially formed on a semiconductor substrate 100, metal wirings 104 </ b> A, 104 </ b> B formed on the interlayer insulating film 103, Via plug 109 formed in insulating film 106, contact metal wiring 110 formed in interlayer insulating film 108, first protective insulating film 111 formed on interlayer insulating film 108, and first protective insulating film A metal pad 113 formed on the metal pad 113 via a barrier metal film 112 and a second protective insulating film 114 formed on the metal pad 113 are provided. The first opening 111 a is formed in the first protective insulating film 111, and the second opening 114 a is formed in the second protective insulating film 114.
　図１７に示すように、金属パッド１１３は、第１の開口部１１１ａ内にバリアメタル膜１１２を介して形成されたコンタクト部１１３Ｃを介して、コンタクト用金属配線１１０と接続している。コンタクト用金属配線１１０は、ビアプラグ１０９を介して、金属配線１０４Ｂと接続している。このように、金属配線１０４Ｂは、金属パッド１１３と電気的に接続し、金属パッド１１３と同電位の配線である。一方、金属配線１０４Ａは、図１７から判るように、金属パッド１１３と電気的に接続されておらず、金属パッド１１３と異電位の配線である。 As shown in FIG. 17, the metal pad 113 is connected to the contact metal wiring 110 through a contact portion 113C formed through the barrier metal film 112 in the first opening 111a. The contact metal wiring 110 is connected to the metal wiring 104B via the via plug 109. As described above, the metal wiring 104 </ b> B is electrically connected to the metal pad 113 and has the same potential as the metal pad 113. On the other hand, as can be seen from FIG. 17, the metal wiring 104 </ b> A is not electrically connected to the metal pad 113 and is a wiring having a different potential from the metal pad 113.
　図１６に示すように、複数のビアプラグ１０９の各々は、コンタクト用金属配線１１０下に、互いに離間して配置されている。 As shown in FIG. 16, each of the plurality of via plugs 109 is disposed below the contact metal wiring 110 so as to be separated from each other.
　従来では、層間絶縁膜１０８のうち、金属配線１０４Ｂの上方に形成された領域のみにコンタクト用金属配線１１０を形成し、金属パッド１１３と、金属パッド１１３と異電位の金属配線１０４Ａとの間に存在する層間絶縁膜数を増加させ、金属配線１０４Ａを、金属パッド１１３と離間させることができる。 Conventionally, the contact metal wiring 110 is formed only in a region of the interlayer insulating film 108 formed above the metal wiring 104B, and the metal pad 113 is interposed between the metal pad 113 and the metal wiring 104A having a different potential. The number of existing interlayer insulating films can be increased, and the metal wiring 104 </ b> A can be separated from the metal pad 113.
　そのため、例えば、金属パッド１１３にプローブ針２００を当てる（図１８(a) 参照）、又は金属パッド１１３にワイヤボンド３００を接続する（図１８(b) 参照）際に、プローブ針又はワイヤボンドにより、金属パッド１１３が削れてバリアメタル膜１１２が割れて、さらに、金属パッド１１３の削れ部分の下方に位置する第１の保護絶縁膜１１１及び層間絶縁膜１０８，１０６に、金属配線１０４Ａに到達するクラックが発生することを抑制できるため、金属パッド１１３と、金属パッド１１３と異電位の金属配線１０４Ａ間にショートが発生することを抑制できる。 Therefore, for example, when the probe needle 200 is applied to the metal pad 113 (see FIG. 18A), or when the wire bond 300 is connected to the metal pad 113 (see FIG. 18B), the probe needle or wire bond is used. Then, the metal pad 113 is cut and the barrier metal film 112 is broken, and further reaches the metal wiring 104A to the first protective insulating film 111 and the interlayer insulating films 108 and 106 located below the cut portion of the metal pad 113. Since the occurrence of cracks can be suppressed, the occurrence of a short circuit between the metal pad 113 and the metal pad 113 and the metal wiring 104A having a different potential can be suppressed.
特許第３７２７８１８号Japanese Patent No. 3727818
　しかしながら、従来の半導体装置では、以下に示す問題がある。 However, the conventional semiconductor device has the following problems.
　従来では、既述の通り、金属配線１０４Ａに到達するクラックの発生を抑制することは可能なものの、クラックの発生自体を防止することはできず、例えば、金属パッド１１３の削れ部分の下方に位置する第１の保護絶縁膜１１１及び層間絶縁膜１０８に、クラックが発生する。 Conventionally, as described above, although it is possible to suppress the occurrence of a crack reaching the metal wiring 104A, it is not possible to prevent the occurrence of the crack itself. For example, it is located below the scraped portion of the metal pad 113. Cracks are generated in the first protective insulating film 111 and the interlayer insulating film 108.
　ここで、第１の保護絶縁膜１１１は、比較的耐湿性の高い膜であるものの、層間絶縁膜１０８，１０６，１０３，１０１は、比較的耐湿性の低い膜である。そのため、クラック内に進入した水分は、層間絶縁膜１０８中に拡散し、さらに、層間絶縁膜１０８下の層間絶縁膜１０６，１０３，１０１中に順次拡散する。 Here, although the first protective insulating film 111 is a film having a relatively high moisture resistance, the interlayer insulating films 108, 106, 103, and 101 are films having a relatively low moisture resistance. Therefore, the moisture that has entered the crack diffuses into the interlayer insulating film 108 and further sequentially diffuses into the interlayer insulating films 106, 103, 101 under the interlayer insulating film 108.
　そのため、例えば、金属パッド１１３の近傍の素子形成領域（後述の図１：Ｒｅ参照）に配置された配線に水分が到達し、配線のうち水分との接触部分が腐食されて断線する、又は例えば、金属パッド１１３の近傍の素子形成領域に配置された配線と他の配線間に水分が拡散し、配線が他の配線とショートする。このように、従来では、金属パッド１１３の近傍の配線の信頼性が低下するという問題がある。 Therefore, for example, moisture reaches a wiring arranged in an element formation region (see FIG. 1: Re described later) in the vicinity of the metal pad 113, and a contact portion with moisture in the wiring is corroded and disconnected. Then, moisture diffuses between the wiring arranged in the element formation region near the metal pad 113 and the other wiring, and the wiring is short-circuited with the other wiring. Thus, conventionally, there is a problem that the reliability of the wiring near the metal pad 113 is lowered.
　前記に鑑み、本発明の目的は、金属パッドの下方に位置する層間絶縁膜にクラックが発生し、クラック内に水分が進入することがあっても、金属パッドの近傍の配線の信頼性が低下することを防止することである。 In view of the above, the object of the present invention is to reduce the reliability of the wiring in the vicinity of the metal pad even if a crack occurs in the interlayer insulating film located below the metal pad and moisture may enter the crack. Is to prevent it.
　前記の目的を達成するために、本発明の一側面に係る半導体装置は、半導体基板上に形成された層間絶縁膜と、層間絶縁膜を貫通して設けられたリング用金属配線と、層間絶縁膜を貫通して設けられたコンタクト用金属配線と、層間絶縁膜上及びリング用金属配線の全上面上に形成された第１の保護絶縁膜と、第１の保護絶縁膜上に形成された金属パッドとを備え、リング用金属配線は、層間絶縁膜のうち金属パッドの下方に位置する領域にリング状に設けられており、金属パッドは、第１の保護絶縁膜に形成された第１の開口部を通じてコンタクト用金属配線に接続されていることを特徴とする。 In order to achieve the above object, a semiconductor device according to an aspect of the present invention includes an interlayer insulating film formed on a semiconductor substrate, a ring metal wiring provided through the interlayer insulating film, and an interlayer insulating film. Contact metal wiring provided through the film, a first protective insulating film formed on the interlayer insulating film and on the entire upper surface of the ring metal wiring, and formed on the first protective insulating film The metal wiring for the ring is provided in a ring shape in a region located below the metal pad in the interlayer insulating film, and the metal pad is a first protective insulating film formed on the first protective insulating film. It is characterized in that it is connected to the contact metal wiring through the opening.
　本発明の一側面に係る半導体装置によると、例えば、金属パッドにプローブ針を当てる、又は金属パッドにワイヤボンドを接続する際に、プローブ針又はワイヤボンドにより、金属パッドが削れて、金属パッドの削れ部分の下方に位置する層間絶縁膜にクラックが発生し、クラック内に水分が進入することがあっても、リング用金属配線により、クラック内に進入した水分のうち特に横方向に拡散する水分が、リング用金属配線に囲まれていない外側領域に拡散することを防止できるため、金属パッドの近傍の配線の信頼性が低下することを防止できる。 According to the semiconductor device of one aspect of the present invention, for example, when the probe needle is applied to the metal pad or the wire bond is connected to the metal pad, the metal pad is scraped by the probe needle or the wire bond, and the metal pad Even if cracks occur in the interlayer insulating film located below the scraped portion and moisture enters the cracks, moisture that diffuses into the cracks, particularly in the lateral direction, due to the metal wiring for the ring However, since it can be prevented from diffusing to the outer region not surrounded by the ring metal wiring, it is possible to prevent the reliability of the wiring in the vicinity of the metal pad from being lowered.
　本発明の一側面に係る半導体装置において、層間絶縁膜下に形成された下地絶縁膜をさらに備え、下地絶縁膜は、層間絶縁膜に比べて耐湿性が高いことが好ましい。 The semiconductor device according to one aspect of the present invention preferably further includes a base insulating film formed below the interlayer insulating film, and the base insulating film preferably has higher moisture resistance than the interlayer insulating film.
　このようにすると、下地絶縁膜により、クラック内に進入した水分のうち特に下方向に拡散する水分が、下地絶縁膜下に拡散することを防止できる。従って、側面がリング用金属配線に囲まれ、底面が下地絶縁膜に囲まれた内側領域に水分を留めることができるため、金属パッドの近傍の配線の信頼性が低下することをより一層防止できる。 In this way, the base insulating film can prevent the water that has diffused into the cracks from diffusing downward, in particular, under the base insulating film. Accordingly, moisture can be retained in the inner region where the side surface is surrounded by the ring metal wiring and the bottom surface is surrounded by the base insulating film, so that the reliability of the wiring near the metal pad can be further prevented from being lowered. .
　本発明の一側面に係る半導体装置において、下地絶縁膜は、窒化物絶縁膜からなることが好ましい。 In the semiconductor device according to one aspect of the present invention, the base insulating film is preferably made of a nitride insulating film.
　本発明の一側面に係る半導体装置において、コンタクト用金属配線の配線幅は、リング用金属配線の配線幅と同等、又はそれ以上の大きさを有することが好ましい。 In the semiconductor device according to one aspect of the present invention, it is preferable that the wiring width of the contact metal wiring is equal to or larger than the wiring width of the ring metal wiring.
　本発明の一側面に係る半導体装置において、金属パッド上に形成された第２の保護絶縁膜をさらに備え、第２の保護絶縁膜に形成された第２の開口部は、金属パッド上に形成され、且つ、リング用金属配線に囲まれた内側領域の上方に配置されていることが好ましい。 The semiconductor device according to one aspect of the present invention further includes a second protective insulating film formed on the metal pad, and the second opening formed in the second protective insulating film is formed on the metal pad. In addition, it is preferably disposed above the inner region surrounded by the ring metal wiring.
　このように、第２の開口部を、リング用金属配線に囲まれた内側領域の上方に配置する、言い換えれば、リング用金属配線を、第２の開口部の外側に位置する領域（即ち、第２の保護絶縁膜）の下方に配置することにより、リング用金属配線により、層間絶縁膜のうち、クラックが発生する可能性の高い領域（即ち、金属パッドのうち第２の開口部内に露出する領域の下方に位置する領域）を囲うことができる。 In this way, the second opening is disposed above the inner region surrounded by the ring metal wiring, in other words, the ring metal wiring is located outside the second opening (i.e., Arranged below the second protective insulating film), the ring metal wiring exposes the region of the interlayer insulating film where cracks are likely to occur (that is, in the second opening of the metal pad). A region located below the region to be performed).
　本発明の一側面に係る半導体装置において、コンタクト用金属配線及びリング用金属配線は、銅配線からなることが好ましい。 In the semiconductor device according to one aspect of the present invention, the contact metal wiring and the ring metal wiring are preferably made of copper wiring.
　本発明の一側面に係る半導体装置において、金属パッドは、アルミパッドからなることが好ましい。 In the semiconductor device according to one aspect of the present invention, the metal pad is preferably made of an aluminum pad.
　本発明の一側面に係る半導体装置において、コンタクト用金属配線は、リング用金属配線のうち対向する第１配線部と第２配線部との間の中央位置と第１配線部との間で、且つ、中央位置よりも第１配線部に近い位置に配置されており、中央位置と第２配線部との間には配置されていないことが好ましい。 In the semiconductor device according to one aspect of the present invention, the contact metal wiring is between the first wiring portion and the center position between the first wiring portion and the second wiring portion facing each other in the ring metal wiring, And it is arrange | positioned in the position near a 1st wiring part rather than a center position, and it is preferable not to arrange | position between a center position and a 2nd wiring part.
　このようにすると、コンタクト用金属配線が、リング用金属配線の第１配線部側に配置されるため、例えば、ワイヤボンドを、リング用金属配線の第２配線部側に設けて、ワイヤボンドを、その下方にコンタクト用金属配線が配置されることがないように、金属パッド上に設けることができる。 In this case, since the contact metal wiring is disposed on the first wiring portion side of the ring metal wiring, for example, a wire bond is provided on the second wiring portion side of the ring metal wiring, and the wire bond is provided. The contact metal wiring can be provided on the metal pad so as not to be disposed below the contact metal wiring.
　本発明の一側面に係る半導体装置において、コンタクト用金属配線は、リング用金属配線に囲まれた内側領域に、リング用金属配線から離間して設けられており、第１の開口部は、コンタクト用金属配線及び層間絶縁膜の上に形成されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the contact metal wiring is provided in an inner region surrounded by the ring metal wiring and is spaced apart from the ring metal wiring. Preferably, it is formed on the metal wiring and the interlayer insulating film.
　本発明の一側面に係る半導体装置において、第１の開口部は、その内部にコンタクト用金属配線の全上面が露出するように形成されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, it is preferable that the first opening is formed so that the entire upper surface of the contact metal wiring is exposed therein.
　このようにすると、第１の開口部の底面側角部を、コンタクト用金属配線と離間させることができる。そのため、コンタクト用金属配線が、バリアメタル膜の角部部分（膜厚の薄い部分）と接することはないため、バリアメタル膜の角部部分を通って、コンタクト用金属配線の金属が、金属パッドに析出することを防止できる。 In this way, the bottom side corner of the first opening can be separated from the contact metal wiring. Therefore, the contact metal wiring does not contact the corner portion (thin film thickness portion) of the barrier metal film, so that the metal of the contact metal wiring passes through the corner portion of the barrier metal film. Precipitation can be prevented.
　本発明の一側面に係る半導体装置において、第１の開口部は、その内部にコンタクト用金属配線の一部上面が露出するように形成されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the first opening is preferably formed such that a part of the upper surface of the contact metal wiring is exposed inside.
　本発明の一側面に係る半導体装置において、コンタクト用金属配線は、リング用金属配線に囲まれた内側領域に、リング用金属配線から離間して設けられており、第１の開口部は、コンタクト用金属配線上のみに形成されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the contact metal wiring is provided in an inner region surrounded by the ring metal wiring and is spaced apart from the ring metal wiring. It is preferable that it is formed only on the metal wiring.
　本発明の一側面に係る半導体装置において、コンタクト用金属配線は、リング用金属配線に囲まれていない外側領域に、リング用金属配線から離間して設けられており、第１の開口部は、コンタクト用金属配線上のみに形成されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the contact metal wiring is provided in an outer region not surrounded by the ring metal wiring and is separated from the ring metal wiring, and the first opening is It is preferably formed only on the contact metal wiring.
　本発明の一側面に係る半導体装置において、リング用金属配線は、電源配線に接続されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the ring metal wiring is preferably connected to the power supply wiring.
　このようにすると、リング用金属配線の電位が一定電位に固定されるため、リング用金属配線の電位の変動によって、金属パッドに対しノイズが発生することを抑制できる。 In this case, since the potential of the ring metal wiring is fixed at a constant potential, it is possible to suppress the occurrence of noise on the metal pad due to the fluctuation of the potential of the ring metal wiring.
　加えて、リング用金属配線の固定電位が電源電位であるため、リング用金属配線により、金属パッドをシールドし、金属パッドのノイズが、金属パッドと隣り合う他の金属パッド、及び金属パッドの周囲に配置される配線に伝播することを抑制できる。 In addition, since the fixed potential of the metal wiring for the ring is the power supply potential, the metal pad is shielded by the metal wiring for the ring, and the noise of the metal pad causes other metal pads adjacent to the metal pad and the surroundings of the metal pad. Propagation to the wiring arranged in can be suppressed.
　本発明の一側面に係る半導体装置において、リング用金属配線は、金属パッドに接続されていることが好ましい。 In the semiconductor device according to one aspect of the present invention, the ring metal wiring is preferably connected to a metal pad.
　このようにすると、リング用金属配線の電位が一定電位（金属パッドと同電位）に固定されるため、リング用金属配線の電位の変動によって、金属パッドに対しノイズが発生することを抑制できる。 In this case, since the potential of the ring metal wiring is fixed to a constant potential (the same potential as the metal pad), it is possible to suppress the occurrence of noise on the metal pad due to the fluctuation of the potential of the ring metal wiring.
　本発明に係る半導体装置によると、例えば、金属パッドにプローブ針を当てる、又は金属パッドにワイヤボンドを接続する際に、プローブ針又はワイヤボンドにより、金属パッドが削れて、金属パッドの削れ部分の下方に位置する層間絶縁膜にクラックが発生し、クラック内に水分が進入することがあっても、リング用金属配線により、クラック内に進入した水分のうち特に横方向に拡散する水分が、リング用金属配線に囲まれていない外側領域に拡散することを防止できるため、金属パッドの近傍の配線の信頼性が低下することを防止できる。 According to the semiconductor device of the present invention, for example, when a probe needle is applied to a metal pad or when a wire bond is connected to the metal pad, the metal pad is scraped by the probe needle or the wire bond, and the scraped portion of the metal pad is removed. Even if cracks occur in the interlayer insulating film located below, and moisture may enter the cracks, the moisture that has diffused in the lateral direction from the moisture that has entered the cracks due to the metal wiring for the ring, Since it is possible to prevent diffusion to the outer region not surrounded by the metal wiring, the reliability of the wiring in the vicinity of the metal pad can be prevented from being lowered.
図１は、本発明の第１の実施形態に係る半導体装置におけるデバイスチップの構成を示す平面図である。FIG. 1 is a plan view showing a configuration of a device chip in the semiconductor device according to the first embodiment of the present invention. 図２(a) は、本発明の第１の実施形態に係る半導体装置における金属パッドを含む領域の構成を示す平面図であり、図２(b) は、断面図であり、図２(a) に示す平面構成と断面構成との対応関係を示す図である。2A is a plan view showing a configuration of a region including a metal pad in the semiconductor device according to the first embodiment of the present invention. FIG. 2B is a cross-sectional view, and FIG. It is a figure which shows the correspondence of the plane structure shown to 示 す and a cross-sectional structure. 図３は、本発明の第１の実施形態に係る半導体装置における金属パッドを含む領域の構成を右側に示す一方、素子形成領域の部分領域の構成を左側に示す断面図である。FIG. 3 is a cross-sectional view showing the configuration of a region including a metal pad on the right side in the semiconductor device according to the first embodiment of the present invention, and showing the configuration of a partial region of the element formation region on the left side. 図４は、本発明の第１の実施形態の変形例１に係る半導体装置における金属パッドを含む領域の構成を示す平面図である。FIG. 4 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 1 of the first embodiment of the present invention. 図５は、本発明の第１の実施形態の変形例１に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 5 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 1 of the first embodiment of the present invention. 図６は、本発明の第１の実施形態の変形例２に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 6 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 2 of the first embodiment of the present invention. 図７は、本発明の第１の実施形態の変形例３に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 7 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 3 of the first embodiment of the present invention. 図８は、本発明の第１の実施形態の変形例４に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 8 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to Modification 4 of the first embodiment of the present invention. 図９(a) は、本発明の第１の実施形態の変形例５に係る半導体装置におけるデバイスチップの構成を示す平面図であり、図９(b) は、本発明の第１の実施形態の変形例５に係る半導体装置における複数の金属パッドを含む領域の構成を示す平面図である。FIG. 9A is a plan view showing the configuration of a device chip in a semiconductor device according to Modification 5 of the first embodiment of the present invention, and FIG. 9B is a plan view of the first embodiment of the present invention. FIG. 16 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to Modification Example 5 of FIG. 図１０は、本発明の第１の実施形態の変形例６に係る半導体装置における複数の金属パッドを含む領域の構成を示す平面図である。FIG. 10 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to Modification 6 of the first embodiment of the present invention. 図１１は、本発明の第２の実施形態に係る半導体装置における金属パッドを含む領域の構成を示す平面図である。FIG. 11 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to the second embodiment of the present invention. 図１２は、本発明の第２の実施形態に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 12 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to the second embodiment of the present invention. 図１３は、本発明の第２の実施形態の変形例に係る半導体装置における金属パッドを含む領域の構成を示す平面図である。FIG. 13 is a plan view showing a configuration of a region including a metal pad in a semiconductor device according to a modification of the second embodiment of the present invention. 図１４は、本発明の第２の実施形態の変形例に係る半導体装置における金属パッドを含む領域の構成を示す断面図である。FIG. 14 is a cross-sectional view showing a configuration of a region including a metal pad in a semiconductor device according to a modification of the second embodiment of the present invention. 図１５は、本発明のその他の実施形態に係る半導体装置における複数の金属パッドを含む領域の構成を示す平面図である。FIG. 15 is a plan view showing a configuration of a region including a plurality of metal pads in a semiconductor device according to another embodiment of the present invention. 図１６は、従来の半導体装置の構成を示す平面図である。FIG. 16 is a plan view showing a configuration of a conventional semiconductor device. 図１７は、従来の半導体装置の構成を示す断面図である。FIG. 17 is a cross-sectional view showing a configuration of a conventional semiconductor device. 図１８(a) は、金属パッドに当てるプローブ針を示す断面図であり、図１８(b) は、金属パッドに接続するワイヤボンドを示す断面図である。18A is a cross-sectional view showing a probe needle applied to a metal pad, and FIG. 18B is a cross-sectional view showing a wire bond connected to the metal pad.
　以下に、本発明の各実施形態について図面を参照しながら説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
　（第１の実施形態）
　以下に、本発明の第１の実施形態に係る半導体装置について、図１、図２、及び図３を参照しながら説明する。図１は、本発明の第１の実施形態に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置におけるデバイスチップの構成を示す平面図である。 (First embodiment)
Hereinafter, a semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1, 2, and 3. FIG. 1 is a plan view showing the configuration of the semiconductor device according to the first embodiment of the present invention. Specifically, FIG. 1 is a plan view showing the configuration of a device chip in the semiconductor device.
　図１に示すように、デバイスチップＤには、その中央領域に素子が形成される素子形成領域Ｒｅが設けられ、その周辺領域に複数の金属パッドが配置されるパッド配置領域Ｒｐが設けられている。 As shown in FIG. 1, the device chip D is provided with an element formation region Re in which elements are formed in the central region, and a pad arrangement region Rp in which a plurality of metal pads are arranged in the peripheral region. Yes.
　以下に、パッド配置領域Ｒｐのうち１コの金属パッド２３を含む領域ｒｐ（図１参照）の構成について、図２及び図３を参照しながら説明する。図２(a) は、本発明の第１の実施形態に係る半導体装置の構成を示す平面図であり、具体的には、図１に示す金属パッドを含む領域ｒｐの構成を示す拡大平面図である。図２(a) において、簡略的に図示するために、第２の開口部２４ａ、金属パッド２３、第１の開口部２１ａ、リング用金属配線２０Ａ、コンタクト用金属配線２０Ｂ、及びビアプラグ１９のみを図示する。また、図２(b) において、断面図（図３の右側に示す断面図と同一の断面図）を示し、図２(a) に示す平面構成と断面構成との対応関係を示す図である。なお、詳細な断面構成については図３に示す。図３は、本発明の第１の実施形態に係る半導体装置の構成を示す断面図であり、具体的には、半導体装置における金属パッドを含む領域ｒｐの構成を右側に示す一方、素子形成領域Ｒｅの部分領域ｒｅの構成を左側に示す断面図である。即ち、図３に示す断面図は、図１に示すIII-III線における拡大断面図であり、図３の右側に示す断面図は、図２に示すIIIrp-IIIrp線における断面図（図２(b) に示す断面図と同一の断面図）である。なお、図２(a) 及び以降の平面図において、実線及び点線を用いて図示しているが、これらの線の違いによる区別は特にない。 Hereinafter, the configuration of the region rp (see FIG. 1) including one metal pad 23 in the pad arrangement region Rp will be described with reference to FIGS. FIG. 2A is a plan view showing the configuration of the semiconductor device according to the first embodiment of the present invention, specifically, an enlarged plan view showing the configuration of the region rp including the metal pad shown in FIG. It is. In FIG. 2 (a), only the second opening 24a, the metal pad 23, the first opening 21a, the ring metal wiring 20A, the contact metal wiring 20B, and the via plug 19 are shown for simplification. Illustrated. 2 (b) is a cross-sectional view (the same cross-sectional view as the cross-sectional view shown on the right side of FIG. 3) and shows the correspondence between the planar configuration and the cross-sectional configuration shown in FIG. 2 (a). . A detailed cross-sectional configuration is shown in FIG. FIG. 3 is a cross-sectional view showing the configuration of the semiconductor device according to the first embodiment of the present invention. Specifically, the configuration of the region rp including the metal pad in the semiconductor device is shown on the right side, while the element formation region It is sectional drawing which shows the structure of the partial area | region re of Re on the left side. That is, the cross-sectional view shown in FIG. 3 is an enlarged cross-sectional view taken along line III-III shown in FIG. 1, and the cross-sectional view shown on the right side of FIG. 3 is a cross-sectional view taken along line IIIrp-IIIrp shown in FIG. b) The same cross-sectional view as shown in FIG. In FIG. 2 (a) and the following plan views, they are shown using solid lines and dotted lines, but there is no particular distinction due to the difference between these lines.
　図３に示すように、本実施形態に係る半導体装置は、シリコンからなる半導体基板１０上に順次形成された層間絶縁膜１１、下地絶縁膜１２、及び層間絶縁膜１３と、層間絶縁膜１３及び下地絶縁膜１２を貫通して設けられた金属配線１４Ａ，１４Ｂ、及び信号配線１４ｒｅと、層間絶縁膜１３上に順次形成された下地絶縁膜１５、層間絶縁膜１６、下地絶縁膜１７、及び層間絶縁膜１８と、層間絶縁膜１６及び下地絶縁膜１５を貫通して設けられたビアプラグ１９、及びビアプラグ１９ｒｅと、層間絶縁膜１８及び下地絶縁膜１７を貫通して設けられたリング用金属配線２０Ａ、コンタクト用金属配線２０Ｂ、及び信号配線２０ｒｅと、層間絶縁膜１８、リング用金属配線２０Ａ、及び信号配線２０ｒｅの上に形成された第１の保護絶縁膜２１と、第１の保護絶縁膜２１上にバリアメタル膜２２を介して形成された金属パッド２３と、金属パッド２３上に形成された第２の保護絶縁膜２４とを備えている。第１の保護絶縁膜２１には第１の開口部２１ａが形成され、第２の保護絶縁膜２４には第２の開口部２４ａが形成されている。 As shown in FIG. 3, the semiconductor device according to the present embodiment includes an interlayer insulating film 11, a base insulating film 12, an interlayer insulating film 13, an interlayer insulating film 13, and an insulating film formed sequentially on a semiconductor substrate 10 made of silicon. The metal wirings 14A and 14B and the signal wiring 14re provided through the base insulating film 12, the base insulating film 15, the interlayer insulating film 16, the base insulating film 17, and the interlayer formed sequentially on the interlayer insulating film 13. The insulating film 18, the via plug 19 provided through the interlayer insulating film 16 and the base insulating film 15, and the via plug 19 re, and the ring metal wiring 20 A provided through the interlayer insulating film 18 and the base insulating film 17 , Contact metal wiring 20B and signal wiring 20re, and first protective insulation formed on interlayer insulating film 18, ring metal wiring 20A and signal wiring 20re. And 21, a first protective insulating film 21 metal pad 23 formed through a barrier metal film 22 is formed on, and a second protective insulating film 24 formed on the metal pad 23. A first opening 21 a is formed in the first protective insulating film 21, and a second opening 24 a is formed in the second protective insulating film 24.
　金属パッドを含む領域ｒｐにおいて、金属パッド２３は、第１の保護絶縁膜２１に形成された第１の開口部２１ａを通じてコンタクト用金属配線２０Ｂに接続されている。具体的には、金属パッド２３のうち第１の開口部２１ａ内に形成されたコンタクト部２３Ｃがバリアメタル膜２２を介して、コンタクト用金属配線２０Ｂと接続している（ここで、本明細書の各実施形態における金属パッドのコンタクト部とは、金属パッドのうち、第１の開口部内にバリアメタル膜を介して形成された部分の全体を意味し、本実施形態における金属パッド２３のコンタクト部２３Ｃは、その一部下面がバリアメタル膜２２を介してコンタクト用金属配線２０Ｂと接している）。コンタクト用金属配線２０Ｂは、ビアプラグ１９を介して、下層の金属配線１４Ｂと接続している。このように、金属配線１４Ｂは、金属パッド２３と電気的に接続し、金属パッド２３と同電位の配線である。一方、金属配線１４Ａは、図３から判るように、金属パッド２３と電気的に接続されておらず、金属パッド２３と異電位の配線である。一方、素子形成領域の部分領域ｒｅにおいて、信号配線２０ｒｅは、ビアプラグ１９ｒｅを介して、下層の信号配線１４ｒｅと接続している。 In the region rp including the metal pad, the metal pad 23 is connected to the contact metal wiring 20B through the first opening 21a formed in the first protective insulating film 21. Specifically, the contact portion 23C formed in the first opening 21a of the metal pad 23 is connected to the contact metal wiring 20B through the barrier metal film 22 (here, the present specification). The contact portion of the metal pad in each of the embodiments means the entire portion of the metal pad formed in the first opening via the barrier metal film, and the contact portion of the metal pad 23 in the present embodiment. 23C is partially in contact with the contact metal wiring 20B via the barrier metal film 22). The contact metal wiring 20B is connected to the lower metal wiring 14B through the via plug 19. As described above, the metal wiring 14 </ b> B is electrically connected to the metal pad 23 and has the same potential as the metal pad 23. On the other hand, as can be seen from FIG. 3, the metal wiring 14 </ b> A is not electrically connected to the metal pad 23, and is a wiring having a different potential from the metal pad 23. On the other hand, in the partial region re of the element formation region, the signal wiring 20re is connected to the lower signal wiring 14re through the via plug 19re.
　なお、図３中に図示しないが、金属配線１４Ａ，１４Ｂ及び信号配線１４ｒｅは、層間絶縁膜１３及び下地絶縁膜１２を貫通する配線溝内に、バリアメタル膜（図示せず）を介して形成されている。また、ビアプラグ１９，１９ｒｅは、層間絶縁膜１６及び下地絶縁膜１５を貫通するビアホール内に、バリアメタル膜（図示せず）を介して形成されている。また、リング用，コンタクト用金属配線２０Ａ，２０Ｂ及び信号配線２０ｒｅは、層間絶縁膜１８及び下地絶縁膜１７を貫通する配線溝内に、バリアメタル膜（図示せず）を介して形成されている。 Although not shown in FIG. 3, the metal wirings 14A and 14B and the signal wiring 14re are formed in a wiring groove penetrating the interlayer insulating film 13 and the base insulating film 12 via a barrier metal film (not shown). Has been. The via plugs 19 and 19re are formed in a via hole penetrating the interlayer insulating film 16 and the base insulating film 15 via a barrier metal film (not shown). Further, the ring and contact metal wirings 20A and 20B and the signal wiring 20re are formed in a wiring groove penetrating the interlayer insulating film 18 and the base insulating film 17 through a barrier metal film (not shown). .
　図２に示すように、複数のビアプラグ１９の各々は、コンタクト用金属配線２０Ｂ下に、互いに離間して配置されている。金属パッド２３の下方に配置されたリング用金属配線２０Ａは、第１，第２の開口部２１ａ，２４ａの外側下方に位置する領域に、第２の開口部２４ａの下方に位置する領域を囲うようにリング状に配置されている。金属パッド２３下に配置されたコンタクト用金属配線２０Ｂは、第１の開口部２１ａの下方に位置する領域に配置されており、リング用金属配線２０Ａによって囲まれている。 As shown in FIG. 2, each of the plurality of via plugs 19 is arranged separately from each other under the contact metal wiring 20B. The ring metal wiring 20A disposed below the metal pad 23 surrounds the region located below the second opening 24a in the region located outside and below the first and second openings 21a, 24a. Are arranged in a ring shape. The contact metal wiring 20B disposed under the metal pad 23 is disposed in a region located below the first opening 21a, and is surrounded by the ring metal wiring 20A.
　ここで、本実施形態に係る半導体装置を構成する各構成要素について、以下に説明する。 Here, each component constituting the semiconductor device according to the present embodiment will be described below.
　層間絶縁膜１１，１３，１６，１８は、例えばシリコン酸化膜（ＳｉＯ2）、若しくはＴＥＯＳを用いたＴＥＯＳ酸化膜等の酸化物絶縁膜、又は炭素がドープされたシリコン酸化膜（ＳｉＯＣ膜）、若しくはフッ素がドープされたシリコン酸化膜（ＦＳＧ膜）等の低誘電率絶縁膜からなる。 The interlayer insulating films 11, 13, 16, and 18 are, for example, a silicon oxide film (SiO 2 ), an oxide insulating film such as a TEOS oxide film using TEOS, or a silicon oxide film doped with carbon (SiOC film), Alternatively, it is made of a low dielectric constant insulating film such as a silicon oxide film (FSG film) doped with fluorine.
　下地絶縁膜１２，１５，１７は、層間絶縁膜１１，１３，１６，１８に比べて耐湿性が高く、下地絶縁膜１２，１５，１７内を通って水分が下地絶縁膜１２，１５，１７外に拡散することを防止できる。下地絶縁膜１２，１５，１７の材料としては、例えば、シリコン窒化膜（ＳｉＮ膜）、シリコン炭窒化膜（ＳｉＣＮ膜）、又はシリコン酸窒化膜（ＳｉＯＮ膜）等の窒化物絶縁膜が挙げられる。また、下地絶縁膜１２，１５，１７の膜厚は、例えば１０ｎｍ～３００ｎｍである。 The base insulating films 12, 15, 17 have higher moisture resistance than the interlayer insulating films 11, 13, 16, 18, and moisture passes through the base insulating films 12, 15, 17 and the base insulating films 12, 15, 17. It can be prevented from spreading outside. Examples of the material of the base insulating films 12, 15, and 17 include nitride insulating films such as a silicon nitride film (SiN film), a silicon carbonitride film (SiCN film), and a silicon oxynitride film (SiON film). . Further, the film thickness of the base insulating films 12, 15, and 17 is, for example, 10 nm to 300 nm.
　リング用金属配線２０Ａは、図２及び図３に示すように、下地絶縁膜１７及び層間絶縁膜１８のうち、金属パッド２３の下方に位置する領域にリング状に設けられている。また、リング用金属配線２０Ａは、第１の開口部２１ａの外側に位置する領域（即ち、第１の保護絶縁膜２１）の下方に配置され、その全上面は、第１の保護絶縁膜２１と接している。さらに、リング用金属配線２０Ａは、第２の開口部２４ａの外側に位置する領域（即ち、第２の保護絶縁膜２４）の下方に配置されている。また、リング用金属配線２０Ａのバリアメタル膜は、例えば窒化タンタル膜（ＴａＮ膜）からなる。 As shown in FIGS. 2 and 3, the ring metal wiring 20 </ b> A is provided in a ring shape in a region located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18. The ring metal wiring 20 </ b> A is disposed below a region (that is, the first protective insulating film 21) located outside the first opening 21 a, and the entire upper surface thereof is the first protective insulating film 21. Is in contact with. Further, the ring metal wiring 20A is disposed below a region (that is, the second protective insulating film 24) located outside the second opening 24a. The barrier metal film of the ring metal wiring 20A is made of, for example, a tantalum nitride film (TaN film).
　コンタクト用金属配線２０Ｂは、図２及び図３に示すように、リング用金属配線２０Ａに囲まれた内側領域１８Ｉに形成され、リング用金属配線２０Ａと離間して設けられている。ここで、内側領域１８Ｉとは、図３に示すように、層間絶縁膜１８のうちリング用金属配線２０Ａに囲まれた領域をいう。また、コンタクト用金属配線２０Ｂは、その全上面が第１の開口部２１ａ内に露出され、第１の開口部２１ａの側面と底面との間の角部（以下、「底面側角部」と称す）と離間している。即ち、コンタクト用金属配線２０Ｂは、その全上面がバリアメタル膜２２のうち第１の開口部２１ａの底面に形成された部分と接している。また、コンタクト用金属配線２０Ｂのバリアメタル膜は、例えば窒化タンタル膜（ＴａＮ膜）からなる。 As shown in FIGS. 2 and 3, the contact metal wiring 20B is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A. Here, the inner region 18I refers to a region surrounded by the ring metal wiring 20A in the interlayer insulating film 18, as shown in FIG. In addition, the entire upper surface of the contact metal wiring 20B is exposed in the first opening 21a, and a corner between the side surface and the bottom surface of the first opening 21a (hereinafter referred to as “bottom side corner”). It is separated from That is, the contact metal wiring 20B is in contact with the portion of the barrier metal film 22 formed on the bottom surface of the first opening 21a. The barrier metal film of the contact metal wiring 20B is made of, for example, a tantalum nitride film (TaN film).
　ここで、コンタクト用金属配線２０Ｂの配置は、次の位置に配置されることが好ましい。即ち、図２に示すように、リング用金属配線２０Ａのうちコンタクト用金属配線２０Ｂの延びる方向Ｐと垂直な方向Ｖに沿って対向する部分を、「第１配線部２０Ａ１」及び「第２配線部２０Ａ２」とし、第１配線部２０Ａ１と第２配線部２０Ａ２との間の領域を２分の１に区画する区画線の位置を、「中央位置Ｃ」とした場合、コンタクト用金属配線２０Ｂは、中央位置Ｃと第１配線部２０Ａ１との間で、且つ、中央位置Ｃよりも第１配線部２０Ａ１に近い位置に配置されていることが好ましい。言い換えれば、コンタクト用金属配線２０Ｂは、中央位置Ｃと第２配線部２０Ａ２との間には配置されていないことが好ましい。 Here, the contact metal wiring 20B is preferably arranged at the following position. That is, as shown in FIG. 2, portions of the ring metal wiring 20 </ b> A that face each other along the direction V perpendicular to the extending direction P of the contact metal wiring 20 </ b> B are defined as “first wiring portion 20 </ b> A <b> 1” and “second wiring Portion 20A2 ”, and the position of the partition line that divides the region between the first wiring portion 20A1 and the second wiring portion 20A2 in half is“ center position C ”, the contact metal wiring 20B is It is preferable that the first wiring portion 20A1 is disposed between the central position C and the first wiring portion 20A1 and closer to the first wiring portion 20A1 than the central position C. In other words, the contact metal wiring 20B is preferably not disposed between the central position C and the second wiring portion 20A2.
　リング用金属配線２０Ａ及びコンタクト用金属配線２０Ｂは、銅又は銅合金（例えば、銅を主成分としてアルミニウムが微量に添加されたＣｕ－Ａｌ）からなる銅配線からなる。また、コンタクト用金属配線２０Ｂの配線幅（図３：Ｗ20B参照）は、リング用金属配線２０Ａの配線幅（図３：Ｗ20A参照）と同等、又はそれ以上の大きさを有する。例えば、リング用金属配線２０Ａの配線幅は０．１μｍ～１０μｍで、コンタクト用金属配線２０Ｂの配線幅は５μｍ～３０μｍである。 The ring metal wiring 20A and the contact metal wiring 20B are made of copper wiring made of copper or a copper alloy (for example, Cu—Al containing copper as a main component and a small amount of aluminum added). Further, the wiring width of the contact metal wiring 20B (see FIG. 3: W20B) is equal to or larger than the wiring width of the ring metal wiring 20A (see FIG. 3: W20A). For example, the wiring width of the ring metal wiring 20A is 0.1 μm to 10 μm, and the wiring width of the contact metal wiring 20B is 5 μm to 30 μm.
　第１の保護絶縁膜２１は、シリコン窒化膜の単層膜、又はシリコン窒化膜及びＴＥＯＳ酸化膜の積層膜からなる。また、第１の開口部２１ａは、図２及び図３に示すように、コンタクト用金属配線２０Ｂ及び層間絶縁膜１８の上に、その内部にコンタクト用金属配線２０Ｂの全上面が露出するように形成され、第１の開口部２１ａは、その底面側角部がコンタクト用金属配線２０Ｂと離間して設けられている。即ち、第１の開口部２１ａは、その底面側角部に配線が存在することのないように設けられている。 The first protective insulating film 21 is made of a single layer film of a silicon nitride film or a laminated film of a silicon nitride film and a TEOS oxide film. As shown in FIGS. 2 and 3, the first opening 21a is formed on the contact metal wiring 20B and the interlayer insulating film 18 so that the entire upper surface of the contact metal wiring 20B is exposed therein. The first opening 21a is formed, and the bottom side corner is provided away from the contact metal wiring 20B. That is, the first opening 21a is provided so that there is no wiring at the bottom side corner.
　金属パッド２３は、例えば、アルミニウム、又はアルミニウム合金（アルミニウム合金としては、例えば、アルミニウムを主成分としてシリコンが微量に添加されたＡｌ－Ｓｉ、アルミニウムを主成分として銅が微量に添加されたＡｌ－Ｃｕ、又はアルミニウムを主成分としてシリコン及び銅が微量に添加されたＡｌ－Ｓｉ－Ｃｕ）からなるアルミパッドからなる。ここで、金属パッド２３のうち第２の開口部２４ａ内に露出される領域は、例えば、プローブ検査時にプローブ針（前述の図１８(a)：２００参照）が当てられる領域、又は／及びワイヤボンド（前述の図１８(b)：３００参照）が接続される領域である。また、金属パッド２３下のバリアメタル膜２２は、例えばチタン膜及び窒化チタン膜の積層膜（Ｔｉ膜／ＴｉＮ膜）からなる。 The metal pad 23 is made of, for example, aluminum or an aluminum alloy (for example, Al—Si containing aluminum as a main component with a small amount of silicon added, and Al—Si containing aluminum as a main component with a small amount of copper added). It is made of an aluminum pad made of Al or Si-Cu) containing Cu or aluminum as a main component and a slight amount of silicon and copper added. Here, the region exposed in the second opening 24a of the metal pad 23 is, for example, a region to which a probe needle (see FIG. 18 (a): 200 described above) is applied during probe inspection, and / or a wire. This is a region to which a bond (see FIG. 18B: 300 described above) is connected. Further, the barrier metal film 22 under the metal pad 23 is made of, for example, a laminated film (Ti film / TiN film) of a titanium film and a titanium nitride film.
　第２の保護絶縁膜２４は、例えばシリコン窒化膜からなる。また、第２の開口部２４ａは、金属パッド２３上に形成され、リング用金属配線２０Ａに囲まれた内側領域１８Ｉの上方に配置されている。 The second protective insulating film 24 is made of, for example, a silicon nitride film. The second opening 24a is formed on the metal pad 23 and is disposed above the inner region 18I surrounded by the ring metal wiring 20A.
　ここで、第２の開口部２４ａ内に露出する金属パッド２３に当てるプローブ針、又は金属パッド２３に接続するワイヤボンドは、コンタクト用金属配線２０Ｂの側面位置Ｘ（図３参照）と第２の開口部２４ａの側面位置Ｙ（図３参照）との間に、側面位置Ｘよりも側面位置Ｙに近い位置に配置されることが好ましい。一方、コンタクト用金属配線２０Ｂは、既述の通り、中央位置Ｃと第１配線部２０Ａ１との間に、中央位置Ｃよりも第１配線部２０Ａ１に近い位置に配置されることが好ましい。簡単に言えば、コンタクト用金属配線２０Ｂは、第１配線部２０Ａ１側に配置される一方、ワイヤボンドは、第２配線部２０Ａ２側に配置されることが好ましい。このようにすると、ワイヤボンドを、その下方にコンタクト用金属配線２０Ｂが配置されることがないように、金属パッド２３上に設けることができる。 Here, the probe needle applied to the metal pad 23 exposed in the second opening 24a, or the wire bond connected to the metal pad 23 is the position X (see FIG. 3) of the contact metal wiring 20B and the second position. It is preferable that the opening 24a is disposed at a position closer to the side surface position Y than the side surface position X between the side surface position Y (see FIG. 3) of the opening 24a. On the other hand, as described above, the contact metal wiring 20B is preferably disposed between the central position C and the first wiring part 20A1 at a position closer to the first wiring part 20A1 than to the central position C. In short, the contact metal wiring 20B is preferably disposed on the first wiring portion 20A1 side, while the wire bond is preferably disposed on the second wiring portion 20A2 side. In this way, the wire bond can be provided on the metal pad 23 so that the contact metal wiring 20B is not disposed below the wire bond.
　以下に、本発明の第１の実施形態に係る半導体装置における金属パッドを含む領域ｒｐ及び部分領域ｒｅの製造方法について、図３を参照しながら説明する。 Hereinafter, a method of manufacturing the region rp including the metal pad and the partial region re in the semiconductor device according to the first embodiment of the present invention will be described with reference to FIG.
　例えば、ＣＶＤ（Ｃhemical　Ｖapor　Ｄeposition）法により、半導体基板１０上に、層間絶縁膜１１、下地絶縁膜１２、及び層間絶縁膜１３を順次形成する。その後、例えば、フォトリソグラフィー及びエッチングにより、下地絶縁膜１２及び層間絶縁膜１３に配線溝を形成した後、スパッタ法により、層間絶縁膜１３上、並びに配線溝の底面及び側壁にバリアメタル膜を形成する。その後、例えば、スパッタ法により、バリアメタル膜上に、銅を含むシード膜を形成した後、電解めっき法により、シード膜上に銅を含む導電膜を形成する。その後、ＣＭＰ（Ｃhemical　Ｍechanical　Ｐlanarization）法により、導電膜、シード膜、及びバリアメタル膜のうち配線溝外に形成された部分を除去する。このようにして、配線溝内に、バリアメタル膜（図示せず）を介して金属配線１４Ａ，１４Ｂを形成する。このとき、素子形成領域の部分領域ｒｅにおいて、信号用配線溝内に、バリアメタル膜（図示せず）を介して信号配線１４ｒｅを形成する。 For example, an interlayer insulating film 11, a base insulating film 12, and an interlayer insulating film 13 are sequentially formed on the semiconductor substrate 10 by a CVD (Chemical Vapor Deposition) method. Thereafter, for example, after forming a wiring groove in the base insulating film 12 and the interlayer insulating film 13 by photolithography and etching, a barrier metal film is formed on the interlayer insulating film 13 and on the bottom and side walls of the wiring groove by sputtering. To do. Thereafter, for example, a seed film containing copper is formed on the barrier metal film by sputtering, and then a conductive film containing copper is formed on the seed film by electrolytic plating. Thereafter, portions of the conductive film, the seed film, and the barrier metal film formed outside the wiring trench are removed by a CMP (Chemical Mechanical Planarization) method. In this manner, the metal wirings 14A and 14B are formed in the wiring trench via the barrier metal film (not shown). At this time, in the partial region re of the element formation region, the signal wiring 14re is formed in the signal wiring trench through a barrier metal film (not shown).
　次に、例えば、ＣＶＤ法により、層間絶縁膜１３上に、下地絶縁膜１５、層間絶縁膜１６、下地絶縁膜１７、及び層間絶縁膜１８を順次形成する。その後、フォトリソグラフィー及びエッチングにより、層間絶縁膜１８、下地絶縁膜１７、層間絶縁膜１６、及び下地絶縁膜１５を貫通するホールを形成し、下地絶縁膜１５及び層間絶縁膜１６にビアホールを形成した後、フォトリソグラフィー及びエッチングにより、下地絶縁膜１７及び層間絶縁膜１８に、ビアホールと連通するコンタクト用配線溝を形成すると共に、下地絶縁膜１７及び層間絶縁膜１８にリング用配線溝を形成する。又はフォトリソグラフィー及びエッチングにより、下地絶縁膜１７及び層間絶縁膜１８に、コンタクト用配線溝及びリング用配線溝を形成した後、フォトリソグラフィー及びエッチングにより、コンタクト用配線溝内に露出する層間絶縁膜１６及び下地絶縁膜１５を貫通し、コンタクト用配線溝と連通するビアホールを形成しても良い。このとき、素子形成領域の部分領域ｒｅにおいて、信号用配線溝及び該信号用配線溝と連通するビアホールを形成する。 Next, for example, a base insulating film 15, an interlayer insulating film 16, a base insulating film 17, and an interlayer insulating film 18 are sequentially formed on the interlayer insulating film 13 by a CVD method. Thereafter, holes penetrating through the interlayer insulating film 18, the base insulating film 17, the interlayer insulating film 16, and the base insulating film 15 were formed by photolithography and etching, and via holes were formed in the base insulating film 15 and the interlayer insulating film 16. Thereafter, contact wiring grooves communicating with the via holes are formed in the base insulating film 17 and the interlayer insulating film 18 by photolithography and etching, and ring wiring grooves are formed in the base insulating film 17 and the interlayer insulating film 18. Alternatively, after forming a contact wiring groove and a ring wiring groove in the base insulating film 17 and the interlayer insulating film 18 by photolithography and etching, the interlayer insulating film 16 exposed in the contact wiring groove by photolithography and etching. In addition, a via hole penetrating the base insulating film 15 and communicating with the contact wiring trench may be formed. At this time, a signal wiring groove and a via hole communicating with the signal wiring groove are formed in the partial region re of the element formation region.
　次に、例えば、スパッタ法により、層間絶縁膜１８上、ビアホールの底面及び側壁、コンタクト用配線溝の底面及び側壁、並びにリング用配線溝の底面及び側壁に、バリアメタル膜を形成する。その後、例えば、スパッタ法により、バリアメタル膜上に、銅（Ｃｕ）を含むシード膜を形成した後、電解めっき法により、シード膜上に、銅（Ｃｕ）を含む導電膜を形成する。その後、ＣＭＰ法により、導電膜、シード膜、及びバリアメタル膜のうち、コンタクト用配線溝及びリング用配線溝外に形成された部分を除去する。このようにして、ビアホール内に、バリアメタル膜（図示せず）を介してビアプラグ１９を形成すると共に、コンタクト用配線溝内に、バリアメタル膜（図示せず）を介してビアプラグ１９と連接するコンタクト用金属配線２０Ｂを形成する。それと共に、リング用配線溝内に、バリアメタル膜（図示せず）を介してリング用金属配線２０Ａを形成する。このとき、素子形成領域の部分領域ｒｅにおいて、ビアホール内に、バリアメタル膜（図示せず）を介してビアプラグ１９ｒｅを形成すると共に、信号用配線溝内に、バリアメタル膜（図示せず）を介してビアプラグ１９ｒｅと連接する信号配線２０ｒｅを形成する。従って、ビアプラグ１９及びコンタクト用金属配線２０Ｂが一体化形成される一方、ビアプラグ１９ｒｅ及び信号配線２０ｒｅが一体化形成される。 Next, for example, a barrier metal film is formed on the interlayer insulating film 18, on the bottom and side walls of the via hole, the bottom and side walls of the contact wiring groove, and the bottom and side walls of the ring wiring groove by, for example, sputtering. Thereafter, for example, a seed film containing copper (Cu) is formed on the barrier metal film by sputtering, and then a conductive film containing copper (Cu) is formed on the seed film by electrolytic plating. Thereafter, portions of the conductive film, the seed film, and the barrier metal film formed outside the contact wiring groove and the ring wiring groove are removed by CMP. In this manner, the via plug 19 is formed in the via hole via the barrier metal film (not shown), and is connected to the via plug 19 in the contact wiring groove via the barrier metal film (not shown). Contact metal wiring 20B is formed. At the same time, a ring metal wiring 20A is formed in the ring wiring groove through a barrier metal film (not shown). At this time, in the partial region re of the element formation region, a via plug 19re is formed in the via hole via a barrier metal film (not shown), and a barrier metal film (not shown) is formed in the signal wiring trench. A signal wiring 20re connected to the via plug 19re is formed. Accordingly, the via plug 19 and the contact metal wiring 20B are integrally formed, while the via plug 19re and the signal wiring 20re are integrally formed.
　次に、例えば、ＣＶＤ法により、層間絶縁膜１８上に、第１の保護絶縁膜２１を形成した後、フォトリソグラフィー及びエッチングにより、第１の保護絶縁膜２１に、コンタクト用金属配線２０Ｂの全上面を露出させる第１の開口部２１ａを形成する。その後、例えば、スパッタ法により、第１の保護絶縁膜２１上、並びに第１の開口部２１ａの底面及び側壁に、バリアメタル膜を形成した後、スパッタ法により、バリアメタル膜上に、アルミニウム（Ａｌ）を含む導電膜を形成する。その後、例えば、フォトリソグラフィー及びエッチングにより、導電膜、及びバリアメタル膜を順次パターニングして、第１の開口部２１ａ内及びその外側周辺部に位置する第１の保護絶縁膜２１上に、バリアメタル膜２２を介して、アルミパッドからなる金属パッド２３を形成する。 Next, after the first protective insulating film 21 is formed on the interlayer insulating film 18 by, for example, the CVD method, the entire contact metal wiring 20B is formed on the first protective insulating film 21 by photolithography and etching. A first opening 21a exposing the upper surface is formed. Thereafter, for example, a barrier metal film is formed on the first protective insulating film 21 and the bottom and side walls of the first opening 21a by sputtering, and then aluminum (on the barrier metal film by sputtering). A conductive film containing Al) is formed. Thereafter, the conductive film and the barrier metal film are sequentially patterned by, for example, photolithography and etching, and the barrier metal is formed on the first protective insulating film 21 located in the first opening portion 21a and the outer peripheral portion thereof. A metal pad 23 made of an aluminum pad is formed through the film 22.
　次に、例えば、ＣＶＤ法により、金属パッド２３上に、第２の保護絶縁膜２４を形成した後、フォトリソグラフィー及びエッチングにより、第２の保護絶縁膜２４に、金属パッド２３の一部上面を露出させる第２の開口部２４ａを形成する。 Next, for example, after the second protective insulating film 24 is formed on the metal pad 23 by the CVD method, a part of the upper surface of the metal pad 23 is formed on the second protective insulating film 24 by photolithography and etching. A second opening 24a to be exposed is formed.
　以上のようにして、本実施形態に係る半導体装置を製造することができる。 As described above, the semiconductor device according to this embodiment can be manufactured.
　本実施形態によると、例えば、第２の開口部２４ａ内に露出する金属パッド２３にプローブ針を当てる、又は金属パッド２３にワイヤボンドを接続する際に、プローブ針又はワイヤボンドにより、金属パッド２３が削れてバリアメタル膜２２が割れ、金属パッド２３の削れ部分の下方に位置する層間絶縁膜１８にクラックが発生し、クラック内に水分が進入することがあっても、リング用金属配線２０Ａにより、クラック内に進入した水分のうち特に横方向に拡散する水分が、リング用金属配線２０Ａに囲まれていない外側領域１８Ｏに拡散することを防止できる。ここで、外側領域１８Ｏとは、図３に示すように、層間絶縁膜１８のうちリング用金属配線２０Ａに囲まれていない領域をいう。 According to the present embodiment, for example, when a probe needle is applied to the metal pad 23 exposed in the second opening 24a or a wire bond is connected to the metal pad 23, the metal pad 23 is formed by the probe needle or the wire bond. Even if the barrier metal film 22 is cracked and a crack is generated in the interlayer insulating film 18 located below the scraped portion of the metal pad 23, and moisture may enter the crack, the ring metal wiring 20A Further, it is possible to prevent the moisture that has diffused in the lateral direction from the moisture that has entered the cracks from diffusing into the outer region 18O that is not surrounded by the ring metal wiring 20A. Here, the outer region 18O refers to a region of the interlayer insulating film 18 that is not surrounded by the ring metal wiring 20A, as shown in FIG.
　さらに、層間絶縁膜１８よりも耐湿性の高い下地絶縁膜１７により、クラック内に進入した水分のうち特に下方向に拡散する水分が、下地絶縁膜１７下の層間絶縁膜１６に拡散することを防止できる。 Further, the base insulating film 17 having a moisture resistance higher than that of the interlayer insulating film 18 allows moisture that diffuses in the downward direction among the water that has entered the crack to diffuse into the interlayer insulating film 16 below the base insulating film 17. Can be prevented.
　従って、側面がリング用金属配線２０Ａに囲まれ、底面が下地絶縁膜１７に囲まれた内側領域１８Ｉに水分を留めることができるため、従来のように金属パッド１１３の近傍の配線の信頼性が低下する（具体的には例えば、金属パッド１１３の近傍の素子形成領域に配置された配線に水分が到達し、配線のうち水分との接触部分が腐食されて断線する、又は配線と他の配線間に水分が拡散し、配線が他の配線とショートする）ことを防止できる（以下、「配線の信頼性低下の防止効果」と称す）。 Accordingly, moisture can be retained in the inner region 18I whose side surface is surrounded by the ring metal wiring 20A and whose bottom surface is surrounded by the base insulating film 17, so that the reliability of the wiring in the vicinity of the metal pad 113 is improved as in the prior art. (Specifically, for example, moisture reaches a wiring arranged in an element formation region in the vicinity of the metal pad 113, and a portion of the wiring that is in contact with moisture is corroded or disconnected, or the wiring and another wiring. It is possible to prevent moisture from diffusing between them and causing the wiring to short-circuit with other wiring) (hereinafter referred to as “an effect of preventing a decrease in the reliability of the wiring”).
　加えて、図３に示すように、第１の開口部２１ａを、コンタクト用金属配線２０Ｂ及び層間絶縁膜１８の上に形成することにより、金属パッド２３のうち第１の保護絶縁膜２１の上面と第１の開口部２１ａの底面との間の段差部分に形成された段差部分Ｐｄを、コンタクト用金属配線２０Ｂと離間させることができる。これにより、例えば、ワイヤボンドを、その左側にコンタクト用金属配線２０Ｂが配置される一方、その右側に金属パッド２３の段差部分Ｐｄが配置されるように、金属パッド２３上に設けることができる。そのため、ワイヤボンドとコンタクト用金属配線２０Ｂ間を流れる電流が、金属パッド２３の段差部分Ｐｄ（言い換えれば、カバレッジの悪い部分、即ち、膜厚の薄い部分）を流れることはないため、金属パッド２３の段差部分Ｐｄが欠損することを防止し、金属パッド２３のエレクトロマイグレーション耐性を向上させることができる（以下、「金属パッド２３の欠損の防止効果」と称す）。 In addition, as shown in FIG. 3, by forming the first opening 21 a on the contact metal wiring 20 </ b> B and the interlayer insulating film 18, the upper surface of the first protective insulating film 21 in the metal pad 23. And the stepped portion Pd formed in the stepped portion between the first opening 21a and the bottom of the first opening 21a can be separated from the contact metal wiring 20B. Thereby, for example, a wire bond can be provided on the metal pad 23 such that the contact metal wiring 20B is disposed on the left side and the step portion Pd of the metal pad 23 is disposed on the right side. Therefore, the current flowing between the wire bond and the contact metal wiring 20B does not flow through the stepped portion Pd of the metal pad 23 (in other words, a portion with poor coverage, that is, a portion with a small film thickness). Can be prevented from being lost, and the electromigration resistance of the metal pad 23 can be improved (hereinafter referred to as “the effect of preventing the metal pad 23 from being lost”).
　これに対し、従来では、第１の開口部１１１ａが、コンタクト用金属配線１１０上のみに形成されるため、例えば、図１８(b) に示すように、ワイヤボンド３００の左側にコンタクト用金属配線１１０が配置されると共に、ワイヤボンド３００の左側に金属パッド１１３の段差部分Ｐｄが配置されるため、ワイヤボンド３００とコンタクト用金属配線１１０間を流れる電流が、金属パッド１１３の段差部分Ｐｄを流れて、金属パッド１１３の段差部分Ｐｄが欠損する虞がある。 On the other hand, conventionally, since the first opening 111a is formed only on the contact metal wiring 110, for example, as shown in FIG. 18B, the contact metal wiring is formed on the left side of the wire bond 300. 110 and the stepped portion Pd of the metal pad 113 is disposed on the left side of the wire bond 300, so that the current flowing between the wirebond 300 and the contact metal wiring 110 flows through the stepped portion Pd of the metal pad 113. As a result, the stepped portion Pd of the metal pad 113 may be lost.
　さらに、第１の開口部２１ａを、その内部にコンタクト用金属配線２０Ｂの全上面が露出するように形成することにより、第１の開口部２１ａの底面側角部を、コンタクト用金属配線２０Ｂと離間させることができる。そのため、コンタクト用金属配線２０Ｂは、その全上面がバリアメタル膜２２のうち第１の開口部２１ａの底面に形成された部分と接し、バリアメタル膜２２のうち第１の開口部２１ａの底面側角部に形成された角部部分Ｐｅと接することはない。そのため、バリアメタル膜２２の角部部分Ｐｅ（言い換えれば、カバレッジの悪い部分、即ち、膜厚の薄い部分）を通って、コンタクト用金属配線２０Ｂの金属が、金属パッド２３に析出することを防止できる。従って、金属パッド２３のうち金属析出領域が腐食することを防止できる。さらに、例えば、金属パッド２３のうち金属析出領域とワイヤボンドとの接続不良が発生することを防止できる（以下、「金属パッド２３への金属析出の防止効果」と称す）。 Further, by forming the first opening 21a so that the entire upper surface of the contact metal wiring 20B is exposed inside, the bottom side corner of the first opening 21a is connected to the contact metal wiring 20B. Can be separated. Therefore, the contact metal wiring 20B is in contact with the portion of the barrier metal film 22 formed on the bottom surface of the first opening 21a in the barrier metal film 22, and the bottom surface side of the first opening 21a in the barrier metal film 22 There is no contact with the corner portion Pe formed at the corner. Therefore, the metal of the contact metal wiring 20B is prevented from being deposited on the metal pad 23 through the corner portion Pe of the barrier metal film 22 (in other words, the portion with poor coverage, that is, the thin portion). it can. Therefore, it is possible to prevent the metal deposition region of the metal pad 23 from being corroded. Furthermore, for example, it is possible to prevent a connection failure between the metal deposition region and the wire bond in the metal pad 23 (hereinafter referred to as “a metal deposition preventing effect on the metal pad 23”).
　これに対し、従来では、図１７に示すように、第１の開口部１１１ａが、その内部にコンタクト用金属配線１１０の一部上面が露出するように形成されるため、コンタクト用金属配線１１０は、バリアメタル膜１１２の角部部分Ｐｅと接する。そのため、バリアメタル膜１１２の角部部分Ｐｅを通って、コンタクト用金属配線１１０の金属が、金属パッド１１３に析出する虞がある。 On the other hand, conventionally, as shown in FIG. 17, the first opening 111a is formed so that a part of the upper surface of the contact metal wiring 110 is exposed in the first opening 111a. In contact with the corner portion Pe of the barrier metal film 112. Therefore, the metal of the contact metal wiring 110 may be deposited on the metal pad 113 through the corner portion Pe of the barrier metal film 112.
　なお、言うまでもないが、第２の開口部２４ａを、リング用金属配線２０Ａに囲まれた内側領域１８Ｉの上方に配置する、言い換えれば、リング用金属配線２０Ａを、第２の開口部２４ａの外側に位置する領域（即ち、第２の保護絶縁膜２４）の下方に配置することにより、リング用金属配線２０Ａにより、層間絶縁膜１８のうち、クラックが発生する可能性の高い領域（即ち、金属パッド２３のうち第２の開口部２４ａ内に露出する領域の下方に位置する領域）を囲うことができる。言い換えれば、第２の開口部２４ａ内に露出する金属パッド２３に、例えばプローブ針を当てる、又はワイヤボンドを接続する際に、層間絶縁膜１８にクラックが発生することがあっても、クラックを、リング用金属配線２０Ａに囲まれた内側領域１８Ｉに発生させることができる。 Needless to say, the second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A. In other words, the ring metal wiring 20A is disposed outside the second opening 24a. By disposing it below the region located at (i.e., the second protective insulating film 24), the ring metal wiring 20A causes a region (i.e., metal) that is likely to cause cracks in the interlayer insulating film 18. The pad 23 can be surrounded by a region located below the region exposed in the second opening 24a. In other words, even when a crack is generated in the interlayer insulating film 18 when, for example, a probe needle is applied to the metal pad 23 exposed in the second opening 24a or a wire bond is connected, the crack is generated. Can be generated in the inner region 18I surrounded by the ring metal wiring 20A.
　＜第１の実施形態の変形例１＞
　以下に、本発明の第１の実施形態の変形例１に係る半導体装置について、図４及び図５を参照しながら説明する。図４は、本発明の第１の実施形態の変形例１に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す平面図である。図５は、本発明の第１の実施形態の変形例１に係る半導体装置の構成を示す断面図であり、具体的には、図４に示すV-V線における断面図である。なお、図４及び図５において、第１の実施形態における構成要素と同一の構成要素には、図２及び図３に示す符号と同一の符号を付す。従って、本変形例では、第１の実施形態と相違する点について説明する。 <Variation 1 of the first embodiment>
A semiconductor device according to Modification 1 of the first embodiment of the present invention will be described below with reference to FIGS. FIG. 4 is a plan view showing a configuration of a semiconductor device according to Modification 1 of the first embodiment of the present invention, and specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device. . FIG. 5 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 1 of the first embodiment of the present invention, and specifically, a cross-sectional view taken along the line VV shown in FIG. 4 and 5, the same reference numerals as those shown in FIGS. 2 and 3 are attached to the same constituent elements as those in the first embodiment. Therefore, in the present modification, differences from the first embodiment will be described.
　本変形例と第１の実施形態との相違点は、以下に示す点である。 The difference between this modification and the first embodiment is as follows.
　本変形例におけるコンタクト用金属配線２０Ｂａは、図４及び図５に示すように、その一部上面が第１の開口部２１ａ内に露出されている（言い換えれば、第１の開口部２１ａは、その内部にコンタクト用金属配線２０Ｂａの一部上面が露出するように形成されている）。これに対し、第１の実施形態におけるコンタクト用金属配線２０Ｂは、図２及び図３に示すように、その全上面が第１の開口部２１ａ内に露出されている。 As shown in FIGS. 4 and 5, the contact metal wiring 20 </ b> Ba in this modification is partially exposed in the first opening 21 a (in other words, the first opening 21 a is It is formed in such a manner that a part of the upper surface of the contact metal wiring 20Ba is exposed). On the other hand, as shown in FIGS. 2 and 3, the contact metal wiring 20B in the first embodiment has its entire upper surface exposed in the first opening 21a.
　このように、本変形例と第１の実施形態とでは、コンタクト用金属配線の配置位置が異なる。 Thus, the arrangement positions of the contact metal wirings are different between the present modification and the first embodiment.
　本変形例によると、第１の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。加えて、第１の実施形態と同様に、金属パッド２３の欠損の防止効果を発揮できる。 According to this modification, as in the first embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited. In addition, similar to the first embodiment, the effect of preventing the metal pad 23 from being lost can be exhibited.
　＜第１の実施形態の変形例２＞
　以下に、本発明の第１の実施形態の変形例２に係る半導体装置について、図６を参照しながら説明する。図６は、本発明の第１の実施形態の変形例２に係る半導体装置の構成を示す断面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す断面図である。なお、図６において、第１の実施形態における構成要素と同一の構成要素には、図３に示す符号と同一の符号を付す。従って、本変形例では、第１の実施形態と相違する点について説明する。 <Modification 2 of the first embodiment>
A semiconductor device according to Modification 2 of the first embodiment of the present invention will be described below with reference to FIG. FIG. 6 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 2 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. . In FIG. 6, the same reference numerals as those shown in FIG. 3 are given to the same constituent elements as those in the first embodiment. Therefore, in the present modification, differences from the first embodiment will be described.
　本変形例に係る半導体装置は、第１の実施形態における構成要素に加えて、図６に示すように、リング用金属配線２０Ａの下方に位置する層間絶縁膜１３及び下地絶縁膜１２を貫通して設けられ電源配線（図示せず）と連接する接続用金属配線１４ｂと、層間絶縁膜１６及び下地絶縁膜１５を貫通して設けられたビアプラグ１９ｂとをさらに備えている。リング用金属配線２０Ａは、ビアプラグ１９ｂを介して、電源配線と連接する接続用金属配線１４ｂと接続している。ここで、接続用金属配線１４ｂは、デバイスチップ（図１：Ｄ参照）の素子形成領域（図１：Ｒｅ参照）に形成された電源配線に連接し、素子形成領域からパッド配置領域（図１：Ｒｐ参照）まで引き延ばして形成された配線である。なお、接続用金属配線１４ｂは、銅を含む導電膜からなり、金属配線１４Ａ，１４Ｂの形成と同時に、配線溝内にバリアメタル膜を介して形成される。また、ビアプラグ１９ｂは、銅を含む導電膜からなり、ビアプラグ１９の形成と同時に、ビアホール内にバリアメタル膜を介して形成され、且つリング用金属配線２０Ａと一体化形成される。 In addition to the components in the first embodiment, the semiconductor device according to the present modification penetrates the interlayer insulating film 13 and the base insulating film 12 located below the ring metal wiring 20A as shown in FIG. And a connection metal wiring 14b connected to a power supply wiring (not shown), and a via plug 19b provided through the interlayer insulating film 16 and the base insulating film 15. The ring metal wiring 20A is connected to the connection metal wiring 14b connected to the power supply wiring via the via plug 19b. Here, the connection metal wiring 14b is connected to the power supply wiring formed in the element formation region (see Re in FIG. 1: D) of the device chip (see FIG. 1: D), and is connected to the pad arrangement region (FIG. 1). : Rp (see Rp)). The connection metal wiring 14b is made of a conductive film containing copper, and is formed in the wiring trench through a barrier metal film simultaneously with the formation of the metal wirings 14A and 14B. The via plug 19b is made of a conductive film containing copper. Simultaneously with the formation of the via plug 19, the via plug 19b is formed in the via hole via a barrier metal film and integrally formed with the ring metal wiring 20A.
　このように、本変形例における特徴点は、リング用金属配線２０Ａが、電源配線と電気的に接続し、リング用金属配線２０Ａの電位が電源電位に固定されている点である。 As described above, the characteristic point of this modification is that the ring metal wiring 20A is electrically connected to the power supply wiring, and the potential of the ring metal wiring 20A is fixed to the power supply potential.
　本変形例によると、第１の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。加えて、第１の実施形態と同様に、金属パッド２３の欠損の防止効果を発揮できる。さらに、第１の実施形態と同様に、金属パッド２３への金属析出の防止効果を発揮できる。 According to this modification, as in the first embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited. In addition, similar to the first embodiment, the effect of preventing the metal pad 23 from being lost can be exhibited. Furthermore, the effect of preventing metal deposition on the metal pad 23 can be exhibited as in the first embodiment.
　加えて、リング用金属配線２０Ａの電位が一定電位（詳細には電源電位）に固定されることにより、リング用金属配線２０Ａの電位の変動によって、金属パッド２３に対しノイズが発生することを抑制できる。 In addition, by fixing the potential of the ring metal wiring 20A to a constant potential (specifically, the power supply potential), it is possible to prevent noise from being generated on the metal pad 23 due to fluctuations in the potential of the ring metal wiring 20A. it can.
　さらに、リング用金属配線２０Ａの固定電位が電源電位であるため、リング用金属配線２０Ａにより、金属パッド２３をシールドし、金属パッド２３のノイズが、金属パッド２３と隣り合う他の金属パッド、及び金属パッド２３の周囲に配置される配線に伝播することを抑制できる。 Further, since the fixed potential of the ring metal wiring 20A is the power supply potential, the metal pad 23 is shielded by the ring metal wiring 20A, and the noise of the metal pad 23 causes other metal pads adjacent to the metal pad 23, and Propagation to the wiring arranged around the metal pad 23 can be suppressed.
　＜第１の実施形態の変形例３＞
　以下に、本発明の第１の実施形態の変形例３に係る半導体装置について、図７を参照しながら説明する。図７は、本発明の第１の実施形態の変形例３に係る半導体装置の構成を示す断面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す断面図である。なお、図７において、第１の実施形態における構成要素と同一の構成要素には、図３に示す符号と同一の符号を付す。従って、本変形例では、第１の実施形態と相違する点について説明する。 <Modification 3 of the first embodiment>
A semiconductor device according to Modification 3 of the first embodiment of the present invention will be described below with reference to FIG. FIG. 7 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 3 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. . In FIG. 7, the same components as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. Therefore, in the present modification, differences from the first embodiment will be described.
　本変形例に係る半導体装置は、第１の実施形態における構成要素に加えて、図７に示すように、層間絶縁膜１８及び下地絶縁膜１７を貫通して設けられ、リング用金属配線２０Ａとコンタクト用金属配線２０Ｂ間を連接する接続用金属配線２０ｃをさらに備えている。リング用金属配線２０Ａは、接続用金属配線２０ｃにより、金属パッド２３と電気的に接続している。ここで、接続用金属配線２０ｃは、リング用金属配線２０Ａとコンタクト用金属配線２０Ｂとが対向する領域のうちの間隔の狭い領域の一部分に設けられる。なお、接続用金属配線２０ｃは、銅を含む導電膜からなり、リング用金属配線２０Ａ及びコンタクト用金属配線２０Ｂの形成と同時に、配線溝内にバリアメタル膜を介して形成される。 In addition to the components in the first embodiment, the semiconductor device according to the present modification is provided through the interlayer insulating film 18 and the base insulating film 17, as shown in FIG. A connection metal wiring 20c that connects the contact metal wirings 20B is further provided. The ring metal wiring 20A is electrically connected to the metal pad 23 by the connection metal wiring 20c. Here, the connection metal wiring 20c is provided in a part of a narrowly spaced region in the region where the ring metal wiring 20A and the contact metal wiring 20B face each other. The connection metal wiring 20c is made of a conductive film containing copper, and is formed in the wiring trench via a barrier metal film simultaneously with the formation of the ring metal wiring 20A and the contact metal wiring 20B.
　このように、本変形例における特徴点は、リング用金属配線２０Ａが、金属パッド２３と電気的に接続し、リング用金属配線２０Ａの電位が金属パッド２３の電位に固定されている点である。 As described above, the feature of this modification is that the ring metal wiring 20A is electrically connected to the metal pad 23, and the potential of the ring metal wiring 20A is fixed to the potential of the metal pad 23. .
　本変形例によると、第１の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。加えて、第１の実施形態と同様に、金属パッド２３の欠損の防止効果を発揮できる。 According to this modification, as in the first embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited. In addition, similar to the first embodiment, the effect of preventing the metal pad 23 from being lost can be exhibited.
　加えて、リング用金属配線２０Ａの電位が一定電位（詳細には金属パッド２３の電位）に固定されることにより、リング用金属配線２０Ａの電位の変動によって、金属パッド２３に対しノイズが発生することを抑制できる。 In addition, since the potential of the ring metal wiring 20A is fixed to a constant potential (specifically, the potential of the metal pad 23), noise is generated in the metal pad 23 due to fluctuations in the potential of the ring metal wiring 20A. This can be suppressed.
　＜第１の実施形態の変形例４＞
　以下に、本発明の第１の実施形態の変形例４に係る半導体装置について、図８を参照しながら説明する。図８は、本発明の第１の実施形態の変形例４に係る半導体装置の構成を示す断面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す断面図である。なお、図８において、第１の実施形態における構成要素と同一の構成要素には、図３に示す符号と同一の符号を付す。従って、本変形例では、第１の実施形態と相違する点について説明する。 <Modification 4 of the first embodiment>
A semiconductor device according to Modification 4 of the first embodiment of the present invention will be described below with reference to FIG. FIG. 8 is a cross-sectional view showing a configuration of a semiconductor device according to Modification 4 of the first embodiment of the present invention, specifically, a cross-sectional view showing a configuration of a region including a metal pad in the semiconductor device. . In FIG. 8, the same components as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. Therefore, in the present modification, differences from the first embodiment will be described.
　本変形例に係る半導体装置は、第１の実施形態における構成要素に加えて、図８に示すように、層間絶縁膜１３及び下地絶縁膜１２を貫通して設けられ、金属配線１４Ｂと連接する接続用金属配線１４ｄと、層間絶縁膜１６及び下地絶縁膜１５を貫通して設けられたビアプラグ１９ｄとをさらに備えている。リング用金属配線２０Ａは、ビアプラグ１９ｄを介して、金属配線１４Ｂと連接する接続用金属配線１４ｄと接続している。即ち、リング用金属配線２０Ａは、ビアプラグ１９ｄ及び接続用金属配線１４ｄにより、金属パッド２３と電気的に接続する金属配線１４Ｂと接続している。なお、接続用金属配線１４ｄは、銅を含む導電膜からなり、金属配線１４Ａ，１４Ｂの形成と同時に、配線溝内にバリアメタル膜を介して形成され、且つ金属配線１４Ｂと一体化形成される。また、ビアプラグ１９ｄは、銅を含む導電膜からなり、ビアプラグ１９の形成と同時に、ビアホール内にバリアメタル膜を介して形成され、且つリング用金属配線２０Ａと一体化形成される。 In addition to the components in the first embodiment, the semiconductor device according to the present modification is provided through the interlayer insulating film 13 and the base insulating film 12, as shown in FIG. 8, and is connected to the metal wiring 14B. A connection metal wiring 14d and a via plug 19d provided through the interlayer insulating film 16 and the base insulating film 15 are further provided. The ring metal wiring 20A is connected to the connection metal wiring 14d connected to the metal wiring 14B through the via plug 19d. That is, the ring metal wiring 20A is connected to the metal wiring 14B electrically connected to the metal pad 23 by the via plug 19d and the connection metal wiring 14d. The connection metal wiring 14d is made of a conductive film containing copper, and is formed in the wiring trench through the barrier metal film and formed integrally with the metal wiring 14B simultaneously with the formation of the metal wirings 14A and 14B. . The via plug 19d is made of a conductive film containing copper. At the same time as the via plug 19 is formed, the via plug 19d is formed in the via hole via a barrier metal film and integrally formed with the ring metal wiring 20A.
　このように、本変形例における特徴点は、リング用金属配線２０Ａが、金属パッド２３と電気的に接続し、リング用金属配線２０Ａの電位が金属パッド２３の電位に固定されている点である。 As described above, the feature of this modification is that the ring metal wiring 20A is electrically connected to the metal pad 23, and the potential of the ring metal wiring 20A is fixed to the potential of the metal pad 23. .
　ここで、本変形例と第１の実施形態の変形例３との相違点は、次に示す点である。本変形例では、図８に示すように、金属配線１４Ｂと連接する接続用金属配線１４ｄを設け、ビアプラグ１９ｄを介して、リング用金属配線２０Ａを接続用金属配線１４ｄと接続させることにより、リング用金属配線２０Ａを金属パッド２３と電気的に接続させる。これに対し、第１の実施形態の変形例３では、コンタクト用金属配線２０Ｂとリング用金属配線２０Ａ間を連接する接続用金属配線２０ｃを設けることにより、リング用金属配線２０Ａを金属パッド２３と電気的に接続させる。このように、本変形例と第１の実施形態の変形例３とでは、リング用金属配線２０Ａを金属パッド２３と電気的に接続させる構成が異なる。 Here, the difference between this modification and Modification 3 of the first embodiment is as follows. In this modification, as shown in FIG. 8, a connection metal wiring 14d connected to the metal wiring 14B is provided, and the ring metal wiring 20A is connected to the connection metal wiring 14d via the via plug 19d, thereby providing a ring. The metal wiring 20A is electrically connected to the metal pad 23. On the other hand, in the third modification of the first embodiment, the ring metal wiring 20A is connected to the metal pad 23 by providing the connection metal wiring 20c connecting the contact metal wiring 20B and the ring metal wiring 20A. Connect electrically. Thus, the present modification and the third modification of the first embodiment differ in the configuration in which the ring metal wiring 20A is electrically connected to the metal pad 23.
　本変形例によると、第１の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。加えて、第１の実施形態と同様に、金属パッド２３の欠損の防止効果を発揮できる。さらに、第１の実施形態と同様に、金属パッド２３への金属析出の防止効果を発揮できる。 According to this modification, as in the first embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited. In addition, similar to the first embodiment, the effect of preventing the metal pad 23 from being lost can be exhibited. Furthermore, the effect of preventing metal deposition on the metal pad 23 can be exhibited as in the first embodiment.
　加えて、第１の実施形態の変形例３と同様に、リング用金属配線２０Ａの電位の変動によって、金属パッド２３に対しノイズが発生することを抑制できる。 In addition, as in the third modification of the first embodiment, it is possible to suppress the generation of noise on the metal pad 23 due to the fluctuation of the potential of the ring metal wiring 20A.
　＜第１の実施形態の変形例５＞
　以下に、本発明の第１の実施形態の変形例５に係る半導体装置について、図９(a) 及び(b) を参照しながら説明する。図９(a) は、本発明の第１の実施形態の変形例５に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置におけるデバイスチップの構成を示す平面図である。なお、図９(a) において、第１の実施形態における構成要素と同一の構成要素には、図１に示す符号と同一の符号を付す。図９(b) は、本発明の第１の実施形態の変形例５に係る半導体装置の構成を示す平面図であり、具体的には、図９(a) に示す複数の金属パッドを含む領域ｒｐｐの構成を示す拡大平面図である。 <Modification 5 of the first embodiment>
A semiconductor device according to Modification 5 of the first embodiment of the present invention will be described below with reference to FIGS. 9 (a) and 9 (b). FIG. 9A is a plan view showing a configuration of a semiconductor device according to Modification 5 of the first embodiment of the present invention, specifically, a plan view showing a configuration of a device chip in the semiconductor device. . In FIG. 9A, the same components as those in the first embodiment are denoted by the same reference numerals as those shown in FIG. FIG. 9B is a plan view showing a configuration of a semiconductor device according to Modification 5 of the first embodiment of the present invention, and specifically includes a plurality of metal pads shown in FIG. It is an enlarged plan view which shows the structure of area | region rpp.
　図９(a) 及び(b) に示すように、パッド配置領域Ｒｐには、例えば、パッド配置領域Ｒｐの延びる方向（言い換えれば、コンタクト用金属配線２０Ｂの延びる方向Ｐと垂直な方向Ｖ）に沿って、金属パッド２３が２列に配置されている。ここで、図９(b) から判るように、図９(b) 中に代表して図示された５コの金属パッド２３のうち、１コの金属パッド２３を含む領域の平面構成は、第１の実施形態における図２に示す構成と同様である。 As shown in FIGS. 9A and 9B, in the pad arrangement region Rp, for example, in the extending direction of the pad arrangement region Rp (in other words, in the direction V perpendicular to the extending direction P of the contact metal wiring 20B). Along the metal pads 23 are arranged in two rows. Here, as can be seen from FIG. 9B, the planar configuration of the region including one metal pad 23 among the five metal pads 23 representatively shown in FIG. This is the same as the configuration shown in FIG.
　このように、本変形例は、第１の実施形態における金属パッド２３のレイアウトの一例を示す例である。 Thus, this modification is an example showing an example of the layout of the metal pad 23 in the first embodiment.
　本変形例によると、第１の実施形態と同様の効果（即ち、配線の信頼性低下の防止効果、金属パッド２３の欠損の防止効果、及び金属パッド２３への金属析出の防止効果）を発揮できる。 According to this modification, the same effects as in the first embodiment (that is, the effect of preventing the reliability of the wiring from being lowered, the effect of preventing the metal pad 23 from being lost, and the effect of preventing the metal deposition on the metal pad 23) are exhibited. it can.
　なお、本変形例では、パッド配置領域Ｒｐに、図９(b) に示すように、金属パッド２３が、コンタクト用金属配線２０Ｂの延びる方向Ｐと垂直な方向Ｖに沿って、２列に配置されている場合を具体例に挙げて説明したが、本発明はこれに限定されるものではない。 In this modification, as shown in FIG. 9B, the metal pads 23 are arranged in two rows in the pad arrangement region Rp along the direction V perpendicular to the extending direction P of the contact metal wiring 20B. However, the present invention is not limited to this.
　また、本変形例では、１コの金属パッド２３を含む領域の平面構成が、図９(b) に示すように、第１の実施形態における図２に示す構成と同様の場合を具体例に挙げて説明したが、本発明はこれに限定されるものではなく、例えば、第１の実施形態の変形例１における図４に示す構成と同様の場合でもよい。 Further, in the present modification, as a specific example, the planar configuration of the region including one metal pad 23 is the same as the configuration shown in FIG. 2 in the first embodiment as shown in FIG. 9B. Although described above, the present invention is not limited to this, and may be the same as the configuration shown in FIG. 4 in Modification 1 of the first embodiment, for example.
　また、本変形例では、図９(b) に示すように、５コの金属パッド２３の各々の下方にリング用金属配線２０Ａを設ける場合を具体例に挙げて説明したが、本発明はこれに限定されるものではない。例えば、５コの金属パッドのうち選択された金属パッドの下方のみにリング用金属配線を設けてもよい。 Further, in this modified example, as shown in FIG. 9B, the case where the ring metal wiring 20A is provided below each of the five metal pads 23 has been described as a specific example. It is not limited to. For example, the ring metal wiring may be provided only below the selected metal pad among the five metal pads.
　＜第１の実施形態の変形例６＞
　以下に、本発明の第１の実施形態の変形例６に係る半導体装置について、図１０を参照しながら説明する。図１０は、本発明の第１の実施形態の変形例６に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置における複数の金属パッドを含む領域の構成を示す平面図である。図１０において、第１の実施形態の変形例５における構成要素と同一の構成要素には、図９(b) に示す符号と同一の符号を付す。従って、本変形例では、第１の実施形態の変形例５と相違する点について説明する。 <Modification 6 of the first embodiment>
A semiconductor device according to Modification 6 of the first embodiment of the present invention will be described below with reference to FIG. FIG. 10 is a plan view showing a configuration of a semiconductor device according to Modification 6 of the first embodiment of the present invention, specifically, a plan view showing a configuration of a region including a plurality of metal pads in the semiconductor device. It is. In FIG. 10, the same reference numerals as those shown in FIG. 9B are assigned to the same constituent elements as those in the fifth modification of the first embodiment. Accordingly, in the present modification, differences from Modification 5 of the first embodiment will be described.
　ここで、本変形例と第１の実施形態の変形例５との相違点は、以下に示す点である。 Here, the difference between this modification and Modification 5 of the first embodiment is as follows.
　本変形例では、図１０に示すように、コンタクト用金属配線２０Ｂが延びる方向Ｐと垂直な方向Ｖに沿って隣接するリング用金属配線２０Ａ同士は、共通配線部２０Ａｖにより共通化されている。また、コンタクト用金属配線２０Ｂが延びる方向Ｐに沿って隣接するリング用金属配線２０Ａ同士は、共通配線部２０Ａｐにより共通化されている。 In this modification, as shown in FIG. 10, the ring metal wires 20A adjacent to each other along the direction V perpendicular to the direction P in which the contact metal wires 20B extend are shared by a common wiring portion 20Av. The ring metal wirings 20A adjacent to each other along the direction P in which the contact metal wiring 20B extends are shared by a common wiring portion 20Ap.
　これに対し、第１の実施形態の変形例５では、図９(b) に示すように、コンタクト用金属配線２０Ｂが延びる方向Ｐと垂直な方向Ｖに沿って隣り合うリング用金属配線２０Ａ同士は、間隔Ｗｖを空けて個別化されている。また、コンタクト用金属配線２０Ｂが延びる方向Ｐに沿って隣り合うリング用金属配線２０Ａ同士は、間隔Ｗｐを空けて個別化されている。 On the other hand, in Modification 5 of the first embodiment, as shown in FIG. 9B, the ring metal wirings 20A adjacent to each other along the direction V perpendicular to the direction P in which the contact metal wiring 20B extends. Are individualized with an interval Wv. Further, the ring metal wirings 20A adjacent to each other along the direction P in which the contact metal wiring 20B extends are individualized with an interval Wp.
　本変形例によると、第１の実施形態の変形例５と同様の効果を発揮できる。 According to this modification, the same effect as Modification 5 of the first embodiment can be exhibited.
　加えて、本変形例によると、デバイスチップＤに占めるリング用金属配線２０Ａの割合を、第１の実施形態の変形例５に比べて、小さくすることができるため、デバイスチップＤを縮小化することができる。 In addition, according to this modification, the proportion of the ring metal wiring 20A in the device chip D can be made smaller than that in the modification 5 of the first embodiment, and thus the device chip D is reduced. be able to.
　（第２の実施形態）
　以下に、本発明の第２の実施形態に係る半導体装置について、図１１及び図１２を参照しながら説明する。図１１は、本発明の第２の実施形態に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す平面図である。図１２は、本発明の第２の実施形態に係る半導体装置の構成を示す断面図であり、具体的には、図１１に示すXII-XII線における断面図である。なお、図１１及び図１２において、第１の実施形態における構成要素と同一の構成要素には、図２及び図３に示す符号と同一の符号を付す。従って、本実施形態では、第１の実施形態と相違する点について主に説明し、第１の実施形態と共通する点については説明を適宜省略する。 (Second Embodiment)
The semiconductor device according to the second embodiment of the present invention will be described below with reference to FIGS. FIG. 11 is a plan view showing a configuration of a semiconductor device according to the second embodiment of the present invention, and more specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device. FIG. 12 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment of the present invention, specifically, a cross-sectional view taken along line XII-XII shown in FIG. In FIG. 11 and FIG. 12, the same reference numerals as those shown in FIG. 2 and FIG. 3 are attached to the same constituent elements as those in the first embodiment. Therefore, in the present embodiment, points that differ from the first embodiment will be mainly described, and descriptions of points that are the same as those in the first embodiment will be omitted as appropriate.
　本実施形態では、図１１及び図１２に示すように、リング用金属配線２０Ａが、第１の実施形態と同様に、下地絶縁膜１７及び層間絶縁膜１８のうち、金属パッド２３の下方に位置する領域にリング状に設けられている。また、第２の開口部２４ａが、第１の実施形態と同様に、リング用金属配線２０Ａに囲まれた内側領域１８Ｉの上方に配置されている。また、コンタクト用金属配線２０Ｂは、第１の実施形態と同様に、リング用金属配線２０Ａに囲まれた内側領域１８Ｉに形成され、リング用金属配線２０Ａと離間して設けられている。ここで、コンタクト用金属配線２０Ｂの配置位置は、第１の実施形態と同様に、中央位置Ｃと第１配線部２０Ａ１との間で、且つ、中央位置Ｃよりも第１配線部２０Ａに近い位置であることが好ましい。 In the present embodiment, as shown in FIGS. 11 and 12, the ring metal wiring 20A is located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18, as in the first embodiment. It is provided in a ring shape in the area to be. Further, the second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A, as in the first embodiment. Similarly to the first embodiment, the contact metal wiring 20B is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A. Here, the arrangement position of the contact metal wiring 20B is between the central position C and the first wiring part 20A1 and closer to the first wiring part 20A than the central position C, as in the first embodiment. Preferably it is a position.
　ここで、本実施形態と第１の実施形態との相違点は、以下に示す点である。 Here, the difference between the present embodiment and the first embodiment is as follows.
　本実施形態における第１の開口部２１ａｅは、図１１及び図１２に示すように、コンタクト用金属配線２０Ｂ上のみに形成されている。これに対し、第１の実施形態における第１の開口部２１ａは、図３に示すように、コンタクト用金属配線２０Ｂ及び層間絶縁膜１８の上に形成されている。言い換えれば、本実施形態における金属パッド２３のコンタクト部２３Ｃｅは、その全下面がバリアメタル膜２２を介してコンタクト用金属配線２０Ｂと接している。これに対し、第１の実施形態における金属パッド２３のコンタクト部２３Ｃは、その一部下面がバリアメタル膜２２を介してコンタクト用金属配線２０Ｂと接している。 The first opening 21ae in the present embodiment is formed only on the contact metal wiring 20B as shown in FIGS. On the other hand, the first opening 21a in the first embodiment is formed on the contact metal wiring 20B and the interlayer insulating film 18, as shown in FIG. In other words, the entire bottom surface of the contact portion 23Ce of the metal pad 23 in this embodiment is in contact with the contact metal wiring 20B through the barrier metal film 22. On the other hand, the contact portion 23C of the metal pad 23 in the first embodiment is partially in contact with the contact metal wiring 20B through the barrier metal film 22.
　このように、本実施形態と第１の実施形態とは、金属パッド２３のコンタクト部と、コンタクト用金属配線２０Ｂとが接続する構成が異なる。 Thus, the present embodiment is different from the first embodiment in the configuration in which the contact portion of the metal pad 23 and the contact metal wiring 20B are connected.
　本実施形態によると、例えば、第２の開口部２４ａ内に露出する金属パッド２３にプローブ針を当てる、又は金属パッド２３にワイヤボンドを接続する際に、プローブ針又はワイヤボンドにより、金属パッド２３が削れてバリアメタル膜２２が割れ、金属パッド２３の削れ部分の下方に位置する第１の保護絶縁膜２１及び層間絶縁膜１８にクラックが発生し、クラック内に水分が進入することがあっても、リング用金属配線２０Ａにより、クラック内に進入した水分のうち特に横方向に拡散する水分が、リング用金属配線２０Ａに囲まれていない外側領域１８Ｏに拡散することを防止できる。 According to the present embodiment, for example, when a probe needle is applied to the metal pad 23 exposed in the second opening 24a or a wire bond is connected to the metal pad 23, the metal pad 23 is formed by the probe needle or the wire bond. As a result, the barrier metal film 22 is cracked, cracks are generated in the first protective insulating film 21 and the interlayer insulating film 18 located below the scraped portion of the metal pad 23, and moisture may enter the cracks. However, the ring metal wiring 20 </ b> A can prevent the moisture that has diffused into the crack, in particular in the lateral direction, from being diffused into the outer region 18 </ b> O that is not surrounded by the ring metal wiring 20 </ b> A.
　さらに、層間絶縁膜１８よりも耐湿性の高い下地絶縁膜１７により、クラック内に進入した水分のうち特に下方向に拡散する水分が、下地絶縁膜１７下の層間絶縁膜１６に拡散することを防止できる。 Further, the base insulating film 17 having a moisture resistance higher than that of the interlayer insulating film 18 allows moisture that diffuses in the downward direction among the water that has entered the crack to diffuse into the interlayer insulating film 16 below the base insulating film 17. Can be prevented.
　従って、側面がリング用金属配線２０Ａに囲まれ、底面が下地絶縁膜１７に囲まれた内側領域１８Ｉに水分を留めることができるため、金属パッド２３の近傍の配線の信頼性が低下することを防止できる。即ち、第１の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。 Accordingly, moisture can be retained in the inner region 18I whose side surface is surrounded by the ring metal wiring 20A and whose bottom surface is surrounded by the base insulating film 17, so that the reliability of the wiring in the vicinity of the metal pad 23 decreases. Can be prevented. That is, as in the first embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited.
　＜第２の実施形態の変形例＞
　以下に、本発明の第２の実施形態の変形例に係る半導体装置について、図１３及び図１４を参照しながら説明する。図１３は、本発明の第２の実施形態の変形例に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置における金属パッドを含む領域の構成を示す平面図である。図１４は、本発明の第２の実施形態の変形例に係る半導体装置の構成を示す断面図であり、具体的には、図１３に示すXIV-XIV線における断面図である。なお、図１３及び図１４において、第２の実施形態における構成要素と同一の構成要素には、図１１及び図１２に示す符号と同一の符号を付す。従って、本変形例では、第２の実施形態と相違する点について主に説明し、第２の実施形態と共通する点については説明を適宜省略する。 <Modification of Second Embodiment>
A semiconductor device according to a modification of the second embodiment of the present invention will be described below with reference to FIGS. FIG. 13 is a plan view showing a configuration of a semiconductor device according to a modification of the second embodiment of the present invention, specifically, a plan view showing a configuration of a region including a metal pad in the semiconductor device. FIG. 14 is a cross-sectional view showing a configuration of a semiconductor device according to a modified example of the second embodiment of the present invention, specifically, a cross-sectional view taken along line XIV-XIV shown in FIG. In FIG. 13 and FIG. 14, the same reference numerals as those shown in FIG. 11 and FIG. 12 are attached to the same constituent elements as those in the second embodiment. Therefore, in this modification, points different from the second embodiment will be mainly described, and descriptions of points that are common to the second embodiment will be omitted as appropriate.
　本変形例では、図１３及び図１４に示すように、リング用金属配線２０Ａが、第２の実施形態と同様に、下地絶縁膜１７及び層間絶縁膜１８のうち金属パッド２３の下方に位置する領域にリング状に設けられている。また、第２の開口部２４ａは、第２の実施形態と同様に、リング用金属配線２０Ａに囲まれた内側領域１８Ｉの上方に配置されている。 In this modification, as shown in FIGS. 13 and 14, the ring metal wiring 20 </ b> A is located below the metal pad 23 in the base insulating film 17 and the interlayer insulating film 18, as in the second embodiment. The region is provided with a ring shape. The second opening 24a is disposed above the inner region 18I surrounded by the ring metal wiring 20A, as in the second embodiment.
　ここで、本変形例と第２の実施形態との相違点は、以下に示す点である。 Here, the difference between the present modification and the second embodiment is as follows.
　本変形例におけるコンタクト用金属配線２０Ｂｆは、図１３及び図１４に示すように、リング用金属配線２０Ａに囲まれていない外側領域１８Ｏに形成され、リング用金属配線２０Ａと離間して設けられている。これに対し、第２の実施形態におけるコンタクト用金属配線２０Ｂは、図１１及び図１２に示すように、リング用金属配線２０Ａに囲まれた内側領域１８Ｉに形成され、リング用金属配線２０Ａと離間して設けられている。 As shown in FIGS. 13 and 14, the contact metal wiring 20Bf in this modification is formed in the outer region 18O not surrounded by the ring metal wiring 20A, and is provided apart from the ring metal wiring 20A. Yes. In contrast, as shown in FIGS. 11 and 12, the contact metal wiring 20B in the second embodiment is formed in the inner region 18I surrounded by the ring metal wiring 20A, and is separated from the ring metal wiring 20A. Is provided.
　なお、本変形例では、第１の開口部２１ａｆが、第２の実施形態と同様に、コンタクト用金属配線２０Ｂｆ上のみに形成されている。言い換えれば、金属パッド２３のコンタクト部２３Ｃｆは、その全下面がバリアメタル膜２２を介してコンタクト用金属配線２０Ｂｆと接している。 In this modification, the first opening 21af is formed only on the contact metal wiring 20Bf as in the second embodiment. In other words, the entire lower surface of the contact portion 23Cf of the metal pad 23 is in contact with the contact metal wiring 20Bf through the barrier metal film 22.
　このように、本変形例と第２の実施形態とでは、コンタクト用金属配線の配置位置が異なる。 Thus, the arrangement position of the contact metal wiring is different between the present modification and the second embodiment.
　本変形例によると、第２の実施形態と同様に、配線の信頼性低下の防止効果を発揮できる。 According to this modification, as in the second embodiment, the effect of preventing the reliability of the wiring from being lowered can be exhibited.
　なお、第１の実施形態及びその変形例１～６、並びに第２の実施形態及びその変形例では、本発明の目的を効果的に達成するために、リング用金属配線２０Ａの全てを、第２の保護絶縁膜２４（即ち、第２の開口部２４ａの外側に位置する領域）の下方に配置させる場合を具体例に挙げて説明したが、本発明はこれに限定されるものではない。例えば、リング用金属配線の一部のみを、第２の保護絶縁膜の下方に配置させても、本発明の目的を達成することは可能である。 In the first embodiment and its modifications 1 to 6 and the second embodiment and its modifications, in order to effectively achieve the object of the present invention, all of the ring metal wiring 20A is provided in the first embodiment. Although the case where the protective insulating film 24 is disposed below the second protective insulating film 24 (that is, the region located outside the second opening 24a) has been described as a specific example, the present invention is not limited thereto. For example, the object of the present invention can be achieved even if only a part of the ring metal wiring is disposed below the second protective insulating film.
　また、第１の実施形態及びその変形例１～６、並びに第２の実施形態及びその変形例では、リング用金属配線２０Ａの平面形状が、金属パッド２３の周縁に沿う形状（即ち、方形状）の場合を具体例に挙げて説明したが、本発明はこれに限定されるものではなく、例えば、円形、楕円形、又は多角形状でもよい。 Further, in the first embodiment and its modifications 1 to 6 and the second embodiment and its modifications, the planar shape of the ring metal wiring 20A is a shape along the periphery of the metal pad 23 (that is, a square shape). However, the present invention is not limited to this, and may be, for example, a circle, an ellipse, or a polygon.
　また、第１の実施形態及びその変形例１～６、並びに第２の実施形態及びその変形例では、層間絶縁膜１８にクラックを発生させる具体例として、プローブ検査時に金属パッド２３に当てるプローブ針、及び金属パッド２３に接続するワイヤボンドを例に挙げて説明したが、本発明はこれに限定されるものではない。 Further, in the first embodiment and its modifications 1 to 6, and in the second embodiment and its modifications, as a specific example of generating a crack in the interlayer insulating film 18, a probe needle applied to the metal pad 23 at the time of probe inspection The wire bond connected to the metal pad 23 has been described as an example, but the present invention is not limited to this.
　また、第１の実施形態及びその変形例１～６、並びに第２の実施形態及びその変形例では、金属パッド２３上に、第２の保護絶縁膜２４を形成する場合を具体例に挙げて説明したが、本発明はこれに限定されるものではなく、金属パッド上に、第２の保護絶縁膜を形成しなくてもよい。 Further, in the first embodiment and its modifications 1 to 6 and the second embodiment and its modifications, the case where the second protective insulating film 24 is formed on the metal pad 23 is taken as a specific example. Although described, the present invention is not limited to this, and the second protective insulating film may not be formed on the metal pad.
　また、第１の実施形態及びその変形例１～６、並びに第２の実施形態及びその変形例では、リング用金属配線２０Ａの他に、下地絶縁膜１５及び層間絶縁膜１６のうち金属パッド２３の下方に位置する領域に、リング用金属配線をさらに設けてもよい。この場合、仮に層間絶縁膜１６にクラックが発生し、クラック内に水分が進入することがあっても、層間絶縁膜１６のうちリング用金属配線に囲まれた領域内に水分を留めて、該領域外に水分が拡散することを防止できる。 In the first embodiment and its modifications 1 to 6 and the second embodiment and its modifications, in addition to the ring metal wiring 20A, the metal pad 23 of the base insulating film 15 and the interlayer insulating film 16 is used. A ring metal wiring may be further provided in a region located below the ring. In this case, even if a crack occurs in the interlayer insulating film 16 and moisture may enter the crack, the moisture is retained in the region surrounded by the ring metal wiring in the interlayer insulating film 16, It is possible to prevent moisture from diffusing outside the region.
　（その他の実施形態）
　以下に、本発明のその他の実施形態に係る半導体装置について、図１５を参照しながら説明する。図１５は、本発明のその他の実施形態に係る半導体装置の構成を示す平面図であり、具体的には、半導体装置における複数の金属パッドを含む領域の構成を示す平面図である。なお、図１５において、第１の実施形態の変形例５における構成要素と同一の構成要素には、図９(b) に示す符号と同一の符号を付す。従って、本実施形態では、第１の実施形態の変形例５と相違する点について説明する。 (Other embodiments)
A semiconductor device according to another embodiment of the present invention will be described below with reference to FIG. FIG. 15 is a plan view showing a configuration of a semiconductor device according to another embodiment of the present invention. Specifically, FIG. 15 is a plan view showing a configuration of a region including a plurality of metal pads in the semiconductor device. In FIG. 15, the same components as those in the modification 5 of the first embodiment are denoted by the same reference numerals as those shown in FIG. 9B. Therefore, in the present embodiment, points that are different from Modification 5 of the first embodiment will be described.
　本実施形態では、１コのリング用金属配線２０Ｘが、図１５に示すように、５コの金属パッド２３群を囲うように設けられている。これに対し、第１の実施形態の変形例５では、５コのリング用金属配線２０Ａが、図９(b) に示すように、５コの金属パッド２３の各々の下方に設けられ、５コの金属パッド２３の各々を囲うように設けられている。即ち、本実施形態におけるリング用金属配線２０Ｘの囲う範囲は、図１５に示すように、５コの金属パッド２３群を含む範囲である。これに対し、第１の実施形態の変形例５におけるリング用金属配線２０Ａの囲う範囲は、１コの金属パッド２３を含む範囲である。 In this embodiment, one ring metal wiring 20X is provided so as to surround five metal pads 23 as shown in FIG. On the other hand, in Modification 5 of the first embodiment, five ring metal wirings 20A are provided below each of the five metal pads 23 as shown in FIG. 9B. It is provided so as to surround each of the metal pads 23. That is, the range surrounded by the ring metal wiring 20X in the present embodiment is a range including five metal pads 23 as shown in FIG. On the other hand, the range surrounded by the ring metal wiring 20 </ b> A in the modification 5 of the first embodiment is a range including one metal pad 23.
　このように、本実施形態と第１の実施形態の変形例５とは、リング用金属配線の囲う範囲が異なる。 As described above, the present embodiment and the fifth modification of the first embodiment are different in the range surrounded by the ring metal wiring.
　ここで、コンタクト用金属配線２０Ｂの延びる方向Ｐと垂直な方向Ｖに沿って隣り合うリング用金属配線２０Ｘ同士は、図１５に示すように、共通配線部２０Ｘｖにより共通化されている。また、図１５から判るように、図１５に示す構成から１コのリング用金属配線２０Ｘを除いた構成は、第１の実施形態の変形例５における図９(b) に示す構成から５コのリング用金属配線２０Ａを除いた構成と同様である。 Here, the ring metal wirings 20X adjacent to each other along the direction V perpendicular to the extending direction P of the contact metal wiring 20B are shared by a common wiring portion 20Xv as shown in FIG. Further, as can be seen from FIG. 15, the structure shown in FIG. 15 excluding one ring metal wiring 20X is five parts from the structure shown in FIG. 9B in the modification 5 of the first embodiment. This is the same as the configuration excluding the ring metal wiring 20A.
　なお、本実施形態では、リング用金属配線２０Ｘが囲う金属パッド２３群の個数が５コの場合を具体例に挙げて説明したが、本発明はこれに限定されるものではない。 In the present embodiment, the case where the number of the metal pad 23 group surrounded by the ring metal wiring 20X is five has been described as a specific example, but the present invention is not limited to this.
　本発明は、金属パッドの近傍の配線の信頼性が低下することを防止できるため、金属パッドを備えた半導体装置に有用である。 The present invention is useful for a semiconductor device provided with a metal pad because it can prevent the reliability of the wiring near the metal pad from being lowered.
　Ｄ　　デバイスチップ
　Ｒｅ　　素子形成領域
　Ｒｐ　　パッド配置領域
　ｒｐ　　金属パッドを含む領域
　ｒｐｐ　　複数の金属パッドを含む領域
　１０　　半導体基板
　１１，１３，１６，１８　　層間絶縁膜
　１２，１５，１７　　下地絶縁膜
　１４Ａ，１４Ｂ　　金属配線
　１４ｒｅ　　信号配線
　１４ｂ，１４ｄ　　接続用金属配線
　１９　　ビアプラグ
　１９ｒｅ　　ビアプラグ
　１９ｂ，１９ｄ　　ビアプラグ
　２０Ａ　　リング用金属配線
　２０Ａ１　　第１配線部
　２０Ａ２　　第２配線部
　２０Ａｖ，２０Ａｐ　　共通配線部
　２０Ｂ，２０Ｂａ，２０Ｂｆ　　コンタクト用金属配線
　２０ｒｅ　　信号配線
　２０ｃ　　接続用金属配線
　２０Ｘ　　リング用金属配線
　２０Ｘｖ　　共通配線部
　２１　　第１の保護絶縁膜
　２１ａ，２１ａｅ，２１ａｆ　　第１の開口部
　２２　　バリアメタル膜
　２３　　金属パッド
　２３Ｃ，２３Ｃｅ，２３Ｃｆ　　コンタクト部
　２４　　第２の保護絶縁膜
　２４ａ　第２の開口部
　１８Ｉ　　内側領域
　１８Ｏ　　外側領域
　Ｐｄ　　段差部分
　Ｐｅ　　角部部分
　Ｃ　　中央位置
　Ｘ，Ｙ　　側面位置
　Ｗ20A，Ｗ20B　　配線幅
　Ｐ，Ｖ　　方向
　Ｗｖ，Ｗｐ　　間隔 D device chip Re element formation region Rp pad arrangement region rp region including metal pad rpp region including a plurality of metal pads 10 semiconductor substrate 11, 13, 16, 18 interlayer insulating film 12, 15, 17 base insulating film 14A, 14B metal Wiring 14re Signal wiring 14b, 14d Connection metal wiring 19 Via plug 19re Via plug 19b, 19d Via plug 20A Ring metal wiring 20A1 First wiring section 20A2 Second wiring section 20Av, 20Ap Common wiring section 20B, 20Ba, 20Bf Metal wiring for contact 20re Signal wiring 20c Metal wiring for connection 20X Metal wiring for ring 20Xv Common wiring part 21 First protective insulating film 21a, 21ae, 21af First opening part 22 Barrier metal film 23 Metal pad 23C, 23C , 23Cf Contact portion 24 Second protective insulating film 24a Second opening 18I Inner region 18O Outer region Pd Stepped portion Pe Corner portion C Center position X, Y Side surface position W20A, W20B Wiring width P, V direction Wv, Wp interval

Claims (15)

  1. 　半導体基板上に形成された層間絶縁膜と、
    　前記層間絶縁膜を貫通して設けられたリング用金属配線と、
    　前記層間絶縁膜を貫通して設けられたコンタクト用金属配線と、
    　前記層間絶縁膜上及び前記リング用金属配線の全上面上に形成された第１の保護絶縁膜と、
    　前記第１の保護絶縁膜上に形成された金属パッドとを備え、
    　前記リング用金属配線は、前記層間絶縁膜のうち前記金属パッドの下方に位置する領域にリング状に設けられており、
    　前記金属パッドは、前記第１の保護絶縁膜に形成された第１の開口部を通じて前記コンタクト用金属配線に接続されていることを特徴とする半導体装置。     An interlayer insulating film formed on the semiconductor substrate;
    Ring metal wiring provided through the interlayer insulating film;
    Metal wiring for contact provided through the interlayer insulating film;
    A first protective insulating film formed on the interlayer insulating film and on the entire upper surface of the ring metal wiring;
    A metal pad formed on the first protective insulating film,
    The ring metal wiring is provided in a ring shape in a region located below the metal pad in the interlayer insulating film,
    The semiconductor device, wherein the metal pad is connected to the contact metal wiring through a first opening formed in the first protective insulating film.
  2. 　請求項１に記載の半導体装置において、
    　前記層間絶縁膜下に形成された下地絶縁膜をさらに備え、
    　前記下地絶縁膜は、前記層間絶縁膜に比べて耐湿性が高いことを特徴とする半導体装置。     The semiconductor device according to claim 1,
    A base insulating film formed under the interlayer insulating film;
    The semiconductor device according to claim 1, wherein the base insulating film has higher moisture resistance than the interlayer insulating film.
  3. 　請求項２に記載の半導体装置において、
    　前記下地絶縁膜は、窒化物絶縁膜からなることを特徴とする半導体装置。     The semiconductor device according to claim 2,
    The semiconductor device according to claim 1, wherein the base insulating film is made of a nitride insulating film.
  4. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線の配線幅は、前記リング用金属配線の配線幅と同等、又はそれ以上の大きさを有することを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The semiconductor device according to claim 1, wherein a wiring width of the contact metal wiring is equal to or greater than a wiring width of the ring metal wiring.
  5. 　請求項１に記載の半導体装置において、
    　前記金属パッド上に形成された第２の保護絶縁膜をさらに備え、
    　前記第２の保護絶縁膜に形成された第２の開口部は、前記金属パッド上に形成され、且つ、前記リング用金属配線に囲まれた内側領域の上方に配置されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    A second protective insulating film formed on the metal pad;
    The second opening formed in the second protective insulating film is formed on the metal pad and disposed above an inner region surrounded by the ring metal wiring. Semiconductor device.
  6. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線及び前記リング用金属配線は、銅配線からなることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The contact metal wiring and the ring metal wiring are made of copper wiring.
  7. 　請求項１に記載の半導体装置において、
    　前記金属パッドは、アルミパッドからなることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The semiconductor device is characterized in that the metal pad is made of an aluminum pad.
  8. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線は、前記リング用金属配線のうち対向する第１配線部と第２配線部との間の中央位置と前記第１配線部との間で、且つ、前記中央位置よりも前記第１配線部に近い位置に配置されており、前記中央位置と前記第２配線部との間には配置されていないことを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The contact metal wiring is between the first wiring portion and the first wiring portion between the first wiring portion and the second wiring portion facing each other in the ring metal wiring, and more than the central position. A semiconductor device, wherein the semiconductor device is disposed at a position close to the first wiring portion and is not disposed between the central position and the second wiring portion.
  9. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線は、前記リング用金属配線に囲まれた内側領域に、前記リング用金属配線から離間して設けられており、
    　前記第１の開口部は、前記コンタクト用金属配線及び前記層間絶縁膜の上に形成されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The contact metal wiring is provided in an inner region surrounded by the ring metal wiring, separated from the ring metal wiring,
    The semiconductor device according to claim 1, wherein the first opening is formed on the contact metal wiring and the interlayer insulating film.
  10. 　請求項９に記載の半導体装置において、
    　前記第１の開口部は、その内部に前記コンタクト用金属配線の全上面が露出するように形成されていることを特徴とする半導体装置。     The semiconductor device according to claim 9.
    The semiconductor device according to claim 1, wherein the first opening is formed so that the entire upper surface of the contact metal wiring is exposed therein.
  11. 　請求項９に記載の半導体装置において、
    　前記第１の開口部は、その内部に前記コンタクト用金属配線の一部上面が露出するように形成されていることを特徴とする半導体装置。     The semiconductor device according to claim 9.
    The semiconductor device according to claim 1, wherein the first opening is formed so that a partial upper surface of the contact metal wiring is exposed therein.
  12. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線は、前記リング用金属配線に囲まれた内側領域に、前記リング用金属配線から離間して設けられており、
    　前記第１の開口部は、前記コンタクト用金属配線上のみに形成されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The contact metal wiring is provided in an inner region surrounded by the ring metal wiring, separated from the ring metal wiring,
    The semiconductor device according to claim 1, wherein the first opening is formed only on the contact metal wiring.
  13. 　請求項１に記載の半導体装置において、
    　前記コンタクト用金属配線は、前記リング用金属配線に囲まれていない外側領域に、前記リング用金属配線から離間して設けられており、
    　前記第１の開口部は、前記コンタクト用金属配線上のみに形成されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The contact metal wiring is provided in an outer region not surrounded by the ring metal wiring and is separated from the ring metal wiring,
    The semiconductor device according to claim 1, wherein the first opening is formed only on the contact metal wiring.
  14. 　請求項１に記載の半導体装置において、
    　前記リング用金属配線は、電源配線に接続されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The ring metal wiring is connected to a power supply wiring.
  15. 　請求項１に記載の半導体装置において、
    　前記リング用金属配線は、前記金属パッドに接続されていることを特徴とする半導体装置。     The semiconductor device according to claim 1,
    The ring metal wiring is connected to the metal pad.
PCT/JP2009/003510 2008-10-10 2009-07-24 Semiconductor device WO2010041365A1 (en)

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