WO2010039257A1 - Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels - Google Patents

Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels Download PDF

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Publication number
WO2010039257A1
WO2010039257A1 PCT/US2009/005437 US2009005437W WO2010039257A1 WO 2010039257 A1 WO2010039257 A1 WO 2010039257A1 US 2009005437 W US2009005437 W US 2009005437W WO 2010039257 A1 WO2010039257 A1 WO 2010039257A1
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WIPO (PCT)
Prior art keywords
bit interleaver
snr
erasure
decoding threshold
determining
Prior art date
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Ceased
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PCT/US2009/005437
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English (en)
French (fr)
Inventor
Jing LEI
Wen Gao
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Thomson Licensing SAS
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Thomson Licensing SAS
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Publication date
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
Priority to EP09741488.2A priority Critical patent/EP2329602B1/en
Priority to US12/998,270 priority patent/US8677219B2/en
Priority to CN200980139687.4A priority patent/CN102292917B/zh
Priority to JP2011530058A priority patent/JP5584219B2/ja
Priority to BRPI0919542A priority patent/BRPI0919542A2/pt
Publication of WO2010039257A1 publication Critical patent/WO2010039257A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/251Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with block coding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2757Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356Unequal error protection [UEP]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]

Definitions

  • processor or “controller” should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (“DSP”) hardware, read-only memory (“ROM”) for storing software, random access memory (“RAM”), and non-volatile storage.
  • DSP digital signal processor
  • ROM read-only memory
  • RAM random access memory

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
PCT/US2009/005437 2008-10-03 2009-10-02 Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels Ceased WO2010039257A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP09741488.2A EP2329602B1 (en) 2008-10-03 2009-10-02 Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels
US12/998,270 US8677219B2 (en) 2008-10-03 2009-10-02 Method and apparatus for adapting a bit interleaver to LDPC codes and modulations under AWGN channel conditions using binary erasure surrogate channels
CN200980139687.4A CN102292917B (zh) 2008-10-03 2009-10-02 利用二元删除替代信道在awgn信道条件下将比特交织器适配于ldpc码和调制的方法和装置
JP2011530058A JP5584219B2 (ja) 2008-10-03 2009-10-02 2元消失サロゲート・チャネルを用いたawgnチャネル条件下でビット・インタリーバをldpc符号および変調に適合させる方法および装置
BRPI0919542A BRPI0919542A2 (pt) 2008-10-03 2009-10-02 método e aparelho para adaptação de um intercalador de bits em códigos ldpc e modulações sob condições de canal awgn usando canais substitutos de emenda binária

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10251708P 2008-10-03 2008-10-03
US61/102,517 2008-10-03
US19688908P 2008-10-21 2008-10-21
US61/196,889 2008-10-21

Publications (1)

Publication Number Publication Date
WO2010039257A1 true WO2010039257A1 (en) 2010-04-08

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PCT/US2009/005437 Ceased WO2010039257A1 (en) 2008-10-03 2009-10-02 Method and apparatus for adapting a bit interleaver to ldpc codes and modulations under awgn channel conditions using binary erasure surrogate channels

Country Status (7)

Country Link
US (1) US8677219B2 (enExample)
EP (1) EP2329602B1 (enExample)
JP (1) JP5584219B2 (enExample)
KR (1) KR101630442B1 (enExample)
CN (1) CN102292917B (enExample)
BR (1) BRPI0919542A2 (enExample)
WO (1) WO2010039257A1 (enExample)

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EP2879295A4 (en) * 2012-07-27 2015-07-08 Panasonic Corp TRANSMISSION PROCEDURES, RECEIVING METHODS, TRANSMITTERS AND RECEIVERS
JP2016123106A (ja) * 2011-05-18 2016-07-07 パナソニック株式会社 並列ビットインターリーバ
JP2016136753A (ja) * 2011-05-18 2016-07-28 パナソニック株式会社 並列ビットインターリーバ

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JP2016123106A (ja) * 2011-05-18 2016-07-07 パナソニック株式会社 並列ビットインターリーバ
JP2016136753A (ja) * 2011-05-18 2016-07-28 パナソニック株式会社 並列ビットインターリーバ
JP2017085629A (ja) * 2011-05-18 2017-05-18 パナソニック株式会社 並列ビットインターリーバ
JP2017085626A (ja) * 2011-05-18 2017-05-18 パナソニック株式会社 並列ビットインターリーバ
JP2021048602A (ja) * 2011-05-18 2021-03-25 パナソニック株式会社 並列ビットインターリーバ
JP6999010B2 (ja) 2011-05-18 2022-01-18 パナソニック株式会社 並列ビットインターリーバ
EP2690790A1 (en) * 2012-07-27 2014-01-29 Panasonic Corporation Bit interleaving for rotated constellations with quasi-cyclic LDPC codes
EP2879295A4 (en) * 2012-07-27 2015-07-08 Panasonic Corp TRANSMISSION PROCEDURES, RECEIVING METHODS, TRANSMITTERS AND RECEIVERS
CN103023618A (zh) * 2013-01-11 2013-04-03 北京邮电大学 一种任意码长的极化编码方法

Also Published As

Publication number Publication date
KR101630442B1 (ko) 2016-06-24
EP2329602B1 (en) 2015-03-11
CN102292917A (zh) 2011-12-21
US8677219B2 (en) 2014-03-18
JP2012504903A (ja) 2012-02-23
EP2329602A1 (en) 2011-06-08
KR20110082032A (ko) 2011-07-15
US20110182345A1 (en) 2011-07-28
BRPI0919542A2 (pt) 2015-12-08
CN102292917B (zh) 2015-08-26
JP5584219B2 (ja) 2014-09-03

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