WO2009153094A1 - Arrangement for decoupling stress in a substrate with a chip - Google Patents

Arrangement for decoupling stress in a substrate with a chip Download PDF

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Publication number
WO2009153094A1
WO2009153094A1 PCT/EP2009/055101 EP2009055101W WO2009153094A1 WO 2009153094 A1 WO2009153094 A1 WO 2009153094A1 EP 2009055101 W EP2009055101 W EP 2009055101W WO 2009153094 A1 WO2009153094 A1 WO 2009153094A1
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WIPO (PCT)
Prior art keywords
substrate
chip
arrangement according
chip area
recess
Prior art date
Application number
PCT/EP2009/055101
Other languages
German (de)
French (fr)
Inventor
Christoph Brueggenolte
Axel Franke
Sonja Knies
Original Assignee
Robert Bosch Gmbh
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Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO2009153094A1 publication Critical patent/WO2009153094A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09081—Tongue or tail integrated in planar structure, e.g. obtained by cutting from the planar structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10083—Electromechanical or electro-acoustic component, e.g. microphone
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10151—Sensor

Definitions

  • the invention relates to an arrangement for stress decoupling in a substrate, in particular in a printed circuit board, with a chip according to the preamble of
  • AMT electronic assembly and connection technology
  • COB chip on board
  • thermo-mechanical stresses is a problem that jeopardizes the reliability of the entire structure.
  • thermo-mechanical stresses or stress the different thermal
  • One approach to reducing stress is to match the expansion coefficients of the respective materials by suitable choice of material so that the difference of the expansion coefficients as low as possible. In practice, however, there is no sufficient, satisfactory combination of material selection, especially in multi-layered structures.
  • the chip has a mechanical connection to the substrate in all lateral directions, since the trench-shaped structure runs around the chip only partially or partially vertically into the substrate layer. Consequently, despite the trench-shaped structure, there is no substantial mechanical decoupling of the chip from the rest of the substrate.
  • the inventive arrangement of a substrate with a chip has the advantage that a substantial stress decoupling of the chip is achieved by the substrate. This feature is made possible by the features of claim 1. By the measure that a recess is provided around the chip, which extends vertically through the entire thickness of the substrate, a complete thermo-mechanical decoupling of the chip from the rest of the substrate is achieved at these locations. The arrangement thus allows to provide a stress-decoupled "chip on board" structure.
  • FIG. 1 shows a first exemplary embodiment of the arrangement according to the invention of a substrate with a chip area in plan view, with cutouts running laterally around the chip area up to the edge of the substrate,
  • FIG. 2 shows a second exemplary embodiment of the arrangement according to the invention of a substrate with a chip area in plan view, wherein a recess around the chip area is enclosed laterally within the substrate,
  • Figure 3 shows a third embodiment of the inventive arrangement of a substrate with a chip area in plan view, wherein a recess around the
  • Chip area extends laterally to the edge of the substrate and chip area is suspended only on a spring structure on the substrate, and
  • Figure 4 shows a fourth embodiment of the inventive arrangement of a substrate with a chip area in plan view, wherein a recess around the
  • the chip area is enclosed laterally within the substrate and the chip area is suspended from the substrate only via a spring structure.
  • An arrangement for stress decoupling in a substrate, in particular in a printed circuit board, with at least one chip is proposed, wherein the chip is arranged on a chip area of the substrate and at least one recess is provided around the chip area in the substrate. It runs the
  • the substrate 5 is formed by a printed circuit board.
  • the chip 10 is arranged on a region of the substrate provided for the chip, the chip area 15. Since the recesses 20 run vertically around the chip area 15 through the entire thickness of the substrate 5, the chip 10 is completely decoupled mechanically from the rest of the substrate 5 at these locations. Consequently, a thermal-mechanical stress between the chip area 15 and the rest of the substrate 5 is completely suppressed.
  • the width of the recess 20 is advantageously at least as large as the width of the chip 10th
  • the recesses 20 extend laterally to the edge 25 of the substrate 5. This configuration has an advantage if the recesses 20 are produced by e.g. should be generated from the edge 25 of the substrate 5.
  • the chip area 15 has at least three mutually perpendicular sides 30a, 30b, 30c in lateral directions, which are each separated mechanically from the substrate 5. This results in the area surrounded by recesses 20 chip area 15 has a rectangular shape. This clear shape facilitates easy production of the chip area 15 surrounded by recesses 20.
  • the chip area 15 in FIG. 1 is formed by a cantilever beam.
  • a mechanical connection of the chip area 15 with the rest of the substrate 5 is given only on the clamped side of the beam. This self-supporting structure allows a substantial mechanical decoupling between the chip area 15 and the rest of the substrate 5.
  • the arrangement according to the invention is particularly suitable for such cases when the chip 10 comprises micromechanical sensors.
  • Micromechanical components or ME MS components are very sensitive to thermo-mechanical stresses and therefore require corresponding ones Measures for stress decoupling of the chip 10 from the rest of the substrate 5. Thanks to the measures described can also be achieved an improvement in the accuracy of the chip 5 in terms of its measurement and signal processing by reducing disturbing influences.
  • At least one electrical contacting point 45 is provided on the substrate 5 outside the chip area 15.
  • the electrical Kunststoffierstelle 45 is electrically connected to the chip 10 via an electrical line 50.
  • the substrate 5 is provided with the same features as in the first embodiment except for the
  • This embodiment can provide a mechanically stable substrate 5 over the first embodiment, since all edge regions of the substrate 5 still present are.
  • the substrate 5 is provided with the same features as in the first exemplary embodiment except for the difference that the chip area 15 is suspended on the substrate 5 only via a spring structure 35.
  • the connection region between the chip region 15 and the rest of the substrate 5 has additional recesses and thus a spring structure 35 is formed.
  • the additional recesses further reduce the thermo-mechanical coupling.
  • the spring structure 35 itself has an inner self-contained recess 40.
  • the spring structure 35 may have a meandering shape.
  • a plurality of spring structures 35 for suspending a chip area 15 on the substrate 5 may be provided.
  • a two- or four-sided suspension of the chip area 15 with two or four spring structures 35 advantageously for reasons of symmetry.
  • the resulting eigenmodes do not lie in areas that are critical for the application. This is particularly important in sensors in which the chip has 10 movable elements.

Abstract

An arrangement for decoupling stress in a substrate (5), particularly in a printed circuit board, is proposed, wherein at least one chip (10) is provided. The chip (10) is arranged on a chip area (15) of the substrate (5). In addition, at least one cutout (20) is provided around the chip area (15) in a substrate (5). In this case, the cutout (20) runs vertically through the entire thickness of the substrate (5).

Description

Anordnung zur Stressentkopplung bei einem Substrat mit einem Chip Arrangement for stress decoupling in a substrate with a chip
Stand der TechnikState of the art
Die Erfindung betrifft eine Anordnung zur Stressentkopplung bei einem Substrat, insbesondere bei einer Leiterplatte, mit einem Chip gemäß dem Oberbegriff desThe invention relates to an arrangement for stress decoupling in a substrate, in particular in a printed circuit board, with a chip according to the preamble of
Anspruchs 1.Claim 1.
In der elektronischen Aufbau- und Verbindungstechnik (AVT) ist es bekannt, einen Chip auf einem Substrat, beispielsweise auf einer Leiterplatte, zu montieren. Dabei ist eine sichere und feste Verbindung zwischen dem Chip und dem Substrat zu gewährleisten. Verschiedene Techniken, die in vielen Fällen auch miteinander kombiniert werden können, sind hierfür entwickelt worden. So können die Chips bei sogenannten „Chip on Board"-Aufbauten (COB) mittels „Flip Chip"- Technik auf das Substrat gelötet werden. Auch ist der Vorgang bekannt, dabei die Chips ganz oder teilweise mit einer Moldmasse zu umhüllen.In electronic assembly and connection technology (AVT), it is known to mount a chip on a substrate, for example on a printed circuit board. In this case, a secure and firm connection between the chip and the substrate is to be ensured. Various techniques, which in many cases can be combined with each other, have been developed for this purpose. Thus, the chips can be soldered to the substrate in so-called "chip on board" (COB) structures by means of "flip-chip" technology. Also, the process is known to wrap the chips wholly or partially with a molding compound.
In allen bekannten Techniken ist jedoch das Auftreten von thermomechanischen Spannungen eine Problematik, die die Zuverlässigkeit des gesamten Aufbaus gefährdet. Als eine Hauptursache für das Auftreten von thermomechanischen Spannungen bzw. Stress werden die unterschiedlichen thermischenIn all known techniques, however, the occurrence of thermo-mechanical stresses is a problem that jeopardizes the reliability of the entire structure. As a major cause of the occurrence of thermo-mechanical stresses or stress, the different thermal
Ausdehnungskoeffizienten der am Aufbau beteiligten Materialien angesehen.Expansion coefficients considered the materials involved in the construction.
Ein Ansatz zur Stressreduzierung besteht darin, durch geeignete Materialauswahl die Ausdehnungskoeffizienten der jeweiligen Materialen so aufeinander abzustimmen, dass der Unterschied der Ausdehnungskoeffizienten möglichst gering wird. In der Praxis jedoch besteht keine ausreichende, zufriedenstellende Kombinationsmöglichkeit der Materialauswahl, insbesondere bei mehrschichtigen Aufbauten.One approach to reducing stress is to match the expansion coefficients of the respective materials by suitable choice of material so that the difference of the expansion coefficients as low as possible. In practice, however, there is no sufficient, satisfactory combination of material selection, especially in multi-layered structures.
Ein anderer Ansatz sieht vor, im Aufbau Aussparungen zur Stressreduzierung vorzusehen. So wird beispielsweise in DE 103 23 296 Al vorgeschlagen, zur Stressreduzierung bei substratbasierten Chip-Packages grabenförmige Strukturen ins Substrat einzubringen, die den Chip zumindest umgrenzen, um den thermisch bedingten mechanischen Stress im Substrat zu unterbrechen bzw. zu verlagern. Gemäß der Schrift wird dadurch eine wirksame Verringerung derAnother approach is to provide recesses in the structure to reduce stress. For example, in DE 103 23 296 A1 it is proposed to introduce trench-shaped structures into the substrate for stress reduction in the case of substrate-based chip packages which at least delimit the chip in order to interrupt or displace the thermally induced mechanical stress in the substrate. According to the document thereby an effective reduction of
Stresseinkopplung des Chips auf das Substrat erreicht.Stresseinkopplung the chip reaches the substrate.
Jedoch hat der Chip in der vorgeschlagenen Anordnung in allen lateralen Richtungen eine mechanische Verbindung zum Substrat, da die grabenförmige Struktur um den Chip nur ansatz- bzw. teilweise vertikal in die Substratschicht hinein verläuft. Folglich liegt trotz der grabenförmigen Struktur eine weitgehende mechanische Entkopplung des Chips vom Rest des Substrats nicht vor.However, in the proposed arrangement, the chip has a mechanical connection to the substrate in all lateral directions, since the trench-shaped structure runs around the chip only partially or partially vertically into the substrate layer. Consequently, despite the trench-shaped structure, there is no substantial mechanical decoupling of the chip from the rest of the substrate.
Vorteile der ErfindungAdvantages of the invention
Die erfindungsgemäße Anordnung eines Substrates mit einem Chip hat den Vorteil, dass eine weitgehende Stressentkopplung des Chips vom Substrat erzielt wird. Ermöglicht wird diese Wirkung durch die Merkmale des Anspruchs 1. Durch die Maßnahme, dass eine Aussparung um den Chip vorgesehen ist, die vertikal durch die gesamte Dicke des Substrates verläuft, wird an diesen Stellen eine komplette thermomechanische Abkopplung des Chips vom Rest des Substrates erreicht. Die Anordnung ermöglicht so, einen stressentkoppelten "Chip on Board"-Aufbau bereitzustellen.The inventive arrangement of a substrate with a chip has the advantage that a substantial stress decoupling of the chip is achieved by the substrate. This feature is made possible by the features of claim 1. By the measure that a recess is provided around the chip, which extends vertically through the entire thickness of the substrate, a complete thermo-mechanical decoupling of the chip from the rest of the substrate is achieved at these locations. The arrangement thus allows to provide a stress-decoupled "chip on board" structure.
Vorteilhafte Weiterbildungen der Erfindung sind in den Unteransprüchen angegeben und in der Beschreibung beschrieben. ZeichnungAdvantageous developments of the invention are specified in the subclaims and described in the description. drawing
Ausführungsbeispiele der Erfindung werden anhand der Zeichnungen und der nachfolgenden Beschreibung näher erläutert. Es zeigen:Embodiments of the invention will be explained in more detail with reference to the drawings and the description below. Show it:
Figur 1 ein erstes Ausführungsbeispiel der erfindungsgemäßen Anordnung eines Substrates mit einem Chip- Bereich in Draufsicht, wobei Aussparungen um den Chip-Bereich lateral bis zum Rand des Substrates verlaufen,FIG. 1 shows a first exemplary embodiment of the arrangement according to the invention of a substrate with a chip area in plan view, with cutouts running laterally around the chip area up to the edge of the substrate,
Figur 2 ein zweites Ausführungsbeispiel der erfindungsgemäßen Anordnung eines Substrates mit einem Chip- Bereich in Draufsicht, wobei eine Aussparung um den Chip-Bereich lateral eingeschlossen ist innerhalb des Substrates,FIG. 2 shows a second exemplary embodiment of the arrangement according to the invention of a substrate with a chip area in plan view, wherein a recess around the chip area is enclosed laterally within the substrate,
Figur 3 ein drittes Ausführungsbeispiel der erfindungsgemäßen Anordnung eines Substrates mit einem Chip-Bereich in Draufsicht, wobei eine Aussparung um denFigure 3 shows a third embodiment of the inventive arrangement of a substrate with a chip area in plan view, wherein a recess around the
Chip-Bereich lateral bis zum Rand des Substrates verläuft und Chip-Bereich nur über eine Federstruktur am Substrat aufgehängt ist, undChip area extends laterally to the edge of the substrate and chip area is suspended only on a spring structure on the substrate, and
Figur 4 ein viertes Ausführungsbeispiel der erfindungsgemäßen Anordnung eines Substrates mit einem Chip-Bereich in Draufsicht, wobei eine Aussparung um denFigure 4 shows a fourth embodiment of the inventive arrangement of a substrate with a chip area in plan view, wherein a recess around the
Chip-Bereich lateral eingeschlossen ist innerhalb des Substrates und der Chip- Bereich nur über eine Federstruktur am Substrat aufgehängt ist.The chip area is enclosed laterally within the substrate and the chip area is suspended from the substrate only via a spring structure.
Beschreibung der AusführungsbeispieleDescription of the embodiments
Es wird eine Anordnung zur Stressentkopplung bei einem Substrat, insbesondere bei einer Leiterplatte, mit mindestens einem Chip vorgeschlagen, wobei der Chip auf einem Chip-Bereich des Substrates angeordnet ist und mindestens eine Aussparung um den Chip-Bereich im Substrat vorgesehen ist. Dabei verläuft dieAn arrangement for stress decoupling in a substrate, in particular in a printed circuit board, with at least one chip is proposed, wherein the chip is arranged on a chip area of the substrate and at least one recess is provided around the chip area in the substrate. It runs the
Aussparung erfindungsgemäß vertikal durch die gesamte Dicke des Substrates. Die Tiefe der Aussparung entspricht also mindestens der Dicke des Substrates. Die Erzeugung der Aussparungen kann je nach Dicke, Fläche und Material des Substrates durch Ätzen, Fräsen, Lasern oder Bohren erfolgen. Ein erstes Ausführungsbeispiel wird nun gemäß der in Fig. 1 in Draufsicht dargestellten Zeichnung erläutert. In diesem Fall ist das Substrat 5 durch eine Leiterplatte ausgebildet. Der Chip 10 ist auf einem für den Chip bereitgestellten Bereich des Substrates, dem Chip-Bereich 15, angeordnet. Da die Aussparungen 20 um den Chip-Bereich 15 vertikal durch die gesamte Dicke des Substrates 5 verlaufen, ist der Chip 10 an diesen Stellen komplett vom Rest des Substrates 5 mechanisch abgekoppelt. Folglich wird ein thermisch-mechanischer Stress zwischen dem Chip-Bereich 15 und dem Rest des Substrats 5 gänzlich unterdrückt. Die Breite der Aussparung 20 ist vorteilhafterweise mindestens so gross wie die Breite des Chips 10.Recess according to the invention vertically through the entire thickness of the substrate. The depth of the recess thus corresponds at least to the thickness of the substrate. Depending on the thickness, area and material of the substrate, the production of the recesses can take place by etching, milling, lasering or drilling. A first embodiment will now be explained according to the drawing shown in Fig. 1 in plan view. In this case, the substrate 5 is formed by a printed circuit board. The chip 10 is arranged on a region of the substrate provided for the chip, the chip area 15. Since the recesses 20 run vertically around the chip area 15 through the entire thickness of the substrate 5, the chip 10 is completely decoupled mechanically from the rest of the substrate 5 at these locations. Consequently, a thermal-mechanical stress between the chip area 15 and the rest of the substrate 5 is completely suppressed. The width of the recess 20 is advantageously at least as large as the width of the chip 10th
Die Aussparungen 20 verlaufen lateral bis zum Rand 25 des Substrates 5. Diese Gestaltung hat dann einen Vorteil, wenn die Aussparungen 20 herstellungsbedingt z.B. vom Rand 25 des Substrates 5 erzeugt werden sollen.The recesses 20 extend laterally to the edge 25 of the substrate 5. This configuration has an advantage if the recesses 20 are produced by e.g. should be generated from the edge 25 of the substrate 5.
Weiter weist der Chip- Bereich 15 in lateralen Richtungen mindestens drei zueinander rechtwinklig angeordneten Seiten 30a, 30b, 30c auf, die jeweils mechanisch vom Substrat 5 getrennt sind. Dadurch ergibt sich für den von Aussparungen 20 umgebenen Chip-Bereich 15 eine rechteckige Form. Diese klare Form unterstützt eine einfache Herstellung des von Aussparungen 20 umgebenen Chip-Bereichs 15.Furthermore, the chip area 15 has at least three mutually perpendicular sides 30a, 30b, 30c in lateral directions, which are each separated mechanically from the substrate 5. This results in the area surrounded by recesses 20 chip area 15 has a rectangular shape. This clear shape facilitates easy production of the chip area 15 surrounded by recesses 20.
Es wird festgestellt, dass der Chip-Bereich 15 in Fig. 1 durch einen einseitig eingespannten Balken ausgebildet ist. Eine mechanische Verbindung des Chip- Bereichs 15 mit dem Rest des Substrates 5 ist nur an der eingespannten Seite des Balkens gegeben. Diese freitragende Struktur ermöglicht eine weitgehende mechanische Abkopplung zwischen dem Chip-Bereich 15 und dem Rest des Substrates 5.It is noted that the chip area 15 in FIG. 1 is formed by a cantilever beam. A mechanical connection of the chip area 15 with the rest of the substrate 5 is given only on the clamped side of the beam. This self-supporting structure allows a substantial mechanical decoupling between the chip area 15 and the rest of the substrate 5.
Im übrigen wird darauf hingewiesen, dass die erfindungsgemäße Anordnung besonders für solche Fälle geeignet ist, wenn der Chip 10 mikromechanische Sensoren umfasst. Mikromechanische Bauelemente bzw. M E MS- Bauelemente (microelectromechanical System) reagieren sehr empfindlich auf thermomechanischen Spannungen und erfordern daher entsprechende Maßnahmen zur Stressentkopplung des Chips 10 vom Rest des Substrates 5. Dank der erläuterten Maßnahmen kann auch eine Verbesserung der Genauigkeit des Chips 5 bezüglich seiner Messung und Signalverarbeitung durch Reduktion störender Einflüsse erzielt werden.Moreover, it should be noted that the arrangement according to the invention is particularly suitable for such cases when the chip 10 comprises micromechanical sensors. Micromechanical components or ME MS components (microelectromechanical system) are very sensitive to thermo-mechanical stresses and therefore require corresponding ones Measures for stress decoupling of the chip 10 from the rest of the substrate 5. Thanks to the measures described can also be achieved an improvement in the accuracy of the chip 5 in terms of its measurement and signal processing by reducing disturbing influences.
Auf dem Substrat 5 ist ausserhalb des Chips- Bereichs 15 mindestens eine elektrische Kontaktierstelle 45 vorgesehen. Die elektrische Kontaktierstelle 45 ist mit dem Chip 10 elektrisch über eine elektrische Leitung 50 verbunden. Somit wird gewährleistet, dass der thermomechanisch vom Rest des Substrats 5 abgekoppelte Chip 10 elektrisch mit Kontaktierstellen 45 verbunden ist, während die Kontaktierstellen 45 z.B. als externe Anschlüsse ihrerseits elektrisch mit externen Einheiten ausserhalb des Substrates 5 verbunden sind.At least one electrical contacting point 45 is provided on the substrate 5 outside the chip area 15. The electrical Kontaktierstelle 45 is electrically connected to the chip 10 via an electrical line 50. Thus, it is ensured that the chip 10 thermo-mechanically decoupled from the remainder of the substrate 5 is electrically connected to contact pads 45, while the contact pads 45 are e.g. as external terminals in turn are electrically connected to external units outside the substrate 5.
In einem zweiten Ausführungsbeispiel gemäß Fig. 2 ist das Substrat 5 mit gleichen Merkmalen versehen wie im ersten Ausführungsbeispiel bis auf denIn a second embodiment of FIG. 2, the substrate 5 is provided with the same features as in the first embodiment except for the
Unterschied, dass die Aussparung 20 lateral eingeschlossen ist innerhalb des Substrates 5. Die Aussparung 20 verläuft also lateral nicht bis zum Rand des Substrates 5. Diese Ausführungsform kann gegenüber der ersten Ausführungsform ein mechanisch stabileres Substrat 5 bereitstellen, da alle Randbereiche des Substrates 5 noch vorhanden sind.Difference that the recess 20 is laterally enclosed within the substrate 5. The recess 20 thus does not extend laterally to the edge of the substrate 5. This embodiment can provide a mechanically stable substrate 5 over the first embodiment, since all edge regions of the substrate 5 still present are.
In einem dritten Ausführungsbeispiel gemäß Fig. 3 ist das Substrat 5 mit gleichen Merkmalen versehen wie im ersten Ausführungsbeispiel bis auf den Unterschied, dass der Chip-Bereich 15 nur über eine Federstruktur 35 am Substrat 5 aufgehängt ist. Im Vergleich mit der ersten Ausführungsform erkennt man, dass nun der Verbindungsbereich zwischen dem Chip-Bereich 15 und dem Rest des Substrates 5 zusätzliche Aussparungen aufweist und so eine Federstruktur 35 gebildet wird. Durch die zusätzlichen Aussparungen wird die thermomechanische Kopplung weiter reduziert. In Fig. 3 weist die Federstruktur 35 selbst eine innere, in sich eingeschlossene Aussparung 40 auf. Alternativ oder zusätzlich dazu kann die Federstruktur 35 eine Mäanderform aufweisen.In a third embodiment according to FIG. 3, the substrate 5 is provided with the same features as in the first exemplary embodiment except for the difference that the chip area 15 is suspended on the substrate 5 only via a spring structure 35. In comparison with the first embodiment, it can be seen that now the connection region between the chip region 15 and the rest of the substrate 5 has additional recesses and thus a spring structure 35 is formed. The additional recesses further reduce the thermo-mechanical coupling. In Fig. 3, the spring structure 35 itself has an inner self-contained recess 40. Alternatively or additionally, the spring structure 35 may have a meandering shape.
Im übrigen können mehrere Federstrukturen 35 zum Aufhängen eines Chip- Bereiches 15 am Substrat 5 vorgesehen sein. Insbesondere ist eine zwei- oder vierseitige Aufhängung des Chip- Bereichs 15 mit zwei- bzw. vier Federstrukturen 35 vorteilhaft aus Symmetriegründen.Incidentally, a plurality of spring structures 35 for suspending a chip area 15 on the substrate 5 may be provided. In particular, a two- or four-sided suspension of the chip area 15 with two or four spring structures 35 advantageously for reasons of symmetry.
Bei der Auslegung des Chip-Bereiches 15 ist zu beachten, dass die resultierenden Eigenmoden (Schwingungen) nicht in Bereichen liegen, die für die Anwendung kritisch sind. Dies ist besonders bei Sensoren von Bedeutung, bei denen der Chip 10 bewegliche Elemente aufweist. When designing the chip area 15, it should be noted that the resulting eigenmodes (oscillations) do not lie in areas that are critical for the application. This is particularly important in sensors in which the chip has 10 movable elements.

Claims

Ansprüche claims
1. Anordnung zur Stressentkopplung bei einem Substrat (5), insbesondere bei einer Leiterplatte, mit mindestens einem Chip (10), wobei der Chip (10) auf einem Chip-Bereich (15) des Substrates (5) angeordnet ist und mindestens eine Aussparung (20) um den Chip- Bereich (15) im Substrat (5) vorgesehen ist, d ad u rc h ge ke n n ze i c h n et, dass die Aussparung (20) vertikal durch die gesamte Dicke des Substrates (5) verläuft.1. Arrangement for stress decoupling in a substrate (5), in particular in a printed circuit board, with at least one chip (10), wherein the chip (10) on a chip region (15) of the substrate (5) is arranged and at least one recess (20) is provided around the chip area (15) in the substrate (5), that is, the recess (20) extends vertically through the entire thickness of the substrate (5).
2. Anordnung nach Anspruch 1, d ad u rc h ge ke n n ze i c h n et, dass die Aussparung (20) lateral bis zum Rand (25) des Substrates (5) verläuft.2. Arrangement according to claim 1, characterized in that the recess (20) extends laterally to the edge (25) of the substrate (5).
3. Anordnung nach Anspruch 1, d a d u rc h ge ke n n z e i ch n et, dass die Aussparung (20) lateral eingeschlossen ist innerhalb des Substrates (5).3. Arrangement according to claim 1, characterized in that the recess (20) is laterally enclosed within the substrate (5).
4. Anordnung nach einem der Ansprüche 1 bis 3, d ad u rc h ge ke n n ze i c h n et, dass der Chip-Bereich (15) in lateralen Richtungen mindestens drei zueinander rechtwinklig angeordneten Seiten (30a, 30b, 30c) aufweist, die jeweils mechanisch vom Substrat (5) getrennt sind.4. Arrangement according to one of claims 1 to 3, d ad u c h zeke zen ze ichn et that the chip area (15) in lateral directions at least three mutually perpendicular sides (30 a, 30 b, 30 c), the each mechanically separated from the substrate (5).
5. Anordnung nach einem der Ansprüche 1 bis 4, d ad u rc h ge ke n n ze i c h n et, dass der Chip-Bereich (15) durch einen einseitig eingespannten Balken ausgebildet ist. 5. Arrangement according to one of claims 1 to 4, ad d u r c h zeke n ze zen et, that the chip area (15) is formed by a cantilevered beam.
6. Anordnung nach einem der Ansprüche 1 bis 4, d ad u rc h ge ke n n ze i c h n et, dass der Chip-Bereich (15) nur über eine oder mehrere Federstrukturen (35) am Substrat (5) aufgehängt ist.6. Arrangement according to one of claims 1 to 4, ad d u r c h zeke n ze i c h n et that the chip area (15) only one or more spring structures (35) on the substrate (5) is suspended.
7. Anordnung nach Anspruch 6, d ad u rc h ge ke n n ze i c h n et, dass die eine oder mehrere Federstrukturen (35) selbst eine innere, in sich eingeschlossene Aussparung (40) aufweisen.7. Arrangement according to claim 6, characterized in that the one or more spring structures (35) themselves have an inner self-contained recess (40).
8. Anordnung nach Anspruch 6 oder 7, d a d u rc h ge ke n n z e i c h n et, dass die eine oder mehrere Federstruktur (35) eine Mäanderform aufweist.8. Arrangement according to claim 6 or 7, characterized in that the one or more spring structure (35) has a meandering shape.
9. Anordnung nach einem der Ansprüche 1 bis 8, d ad u rc h ge ke n n ze i c h n et, dass der Chip (10) mikromechanische Sensoren umfasst.9. Arrangement according to one of claims 1 to 8, d ad u c h ce n c h n e c h n et that the chip (10) comprises micromechanical sensors.
10. Anordnung nach einem der Ansprüche 1 bis 9, d ad u rc h ge ke n n ze i c h n et, dass auf dem Substrat (5) ausserhalb des Chips- Bereichs (15) mindestens eine elektrische Kontaktierstelle (45) vorgesehen ist, die mit dem Chip (10) elektrisch über eine elektrische Leitung (50) verbunden ist. 10. Arrangement according to one of claims 1 to 9, d ad u r c h ze zeke zen et et, that on the substrate (5) outside the chip area (15) at least one electrical contacting point (45) is provided with the the chip (10) is electrically connected via an electrical line (50).
PCT/EP2009/055101 2008-06-20 2009-04-28 Arrangement for decoupling stress in a substrate with a chip WO2009153094A1 (en)

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