WO2009145308A1 - Semiconductor device, element recovery circuit, and element recovery method - Google Patents
Semiconductor device, element recovery circuit, and element recovery method Download PDFInfo
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- WO2009145308A1 WO2009145308A1 PCT/JP2009/059882 JP2009059882W WO2009145308A1 WO 2009145308 A1 WO2009145308 A1 WO 2009145308A1 JP 2009059882 W JP2009059882 W JP 2009059882W WO 2009145308 A1 WO2009145308 A1 WO 2009145308A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 81
- 238000000034 method Methods 0.000 title claims description 133
- 238000011084 recovery Methods 0.000 title abstract 3
- 230000007704 transition Effects 0.000 claims description 37
- 238000005259 measurement Methods 0.000 claims description 19
- 238000011156 evaluation Methods 0.000 claims description 15
- 238000011069 regeneration method Methods 0.000 claims description 13
- 230000001172 regenerating effect Effects 0.000 claims description 7
- 230000008929 regeneration Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 17
- 230000015654 memory Effects 0.000 description 15
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 13
- 239000000463 material Substances 0.000 description 12
- 230000006399 behavior Effects 0.000 description 8
- 238000012545 processing Methods 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 208000024891 symptom Diseases 0.000 description 3
- 229910000314 transition metal oxide Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910010282 TiON Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 229910004166 TaN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000003487 electrochemical reaction Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 239000011669 selenium Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
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-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0033—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/009—Write using potential difference applied between cell electrodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0092—Write characterized by the shape, e.g. form, length, amplitude of the write pulse
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/10—Resistive cells; Technology aspects
- G11C2213/15—Current-voltage curve
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/32—Material having simple binary metal oxide structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/34—Material includes an oxide or a nitride
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/79—Array wherein the access device being a transistor
Definitions
- the present invention relates to a semiconductor device having a variable resistance element, an element regeneration circuit, and an element regeneration method that can switch an electric resistance in a film between a low resistance state and a high resistance state by applying a voltage to an electrode.
- nonvolatile memories As rewritable semiconductor memory devices, the demand for nonvolatile memories as rewritable semiconductor memory devices has increased.
- flash memory which is a typical example of nonvolatile memory
- the one using a floating gate is the mainstream, but it is said that it is difficult to thin the tunnel gate oxide film, and it is approaching the limit of miniaturization.
- a memory using a resistance variable element has been proposed as a nonvolatile memory that breaks down the miniaturization limit of a flash memory. These are expected as general-purpose memories that operate at high speed as well as conventional nonvolatile memories.
- Memory using resistance change elements includes magnetic RAM (MRAM), phase change RAM (PRAM), resistive RAM (ReRAM), and programmable metallization cell (PMC). Each of these has a unique rewrite condition, resistance change rate, and number of rewrites, but those having a high resistance change rate defined by the resistance ratio between the low resistance state and the high resistance state are ReRAM and PMC. A higher read margin can be expected.
- MRAM magnetic RAM
- PRAM phase change RAM
- ReRAM resistive RAM
- PMC programmable metallization cell
- the switching operation from the high resistance state to the low resistance state is often referred to as a set operation, and the switching operation from the low resistance state to the high resistance state is often referred to as a reset operation.
- the switching operation from the high resistance state to the low resistance state is defined as a set operation, and the switching operation from the low resistance state to the high resistance state is defined as a reset operation.
- PMC uses ionic conduction and electrochemical reaction during the set / reset operation, so that voltages having different polarities are applied to the resistance change element in the set operation and the reset operation.
- ReRAM set / reset operation there are reported examples of using different polar voltages for the set / reset operation as in the PMC and performing the same polarity (or unipolar) voltage application. .
- Patent Document 1 An example of ReRAM using a perovskite material is disclosed in US Pat. No. 6,204,139 (hereinafter referred to as Patent Document 1).
- Patent Document 1 An example of ReRAM using a perovskite material is disclosed in US Pat. No. 6,204,139 (hereinafter referred to as Patent Document 1).
- Patent Document 2 Japanese Patent Application Laid-Open No. 2004-363604
- Patent Document 3 Japanese Patent Application Laid-Open No. 2006-279042
- a semiconductor memory device 100 shown in FIG. 1 includes a MOS (Metal Oxide Semiconductor) transistor 101 and a resistance change element 102.
- the MOS transistor 101 has a source electrode 111, a drain electrode 112, and a gate electrode 114. Impurity diffusion layers to be the source electrode 111 and the drain electrode 112 are formed on the surface of the semiconductor silicon substrate 110, and a gate insulating film 113 typified by a silicon oxide film is formed on the silicon substrate 110, typified by polysilicon.
- a gate electrode 114 is formed on the gate insulating film 113.
- the resistance change element 102 includes two electrodes 115 and 116 and a variable resistor 117 sandwiched between these two electrodes.
- the electrode 115 is connected to the drain electrode 112 of the MOS transistor 101, and the electrode 116 is connected to a wiring 118 provided in the upper layer.
- V SW the voltage applied between the two electrodes 115 and 116 of the resistance change element 102 is denoted as V SW .
- a voltage higher than V SW is applied between the source electrode 111 and the wiring 118, and the MOS transistor 101 is turned on from the off state.
- a voltage that is equal to or higher than a threshold voltage to be in a state may be applied to the gate electrode 114.
- the relationship between the voltage V SW applied to the resistance change element 102 and the current flowing through the resistance change element 102 is the relationship shown in the graph of FIG.
- variable resistance element 102 When the variable resistance element 102 is in the low resistance state, that is, in the set state, the variable resistance element 102 behaves according to the voltage-current characteristic 121 shown in FIG. 2 with respect to the applied voltage VSW . Since the V SW is low region of the low-resistance state, flows much current, it exceeds voltages V 1 there is a V SW, the current value is rapidly reduced. This is a result of switching of the variable resistance element 102 to the high resistance state, that is, the reset state. When V SW further increases and V SW exceeds a certain voltage V 2 , the current value increases rapidly. This is a result of the resistance change element 102 switching to the set state again.
- the resistance change element 102 when the resistance change element 102 is in the high resistance state, that is, the reset state, the resistance change element 102 exhibits a behavior according to the voltage-current characteristic 122 shown in FIG. 2 with respect to the applied voltage VSW .
- V SW voltage-current characteristic
- the present inventors are engaged in research and development of semiconductor memory devices, and are conducting various studies on improving the performance of semiconductor memory devices.
- investigations have been made on ReRAM, which is considered to be advantageous for miniaturization, in a resistance change element in which the resistance value at the time of setting is low regardless of the area.
- ReRAMs unipolar operation is considered important for circuit configuration, and resistance variable materials centering on transition metal oxides are being studied.
- the points considered to be important are described below.
- the semiconductor memory device clarified in the present invention solves the problem that has been clarified after manufacturing the semiconductor device having the variable resistance element ReRAM in the above-described example.
- One of the objects of the present invention is to provide a semiconductor device and an element in which a switching operation can be performed again when the variable resistance element is fixed in a high resistance state or a low resistance state and a desired characteristic cannot be obtained in the variable resistance element.
- a reproduction circuit and an element reproduction method are provided.
- the semiconductor device when the first voltage pulse is input, the semiconductor device transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, the variable resistance element includes a variable resistance element having a characteristic of transition from the second resistance state to the first resistance state, and the resistance change element does not transition even when the first or second voltage pulse is input.
- a restoration process is performed in which a third voltage pulse having a positive or negative sign opposite to that of the first or second voltage pulse and a voltage amplitude set to a predetermined value is input, the above characteristics are obtained. It is something to restore.
- the semiconductor device when the first voltage pulse is input, the semiconductor device transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, the variable resistance element includes a variable resistance element having a characteristic of transition from the second resistance state to the first resistance state, and the resistance change element does not transition even when the first or second voltage pulse is input.
- a restoration process is performed in which a third voltage pulse having an amplitude larger than that of the input voltage pulse is input, the above characteristics are restored.
- the element resistance circuit transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, a voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transitioning from the second resistance state to the first resistance state, and the first or second voltage pulse to the variable resistance element When the resistance state of the resistance change element does not transition even if is input, the third or second voltage pulse having the opposite sign and the voltage amplitude set to a predetermined value with respect to the first or second voltage pulse And a control unit that causes the voltage pulse generation unit to perform a restoration process for inputting the voltage pulse to the resistance change element.
- the element resistance circuit transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, a voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transitioning from the second resistance state to the first resistance state, and the first or second voltage pulse to the variable resistance element
- a control unit that causes the voltage pulse generation unit to perform a restoration process of inputting a third voltage pulse having a larger amplitude than the input voltage pulse to the resistance change element, It is the composition which has.
- the element regeneration method when a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value, and the second voltage pulse is input. If so, a method for reproducing a resistance change element having a characteristic of transitioning from a second resistance state to a first resistance state, wherein the first or second voltage pulse is input to the resistance change element, and the resistance change element is input.
- the resistance state of the resistance change element does not transition even when the first or second voltage pulse is input, the sign of the positive or negative sign is opposite to that of the first or second voltage pulse, and the voltage amplitude is predetermined.
- a third voltage pulse set to a value is input to the resistance change element.
- the element regeneration method when a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value, and the second voltage pulse is input. If so, a method for reproducing a resistance change element having a characteristic of transitioning from a second resistance state to a first resistance state, wherein the first or second voltage pulse is input to the resistance change element, and the resistance change element is input.
- a third voltage pulse having an amplitude larger than that of the input voltage pulse is input to the resistance change element.
- FIG. 1 is a diagram showing a configuration of a related semiconductor device.
- FIG. 2 is a diagram illustrating the operation of the related semiconductor device.
- FIG. 3 is a diagram showing a change in resistance value of a related semiconductor device.
- FIG. 4 is a diagram showing a change in resistance value of a related semiconductor device.
- FIG. 5 is a diagram showing an example of the configuration of the semiconductor device according to the embodiment of the present invention.
- FIG. 6 is a block diagram showing a configuration example of the rewrite power supply circuit shown in FIG.
- FIG. 7 is a diagram illustrating an example of the operation of the semiconductor device according to the first embodiment.
- FIG. 8 is a diagram illustrating an example of voltage pulses used in the semiconductor device according to the first embodiment.
- FIG. 9 is a diagram illustrating an example of changes in the resistance value of the semiconductor device according to the first embodiment.
- FIG. 10 is a diagram illustrating an example of voltage pulses used in the characteristic restoration process in the first embodiment.
- FIG. 11 is a diagram illustrating an example of the characteristic restoration process in the first embodiment.
- FIG. 12 is a diagram illustrating an example of voltage pulses used in the semiconductor device according to the second embodiment.
- FIG. 13 is a diagram illustrating an example of changes in the resistance value of the semiconductor device according to the second embodiment.
- FIG. 14 is a diagram illustrating an example of voltage pulses used in the semiconductor device according to the third embodiment.
- FIG. 15 is a diagram illustrating an example of changes in the resistance value of the semiconductor device according to the third embodiment.
- FIG. 5 is a schematic diagram showing a configuration example of a semiconductor device that performs a reproducing operation of the resistance change element in the present embodiment.
- the semiconductor device 1 has a configuration including a resistance change element 10 to which a rewrite power supply circuit 14 is connected.
- the resistance change element 10 includes a first electrode 11 and a second electrode 12, and a variable resistor 13 sandwiched between the two electrodes.
- the first electrode 11 is connected to the rewrite power supply circuit 14, and the second electrode 12 is connected to a ground line (ground line).
- variable resistor 13 As a material constituting the resistance change element 10, various combinations of variable resistors and electrode materials have been reported, and any combination of materials used for the resistance change element 10 can be used.
- the material of the variable resistor 13 include compounds composed of any one of oxygen, nitrogen, sulfur, selenium, tellurium, or a combination thereof, as synthesized with the base metal. Among these, a compound composed of a metal and oxygen is given as a representative example of the material of the variable resistor 13.
- variable resistor 13 Cr, Ti, V, Ni, Cu, Zr, Nb, Mo, Hf, Ta, and W are effective, and among them, Ti, Ni, and Cu are given as typical examples. .
- a sputtering method, a laser ablation method, a vapor phase chemical growth method or the like may be used.
- the film thickness of the variable resistor 13 is preferably in the range of approximately 5 nanometers to 300 nanometers.
- first electrode 11 and the second electrode 12 various metals can be used. Among them, TaN, TiN, Ru, Pt, W, Mo, Ta, and the like are given as typical examples.
- FIG. 6 is a block diagram showing a configuration example of the rewrite power supply circuit shown in FIG.
- the rewrite power supply circuit 14 includes a voltage pulse generation unit 141 that generates a voltage pulse, a measurement unit 143 that measures the resistance value of the resistance change element 10, and a voltage based on the measurement result of the measurement unit 143. And a control unit 142 that controls the pulse generation unit 141.
- the control unit 142 may have a configuration including a CPU (Central Processing Unit) that executes processing according to a program and a memory that stores the program, or may be a dedicated circuit for executing predetermined processing.
- CPU Central Processing Unit
- the voltage pulse generator 141 is supplied with a power supply voltage from the outside, and outputs a voltage pulse to the resistance change element 10 in accordance with an instruction from the controller 142.
- the measurement unit 143 measures the resistance value of the variable resistance element 10 and transmits the result to the control unit 142.
- the measured resistance value is an example of an evaluation value indicating an index of the characteristic of the resistance change element 10.
- the normal characteristic of the resistance change element 10 means a state in which the set operation and the reset operation can be normally performed.
- the control unit 142 sends the instruction to the voltage pulse generation unit 141 and corresponds to the input instruction.
- the voltage pulse is output to the voltage pulse generator 141.
- the control unit 142 is registered in advance with a value that is a criterion for determining whether or not the characteristic of the resistance change element 10 is abnormal. Then, when the control unit 142 receives the evaluation value from the measurement unit 143, the control unit 142 compares the value with a value serving as a determination criterion, and if the comparison result determines that the resistance change element 10 is abnormal, The voltage pulse generation unit 141 is instructed to perform the restoration process. By performing the restoration process, the characteristic restoration process is performed in the variable resistance element 10. The condition of the voltage pulse for performing the restoration process is registered in the control unit 142 in advance.
- a value that is a criterion for determining whether or not the characteristic of the resistance change element 10 is abnormal is registered in the control unit 142, but may be registered in the measurement unit 143.
- the voltage pulse condition for performing the restoration process is registered in the control unit 142, it may be registered in the voltage pulse generation unit 141.
- the second electrode 12 side is not limited to the ground line 15 shown in this form, and another circuit or transistor may be connected. What is important is that the rewrite power supply circuit 14 has the capability to apply a sufficient voltage for rewriting the resistance change element 10 between the first electrode 11 and the second electrode 12 of the resistance change element 10. .
- the resistance change element 10 and the rewrite power supply circuit 14 are directly connected, but one or a plurality of transistors are provided between the resistance change element 10 and the rewrite power supply circuit 14 as in a memory circuit. May be provided.
- the semiconductor device of this embodiment transitions from a high resistance state to a low resistance state when a first voltage pulse is input, and transitions from a low resistance state to a high resistance state when a second voltage pulse is input.
- the voltage value of the variable resistance element is a predetermined value opposite to that of the first or second voltage pulse.
- the semiconductor device of this embodiment includes means for measuring an evaluation value that serves as an index of the characteristic of the resistance change element when the first or second voltage pulse is input, and the evaluation value measured by the measuring means.
- a process of restoring the characteristics by applying a voltage pulse having a predetermined polarity and voltage value to the variable resistance element may be performed.
- the semiconductor device of this embodiment includes means for measuring an evaluation value that serves as an index of the characteristic of the resistance change element when the first or second voltage pulse is input, and the evaluation value measured by the measuring means. Is a process of restoring the characteristics by applying a voltage pulse having a predetermined polarity and voltage value to the resistance change element when the intended characteristics are not obtained as a result of comparison with a preset reference value. It may be done.
- the voltage pulse in which the polarity and the voltage value are determined in advance may be a voltage pulse having an opposite sign to that of the first or second voltage pulse and the voltage value being set to any value within a predetermined range. .
- the resistance value after the reset operation is measured as an evaluation value, and the resistance change element changes from the high resistance state to the low resistance state.
- the operation to be performed is defined as a set operation, a resistance value after the set operation may be measured as an evaluation value.
- the amplitude of the applied voltage pulse is not less than 0.5 times and not more than 3 times the absolute value of the voltage pulse applied when recording information. Is preferable, and it is more preferable that it is 0.75 times or more and 1.5 times or less.
- the semiconductor device transitions from the high resistance state to the low resistance state when the first voltage pulse is input, and from the low resistance state when the second voltage pulse is input.
- a semiconductor device having a resistance change element that transitions to a resistance state when the characteristic of the resistance change element does not exhibit the intended change, a voltage having a larger amplitude than the first or second voltage pulse is applied to the resistance change element. A process of restoring the characteristics by applying a pulse is performed.
- the amplitude of the applied voltage pulse is 1.01 to 3 times the voltage of the voltage pulse applied when recording information. Moreover, it is preferable that a pulse for restoring the above characteristics is continuously applied twice or more.
- the amplitude of the voltage pulse applied when recording information is 3/4 or less of the voltage pulse amplitude applied when recording normal information. It is preferable that
- the low resistance state and the high resistance state may be reversibly changed.
- the semiconductor device having a variable resistance element according to the present invention described above can be sufficiently realized by using a current integrated circuit formation technique, and any semiconductor device having an integrated circuit formation technology for a related semiconductor device can be used.
- the apparatus can be reproduced without any problem.
- the semiconductor device regeneration method disclosed by the present invention for a resistance change element in which a desired set / reset operation has ceased to occur the resistance change element is regenerated into a switchable state, The lifetime of not only the resistance change element but also the semiconductor device having the resistance change element can be extended.
- the number of switching of the resistance change element can be greatly improved from about several hundred times, and the life of the semiconductor device having the resistance change element and the resistance change element can be greatly extended. Become.
- the switching operation can be performed again. It becomes possible to return to.
- the yield of the variable resistance element and the semiconductor device having the variable resistance element can be greatly improved.
- variable resistance element 10 having a variable resistor 13 having a thickness of 100 nanometers and made of NiO, and a first electrode 11 and a second electrode 12 made of Ru was produced.
- FIG. 7 is a graph showing a specific example of the unipolar operation of the variable resistance element in the semiconductor device of this example.
- a pulse having a voltage amplitude of 8 volts and a 300 nanosecond pulse may be applied.
- a pulse having a voltage amplitude of 3 volts and 50 microseconds may be applied.
- this resistance change element 10 when the rewrite operation is repeatedly performed, the high resistance state and the low resistance state are satisfactorily switched up to several hundred times. Thereafter, the low resistance state is changed to the high resistance state. In many cases, the transition, i.e., the reset operation becomes difficult, and the switching operation does not occur. The situation is as shown in FIG.
- Such a behavior of the resistance value is not preferable from the viewpoint of the lifetime of the resistance change element 10 and the semiconductor device 1.
- the behavior of the resistance change element 10 is recovered by the following method, and switching is performed. It was found that the characteristics can be restored.
- a switching operation does not occur by applying a voltage pulse having a sign opposite to that of a voltage pulse that is normally applied when recording information to the variable resistance element 10 in which the switching operation does not occur.
- the variable resistance element 10 can be brought into a switchable state again.
- FIG. 8 schematically shows voltage pulses used in the set / reset operation and the characteristic restoration process during normal unipolar operation.
- FIG. 9 schematically shows a normal set / reset operation, a state in which switching does not occur, a characteristic restoration process, and a change in resistance value after characteristic restoration.
- the voltage amplitude necessary for the characteristic restoration process when the reset operation becomes difficult is about ⁇ 4 volts to ⁇ 24 volts, more preferably ⁇ 6 volts. To about -12 volts. In this case, the voltage amplitude necessary for the normal set operation is about 8 volts.
- the film thickness of NiO serving as the variable resistor 13 is 50 nanometers
- a pulse having a voltage amplitude of 4 volts may be applied.
- the voltage amplitude required for the characteristic restoration process is about -2 volts to -12 volts. Therefore, in the characteristic restoration process when the reset operation becomes difficult, the sign is reversed, and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the set operation. It will be enough if it is about.
- the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It has also been found that more reliable characteristic restoration is possible when the same pulse is input many times.
- the amplitude of the applied voltage pulse is set lower than the voltage used in normal information recording.
- the variable resistor 13 having a film thickness of 100 nanometers described above, a voltage amplitude of 8 volts is used for normal information recording, and -4 volts to -12 volts are used in the characteristic restoration process.
- a sufficient setting operation could be performed with a voltage of 3/4 or less of 8 volts, that is, 6 volts or less.
- the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described.
- the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
- FIG. 10 schematically shows voltage pulses used for the set / reset operation and the characteristic restoration process during normal bipolar operation.
- the set operation from the high resistance state to the low resistance state has a voltage amplitude of 8 volts, a pulse of 300 nanoseconds is applied, and the reset operation from the low resistance state to the high resistance state is the set operation.
- a case where a pulse of 10 microseconds having a voltage amplitude of -4 volts as an opposite sign is applied will be described.
- the variable resistor 13 having a film thickness of 100 nanometers undergoes the characteristic restoration process.
- the required voltage amplitude was about -4 volts to -24 volts, more preferably about -6 volts to -12 volts.
- the film thickness of NiO serving as the variable resistor 13 is 50 nanometers
- a pulse having a voltage amplitude of 4 volts may be applied.
- the voltage amplitude required for the characteristic restoration process was about -2 volts to -12 volts. Therefore, in the characteristic restoration process when the reset operation becomes difficult, the sign is reversed, and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the set operation. It will be enough if it is about.
- the resistance value of the resistance change element 10 is evaluated after the reset operation. As a result, it is possible to manage whether or not the reset operation of the resistance change element 10 has been reliably performed, and it is possible to determine whether or not to perform the characteristic restoration process.
- the procedure of this reproduction method will be described with reference to the flowchart shown in FIG. Here, a description will be given of a case where the control unit 142 of the rewrite power supply circuit 14 executes processing according to the procedure shown in FIG.
- the control unit 142 When a reset operation instruction is input from the outside, the control unit 142 causes the voltage pulse generation unit 141 to generate a voltage pulse for the reset operation, and the voltage pulse generation unit 141 sends the generated voltage pulse to the resistance change element 10. Apply (step 1). Thereby, the resistance change element 10 is changed from the low resistance state to the high resistance state. Subsequently, the measurement unit 143 measures the resistance value and transmits the measurement value to the control unit 142. When receiving the measurement value from the measurement unit 143, the control unit 142 compares the measurement value with the set value (step 2). The set value is a lower limit value of the resistance value when the variable resistance element 10 is normally reset, and is recorded in the control unit 142.
- control part 142 determines whether a measured value is larger than a setting value, in order to investigate whether the variable resistance element 10 will be in the desired high resistance state by reset operation (step 3).
- step 3 when the measured value of the resistance change element 10 is about the resistance value after the setting operation, the measured value becomes smaller than the set value. If the measured value is smaller than the set value, it indicates that the reset operation is difficult, and the intended characteristic change is not obtained. Therefore, the control unit 142 determines that it is necessary to cause the variable resistance element 10 to undergo a characteristic restoration process, and executes a characteristic restoration process (step 4).
- the control unit 142 determines that the variable resistance element 10 exhibits normal characteristics, and waits until the next set operation based on the rewrite instruction input is performed (step 5).
- variable resistance element 10 By performing such a regeneration method on the variable resistance element 10 in which the reset operation becomes difficult and switching has not occurred, it becomes possible to make the variable resistance element 10 switchable again. It has been shown. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the life of the semiconductor device 1 can be extended.
- Example 1 NiO was used as the variable resistor 13, but it was found that the behavior shown differs when the material of the variable resistor 13 is different.
- This example relates to a method for regenerating a variable resistance element when a material different from that of the first embodiment is used as the variable resistor material.
- variable resistance element 10 having the variable resistor 13 having a film thickness of 100 nanometers and the material being TiO (N) and the first electrode 11 and the second electrode 12 having the material Ru was used.
- variable resistance element 10 of the present embodiment in the unipolar operation of the variable resistance element 10 of the present embodiment, in the set operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 8 volts and a pulse of 300 nanoseconds may be applied. Further, in the reset operation from the low resistance state to the high resistance state, for example, a pulse having a voltage amplitude of 3 volts and 50 microseconds may be applied. Such switching between the high resistance state and the low resistance state can be realized under the conditions of the set operation and the reset operation.
- this resistance change element 10 when rewriting operation is repeated, the high resistance state and the low resistance state are satisfactorily switched up to several hundred times. Thereafter, the high resistance state is changed to the low resistance state. Transition, that is, the set operation becomes difficult, and there are many cases where the switching operation does not occur.
- Such a behavior of the resistance value is not preferable from the viewpoint of the lifetime of the resistance change element 10 and the semiconductor device 1.
- the behavior of the resistance change element 10 is recovered by the following method, and switching is performed. It was found that the characteristics can be restored.
- a switching operation does not occur by applying a voltage pulse having a sign opposite to that of a voltage pulse that is normally applied when recording information to the variable resistance element 10 in which the switching operation does not occur.
- the variable resistance element 10 can be brought into a switchable state again.
- FIG. 12 schematically shows voltage pulses used for a set / reset operation and a characteristic restoration process during normal unipolar operation.
- FIG. 13 schematically shows a normal set / reset operation, a state in which switching does not occur, a characteristic restoration process, and a change in resistance value after characteristic restoration.
- the voltage amplitude necessary for the characteristic restoration process when the set operation becomes difficult is about ⁇ 1.5 volts to ⁇ 9 volts, more preferably ⁇ 2.25 volts to -4.5 volts.
- the voltage amplitude required for the normal reset operation is about 3 volts.
- the film thickness of TiON that is the variable resistor 13 is 50 nanometers
- a pulse having a voltage amplitude of 1.5 volts may be applied.
- the voltage amplitude required for the characteristic restoration process is about -0.75 to -4.5 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the reset operation. It will be enough if it is about.
- the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It has also been found that more reliable characteristic restoration is possible when the same pulse is input many times.
- the amplitude of the applied voltage pulse lower than the voltage used during normal information erasure.
- a voltage amplitude of 3 volts is used for normal information erasing, and ⁇ 1.5 to ⁇ 4.5 volts is used in the characteristic restoration process.
- a sufficient setting operation can be performed at a voltage of 3/4 or less of 3 volts, that is, 2.25 volts or less.
- the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described.
- the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
- a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is applied, and in the reset operation from the low resistance state to the high resistance state, it is opposite to the set operation.
- a case will be described in which a pulse having a voltage amplitude of -4 volts as a sign and a pulse of 10 microseconds is applied.
- the voltage amplitude necessary for the characteristic restoration process has a film thickness of 100 nanometers. In the case of the variable resistor 13, it was about 8 to 12 volts.
- the film thickness of TiON which is the variable resistor 13 is 50 nanometers
- a pulse having a voltage amplitude of ⁇ 2 volts may be applied.
- the voltage amplitude required for the characteristic restoration process was about 4 to 6 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 2 to 3 times that of the set operation.
- the resistance value of the variable resistance element 10 is evaluated after the set operation. Thereby, it is possible to manage whether or not the setting operation of the resistance change element 10 has been performed reliably, and it is possible to determine whether or not to perform the characteristic restoration process.
- the procedure of the reproduction method described below is the same as that in the flowchart shown in FIG. 11 except that the setting operation in step 1 and the resetting operation in step 5 are interchanged and the setting value in step 3 and the direction of the inequality sign are changed. Same as 1.
- the set value is an upper limit value of the resistance value when the variable resistance element 10 is normally set.
- the outline of the procedure will be described with reference to FIG. Note that when the control unit 142 executes this reproduction method, the description is omitted because it is the same as the description of the first embodiment.
- step 1 a set operation is performed on the resistance change element 10. That is, a voltage pulse necessary for the set operation is applied to the resistance change element 10 to change the resistance change element 10 from the high resistance state to the low resistance state. Subsequently, the resistance value of the variable resistance element 10 is measured. At this time, the measured value of the variable resistance element 10 and the set value are compared (step 2), and it is determined whether the desired low resistance state is achieved by the set operation (step 3). In step 3, when the measured value of the resistance change element 10 is about the resistance value after the reset operation, it indicates that the set operation is difficult, and the intended characteristic change is not obtained. Therefore, a characteristic restoration process is necessary.
- step 3 determines whether the characteristic restoration process is necessary. If it is determined in step 3 that the characteristic restoration process is necessary, the process proceeds to step 4 to perform the characteristic restoration process. On the other hand, when the measured value of the resistance change element 10 is sufficiently lower than the resistance value after the reset operation, the next switching is possible (step 5).
- the resistance change element 10 can be switched again. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the life of the semiconductor device 1 can be extended.
- the symptom that the switching operation does not occur is not limited to the stage after repeating the switching operation many times, but can occur even at a relatively early stage after starting to use the variable resistance element before repeating the switching operation many times. . It has also been found that even in a relatively early stage after using the variable resistance element, the set operation, which is a switching operation for transitioning from the high resistance state to the low resistance state, may be difficult.
- the present embodiment relates to a method for regenerating a variable resistance element that has become unable to perform a switching operation at an initial stage.
- variable resistance element 13 having a film thickness of 100 nanometers and a material NiO
- variable resistance element 10 having a first electrode 11 and a second electrode 12 made of Ru.
- the voltage pulse input to the resistance change element 10 is performed by the rewrite power supply circuit 14 by an external instruction input or a control process of the control unit 142, and detailed description thereof is omitted.
- a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is used in the set operation from the high resistance state to the low resistance state. May be applied in the reset operation from the low resistance state to the high resistance state.
- a pulse of 50 microseconds having a voltage amplitude of 3 volts may be applied in the reset operation from the low resistance state to the high resistance state. Such switching between the high resistance state and the low resistance state can be realized under the conditions of the set operation and the reset operation.
- variable resistance element 10 in a relatively early stage after the use of the variable resistance element 10, a transition from a high resistance state to a low resistance state, that is, a set operation becomes difficult, and there are many cases where a switching operation does not occur. occured. Such a case is not preferable from the viewpoint of the yield of the resistance change element 10 and the semiconductor device 1, but the behavior is restored to the resistance change element 10 by the following method to restore the switching characteristics. I found out that I could do it.
- a switching operation is caused by applying a voltage pulse having a voltage amplitude larger than that of a voltage pulse normally applied when recording information to the variable resistance element 10 in which the switching operation has not occurred.
- the resistance change element 10 which has disappeared can be brought into a switchable state again.
- FIG. 14 schematically shows voltage pulses used for the set / reset operation and the characteristic restoration process during normal unipolar operation.
- FIG. 15 schematically shows a normal set / reset operation, a state where switching does not occur, a characteristic restoration process, and a transition of the resistance value after the characteristic restoration.
- the voltage amplitude required for the characteristic restoration process when the set operation becomes difficult is about 8.1 to 24 volts, more preferably 8.8. It was about 18 volts from the bolt. In this case, the voltage amplitude necessary for the normal set operation is about 8 volts.
- the film thickness of NiO serving as the variable resistor 13 is 50 nanometers, in the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 4 volts may be applied.
- the voltage amplitude required for the characteristic restoration process is about 4.05 to 12 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 1.01 to 3 times that of the set operation.
- the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It was also found that more reliable characteristic restoration is possible by inputting the same pulse many times.
- the amplitude of the applied voltage pulse is set lower than the voltage used in normal information recording.
- the amplitude of the voltage pulse to be applied immediately after it may be about 3/4 of the amplitude of the voltage pulse applied at the time of information rewriting, as in the first or second embodiment.
- the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described.
- the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
- a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is applied, and in the reset operation from the low resistance state to the high resistance state, it is opposite to the set operation.
- a case will be described in which a pulse having a voltage amplitude of -4 volts as a sign and a pulse of 10 microseconds is applied.
- the voltage amplitude necessary for the characteristic restoration process has a film thickness of 100 nanometers. In the case of the variable resistor 13, it was about 8.1 to 24 volts.
- the film thickness of NiO which is the variable resistor 13 is 50 nanometers
- a pulse having a voltage amplitude of 4 volts may be applied.
- the voltage amplitude required for the characteristic restoration process was about 4.05 to 12 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 1.01 to 3 times that of the set operation.
- the resistance value of the variable resistance element 10 is evaluated after the set operation. Thereby, it is possible to manage whether or not the setting operation of the resistance change element 10 has been performed reliably, and it is possible to determine whether or not to perform the characteristic restoration process.
- the procedure of the reproduction method described below is the same as that in the flowchart shown in FIG. 11 except that the setting operation in step 1 and the resetting operation in step 5 are interchanged and the setting value in step 3 and the direction of the inequality sign are changed. Same as 1.
- the set value is an upper limit value of the resistance value when the variable resistance element 10 is normally set.
- the outline of the procedure will be described with reference to FIG. Note that when the control unit 142 executes this reproduction method, the description is omitted because it is the same as the description of the first embodiment.
- step 1 a set operation is performed on the resistance change element 10. That is, a voltage pulse necessary for the set operation is applied to change the resistance change element 10 from the high resistance state to the low resistance state. Subsequently, the resistance value of the variable resistance element 10 is measured. At this time, the measured value of the variable resistance element 10 and the set value are compared (step 2), and it is determined whether the desired low resistance state is achieved by the set operation (step 3). In step 3, when the measured value of the resistance change element 10 is about the resistance value after the reset operation, it indicates that the set operation is difficult, and the intended characteristic change is not obtained. Therefore, a characteristic restoration process is necessary.
- step 3 determines whether the characteristic restoration process is necessary. If it is determined in step 3 that the characteristic restoration process is necessary, the process proceeds to step 4 to perform the characteristic restoration process. On the other hand, when the measured value of the resistance change element 10 is sufficiently lower than the resistance value after the reset operation, the next switching is possible (step 5).
- the resistance change element 10 is used. It has been shown that it becomes possible to switch to a state in which switching can be performed again. This method can be applied even when the set operation becomes difficult after the repeated operation is performed many times. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the yield of the semiconductor device 1 can be improved and the life can be extended.
- the characteristic restoring process of the resistance change element 10 when the setting operation of the resistance change element 10 becomes difficult at a relatively early stage after being used has been described.
- the reset operation becomes difficult.
- the reproduction method of this embodiment may be applied.
- variable resistance element it is possible to extend the lifetime of the variable resistance element and the semiconductor device having the variable resistance element. It is also possible to improve the yield of the variable resistance element and the semiconductor device having the variable resistance element.
- the application range of the variable resistance element extends over a wide range from a semiconductor memory device configured by arranging variable resistance elements on a matrix and a semiconductor device using the variable resistance element as a switch connecting the first circuit and the second circuit. I can expect.
- variable resistance elements Even if the resistance change element has other configurations, the number of rewritable times is limited, and the resistance change element can recover its characteristics by a pulse having a sign opposite to that of the voltage used when recording data.
- the present invention can be applied. Also, the present invention can be applied to any resistance change element that has a finite number of rewritable times and whose characteristics can be recovered by a pulse having a voltage amplitude larger than the voltage used when recording data. Is possible.
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Abstract
Provided is a semiconductor device (1) including a variable resistance element (10). The variable resistance element (10) has a characteristic of changing from a first resistance state to a second resistance state in which the resistance value is lower than that in the first resistance state when a first voltage pulse is inputted and changing from the second resistance state to the first resistance state when a second voltage pulse is inputted. When the variable resistance element (10) does not change the resistance state even if the first or second voltage pulse is inputted, a recovery process of inputting a third voltage pulse having a polarity opposite to that of the first and second voltage pulses and a voltage amplitude set to a predetermined value is performed, and the variable resistance element (10) recovers the property.
Description
本発明は、電極に電圧を印加することにより膜中の電気抵抗を低抵抗状態と高抵抗状態に切り替えることが可能な抵抗変化素子を有する半導体装置、素子再生回路および素子再生方法に関する。
The present invention relates to a semiconductor device having a variable resistance element, an element regeneration circuit, and an element regeneration method that can switch an electric resistance in a film between a low resistance state and a high resistance state by applying a voltage to an electrode.
近年、書き換え可能な半導体記憶装置として不揮発性メモリの需要が増加している。不揮発性メモリの代表例であるフラッシュメモリにおいては、フローティングゲートを用いたものが主流であるが、トンネルゲート酸化膜の薄層化が困難であるとされており、微細化限界に近づきつつあるとされている。一方、フラッシュメモリの微細化限界を打破する不揮発性メモリとして抵抗変化型素子を用いるメモリが提案されている。これらは従来の不揮発性メモリとしてはもちろんのこと高速に動作する汎用メモリとしても期待されている。
In recent years, the demand for nonvolatile memories as rewritable semiconductor memory devices has increased. In flash memory, which is a typical example of nonvolatile memory, the one using a floating gate is the mainstream, but it is said that it is difficult to thin the tunnel gate oxide film, and it is approaching the limit of miniaturization. Has been. On the other hand, a memory using a resistance variable element has been proposed as a nonvolatile memory that breaks down the miniaturization limit of a flash memory. These are expected as general-purpose memories that operate at high speed as well as conventional nonvolatile memories.
抵抗変化型素子を用いたメモリには、マグネティックRAM(MRAM)、相変化型RAM(PRAM)、レジスティブRAM(ReRAM)、プログラマブル・メタライゼーション・セル(PMC)などがある。これらには、それぞれ固有の書き換え条件、抵抗変化率、書き換え回数が存在するが、低抵抗状態と高抵抗状態の間の抵抗比で定義される抵抗変化率が高いものはReRAMおよびPMCであり、より高い読み出しマージンが期待できる。
Memory using resistance change elements includes magnetic RAM (MRAM), phase change RAM (PRAM), resistive RAM (ReRAM), and programmable metallization cell (PMC). Each of these has a unique rewrite condition, resistance change rate, and number of rewrites, but those having a high resistance change rate defined by the resistance ratio between the low resistance state and the high resistance state are ReRAM and PMC. A higher read margin can be expected.
PRAMやReRAM、PMCなどの抵抗変化素子では、高抵抗状態から低抵抗状態へのスイッチング動作はセット動作と呼ばれ、低抵抗状態から高抵抗状態へのスイッチング動作はリセット動作と呼ばれることが多い。本明細書でも、高抵抗状態から低抵抗状態へのスイッチング動作をセット動作と定義し、低抵抗状態から高抵抗状態へのスイッチング動作をリセット動作と定義する。
In a resistance change element such as PRAM, ReRAM, or PMC, the switching operation from the high resistance state to the low resistance state is often referred to as a set operation, and the switching operation from the low resistance state to the high resistance state is often referred to as a reset operation. Also in this specification, the switching operation from the high resistance state to the low resistance state is defined as a set operation, and the switching operation from the low resistance state to the high resistance state is defined as a reset operation.
PMCでは、セット/リセット動作の際にイオン伝導および電気化学反応を用いるため、セット動作とリセット動作で異なる極性の電圧を抵抗変化素子に印加する。一方、ReRAMのセット/リセット動作では、PMCと同様にセット/リセット動作に異なる極性の電圧を用いる場合と、同一極性(または単極性)の電圧印加によって行う場合のそれぞれの例が報告されている。
PMC uses ionic conduction and electrochemical reaction during the set / reset operation, so that voltages having different polarities are applied to the resistance change element in the set operation and the reset operation. On the other hand, in the ReRAM set / reset operation, there are reported examples of using different polar voltages for the set / reset operation as in the PMC and performing the same polarity (or unipolar) voltage application. .
ペロブスカイト系の材料を用いたReRAMの一例が米国特許6204139号明細書(以下では、特許文献1と称する)に開示されている。この文献に開示されたReRAMでは、セットおよびリセットそれぞれの動作毎に異なる極性の電圧パルスを抵抗変化素子に印加することにより、セット/リセット動作の繰り返しを行うことを可能にしている。
An example of ReRAM using a perovskite material is disclosed in US Pat. No. 6,204,139 (hereinafter referred to as Patent Document 1). In the ReRAM disclosed in this document, it is possible to repeat the set / reset operation by applying voltage pulses having different polarities to the resistance change element for each operation of setting and resetting.
一方、遷移金属酸化物を用いたReRAMの例が、特開2004-363604号公報(以下では、特許文献2と称する)および特開2006-279042号公報(以下では、特許文献3と称する)に開示されている。これらの文献に開示されたReRAMでは、セットおよびリセットのどちらの動作にも単極性の電圧を用いている。単極性の電圧掃引または電圧パルス印加によりセット/リセット動作が可能なため、負電圧発生回路が不要であり、メモリ回路における周辺回路を小さくし、セル占有面積を大きく取ることが可能となっている。
On the other hand, examples of ReRAM using a transition metal oxide are disclosed in Japanese Patent Application Laid-Open No. 2004-363604 (hereinafter referred to as Patent Document 2) and Japanese Patent Application Laid-Open No. 2006-279042 (hereinafter referred to as Patent Document 3). It is disclosed. In the ReRAM disclosed in these documents, a unipolar voltage is used for both set and reset operations. Since the set / reset operation can be performed by unipolar voltage sweep or voltage pulse application, a negative voltage generation circuit is unnecessary, and the peripheral circuit in the memory circuit can be made smaller and the cell occupation area can be increased. .
特許文献2および特許文献3に述べられている遷移金属酸化物を用いた抵抗変化素子ReRAMを有する半導体記憶装置の構成例を、図1を用いて簡単に説明する。
A configuration example of a semiconductor memory device having a resistance change element ReRAM using a transition metal oxide described in Patent Document 2 and Patent Document 3 will be briefly described with reference to FIG.
図1に示す半導体記憶装置100は、MOS(Metal Oxide Semiconductor)型トランジスタ101と、抵抗変化素子102とを有する構成である。MOS型トランジスタ101は、ソース電極111、ドレイン電極112およびゲート電極114を有する。ソース電極111およびドレイン電極112となる不純物拡散層が半導体のシリコン基板110の表面に形成され、シリコン酸化膜に代表されるゲート絶縁膜113がシリコン基板110上に形成され、ポリシリコンに代表されるゲート電極114がゲート絶縁膜113上に形成されている。
A semiconductor memory device 100 shown in FIG. 1 includes a MOS (Metal Oxide Semiconductor) transistor 101 and a resistance change element 102. The MOS transistor 101 has a source electrode 111, a drain electrode 112, and a gate electrode 114. Impurity diffusion layers to be the source electrode 111 and the drain electrode 112 are formed on the surface of the semiconductor silicon substrate 110, and a gate insulating film 113 typified by a silicon oxide film is formed on the silicon substrate 110, typified by polysilicon. A gate electrode 114 is formed on the gate insulating film 113.
抵抗変化素子102は、2つの電極115、116と、これら2つの電極に挟まれた可変抵抗体117とを有する。電極115はMOS型トランジスタ101のドレイン電極112と接続され、電極116は上層に設けられた配線118と接続されている。
The resistance change element 102 includes two electrodes 115 and 116 and a variable resistor 117 sandwiched between these two electrodes. The electrode 115 is connected to the drain electrode 112 of the MOS transistor 101, and the electrode 116 is connected to a wiring 118 provided in the upper layer.
図1に示された半導体記憶装置100において、単極性の電圧を用いた抵抗変化素子102のスイッチング動作について図2を用いて説明する。ここでは、抵抗変化素子102の2つの電極115と116の間に印加される電圧をVSWと表記する。
In the semiconductor memory device 100 shown in FIG. 1, the switching operation of the variable resistance element 102 using a unipolar voltage will be described with reference to FIG. Here, the voltage applied between the two electrodes 115 and 116 of the resistance change element 102 is denoted as V SW .
半導体記憶装置100において、抵抗変化素子102に所望の電圧VSWを印加するためには、VSWより高い電圧をソース電極111と配線118の間に印加し、MOS型トランジスタ101がオフ状態からオン状態になる閾値電圧以上の電圧をゲート電極114に印加するとよい。抵抗変化素子102に印加する電圧VSWと抵抗変化素子102を流れる電流との関係は、図2のグラフに示す関係となる。
In the semiconductor memory device 100, in order to apply a desired voltage V SW to the resistance change element 102, a voltage higher than V SW is applied between the source electrode 111 and the wiring 118, and the MOS transistor 101 is turned on from the off state. A voltage that is equal to or higher than a threshold voltage to be in a state may be applied to the gate electrode 114. The relationship between the voltage V SW applied to the resistance change element 102 and the current flowing through the resistance change element 102 is the relationship shown in the graph of FIG.
抵抗変化素子102が低抵抗状態すなわちセット状態の場合、抵抗変化素子102は、印加電圧VSWに対して図2に示す電圧-電流特性121に従った振る舞いを示す。VSWが低い領域では低抵抗状態のため、電流が多く流れるが、VSWがある電圧V1を超えると、電流値が急激に減少する。これは、抵抗変化素子102が高抵抗状態すなわちリセット状態へとスイッチングした結果である。さらにVSWが増加し、VSWがある電圧V2を超えると、電流値が急激に増加する。これは、抵抗変化素子102が再度セット状態へとスイッチングした結果である。
When the variable resistance element 102 is in the low resistance state, that is, in the set state, the variable resistance element 102 behaves according to the voltage-current characteristic 121 shown in FIG. 2 with respect to the applied voltage VSW . Since the V SW is low region of the low-resistance state, flows much current, it exceeds voltages V 1 there is a V SW, the current value is rapidly reduced. This is a result of switching of the variable resistance element 102 to the high resistance state, that is, the reset state. When V SW further increases and V SW exceeds a certain voltage V 2 , the current value increases rapidly. This is a result of the resistance change element 102 switching to the set state again.
一方、抵抗変化素子102が高抵抗状態すなわちリセット状態の場合、抵抗変化素子102は、印加電圧VSWに対して図2に示す電圧-電流特性122に従った振る舞いを示す。VSWが低い領域では高抵抗状態のため、電流が流れにくいが、電圧V1を超えても高抵抗状態は変化しない。さらにVSWが増加し、VSWが電圧V2を超えると、電流値が急激に増加する。
On the other hand, when the resistance change element 102 is in the high resistance state, that is, the reset state, the resistance change element 102 exhibits a behavior according to the voltage-current characteristic 122 shown in FIG. 2 with respect to the applied voltage VSW . In a region where V SW is low, a high resistance state is present, so that current does not flow easily, but the high resistance state does not change even when the voltage V 1 is exceeded. When V SW further increases and V SW exceeds voltage V 2 , the current value increases rapidly.
図2に示すグラフから、VSW<V1の領域では高抵抗状態および低抵抗状態のいずれも安定であるが、V1<VSW<V2の領域で高抵抗状態が安定であり、VSW>V2の領域で低抵抗状態が安定であることがわかる。特許文献2では、この振る舞いを利用して、抵抗変化素子に対するリセット動作をV1<VSW<V2の条件で行い、セット動作をVSW>V2の条件で行うとよいとしている。一方で、特許文献3では、セット動作をVSW>V2の条件で電圧パルスを1ナノ秒ないし100ナノ秒印加することにより行い、リセット動作をV1<VSW<V2の条件で、電圧パルスを1マイクロ秒ないし100マイクロ秒印加することにより行うのがよいとしている。
From the graph shown in FIG. 2, but in the region of V SW <V 1 which is stable both in the high resistance state and low resistance state, a high resistance state is stabilized in the region of V 1 <V SW <V 2 , V low resistance state in the region of the SW> V 2 is found to be stable. In Patent Document 2, it is recommended to perform the reset operation for the variable resistance element under the condition of V 1 <V SW <V 2 and the set operation under the condition of V SW > V 2 by using this behavior. On the other hand, in Patent Document 3, the set operation is performed by applying a voltage pulse for 1 nanosecond to 100 nanoseconds under the condition of V SW > V 2 , and the reset operation is performed under the condition of V 1 <V SW <V 2 . The voltage pulse is preferably applied by applying 1 microsecond to 100 microseconds.
本発明者らは、半導体記憶装置の研究開発に従事しており、半導体記憶装置の性能改善に関する検討を色々と行っている。特に、セット時の抵抗値が面積に依存せず低くなる抵抗変化素子で、微細化に有利と考えられるReRAMに関して検討を重ねてきた。ReRAMの中でも単極性動作が回路構成上重要と考え、遷移金属酸化物を中心とした抵抗変化材料を検討している。半導体記憶装置の性能改善に関して検討を重ねていくと、いくつかの難点に直面した。ここでは、その中でも重要と考えられる点について、以下に述べる。
The present inventors are engaged in research and development of semiconductor memory devices, and are conducting various studies on improving the performance of semiconductor memory devices. In particular, investigations have been made on ReRAM, which is considered to be advantageous for miniaturization, in a resistance change element in which the resistance value at the time of setting is low regardless of the area. Among ReRAMs, unipolar operation is considered important for circuit configuration, and resistance variable materials centering on transition metal oxides are being studied. As we continued to study the performance improvement of semiconductor memory devices, we faced several difficulties. Here, the points considered to be important are described below.
特許文献2に開示された、上述の構造を試作し、半導体記憶装置の性能改善を検討してみると、データの書き換えを繰り返し行った場合、抵抗値が図3に示すように変化していくことがわかった。すなわち、書き換え回数が増えていくと、ある点で低抵抗状態から高抵抗状態への遷移、すなわちリセット動作が困難となり、スイッチング動作が起こらなくなるということである。また、一方で、図4に示すように、高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となる場合も生じることがわかった。図3および図4で見られる現象はいずれも、抵抗変化素子に対して、書き換え回数を限定するものであり、抵抗変化素子の寿命を限定してしまうものである。
When the above-described structure disclosed in Patent Document 2 is prototyped and the improvement of the performance of the semiconductor memory device is examined, when data is rewritten repeatedly, the resistance value changes as shown in FIG. I understood it. That is, as the number of rewrites increases, the transition from the low resistance state to the high resistance state, that is, the reset operation becomes difficult at a certain point, and the switching operation does not occur. On the other hand, as shown in FIG. 4, it has been found that the transition from the high resistance state to the low resistance state, that is, the set operation may be difficult. 3 and 4 both limit the number of times of rewriting with respect to the variable resistance element, and limit the lifetime of the variable resistance element.
また、スイッチング動作が起こらなくなる症状として、多数回スイッチング動作を繰り返す前、すなわち、抵抗変化素子を利用し始めて比較的初期の段階でも、高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となる場合が生じることもわかった。
Moreover, as a symptom that the switching operation does not occur, it is difficult to make a transition from the high resistance state to the low resistance state, that is, the set operation before repeating the switching operation many times, that is, even at a relatively early stage after using the variable resistance element. It has also been found that there are cases where
本発明において明らかにされる半導体記憶装置は、上述した例の抵抗変化素子ReRAMを有する半導体装置を作製した上で明らかとなった課題を解決するものである。
The semiconductor memory device clarified in the present invention solves the problem that has been clarified after manufacturing the semiconductor device having the variable resistance element ReRAM in the above-described example.
本発明の目的の一つは、抵抗変化素子が高抵抗状態または低抵抗状態に固定され、抵抗変化素子に所望の特性が得られなくなった際に、再度スイッチング動作を可能にした半導体装置、素子再生回路および素子再生方法を提供することである。
One of the objects of the present invention is to provide a semiconductor device and an element in which a switching operation can be performed again when the variable resistance element is fixed in a high resistance state or a low resistance state and a desired characteristic cannot be obtained in the variable resistance element. A reproduction circuit and an element reproduction method are provided.
本発明の一側面の半導体装置は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子を含み、抵抗変化素子は、第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスが入力される復元処理が行われると、上記特性に復元するものである。
In the semiconductor device according to one aspect of the present invention, when the first voltage pulse is input, the semiconductor device transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, the variable resistance element includes a variable resistance element having a characteristic of transition from the second resistance state to the first resistance state, and the resistance change element does not transition even when the first or second voltage pulse is input. When a restoration process is performed in which a third voltage pulse having a positive or negative sign opposite to that of the first or second voltage pulse and a voltage amplitude set to a predetermined value is input, the above characteristics are obtained. It is something to restore.
本発明の一側面の半導体装置は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子を含み、抵抗変化素子は、第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、入力された電圧パルスよりも振幅の大きい第3の電圧パルスが入力される復元処理が行われると、上記特性に復元するものである。
In the semiconductor device according to one aspect of the present invention, when the first voltage pulse is input, the semiconductor device transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, the variable resistance element includes a variable resistance element having a characteristic of transition from the second resistance state to the first resistance state, and the resistance change element does not transition even when the first or second voltage pulse is input. When a restoration process is performed in which a third voltage pulse having an amplitude larger than that of the input voltage pulse is input, the above characteristics are restored.
本発明の一側面の素子再生回路は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子に対して、電圧パルスを入力する電圧パルス生成部と、抵抗変化素子に第1または第2の電圧パルスが入力されても、抵抗変化素子の抵抗状態が遷移しないとき、第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスを抵抗変化素子に入力する復元処理を電圧パルス生成部に行わせる制御部と、を有する構成である。
In the element regeneration circuit according to one aspect of the present invention, when the first voltage pulse is input, the element resistance circuit transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, a voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transitioning from the second resistance state to the first resistance state, and the first or second voltage pulse to the variable resistance element When the resistance state of the resistance change element does not transition even if is input, the third or second voltage pulse having the opposite sign and the voltage amplitude set to a predetermined value with respect to the first or second voltage pulse And a control unit that causes the voltage pulse generation unit to perform a restoration process for inputting the voltage pulse to the resistance change element.
本発明の一側面の素子再生回路は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子に対して、電圧パルスを入力する電圧パルス生成部と、抵抗変化素子に第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、入力された電圧パルスよりも振幅の大きい第3の電圧パルスを抵抗変化素子に入力する復元処理を電圧パルス生成部に行わせる制御部と、を有する構成である。
In the element regeneration circuit according to one aspect of the present invention, when the first voltage pulse is input, the element resistance circuit transits from the first resistance state to the second resistance state having a lower resistance value, and the second voltage pulse is input. Then, a voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transitioning from the second resistance state to the first resistance state, and the first or second voltage pulse to the variable resistance element When the resistance state does not transition even if is input, a control unit that causes the voltage pulse generation unit to perform a restoration process of inputting a third voltage pulse having a larger amplitude than the input voltage pulse to the resistance change element, It is the composition which has.
本発明の一側面の素子再生方法は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子の再生方法であって、抵抗変化素子に第1または第2の電圧パルスを入力し、抵抗変化素子に第1または第2の電圧パルスを入力しても、抵抗変化素子の抵抗状態が遷移しないとき、第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスを抵抗変化素子に入力するものである。
In the element regeneration method according to one aspect of the present invention, when a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value, and the second voltage pulse is input. If so, a method for reproducing a resistance change element having a characteristic of transitioning from a second resistance state to a first resistance state, wherein the first or second voltage pulse is input to the resistance change element, and the resistance change element is input. When the resistance state of the resistance change element does not transition even when the first or second voltage pulse is input, the sign of the positive or negative sign is opposite to that of the first or second voltage pulse, and the voltage amplitude is predetermined. A third voltage pulse set to a value is input to the resistance change element.
本発明の一側面の素子再生方法は、第1の電圧パルスが入力されると第1の抵抗状態からそれよりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると第2の抵抗状態から第1の抵抗状態に遷移する特性を有する抵抗変化素子の再生方法であって、抵抗変化素子に第1または第2の電圧パルスを入力し、抵抗変化素子に第1または第2の電圧パルスが入力しても、抵抗状態が遷移しないとき、入力した電圧パルスよりも振幅の大きい第3の電圧パルスを抵抗変化素子に入力するものである。
In the element regeneration method according to one aspect of the present invention, when a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value, and the second voltage pulse is input. If so, a method for reproducing a resistance change element having a characteristic of transitioning from a second resistance state to a first resistance state, wherein the first or second voltage pulse is input to the resistance change element, and the resistance change element is input. When the resistance state does not change even if the first or second voltage pulse is input, a third voltage pulse having an amplitude larger than that of the input voltage pulse is input to the resistance change element.
本発明者らは、上記課題解決に向けて、抵抗変化素子の再生方法の検討を重ねてきた。以下、本発明の好適な実施形態を、添付した図面を参照しつつ説明する。
In order to solve the above problems, the present inventors have repeatedly studied a method for regenerating the variable resistance element. Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
図5は、本実施形態において、抵抗変化素子の再生動作を行う半導体装置の一構成例を示す模式図である。図5に示すように、半導体装置1は、書き換え電源回路14が接続された抵抗変化素子10を有する構成である。抵抗変化素子10は、第1電極11および第2電極12と、これら2つの電極に挟まれた可変抵抗体13とを有する。第1電極11は書き換え電源回路14に接続され、第2電極12はグラウンド線(接地線)に接続されている。
FIG. 5 is a schematic diagram showing a configuration example of a semiconductor device that performs a reproducing operation of the resistance change element in the present embodiment. As shown in FIG. 5, the semiconductor device 1 has a configuration including a resistance change element 10 to which a rewrite power supply circuit 14 is connected. The resistance change element 10 includes a first electrode 11 and a second electrode 12, and a variable resistor 13 sandwiched between the two electrodes. The first electrode 11 is connected to the rewrite power supply circuit 14, and the second electrode 12 is connected to a ground line (ground line).
抵抗変化素子10を構成する材料として、様々な可変抵抗体と電極材料の組み合わせが報告されており、抵抗変化素子10に用いられる材料の組み合わせは問わない。可変抵抗体13の材料としては、ベースとなる金属と合成されるものとして、酸素、窒素、硫黄、セレン、テルルのうちのいずれか、またはそれらの組み合わせから成る化合物が挙げられる。その中でも、金属と酸素から成る化合物が可変抵抗体13の材料の代表例として挙げられる。
As a material constituting the resistance change element 10, various combinations of variable resistors and electrode materials have been reported, and any combination of materials used for the resistance change element 10 can be used. Examples of the material of the variable resistor 13 include compounds composed of any one of oxygen, nitrogen, sulfur, selenium, tellurium, or a combination thereof, as synthesized with the base metal. Among these, a compound composed of a metal and oxygen is given as a representative example of the material of the variable resistor 13.
可変抵抗体13を構成する金属としては、Cr、Ti、V、Ni、Cu、Zr、Nb、Mo、Hf、Ta、Wが有効であり、その中でもTi、Ni、Cuが代表例として挙げられる。可変抵抗体13の成膜には、スパッタリング法やレーザーアブレーション法、気相化学成長法などを用いればよい。可変抵抗体13の膜厚としては、おおよそ5ナノメートルから300ナノメートルの範囲であることが好ましい。
As the metal constituting the variable resistor 13, Cr, Ti, V, Ni, Cu, Zr, Nb, Mo, Hf, Ta, and W are effective, and among them, Ti, Ni, and Cu are given as typical examples. . For the film formation of the variable resistor 13, a sputtering method, a laser ablation method, a vapor phase chemical growth method or the like may be used. The film thickness of the variable resistor 13 is preferably in the range of approximately 5 nanometers to 300 nanometers.
一方、第1電極11および第2電極12としては、種々の金属を用いることができるが、その中でも、TaN、TiN、Ru、Pt、W、Mo、Taなどが代表例として挙げられる。
On the other hand, as the first electrode 11 and the second electrode 12, various metals can be used. Among them, TaN, TiN, Ru, Pt, W, Mo, Ta, and the like are given as typical examples.
書き換え電源回路14について説明する。図6は図5に示した書き換え電源回路の一構成例を示すブロック図である。図6に示すように、書き換え電源回路14は、電圧パルスを生成する電圧パルス生成部141と、抵抗変化素子10の抵抗値を計測する計測部143と、計測部143の計測結果に基づいて電圧パルス生成部141を制御する制御部142とを有する。制御部142は、プログラムにしたがって処理を実行するCPU(Central Processing Unit)とプログラムを格納するメモリとを有する構成でもよく、所定の処理を実行するための専用回路であってもよい。
The rewrite power supply circuit 14 will be described. FIG. 6 is a block diagram showing a configuration example of the rewrite power supply circuit shown in FIG. As shown in FIG. 6, the rewrite power supply circuit 14 includes a voltage pulse generation unit 141 that generates a voltage pulse, a measurement unit 143 that measures the resistance value of the resistance change element 10, and a voltage based on the measurement result of the measurement unit 143. And a control unit 142 that controls the pulse generation unit 141. The control unit 142 may have a configuration including a CPU (Central Processing Unit) that executes processing according to a program and a memory that stores the program, or may be a dedicated circuit for executing predetermined processing.
電圧パルス生成部141は、電源電圧が外部から供給され、制御部142からの指示にしたがって電圧パルスを抵抗変化素子10に出力する。計測部143は、抵抗変化素子10の抵抗値を計測し、その結果を制御部142に送信する。計測される抵抗値は抵抗変化素子10の特性の指標を示す評価値の一例である。抵抗変化素子10の正常な特性とは、セット動作およびリセット動作を正常に行うことが可能な状態を意味する。
The voltage pulse generator 141 is supplied with a power supply voltage from the outside, and outputs a voltage pulse to the resistance change element 10 in accordance with an instruction from the controller 142. The measurement unit 143 measures the resistance value of the variable resistance element 10 and transmits the result to the control unit 142. The measured resistance value is an example of an evaluation value indicating an index of the characteristic of the resistance change element 10. The normal characteristic of the resistance change element 10 means a state in which the set operation and the reset operation can be normally performed.
制御部142は、抵抗変化素子10に対してセット動作またはリセット動作を指示する旨の書き換え指示が外部から入力されると、その指示を電圧パルス生成部141に送り、入力された指示に対応する電圧パルスを電圧パルス生成部141に出力させる。また、制御部142は、抵抗変化素子10の特性が異常であるか否かの判断基準となる値が予め登録されている。そして、制御部142は、計測部143から評価値を受け取ると、その値を判断基準となる値と比較し、比較の結果、抵抗変化素子10が異常であると判定すると、抵抗変化素子10に対して復元処理を行うことを電圧パルス生成部141に指示する。復元処理を行うことで、抵抗変化素子10において特性復元過程が行われる。復元処理を行うための電圧パルスの条件は制御部142に予め登録されている。
When a rewrite instruction for instructing the resistance change element 10 to perform a set operation or a reset operation is input from the outside, the control unit 142 sends the instruction to the voltage pulse generation unit 141 and corresponds to the input instruction. The voltage pulse is output to the voltage pulse generator 141. In addition, the control unit 142 is registered in advance with a value that is a criterion for determining whether or not the characteristic of the resistance change element 10 is abnormal. Then, when the control unit 142 receives the evaluation value from the measurement unit 143, the control unit 142 compares the value with a value serving as a determination criterion, and if the comparison result determines that the resistance change element 10 is abnormal, The voltage pulse generation unit 141 is instructed to perform the restoration process. By performing the restoration process, the characteristic restoration process is performed in the variable resistance element 10. The condition of the voltage pulse for performing the restoration process is registered in the control unit 142 in advance.
なお、ここでは、抵抗変化素子10の特性が異常であるか否かの判断基準となる値が制御部142に登録されているとしたが、計測部143に登録されていてもよい。また、復元処理を行うための電圧パルスの条件が制御部142に登録されているとしたが、電圧パルス生成部141に登録されていてもよい。
Note that, here, a value that is a criterion for determining whether or not the characteristic of the resistance change element 10 is abnormal is registered in the control unit 142, but may be registered in the measurement unit 143. In addition, although the voltage pulse condition for performing the restoration process is registered in the control unit 142, it may be registered in the voltage pulse generation unit 141.
また、第2電極12側は、この形態で示したグラウンド線15に限らず、別の回路やトランジスタが接続された形態もありうる。重要なのは、抵抗変化素子10の第1電極11と第2電極12の間に抵抗変化素子10を書き換えるための十分な電圧が印加されるための能力を有する書き換え電源回路14であるということである。
Further, the second electrode 12 side is not limited to the ground line 15 shown in this form, and another circuit or transistor may be connected. What is important is that the rewrite power supply circuit 14 has the capability to apply a sufficient voltage for rewriting the resistance change element 10 between the first electrode 11 and the second electrode 12 of the resistance change element 10. .
また、図5では抵抗変化素子10と書き換え電源回路14が直接接続された形態で描かれているが、メモリ回路のように抵抗変化素子10と書き換え電源回路14の間に1または複数個のトランジスタが設けられていてもよい。
In FIG. 5, the resistance change element 10 and the rewrite power supply circuit 14 are directly connected, but one or a plurality of transistors are provided between the resistance change element 10 and the rewrite power supply circuit 14 as in a memory circuit. May be provided.
本実施形態の半導体装置は、第1の電圧パルスが入力されると高抵抗状態から低抵抗状態へと遷移し、第2の電圧パルスが入力されると低抵抗状態から高抵抗状態へと遷移する抵抗変化素子を有する半導体装置であり、抵抗変化素子の特性が意図した変化を示さない際に、抵抗変化素子に対して、第1または第2の電圧パルスと逆符号で、電圧値が所定の範囲内のいずれかの値に設定された電圧パルスを印加すると、抵抗変化素子にその特性を復元する過程が行われる。
The semiconductor device of this embodiment transitions from a high resistance state to a low resistance state when a first voltage pulse is input, and transitions from a low resistance state to a high resistance state when a second voltage pulse is input. When the characteristic of the variable resistance element does not exhibit the intended change, the voltage value of the variable resistance element is a predetermined value opposite to that of the first or second voltage pulse. When a voltage pulse set to any value within the range is applied, a process of restoring the characteristics of the variable resistance element is performed.
また、本実施形態の半導体装置は、第1または第2の電圧パルスが入力された際に抵抗変化素子の特性の指標となる評価値を計測する手段を備え、計測手段で計測された評価値が、所定の値に達した時に、抵抗変化素子に対して、極性および電圧値が予め定められた電圧パルスを印加して、特性を復元する過程が行われてもよい。
In addition, the semiconductor device of this embodiment includes means for measuring an evaluation value that serves as an index of the characteristic of the resistance change element when the first or second voltage pulse is input, and the evaluation value measured by the measuring means. However, when a predetermined value is reached, a process of restoring the characteristics by applying a voltage pulse having a predetermined polarity and voltage value to the variable resistance element may be performed.
また、本実施形態の半導体装置は、第1または第2の電圧パルスが入力された際に抵抗変化素子の特性の指標となる評価値を計測する手段を備え、計測手段で計測された評価値を予め設定した基準値と比較した結果、意図した特性が得られない際に、抵抗変化素子に対して、極性および電圧値が予め定められた電圧パルスを印加して、特性を復元する過程が行われてもよい。
In addition, the semiconductor device of this embodiment includes means for measuring an evaluation value that serves as an index of the characteristic of the resistance change element when the first or second voltage pulse is input, and the evaluation value measured by the measuring means. Is a process of restoring the characteristics by applying a voltage pulse having a predetermined polarity and voltage value to the resistance change element when the intended characteristics are not obtained as a result of comparison with a preset reference value. It may be done.
上記極性および電圧値が予め定められた電圧パルスは、第1または第2の電圧パルスと逆符号で、電圧値が所定の範囲内のいずれかの値に設定された電圧パルスであってもよい。
The voltage pulse in which the polarity and the voltage value are determined in advance may be a voltage pulse having an opposite sign to that of the first or second voltage pulse and the voltage value being set to any value within a predetermined range. .
そして、抵抗変化素子を低抵抗状態から高抵抗状態に変化させる動作をリセット動作と定義すると、評価値としてリセット動作後の抵抗値が計測され、抵抗変化素子を高抵抗状態から低抵抗状態に変化させる動作をセット動作と定義すると、評価値としてセット動作後の抵抗値が計測されてもよい。
If the operation that changes the resistance change element from the low resistance state to the high resistance state is defined as the reset operation, the resistance value after the reset operation is measured as an evaluation value, and the resistance change element changes from the high resistance state to the low resistance state. If the operation to be performed is defined as a set operation, a resistance value after the set operation may be measured as an evaluation value.
上記特性を復元するために行われる過程においては、印加される電圧パルスの振幅が、情報を記録する際に印加される電圧パルスの電圧の絶対値の0.5倍以上3倍以下であることが好ましく、0.75倍以上1.5倍以下であることがより好ましい。
In the process performed to restore the above characteristics, the amplitude of the applied voltage pulse is not less than 0.5 times and not more than 3 times the absolute value of the voltage pulse applied when recording information. Is preferable, and it is more preferable that it is 0.75 times or more and 1.5 times or less.
また、本発明の別の形態の半導体装置は、第1の電圧パルスが入力されると高抵抗状態から低抵抗状態へと遷移し、第2の電圧パルスが入力されると低抵抗状態から高抵抗状態へと遷移する抵抗変化素子を有する半導体装置において、抵抗変化素子の特性が意図した変化を示さない際に、抵抗変化素子に対して、第1または第2の電圧パルスより大きな振幅の電圧パルスを印加して、特性を復元する過程が行われる。
The semiconductor device according to another embodiment of the present invention transitions from the high resistance state to the low resistance state when the first voltage pulse is input, and from the low resistance state when the second voltage pulse is input. In a semiconductor device having a resistance change element that transitions to a resistance state, when the characteristic of the resistance change element does not exhibit the intended change, a voltage having a larger amplitude than the first or second voltage pulse is applied to the resistance change element. A process of restoring the characteristics by applying a pulse is performed.
上記特性を復元するために行われる過程においては、印加される電圧パルスの振幅が、情報を記録する際に印加される電圧パルスの電圧の1.01倍以上3倍以下であることが好ましい。また、上記特性を復元するためのパルスが2回以上連続して印加されることが好ましい。
In the process performed to restore the above characteristics, it is preferable that the amplitude of the applied voltage pulse is 1.01 to 3 times the voltage of the voltage pulse applied when recording information. Moreover, it is preferable that a pulse for restoring the above characteristics is continuously applied twice or more.
そして、上記特性を復元するために行われる過程の直後に、情報を記録する際に印加される電圧パルスの振幅が、通常の情報を記録する際に印加される電圧パルス振幅の3/4以下であることが好ましい。
Immediately after the process performed to restore the above characteristics, the amplitude of the voltage pulse applied when recording information is 3/4 or less of the voltage pulse amplitude applied when recording normal information. It is preferable that
また、抵抗変化素子に対して、第1電極および第2電極の間に、同符号の電圧を印加することにより、低抵抗状態と高抵抗状態との間を可逆的に変化させてもよい。
Further, by applying a voltage having the same sign between the first electrode and the second electrode with respect to the variable resistance element, the low resistance state and the high resistance state may be reversibly changed.
上述した本発明における、抵抗変化素子を有する半導体装置は、現在の集積回路形成の手法を用いて十分実現可能なものであり、関連する半導体装置の集積回路形成技術を有するものであれば、半導体装置の再生を問題なく行うことができる。所望のセット/リセット動作が起こらなくなってしまった抵抗変化素子に対して、本発明により明らかにされた半導体装置の再生方法を用いることにより、その抵抗変化素子を再度スイッチング可能な状態に再生し、抵抗変化素子だけでなく、その抵抗変化素子を有する半導体装置の寿命を延ばすことが可能になる。
The semiconductor device having a variable resistance element according to the present invention described above can be sufficiently realized by using a current integrated circuit formation technique, and any semiconductor device having an integrated circuit formation technology for a related semiconductor device can be used. The apparatus can be reproduced without any problem. By using the semiconductor device regeneration method disclosed by the present invention for a resistance change element in which a desired set / reset operation has ceased to occur, the resistance change element is regenerated into a switchable state, The lifetime of not only the resistance change element but also the semiconductor device having the resistance change element can be extended.
本発明の半導体装置によれば、抵抗変化素子のスイッチング回数を数100回程度から大幅に向上することができ、抵抗変化素子および抵抗変化素子を有する半導体装置の寿命を大幅に伸ばすことが可能となる。また、抵抗変化素子を利用し始めて比較的初期の段階でも、高抵抗状態から低抵抗状態へ遷移するスイッチング動作、すなわちセット動作が困難となる場合が生じた際に、再度スイッチング動作が可能な状態に戻すことが可能となる。これにより、抵抗変化素子および抵抗変化素子を有する半導体装置の歩留まりを大幅に向上することも可能となる。
According to the semiconductor device of the present invention, the number of switching of the resistance change element can be greatly improved from about several hundred times, and the life of the semiconductor device having the resistance change element and the resistance change element can be greatly extended. Become. In addition, even in a relatively early stage after using the variable resistance element, when a switching operation that transitions from a high resistance state to a low resistance state, that is, when a setting operation becomes difficult, the switching operation can be performed again. It becomes possible to return to. As a result, the yield of the variable resistance element and the semiconductor device having the variable resistance element can be greatly improved.
上記した本発明の実施の形態についてさらに詳細に説明すべく、以下に、実施例を、図面を参照して詳細に説明する。
In order to describe the above-described embodiment of the present invention in more detail, examples will be described in detail below with reference to the drawings.
本発明者らは、以上の構成を有する半導体装置1中の抵抗変化素子で単極性動作を中心に検討を行った。膜厚が100ナノメートル、材料がNiOの可変抵抗体13と、材料がRuの第1電極11および第2電極12を有する抵抗変化素子10を作製した。
The inventors of the present invention have studied the unipolar operation centered on the variable resistance element in the semiconductor device 1 having the above configuration. A variable resistance element 10 having a variable resistor 13 having a thickness of 100 nanometers and made of NiO, and a first electrode 11 and a second electrode 12 made of Ru was produced.
以下では、抵抗変化素子10への電圧パルスの入力は、外部からの指示入力または制御部142の制御処理により書き換え電源回路14が行うものとし、その詳細な説明を省略する。
In the following, it is assumed that the voltage pulse input to the resistance change element 10 is performed by the rewrite power supply circuit 14 by external instruction input or control processing of the control unit 142, and detailed description thereof is omitted.
図7は本実施例の半導体装置における抵抗変化素子の単極性動作の具体例を示すグラフである。
FIG. 7 is a graph showing a specific example of the unipolar operation of the variable resistance element in the semiconductor device of this example.
高抵抗状態から低抵抗状態へのセット動作では、例えば8ボルトの電圧振幅を有し、300ナノ秒のパルスを印加すればよい。また、低抵抗状態から高抵抗状態へのリセット動作では、例えば3ボルトの電圧振幅を有し、50マイクロ秒のパルスを印加すればよい。このような、セット動作およびリセット動作の条件で高抵抗状態と低抵抗状態の間の繰り返しスイッチングが実現可能となっている。
In the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 8 volts and a 300 nanosecond pulse may be applied. Further, in the reset operation from the low resistance state to the high resistance state, for example, a pulse having a voltage amplitude of 3 volts and 50 microseconds may be applied. Such switching between the high resistance state and the low resistance state can be realized under the conditions of the set operation and the reset operation.
ところで、この抵抗変化素子10では、繰り返して書き換え動作を行うと、数100回程度までは、良好に高抵抗状態と低抵抗状態の間をスイッチングするが、その後に低抵抗状態から高抵抗状態への遷移、すなわちリセット動作が困難となり、スイッチング動作が起こらなくなるケースが多々生じた。その様子は図3に示したとおりである。
By the way, in this resistance change element 10, when the rewrite operation is repeatedly performed, the high resistance state and the low resistance state are satisfactorily switched up to several hundred times. Thereafter, the low resistance state is changed to the high resistance state. In many cases, the transition, i.e., the reset operation becomes difficult, and the switching operation does not occur. The situation is as shown in FIG.
このような抵抗値の振る舞いは、抵抗変化素子10および半導体装置1の寿命の観点から好ましくないが、抵抗変化素子10に対して、次のような手法により、このような振る舞いを回復させ、スイッチング特性を復元することができることがわかった。
Such a behavior of the resistance value is not preferable from the viewpoint of the lifetime of the resistance change element 10 and the semiconductor device 1. However, the behavior of the resistance change element 10 is recovered by the following method, and switching is performed. It was found that the characteristics can be restored.
特性復元過程として、スイッチング動作が起こらなくなった抵抗変化素子10に対して、通常、情報を記録する際に印加される電圧パルスとは逆符号の電圧パルスを印加することにより、スイッチング動作が起こらなくなった抵抗変化素子10を再度スイッチング可能な状態にすることができる。このように、特性復元過程を行うことにより、抵抗変化素子10および半導体装置1の寿命を大幅に伸ばすことが可能となる。
As a characteristic restoration process, a switching operation does not occur by applying a voltage pulse having a sign opposite to that of a voltage pulse that is normally applied when recording information to the variable resistance element 10 in which the switching operation does not occur. The variable resistance element 10 can be brought into a switchable state again. Thus, by performing the characteristic restoration process, it is possible to significantly extend the lifetimes of the variable resistance element 10 and the semiconductor device 1.
図8に、通常の単極性動作時のセット/リセット動作および特性復元過程に用いる電圧パルスを模式的に示した。また、図9には通常のセット/リセット動作、スイッチングが起こらなくなった状態、特性復元過程、および特性復元後の抵抗値の変遷を模式的に示した。
FIG. 8 schematically shows voltage pulses used in the set / reset operation and the characteristic restoration process during normal unipolar operation. FIG. 9 schematically shows a normal set / reset operation, a state in which switching does not occur, a characteristic restoration process, and a change in resistance value after characteristic restoration.
なお、リセット動作が困難になった場合の特性復元過程に必要な電圧振幅は、上記の膜厚を有する可変抵抗体13の場合、-4ボルトから-24ボルト程度で、より好ましくは-6ボルトから-12ボルト程度であった。この場合の、通常のセット動作で必要な電圧振幅は8ボルト程度である。また、可変抵抗体13となるNiOの膜厚が50ナノメートルの場合、高抵抗状態から低抵抗状態へのセット動作では、例えば4ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合の特性復元過程に必要な電圧振幅は、-2ボルトから-12ボルト程度である。したがって、リセット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がセット動作の0.5倍から3倍程度、より好ましくは0.75倍から1.5倍程度とすればよいことになる。
In the case of the variable resistor 13 having the above film thickness, the voltage amplitude necessary for the characteristic restoration process when the reset operation becomes difficult is about −4 volts to −24 volts, more preferably −6 volts. To about -12 volts. In this case, the voltage amplitude necessary for the normal set operation is about 8 volts. Further, when the film thickness of NiO serving as the variable resistor 13 is 50 nanometers, in the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 4 volts may be applied. The voltage amplitude required for the characteristic restoration process is about -2 volts to -12 volts. Therefore, in the characteristic restoration process when the reset operation becomes difficult, the sign is reversed, and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the set operation. It will be enough if it is about.
また、特性復元過程において印加するパルスの幅は、1ナノ秒と短いものから1秒と長いものまで、有効であることがわかった。なお、同じパルスを多数回入力すると、より確実な特性復元が可能であることもわかった。特性復元処理を実行する際、所定の時間内に電圧パルスを2回以上連続して抵抗変化素子10に入力するとよい。
It was also found that the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It has also been found that more reliable characteristic restoration is possible when the same pulse is input many times. When executing the characteristic restoration process, it is preferable to input the voltage pulse to the resistance change element 10 continuously two or more times within a predetermined time.
さらに、特性復元過程を行った素子において、直後に情報を記録する際には、印加する電圧パルスの振幅を通常の情報記録時に用いる電圧よりも低く設定することが好ましいことがわかった。例えば、上述した、100ナノメートルの膜厚を有する可変抵抗体13の場合、通常の情報記録時には8ボルトの電圧振幅を用い、特性復元過程では-4ボルトから-12ボルトを用いるが、特性復元過程直後の情報記録時には、8ボルトの3/4以下すなわち6ボルト以下の電圧で十分セット動作が行えることがわかった。
Further, it was found that, in the element subjected to the characteristic restoration process, when information is recorded immediately after, it is preferable that the amplitude of the applied voltage pulse is set lower than the voltage used in normal information recording. For example, in the case of the variable resistor 13 having a film thickness of 100 nanometers described above, a voltage amplitude of 8 volts is used for normal information recording, and -4 volts to -12 volts are used in the characteristic restoration process. At the time of recording information immediately after the process, it was found that a sufficient setting operation could be performed with a voltage of 3/4 or less of 8 volts, that is, 6 volts or less.
なお、以上では、セット動作およびリセット動作の際に同符号の電圧を印加する、単極性動作の場合の特性復元過程について説明したが、以上の手法はセット動作とリセット動作の際に異なる符号の電圧を印加する、双極性動作の場合の特性復元過程にも拡張可能である。
In the above, the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described. However, the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
図10に、通常の双極性動作時のセット/リセット動作および特性復元過程に用いる電圧パルスを模式的に示した。
FIG. 10 schematically shows voltage pulses used for the set / reset operation and the characteristic restoration process during normal bipolar operation.
例えば、高抵抗状態から低抵抗状態へのセット動作では、8ボルトの電圧振幅を有し、300ナノ秒のパルスを印加し、低抵抗状態から高抵抗状態へのリセット動作では、セット動作とは逆符号である-4ボルトの電圧振幅を有し10マイクロ秒のパルスを印加するような場合について説明する。この場合において、低抵抗状態から高抵抗状態への遷移、すなわちリセット動作が困難となり、スイッチング動作が起こらなくなるケースが生じると、100ナノメートルの膜厚を有する可変抵抗体13では、特性復元過程に必要な電圧振幅は、-4ボルトから-24ボルト程度で、より好ましくは-6ボルトから-12ボルト程度であった。また、可変抵抗体13となるNiOの膜厚が50ナノメートルの場合、高抵抗状態から低抵抗状態へのセット動作では、例えば4ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合の特性復元過程に必要な電圧振幅は、-2ボルトから-12ボルト程度であった。したがって、リセット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がセット動作の0.5倍から3倍程度、より好ましくは0.75倍から1.5倍程度とすればよいことになる。
For example, the set operation from the high resistance state to the low resistance state has a voltage amplitude of 8 volts, a pulse of 300 nanoseconds is applied, and the reset operation from the low resistance state to the high resistance state is the set operation. A case where a pulse of 10 microseconds having a voltage amplitude of -4 volts as an opposite sign is applied will be described. In this case, when the transition from the low resistance state to the high resistance state, that is, the reset operation becomes difficult and the switching operation does not occur, the variable resistor 13 having a film thickness of 100 nanometers undergoes the characteristic restoration process. The required voltage amplitude was about -4 volts to -24 volts, more preferably about -6 volts to -12 volts. Further, when the film thickness of NiO serving as the variable resistor 13 is 50 nanometers, in the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 4 volts may be applied. The voltage amplitude required for the characteristic restoration process was about -2 volts to -12 volts. Therefore, in the characteristic restoration process when the reset operation becomes difficult, the sign is reversed, and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the set operation. It will be enough if it is about.
続いて、本実施例において、別の再生方法を説明する。それは、特性変動を監視して、特性復元過程を行うようにするものである。
Subsequently, another reproduction method will be described in this embodiment. It monitors the characteristic variation and performs the characteristic restoration process.
この再生方法では、リセット動作後に抵抗変化素子10の抵抗値の評価を行う。これにより、抵抗変化素子10のリセット動作が確実に行われたかを管理することが可能となり、特性復元過程を行うか否かを判断できるようになる。この再生方法の手順を図11に示すフローチャートを参照して説明する。ここでは、書き換え電源回路14の制御部142が図11に示す手順で処理を実行する場合で説明する。
In this reproduction method, the resistance value of the resistance change element 10 is evaluated after the reset operation. As a result, it is possible to manage whether or not the reset operation of the resistance change element 10 has been reliably performed, and it is possible to determine whether or not to perform the characteristic restoration process. The procedure of this reproduction method will be described with reference to the flowchart shown in FIG. Here, a description will be given of a case where the control unit 142 of the rewrite power supply circuit 14 executes processing according to the procedure shown in FIG.
制御部142は、外部からリセット動作の指示が入力されると、電圧パルス生成部141にリセット動作のための電圧パルスを生成させ、電圧パルス生成部141は生成した電圧パルスを抵抗変化素子10に印加する(ステップ1)。これにより、抵抗変化素子10を低抵抗状態から高抵抗状態に変化させる。続いて、計測部143が抵抗値を計測し、計測値を制御部142に送信する。制御部142は、計測部143から計測値を受け取ると、計測値と設定値とを比較する(ステップ2)。設定値は、抵抗変化素子10が正常にリセット動作した場合の抵抗値の下限値であり、制御部142に記録されている。
When a reset operation instruction is input from the outside, the control unit 142 causes the voltage pulse generation unit 141 to generate a voltage pulse for the reset operation, and the voltage pulse generation unit 141 sends the generated voltage pulse to the resistance change element 10. Apply (step 1). Thereby, the resistance change element 10 is changed from the low resistance state to the high resistance state. Subsequently, the measurement unit 143 measures the resistance value and transmits the measurement value to the control unit 142. When receiving the measurement value from the measurement unit 143, the control unit 142 compares the measurement value with the set value (step 2). The set value is a lower limit value of the resistance value when the variable resistance element 10 is normally reset, and is recorded in the control unit 142.
そして、制御部142は、リセット動作により抵抗変化素子10が所望の高抵抗状態になっているかを調べるために、計測値が設定値よりも大きいか否かを判定する(ステップ3)。ステップ3において、抵抗変化素子10の計測値がセット動作後の抵抗値程度の値であると、計測値が設定値よりも小さくなる。計測値が設定値よりも小さいことは、リセット動作が困難になっていることを示しており、意図している特性変化が得られていないことになる。そのため、制御部142は、抵抗変化素子10に特性復元過程を起こさせる必要があると判断し、特性復元処理を実行する(ステップ4)。
And the control part 142 determines whether a measured value is larger than a setting value, in order to investigate whether the variable resistance element 10 will be in the desired high resistance state by reset operation (step 3). In step 3, when the measured value of the resistance change element 10 is about the resistance value after the setting operation, the measured value becomes smaller than the set value. If the measured value is smaller than the set value, it indicates that the reset operation is difficult, and the intended characteristic change is not obtained. Therefore, the control unit 142 determines that it is necessary to cause the variable resistance element 10 to undergo a characteristic restoration process, and executes a characteristic restoration process (step 4).
一方、ステップ3において、抵抗変化素子10の計測値がセット動作後の抵抗値よりも十分に高い値であると、計測値が設定値よりも大きくなる。計測値が設定値よりも大きいことは、リセット動作が正常に行われていることを示しており、意図している特性変化が得られていることになる。そのため、制御部142は、抵抗変化素子10が正常な特性を示していると判断し、次の書き換え指示入力によるセット動作を行うまで(ステップ5)、待機する。
On the other hand, when the measured value of the resistance change element 10 is sufficiently higher than the resistance value after the set operation in Step 3, the measured value becomes larger than the set value. That the measured value is larger than the set value indicates that the reset operation is normally performed, and the intended characteristic change is obtained. For this reason, the control unit 142 determines that the variable resistance element 10 exhibits normal characteristics, and waits until the next set operation based on the rewrite instruction input is performed (step 5).
リセット動作が困難になり、スイッチングが起こらなくなってしまった抵抗変化素子10に対して、このような再生方法を行うことで、抵抗変化素子10を再度スイッチング可能な状態にすることが可能となることが示された。これは、抵抗変化素子10をメモリ回路に適用した場合でも、フィールド・プログラマブル・ゲート・アレイなどに代表される書き換え可能なロジック回路に用いた場合でも、抵抗変化素子10および抵抗変化素子10を有する半導体装置1の寿命を延長することが可能となることを意味している。
By performing such a regeneration method on the variable resistance element 10 in which the reset operation becomes difficult and switching has not occurred, it becomes possible to make the variable resistance element 10 switchable again. It has been shown. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the life of the semiconductor device 1 can be extended.
実施例1では、可変抵抗体13としてNiOを用いたが、可変抵抗体13の材料が異なると、示す挙動が異なってくることが判明した。本実例は、可変抵抗体の材料に実施例1の場合と異なる材料を用いた場合における、抵抗変化素子の再生方法に関する。
In Example 1, NiO was used as the variable resistor 13, but it was found that the behavior shown differs when the material of the variable resistor 13 is different. This example relates to a method for regenerating a variable resistance element when a material different from that of the first embodiment is used as the variable resistor material.
本実施例では、膜厚が100ナノメートル、材料がTiO(N)の可変抵抗体13と、材料がRuの第1電極11および第2電極12とを有する抵抗変化素子10を用いた。
In this example, the variable resistance element 10 having the variable resistor 13 having a film thickness of 100 nanometers and the material being TiO (N) and the first electrode 11 and the second electrode 12 having the material Ru was used.
以下では、抵抗変化素子10への電圧パルスの入力は、外部からの指示入力または制御部142の制御処理により書き換え電源回路14が行うものとし、その詳細な説明を省略する。
In the following, it is assumed that the voltage pulse input to the resistance change element 10 is performed by the rewrite power supply circuit 14 by external instruction input or control processing of the control unit 142, and detailed description thereof is omitted.
本実施例の抵抗変化素子10での単極性動作では、高抵抗状態から低抵抗状態へのセット動作では、例えば8ボルトの電圧振幅を有し、300ナノ秒のパルスを印加すればよい。また、低抵抗状態から高抵抗状態へのリセット動作では、例えば3ボルトの電圧振幅を有し、50マイクロ秒のパルスを印加すればよい。このような、セット動作およびリセット動作の条件で高抵抗状態と低抵抗状態の間の繰り返しスイッチングが実現可能となっている。
In the unipolar operation of the variable resistance element 10 of the present embodiment, in the set operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 8 volts and a pulse of 300 nanoseconds may be applied. Further, in the reset operation from the low resistance state to the high resistance state, for example, a pulse having a voltage amplitude of 3 volts and 50 microseconds may be applied. Such switching between the high resistance state and the low resistance state can be realized under the conditions of the set operation and the reset operation.
ところで、この抵抗変化素子10では、繰り返して書き換え動作を行うと、数100回程度までは、良好に高抵抗状態と低抵抗状態の間をスイッチングするが、その後に高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となり、スイッチング動作が起こらなくなるケースが多々生じた。NiOではリセット動作が困難になる現象が生じたが、TiO(N)ではセット動作が困難になった点が実施例1との大きな相違である。
By the way, in this resistance change element 10, when rewriting operation is repeated, the high resistance state and the low resistance state are satisfactorily switched up to several hundred times. Thereafter, the high resistance state is changed to the low resistance state. Transition, that is, the set operation becomes difficult, and there are many cases where the switching operation does not occur. The phenomenon that the reset operation becomes difficult with NiO occurs, but the set operation becomes difficult with TiO (N), which is a major difference from the first embodiment.
このような抵抗値の振る舞いは、抵抗変化素子10および半導体装置1の寿命の観点から好ましくないが、抵抗変化素子10に対して、次のような手法により、このような振る舞いを回復させ、スイッチング特性を復元することができることがわかった。
Such a behavior of the resistance value is not preferable from the viewpoint of the lifetime of the resistance change element 10 and the semiconductor device 1. However, the behavior of the resistance change element 10 is recovered by the following method, and switching is performed. It was found that the characteristics can be restored.
特性復元過程として、スイッチング動作が起こらなくなった抵抗変化素子10に対して、通常、情報を記録する際に印加される電圧パルスとは逆符号の電圧パルスを印加することにより、スイッチング動作が起こらなくなった抵抗変化素子10を再度スイッチング可能な状態にすることができる。このように、特性復元過程を行うことにより、抵抗変化素子10および半導体装置1の寿命を大幅に伸ばすことが可能となる。
As a characteristic restoration process, a switching operation does not occur by applying a voltage pulse having a sign opposite to that of a voltage pulse that is normally applied when recording information to the variable resistance element 10 in which the switching operation does not occur. The variable resistance element 10 can be brought into a switchable state again. Thus, by performing the characteristic restoration process, it is possible to significantly extend the lifetimes of the variable resistance element 10 and the semiconductor device 1.
図12に、通常の単極性動作時のセット/リセット動作および特性復元過程に用いる電圧パルスを模式的に示した。また、図13には通常のセット/リセット動作、スイッチングが起こらなくなった状態、特性復元過程、および特性復元後の抵抗値の変遷を模式的に示した。
FIG. 12 schematically shows voltage pulses used for a set / reset operation and a characteristic restoration process during normal unipolar operation. FIG. 13 schematically shows a normal set / reset operation, a state in which switching does not occur, a characteristic restoration process, and a change in resistance value after characteristic restoration.
なお、セット動作が困難になった場合の特性復元過程に必要な電圧振幅は、上記の膜厚を有する可変抵抗体13の場合、-1.5ボルトから-9ボルト程度で、より好ましくは-2.25ボルトから-4.5ボルトであった。この場合の、通常のリセット動作で必要な電圧振幅は3ボルト程度である。また、可変抵抗体13であるTiONの膜厚が50ナノメートルの場合、低抵抗状態から高抵抗状態へのリセット動作では、例えば1.5ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合の特性復元過程に必要な電圧振幅は、-0.75ボルトから-4.5ボルト程度である。したがって、セット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がリセット動作の0.5倍から3倍程度、より好ましくは0.75倍から1.5倍程度とすればよいことになる。
In the case of the variable resistor 13 having the above film thickness, the voltage amplitude necessary for the characteristic restoration process when the set operation becomes difficult is about −1.5 volts to −9 volts, more preferably − 2.25 volts to -4.5 volts. In this case, the voltage amplitude required for the normal reset operation is about 3 volts. In addition, when the film thickness of TiON that is the variable resistor 13 is 50 nanometers, in the reset operation from the low resistance state to the high resistance state, for example, a pulse having a voltage amplitude of 1.5 volts may be applied. In this case, the voltage amplitude required for the characteristic restoration process is about -0.75 to -4.5 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude is about 0.5 to 3 times, more preferably 0.75 to 1.5 times that of the reset operation. It will be enough if it is about.
また、特性復元過程において印加するパルスの幅は、1ナノ秒と短いものから1秒と長いものまで、有効であることがわかった。なお、同じパルスを多数回入力すると、より確実な特性復元が可能であることもわかった。特性復元処理を実行する際、所定の時間内に電圧パルスを2回以上連続して抵抗変化素子10に入力するとよい。
It was also found that the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It has also been found that more reliable characteristic restoration is possible when the same pulse is input many times. When executing the characteristic restoration process, it is preferable to input the voltage pulse to the resistance change element 10 continuously two or more times within a predetermined time.
さらに、特性復元過程を行った素子において、直後に情報を消去する際には、印加する電圧パルスの振幅を通常の情報消去時に用いる電圧よりも低く設定することが好ましいことがわかった。例えば、上述した、100ナノメートルの膜厚を有する可変抵抗体13の場合、通常の情報消去時には3ボルトの電圧振幅を用い、特性復元過程では-1.5ボルトから-4.5ボルトを用いるが、特性復元過程直後の情報消去時には、3ボルトの3/4以下すなわち2.25ボルト以下の電圧で十分セット動作が行えることがわかった。
Furthermore, it was found that, in the element that has undergone the characteristic restoration process, when erasing information immediately after, it is preferable to set the amplitude of the applied voltage pulse lower than the voltage used during normal information erasure. For example, in the case of the variable resistor 13 having a film thickness of 100 nanometers described above, a voltage amplitude of 3 volts is used for normal information erasing, and −1.5 to −4.5 volts is used in the characteristic restoration process. However, when erasing information immediately after the characteristic restoration process, it was found that a sufficient setting operation can be performed at a voltage of 3/4 or less of 3 volts, that is, 2.25 volts or less.
なお、以上では、セット動作およびリセット動作の際に同符号の電圧を印加する、単極性動作の場合の特性復元過程について説明したが、以上の手法はセット動作とリセット動作の際に異なる符号の電圧を印加する、双極性動作の場合の特性復元過程にも拡張可能である。
In the above, the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described. However, the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
例えば、高抵抗状態から低抵抗状態へのセット動作では、8ボルトの電圧振幅を有し300ナノ秒のパルスを印加し、低抵抗状態から高抵抗状態へのリセット動作では、セット動作とは逆符号である-4ボルトの電圧振幅を有し10マイクロ秒のパルスを印加するような場合について説明する。この場合において、高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となり、スイッチング動作が起こらなくなるケースが生じると、特性復元過程に必要な電圧振幅は、100ナノメートルの膜厚を有する可変抵抗体13の場合、8ボルトから12ボルト程度であった。また、可変抵抗体13であるTiONの膜厚が50ナノメートルの場合、低抵抗状態から高抵抗状態へのリセット動作では、例えば-2ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合、特性復元過程に必要な電圧振幅は、4ボルトから6ボルト程度であった。したがって、セット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がセット動作の2倍から3倍程度とすればよいことになる。
For example, in the set operation from the high resistance state to the low resistance state, a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is applied, and in the reset operation from the low resistance state to the high resistance state, it is opposite to the set operation. A case will be described in which a pulse having a voltage amplitude of -4 volts as a sign and a pulse of 10 microseconds is applied. In this case, when the transition from the high resistance state to the low resistance state, that is, the set operation becomes difficult and the switching operation does not occur, the voltage amplitude necessary for the characteristic restoration process has a film thickness of 100 nanometers. In the case of the variable resistor 13, it was about 8 to 12 volts. Further, when the film thickness of TiON which is the variable resistor 13 is 50 nanometers, in the reset operation from the low resistance state to the high resistance state, for example, a pulse having a voltage amplitude of −2 volts may be applied. In this case, the voltage amplitude required for the characteristic restoration process was about 4 to 6 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 2 to 3 times that of the set operation.
続いて、本実施例において、別の再生方法を説明する。それは、特性変動を監視して、特性復元過程を行うようにするものである。
Subsequently, another reproduction method will be described in this embodiment. It monitors the characteristic variation and performs the characteristic restoration process.
この再生方法では、セット動作後に抵抗変化素子10の抵抗値の評価を行う。これにより、抵抗変化素子10のセット動作が確実に行われたかを管理することが可能となり、特性復元過程を行うか否かを判断できるようになる。
In this reproduction method, the resistance value of the variable resistance element 10 is evaluated after the set operation. Thereby, it is possible to manage whether or not the setting operation of the resistance change element 10 has been performed reliably, and it is possible to determine whether or not to perform the characteristic restoration process.
以下に説明する再生方法の手順は、図11に示すフローチャートにおいて、ステップ1のセット動作とステップ5のリセット動作とが入れ替わり、ステップ3の設定値と不等号の向きが変わることを除いて、実施例1と同様になる。設定値は、抵抗変化素子10が正常にセット動作した場合の抵抗値の上限値となる。以下では、図11を参照しながら、その手順の概要を説明する。なお、制御部142が本再生方法を実行する場合は、実施例1の説明と同様になるため、その詳細な説明を省略する。
The procedure of the reproduction method described below is the same as that in the flowchart shown in FIG. 11 except that the setting operation in step 1 and the resetting operation in step 5 are interchanged and the setting value in step 3 and the direction of the inequality sign are changed. Same as 1. The set value is an upper limit value of the resistance value when the variable resistance element 10 is normally set. Hereinafter, the outline of the procedure will be described with reference to FIG. Note that when the control unit 142 executes this reproduction method, the description is omitted because it is the same as the description of the first embodiment.
まず、ステップ1において、抵抗変化素子10に対してセット動作を行う。すなわち、セット動作に必要な電圧パルスを抵抗変化素子10に印加して、抵抗変化素子10を高抵抗状態から低抵抗状態に変化させる。続いて、抵抗変化素子10の抵抗値を計測する。この際の抵抗変化素子10の計測値と設定値とを比較し(ステップ2)、セット動作によって所望の低抵抗状態になっているかを判定する(ステップ3)。ステップ3において、抵抗変化素子10の計測値がリセット動作後の抵抗値程度の値である場合、セット動作が困難になっていることを示しており、意図している特性変化が得られていないこととなり、特性復元過程が必要である。よって、このステップ3において、特性復元過程が必要と判定した場合、ステップ4に進み、特性復元過程を行う。一方で、抵抗変化素子10の計測値がリセット動作後の抵抗値から十分に低くなっている場合は、次回のスイッチングが可能である(ステップ5)。
First, in step 1, a set operation is performed on the resistance change element 10. That is, a voltage pulse necessary for the set operation is applied to the resistance change element 10 to change the resistance change element 10 from the high resistance state to the low resistance state. Subsequently, the resistance value of the variable resistance element 10 is measured. At this time, the measured value of the variable resistance element 10 and the set value are compared (step 2), and it is determined whether the desired low resistance state is achieved by the set operation (step 3). In step 3, when the measured value of the resistance change element 10 is about the resistance value after the reset operation, it indicates that the set operation is difficult, and the intended characteristic change is not obtained. Therefore, a characteristic restoration process is necessary. Therefore, if it is determined in step 3 that the characteristic restoration process is necessary, the process proceeds to step 4 to perform the characteristic restoration process. On the other hand, when the measured value of the resistance change element 10 is sufficiently lower than the resistance value after the reset operation, the next switching is possible (step 5).
セット動作が困難で、スイッチングが起こらなくなってしまった抵抗変化素子に対して、このような再生方法を用いることで、抵抗変化素子10を再度スイッチング可能な状態にすることができる。これは、抵抗変化素子10をメモリ回路に適用した場合でも、フィールド・プログラマブル・ゲート・アレイなどに代表される書き換え可能なロジック回路に用いた場合でも、抵抗変化素子10および抵抗変化素子10を有する半導体装置1の寿命を延長することが可能となることを意味している。
By using such a regeneration method for a resistance change element in which the set operation is difficult and switching has not occurred, the resistance change element 10 can be switched again. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the life of the semiconductor device 1 can be extended.
実施例1および実施例2では、抵抗変化素子の書き換え回数が増えていくと、低抵抗状態から高抵抗状態に遷移するスイッチング動作、または高抵抗状態から低抵抗状態に遷移するスイッチング動作がある時点で起こらなくなるという症状に対する、抵抗変化素子の再生方法を示した。
In the first and second embodiments, when the number of rewrites of the resistance change element increases, there is a switching operation for transition from the low resistance state to the high resistance state, or a switching operation for transition from the high resistance state to the low resistance state. The method of regenerating the resistance change element for the symptom that it does not occur in the above is shown.
スイッチング動作が起こらなくなる症状は、スイッチング動作を多数回繰り返した後の段階に限らず、スイッチング動作を多数回繰り返す前の、抵抗変化素子を利用し始めて比較的初期の段階でも起こりうることがわかった。抵抗変化素子を利用し始めて比較的初期の段階でも、高抵抗状態から低抵抗状態に遷移するスイッチング動作であるセット動作が困難となる場合が生じることもわかった。本実施例は、初期段階でスイッチング動作ができなくなってしまった抵抗変化素子の再生方法に関するものである。
It was found that the symptom that the switching operation does not occur is not limited to the stage after repeating the switching operation many times, but can occur even at a relatively early stage after starting to use the variable resistance element before repeating the switching operation many times. . It has also been found that even in a relatively early stage after using the variable resistance element, the set operation, which is a switching operation for transitioning from the high resistance state to the low resistance state, may be difficult. The present embodiment relates to a method for regenerating a variable resistance element that has become unable to perform a switching operation at an initial stage.
本実施例では、膜厚が100ナノメートル、材料がNiOの可変抵抗体13と、材料がRuの第1電極11および第2電極12を有する抵抗変化素子10を用いて説明する。以下では、抵抗変化素子10への電圧パルスの入力は、外部からの指示入力または制御部142の制御処理により書き換え電源回路14が行うものとし、その詳細な説明を省略する。
In the present embodiment, description will be made using a variable resistance element 13 having a film thickness of 100 nanometers and a material NiO, and a variable resistance element 10 having a first electrode 11 and a second electrode 12 made of Ru. In the following, it is assumed that the voltage pulse input to the resistance change element 10 is performed by the rewrite power supply circuit 14 by an external instruction input or a control process of the control unit 142, and detailed description thereof is omitted.
本実施例の抵抗変化素子10での単極性動作では、図7に示したように、高抵抗状態から低抵抗状態へのセット動作では、例えば8ボルトの電圧振幅を有し300ナノ秒のパルスを印加すればよい。また、低抵抗状態から高抵抗状態へのリセット動作では、例えば3ボルトの電圧振幅を有し50マイクロ秒のパルスを印加すればよい。このような、セット動作およびリセット動作の条件で高抵抗状態と低抵抗状態の間の繰り返しスイッチングが実現可能となっている。
In the unipolar operation in the variable resistance element 10 of this embodiment, as shown in FIG. 7, in the set operation from the high resistance state to the low resistance state, for example, a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is used. May be applied. In the reset operation from the low resistance state to the high resistance state, for example, a pulse of 50 microseconds having a voltage amplitude of 3 volts may be applied. Such switching between the high resistance state and the low resistance state can be realized under the conditions of the set operation and the reset operation.
ところで、この抵抗変化素子10では、抵抗変化素子10を利用し始めて比較的初期の段階に、高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となり、スイッチング動作が起こらなくなるケースが多々生じた。このようなケースは抵抗変化素子10および半導体装置1の歩留まりの観点から好ましくないが、抵抗変化素子10に対して、次のような手法により、このような振る舞いを回復させ、スイッチング特性を復元することができることがわかった。
By the way, in the variable resistance element 10, in a relatively early stage after the use of the variable resistance element 10, a transition from a high resistance state to a low resistance state, that is, a set operation becomes difficult, and there are many cases where a switching operation does not occur. occured. Such a case is not preferable from the viewpoint of the yield of the resistance change element 10 and the semiconductor device 1, but the behavior is restored to the resistance change element 10 by the following method to restore the switching characteristics. I found out that I could do it.
特性復元過程として、スイッチング動作が起こらなくなった抵抗変化素子10に対して、通常、情報を記録する際に印加される電圧パルスより大きな電圧振幅を有する電圧パルスを印加することにより、スイッチング動作が起こらなくなった抵抗変化素子10を再度スイッチング可能な状態にすることができる。このように、特性復元過程を行うことにより、抵抗変化素子10および半導体装置1の歩留まりを大幅に伸ばすことが可能となる。
As a characteristic restoration process, a switching operation is caused by applying a voltage pulse having a voltage amplitude larger than that of a voltage pulse normally applied when recording information to the variable resistance element 10 in which the switching operation has not occurred. The resistance change element 10 which has disappeared can be brought into a switchable state again. Thus, by performing the characteristic restoration process, the yield of the variable resistance element 10 and the semiconductor device 1 can be significantly increased.
図14に、通常の単極性動作時のセット/リセット動作および特性復元過程に用いる電圧パルスを模式的に示した。また、図15には通常のセット/リセット動作、スイッチングが起こらなくなった状態、特性復元過程、および特性復元後の抵抗値の変遷を模式的に示した。
FIG. 14 schematically shows voltage pulses used for the set / reset operation and the characteristic restoration process during normal unipolar operation. FIG. 15 schematically shows a normal set / reset operation, a state where switching does not occur, a characteristic restoration process, and a transition of the resistance value after the characteristic restoration.
なお、セット動作が困難になった場合の特性復元過程に必要な電圧振幅は、上記の膜厚を有する可変抵抗体13の場合、8.1ボルトから24ボルト程度で、より好ましくは8.8ボルトから18ボルト程度であった。この場合の、通常のセット動作で必要な電圧振幅は8ボルト程度である。また、可変抵抗体13となるNiOの膜厚が50ナノメートルの場合、高抵抗状態から低抵抗状態へのセット動作では、例えば4ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合の特性復元過程に必要な電圧振幅は、4.05ボルトから12ボルト程度である。したがって、セット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がセット動作の1.01倍から3倍程度とすればよいことになる。
In the case of the variable resistor 13 having the above film thickness, the voltage amplitude required for the characteristic restoration process when the set operation becomes difficult is about 8.1 to 24 volts, more preferably 8.8. It was about 18 volts from the bolt. In this case, the voltage amplitude necessary for the normal set operation is about 8 volts. Further, when the film thickness of NiO serving as the variable resistor 13 is 50 nanometers, in the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 4 volts may be applied. The voltage amplitude required for the characteristic restoration process is about 4.05 to 12 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 1.01 to 3 times that of the set operation.
また、特性復元過程において印加するパルスの幅は、1ナノ秒と短いものから1秒と長いものまで、有効であることがわかった。また、同じパルスを多数回入力すると、より確実な特性復元が可能であることもわかった。特性復元処理を実行する際、所定の時間内に電圧パルスを2回以上連続して抵抗変化素子10に入力するとよい。
It was also found that the pulse width applied in the characteristic restoration process is effective from a short one nanosecond to a long one second. It was also found that more reliable characteristic restoration is possible by inputting the same pulse many times. When executing the characteristic restoration process, it is preferable to input the voltage pulse to the resistance change element 10 continuously two or more times within a predetermined time.
さらに、特性復元過程を行った素子において、直後に情報を記録する際には、印加する電圧パルスの振幅を通常の情報記録時に用いる電圧よりも低く設定することが好ましいことがわかった。直後に印加する電圧パルスの振幅は、実施例1または実施例2と同様に、情報の書き換えの際に印加される電圧パルスの振幅の3/4程度あればよい。
Further, it was found that, in the element subjected to the characteristic restoration process, when information is recorded immediately after, it is preferable that the amplitude of the applied voltage pulse is set lower than the voltage used in normal information recording. The amplitude of the voltage pulse to be applied immediately after it may be about 3/4 of the amplitude of the voltage pulse applied at the time of information rewriting, as in the first or second embodiment.
なお、以上では、セット動作およびリセット動作の際に同符号の電圧を印加する、単極性動作の場合の特性復元過程について説明したが、以上の手法はセット動作とリセット動作の際に異なる符号の電圧を印加する、双極性動作の場合の特性復元過程にも拡張可能である。
In the above, the characteristic restoration process in the case of the unipolar operation in which the voltage having the same sign is applied in the set operation and the reset operation has been described. However, the above method has different codes in the set operation and the reset operation. It can be extended to a characteristic restoration process in the case of bipolar operation in which a voltage is applied.
例えば、高抵抗状態から低抵抗状態へのセット動作では、8ボルトの電圧振幅を有し300ナノ秒のパルスを印加し、低抵抗状態から高抵抗状態へのリセット動作では、セット動作とは逆符号である-4ボルトの電圧振幅を有し10マイクロ秒のパルスを印加するような場合について説明する。この場合において、高抵抗状態から低抵抗状態への遷移、すなわちセット動作が困難となり、スイッチング動作が起こらなくなるケースが生じると、特性復元過程に必要な電圧振幅は、100ナノメートルの膜厚を有する可変抵抗体13の場合、8.1ボルトから24ボルト程度であった。また、可変抵抗体13であるNiOの膜厚が50ナノメートルの場合、高抵抗状態から低抵抗状態へのセット動作では、例えば4ボルトの電圧振幅を有するパルスを印加すればよかったが、この場合の特性復元過程に必要な電圧振幅は、4.05ボルトから12ボルト程度であった。したがって、セット動作が困難になった場合の特性復元過程では、符号が逆で電圧振幅の絶対値がセット動作の1.01倍から3倍程度とすればよいことになる。
For example, in the set operation from the high resistance state to the low resistance state, a pulse of 300 nanoseconds having a voltage amplitude of 8 volts is applied, and in the reset operation from the low resistance state to the high resistance state, it is opposite to the set operation. A case will be described in which a pulse having a voltage amplitude of -4 volts as a sign and a pulse of 10 microseconds is applied. In this case, when the transition from the high resistance state to the low resistance state, that is, the set operation becomes difficult and the switching operation does not occur, the voltage amplitude necessary for the characteristic restoration process has a film thickness of 100 nanometers. In the case of the variable resistor 13, it was about 8.1 to 24 volts. Further, when the film thickness of NiO which is the variable resistor 13 is 50 nanometers, in the setting operation from the high resistance state to the low resistance state, for example, a pulse having a voltage amplitude of 4 volts may be applied. The voltage amplitude required for the characteristic restoration process was about 4.05 to 12 volts. Therefore, in the characteristic restoration process when the set operation becomes difficult, the sign is reversed and the absolute value of the voltage amplitude may be about 1.01 to 3 times that of the set operation.
続いて、本実施例において、別の再生方法を説明する。それは、特性変動を監視して、特性復元過程を行うようにするものである。
Subsequently, another reproduction method will be described in this embodiment. It monitors the characteristic variation and performs the characteristic restoration process.
この再生方法では、セット動作後に抵抗変化素子10の抵抗値の評価を行う。これにより、抵抗変化素子10のセット動作が確実に行われたかを管理することが可能となり、特性復元過程を行うか否かを判断できるようになる。
In this reproduction method, the resistance value of the variable resistance element 10 is evaluated after the set operation. Thereby, it is possible to manage whether or not the setting operation of the resistance change element 10 has been performed reliably, and it is possible to determine whether or not to perform the characteristic restoration process.
以下に説明する再生方法の手順は、図11に示すフローチャートにおいて、ステップ1のセット動作とステップ5のリセット動作とが入れ替わり、ステップ3の設定値と不等号の向きが変わることを除いて、実施例1と同様になる。設定値は、抵抗変化素子10が正常にセット動作した場合の抵抗値の上限値となる。以下では、図11を参照しながら、その手順の概要を説明する。なお、制御部142が本再生方法を実行する場合は、実施例1の説明と同様になるため、その詳細な説明を省略する。
The procedure of the reproduction method described below is the same as that in the flowchart shown in FIG. 11 except that the setting operation in step 1 and the resetting operation in step 5 are interchanged and the setting value in step 3 and the direction of the inequality sign are changed. Same as 1. The set value is an upper limit value of the resistance value when the variable resistance element 10 is normally set. Hereinafter, the outline of the procedure will be described with reference to FIG. Note that when the control unit 142 executes this reproduction method, the description is omitted because it is the same as the description of the first embodiment.
まず、ステップ1において、抵抗変化素子10に対してセット動作を行う。すなわち、セット動作に必要な電圧パルスを印加して、抵抗変化素子10を高抵抗状態から低抵抗状態に変化させる。続いて、抵抗変化素子10の抵抗値を計測する。この際の抵抗変化素子10の計測値と設定値とを比較し(ステップ2)、セット動作によって所望の低抵抗状態になっているかを判定する(ステップ3)。ステップ3において、抵抗変化素子10の計測値がリセット動作後の抵抗値程度の値である場合、セット動作が困難になっていることを示しており、意図している特性変化が得られていないこととなり、特性復元過程が必要である。よって、このステップ3において、特性復元過程が必要と判定した場合、ステップ4に進み、特性復元過程を行う。一方で、抵抗変化素子10の計測値がリセット動作後の抵抗値から十分に低くなっている場合は、次回のスイッチングが可能である(ステップ5)。
First, in step 1, a set operation is performed on the resistance change element 10. That is, a voltage pulse necessary for the set operation is applied to change the resistance change element 10 from the high resistance state to the low resistance state. Subsequently, the resistance value of the variable resistance element 10 is measured. At this time, the measured value of the variable resistance element 10 and the set value are compared (step 2), and it is determined whether the desired low resistance state is achieved by the set operation (step 3). In step 3, when the measured value of the resistance change element 10 is about the resistance value after the reset operation, it indicates that the set operation is difficult, and the intended characteristic change is not obtained. Therefore, a characteristic restoration process is necessary. Therefore, if it is determined in step 3 that the characteristic restoration process is necessary, the process proceeds to step 4 to perform the characteristic restoration process. On the other hand, when the measured value of the resistance change element 10 is sufficiently lower than the resistance value after the reset operation, the next switching is possible (step 5).
利用し始めて比較的初期の段階に抵抗変化素子10のセット動作が困難になり、スイッチングが起こらなくなってしまった抵抗変化素子10に対して、このような再生方法を用いることで、抵抗変化素子10を再度スイッチング可能な状態にすることが可能となることが示された。なお、この手法は、繰り返し動作を多数回行った後に、セット動作が困難になった場合でも適用可能である。これは、抵抗変化素子10をメモリ回路に適用した場合でも、フィールド・プログラマブル・ゲート・アレイなどに代表される書き換え可能なロジック回路に用いた場合でも、抵抗変化素子10および抵抗変化素子10を有する半導体装置1の歩留まりを向上し、寿命を延長することが可能となることを意味している。
By using such a reproducing method for the resistance change element 10 in which the setting operation of the resistance change element 10 becomes difficult at a relatively early stage after starting to be used and switching has not occurred, the resistance change element 10 is used. It has been shown that it becomes possible to switch to a state in which switching can be performed again. This method can be applied even when the set operation becomes difficult after the repeated operation is performed many times. This includes the resistance change element 10 and the resistance change element 10 regardless of whether the resistance change element 10 is applied to a memory circuit or used in a rewritable logic circuit typified by a field programmable gate array. This means that the yield of the semiconductor device 1 can be improved and the life can be extended.
また、本実施例では、利用し始めて比較的初期の段階に抵抗変化素子10のセット動作が困難になった場合における、抵抗変化素子10の特性復元処理について説明したが、リセット動作が困難になった場合にも、本実施例の再生方法を適用してもよい。
In the present embodiment, the characteristic restoring process of the resistance change element 10 when the setting operation of the resistance change element 10 becomes difficult at a relatively early stage after being used has been described. However, the reset operation becomes difficult. In this case, the reproduction method of this embodiment may be applied.
上述したように、電極に電圧を印加することで膜中の電気抵抗を低抵抗状態と高抵抗状態の間で切り替えることが可能な抵抗変化素子を有する半導体装置に関して、データの書き換えを繰り返し行ったところ、セット動作・リセット動作が困難となり、高抵抗状態または低抵抗状態のいずれかに固定され、所望の動作が得られなくなった際に、本発明にかかる実施例1から3で説明した、半導体装置の再生方法により、抵抗変化素子を再度スイッチング動作が可能な状態にすることができた。
As described above, data rewriting was repeatedly performed on a semiconductor device having a resistance change element capable of switching the electrical resistance in the film between a low resistance state and a high resistance state by applying a voltage to the electrode. However, when the set operation / reset operation becomes difficult and is fixed in either the high resistance state or the low resistance state, and the desired operation cannot be obtained, the semiconductor described in the first to third embodiments according to the present invention. By the method of regenerating the device, the variable resistance element could be brought into a state where the switching operation can be performed again.
本発明により、抵抗変化素子およびそれを有する半導体装置の寿命を延ばすことが可能となる。また、抵抗変化素子およびそれを有する半導体装置の歩留まりを向上することも可能となる。この抵抗変化素子の適用範囲は、抵抗変化素子をマトリクス上に並べて構成される半導体記憶装置、および抵抗変化素子を第1回路と第2回路を接続するスイッチとして用いる半導体装置まで、広範囲に及ぶと期待できる。
According to the present invention, it is possible to extend the lifetime of the variable resistance element and the semiconductor device having the variable resistance element. It is also possible to improve the yield of the variable resistance element and the semiconductor device having the variable resistance element. The application range of the variable resistance element extends over a wide range from a semiconductor memory device configured by arranging variable resistance elements on a matrix and a semiconductor device using the variable resistance element as a switch connecting the first circuit and the second circuit. I can expect.
また、抵抗変化素子としては、前述したReRAM以外にも、様々な構成がある。その他の構成の抵抗変化素子であっても、書き換え可能回数が有限であり、データを記録する際に用いる電圧と逆符号のパルスによって特性を回復されることが可能である抵抗変化素子であれば、本発明を適用することが可能である。また、書き換え可能回数が有限であり、データを記録する際に用いる電圧より大きな電圧振幅を有するパルスによって特性を回復されることが可能である抵抗変化素子であれば、本発明を適用することが可能である。
In addition to the above-described ReRAM, there are various configurations of variable resistance elements. Even if the resistance change element has other configurations, the number of rewritable times is limited, and the resistance change element can recover its characteristics by a pulse having a sign opposite to that of the voltage used when recording data. The present invention can be applied. Also, the present invention can be applied to any resistance change element that has a finite number of rewritable times and whose characteristics can be recovered by a pulse having a voltage amplitude larger than the voltage used when recording data. Is possible.
以上、実施形態および実施例を参照して本願発明を説明したが、本願発明は上記実施形態および実施例に限定されるものではない。本願発明の構成や詳細には、本願発明のスコープ内で当業者が理解し得る様々な変更をすることができる。
Although the present invention has been described with reference to the embodiments and examples, the present invention is not limited to the above embodiments and examples. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
なお、この出願は、2008年5月30日に出願された日本出願の特願2008-142453の内容が全て取り込まれており、この日本出願を基礎として優先権を主張するものである。
Note that this application incorporates all the contents of Japanese Patent Application No. 2008-142453 filed on May 30, 2008, and claims priority based on this Japanese application.
1 半導体装置
10 抵抗変化素子
11 第1電極
12 第2電極
13 可変抵抗体
14 書き換え電源回路
15 グラウンド線
141 電圧パルス生成部
142 制御部
143 計測部 DESCRIPTION OFSYMBOLS 1 Semiconductor device 10 Resistance change element 11 1st electrode 12 2nd electrode 13 Variable resistor 14 Rewriting power supply circuit 15 Ground line 141 Voltage pulse generation part 142 Control part 143 Measurement part
10 抵抗変化素子
11 第1電極
12 第2電極
13 可変抵抗体
14 書き換え電源回路
15 グラウンド線
141 電圧パルス生成部
142 制御部
143 計測部 DESCRIPTION OF
Claims (18)
- 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子を含み、
前記抵抗変化素子は、前記第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、前記第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスが入力される復元処理が行われると、前記特性に復元する、半導体装置。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A variable resistance element having a characteristic of transitioning from the resistance state to the first resistance state,
When the resistance change element does not transition even if the first or second voltage pulse is input, the resistance change element has a positive / negative sign opposite to that of the first or second voltage pulse, and a voltage A semiconductor device that restores to the above characteristics when a restoration process is performed in which a third voltage pulse having an amplitude set to a predetermined value is input. - 前記第1または第2の電圧パルスが入力されたときの前記抵抗変化素子の特性の指標となる評価値を計測する計測部を有し、
前記計測部で計測された前記評価値が予め設定された値に達したときに、極性および電圧値が予め定められた電圧パルスが前記抵抗変化素子に印加されることで、前記復元処理が行われる、請求の範囲第1項に記載の半導体装置。 A measurement unit that measures an evaluation value serving as an index of characteristics of the resistance change element when the first or second voltage pulse is input;
When the evaluation value measured by the measurement unit reaches a preset value, a voltage pulse having a predetermined polarity and voltage value is applied to the resistance change element, so that the restoration process is performed. The semiconductor device according to claim 1. - 前記第1または第2の電圧パルスが入力されたときの前記抵抗変化素子の特性の指標となる評価値を計測する計測部を有し、
前記計測部で計測された前記評価値と予め決められた基準値とが比較され、比較の結果、前記抵抗変化素子が前記特性を示さなければ、極性および電圧値が予め定められた電圧パルスが前記抵抗変化素子に印加されることで、前記復元処理が行われる、請求の範囲第1項に記載の半導体装置。 A measurement unit that measures an evaluation value serving as an index of characteristics of the resistance change element when the first or second voltage pulse is input;
The evaluation value measured by the measurement unit is compared with a predetermined reference value. If the resistance change element does not exhibit the characteristics as a result of comparison, a voltage pulse having a predetermined polarity and voltage value is obtained. The semiconductor device according to claim 1, wherein the restoration process is performed by being applied to the variable resistance element. - 前記極性および電圧値が予め定められた電圧パルスが前記第3の電圧パルスと同等である、請求の範囲第2項または第3項に記載の半導体装置。 4. The semiconductor device according to claim 2, wherein a voltage pulse having a predetermined polarity and voltage value is equivalent to the third voltage pulse.
- 前記第1の電圧パルスが前記抵抗変化素子に入力されると、前記計測部は、該抵抗変化素子の抵抗値を前記評価値として計測する、請求の範囲第2項または第3項に記載の半導体装置。 The said measurement part measures the resistance value of this resistance change element as said evaluation value, if said 1st voltage pulse is input into said resistance change element, The range of Claim 2 or 3 of Claim Semiconductor device.
- 前記第2の電圧パルスが前記抵抗変化素子に入力されると、前記計測部は、該抵抗変化素子の抵抗値を前記評価値として計測する、請求の範囲第2項または第3項に記載の半導体装置。 The said measurement part measures the resistance value of this resistance change element as said evaluation value, when said 2nd voltage pulse is input into said resistance change element, The range of Claim 2 or 3 of Claim Semiconductor device.
- 前記計測部が計測した前記評価値に基づいて、前記抵抗変化素子に対して前記復元処理を行うか否かを判定する制御部をさらに有する、請求の範囲第2項から第6項のいずれか1項記載の半導体装置。 The control unit according to any one of claims 2 to 6, further comprising a control unit that determines whether or not to perform the restoration process on the variable resistance element based on the evaluation value measured by the measurement unit. The semiconductor device according to 1.
- 前記第3の電圧パルスの振幅が、前記第1または第2の電圧パルスの振幅の絶対値の0.5倍以上3倍以下である、請求の範囲第1項から第7項のいずれか1項に記載の半導体装置。 8. The device according to claim 1, wherein the amplitude of the third voltage pulse is not less than 0.5 times and not more than 3 times the absolute value of the amplitude of the first or second voltage pulse. The semiconductor device according to item.
- 前記第3の電圧パルスの振幅が、前記第1または第2の電圧パルスの振幅の絶対値の0.75倍以上1.5倍以下である、請求の範囲第8項に記載の半導体装置。 The semiconductor device according to claim 8, wherein an amplitude of the third voltage pulse is 0.75 times or more and 1.5 times or less of an absolute value of the amplitude of the first or second voltage pulse.
- 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子を含み、
前記抵抗変化素子は、前記第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、入力された電圧パルスよりも振幅の大きい第3の電圧パルスが入力される復元処理が行われると、前記特性に復元する、半導体装置。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A variable resistance element having a characteristic of transitioning from the resistance state to the first resistance state,
The resistance change element performs a restoration process in which a third voltage pulse having an amplitude larger than the input voltage pulse is input when the resistance state does not change even when the first or second voltage pulse is input. A semiconductor device that restores the characteristics when performed. - 前記第3の電圧パルスの振幅が、前記第1または第2の電圧パルスの振幅の1.01倍以上3倍以下である、請求の範囲第10項に記載の半導体装置。 11. The semiconductor device according to claim 10, wherein the amplitude of the third voltage pulse is 1.01 to 3 times the amplitude of the first or second voltage pulse.
- 前記第3の電圧パルスが2回以上連続して前記抵抗変化素子に入力される、請求の範囲第1項から第11項のいずれか1項に記載の半導体装置。 The semiconductor device according to any one of claims 1 to 11, wherein the third voltage pulse is input to the variable resistance element continuously two or more times.
- 前記抵抗変化素子に前記復元処理が行われた後に初めに前記第1または第2の電圧パルスが入力される際、該抵抗変化素子に入力される電圧パルスの振幅が該第1または第2の電圧パルスの振幅の3/4である、請求の範囲第1項から第11項のいずれか1項に記載の半導体装置。 When the first or second voltage pulse is input for the first time after the restoration process is performed on the variable resistance element, the amplitude of the voltage pulse input to the variable resistance element is the first or second voltage pulse. The semiconductor device according to any one of claims 1 to 11, wherein the semiconductor device has 3/4 of an amplitude of a voltage pulse.
- 前記第1および第2の電圧の正負が同じ符号である、請求の範囲第1項から第13項のいずれか1項記載の半導体装置。 The semiconductor device according to any one of claims 1 to 13, wherein the first and second voltages have the same sign.
- 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子に対して、電圧パルスを入力する電圧パルス生成部と、
前記抵抗変化素子に前記第1または第2の電圧パルスが入力されても、該抵抗変化素子の抵抗状態が遷移しないとき、前記第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスを前記抵抗変化素子に入力する復元処理を前記電圧パルス生成部に行わせる制御部と、
を有する素子再生回路。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transition from the resistance state to the first resistance state;
Even if the first or second voltage pulse is input to the resistance change element, when the resistance state of the resistance change element does not change, the sign of the first or second voltage pulse is reversed. And a controller that causes the voltage pulse generator to perform a restoration process of inputting a third voltage pulse having a voltage amplitude set to a predetermined value to the resistance change element;
An element regeneration circuit having - 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子に対して、電圧パルスを入力する電圧パルス生成部と、
前記抵抗変化素子に前記第1または第2の電圧パルスが入力されても、抵抗状態が遷移しないとき、入力された電圧パルスよりも振幅の大きい第3の電圧パルスを前記抵抗変化素子に入力する復元処理を前記電圧パルス生成部に行わせる制御部と、
を有する素子再生回路。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A voltage pulse generator for inputting a voltage pulse to the variable resistance element having a characteristic of transition from the resistance state to the first resistance state;
Even if the first or second voltage pulse is input to the variable resistance element, if the resistance state does not transition, a third voltage pulse having an amplitude larger than the input voltage pulse is input to the variable resistance element. A controller that causes the voltage pulse generator to perform a restoration process;
An element regeneration circuit having - 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子の再生方法であって、
前記抵抗変化素子に前記第1または第2の電圧パルスを入力し、
前記抵抗変化素子に前記第1または第2の電圧パルスを入力しても、該抵抗変化素子の抵抗状態が遷移しないとき、前記第1または第2の電圧パルスに対して正負の符号が逆で、かつ、電圧振幅が所定の値に設定された第3の電圧パルスを前記抵抗変化素子に入力する、素子再生方法。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A method for regenerating a variable resistance element having a characteristic of transitioning from the resistance state to the first resistance state,
Inputting the first or second voltage pulse to the variable resistance element;
If the resistance state of the resistance change element does not change even if the first or second voltage pulse is input to the resistance change element, the sign of the first or second voltage pulse is reversed. And the element regeneration method which inputs the 3rd voltage pulse by which the voltage amplitude was set to the predetermined value to the said resistance change element. - 第1の電圧パルスが入力されると第1の抵抗状態から該第1の抵抗状態よりも抵抗値の低い第2の抵抗状態に遷移し、第2の電圧パルスが入力されると前記第2の抵抗状態から前記第1の抵抗状態に遷移する特性を有する抵抗変化素子の再生方法であって、
前記抵抗変化素子に前記第1または第2の電圧パルスを入力し、
前記抵抗変化素子に前記第1または第2の電圧パルスが入力しても、抵抗状態が遷移しないとき、入力した電圧パルスよりも振幅の大きい第3の電圧パルスを前記抵抗変化素子に入力する、素子再生方法。 When a first voltage pulse is input, a transition is made from the first resistance state to a second resistance state having a lower resistance value than the first resistance state, and when the second voltage pulse is input, the second resistance state is changed. A method for regenerating a variable resistance element having a characteristic of transitioning from the resistance state to the first resistance state,
Inputting the first or second voltage pulse to the variable resistance element;
Even if the first or second voltage pulse is input to the variable resistance element, when the resistance state does not transition, a third voltage pulse having a larger amplitude than the input voltage pulse is input to the variable resistance element. Element regeneration method.
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US10490275B2 (en) | 2017-08-16 | 2019-11-26 | Winbond Electronics Corp. | Resistive memory storage apparatus and writing method thereof including disturbance voltage |
US10783962B2 (en) | 2017-09-01 | 2020-09-22 | Winbond Electronics Corp. | Resistive memory storage apparatus and writing method thereof including disturbance voltage |
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