WO2009134009A3 - Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same - Google Patents

Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same Download PDF

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Publication number
WO2009134009A3
WO2009134009A3 PCT/KR2009/001460 KR2009001460W WO2009134009A3 WO 2009134009 A3 WO2009134009 A3 WO 2009134009A3 KR 2009001460 W KR2009001460 W KR 2009001460W WO 2009134009 A3 WO2009134009 A3 WO 2009134009A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
metal catalyst
catalyst layer
seed layer
rigid substrate
Prior art date
Application number
PCT/KR2009/001460
Other languages
French (fr)
Korean (ko)
Other versions
WO2009134009A2 (en
Inventor
백영환
유대환
강동엽
Original Assignee
주식회사 피앤아이
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 피앤아이 filed Critical 주식회사 피앤아이
Publication of WO2009134009A2 publication Critical patent/WO2009134009A2/en
Publication of WO2009134009A3 publication Critical patent/WO2009134009A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

Disclosed are an electroplating substrate containing a metal catalyst layer and a metal seed layer, and a method for producing a printed circuit board using the same. The electroplating substrate comprises a rigid substrate, a metal catalyst layer, and a metal seed layer. The rigid substrate includes a surface treatment layer containing a reactive functional group. The metal catalyst layer is continuously or discontinuously formed on the surface treatment layer of the rigid substrate through a dry deposition process. Through the dry deposition process, the metal seed layer is formed on the front surface of the rigid substrate on which the metal catalyst layer is formed. The metal catalyst layer is activated by a heating process. Various factors such as hydrogen and moisture are removed by both the heating process and the metal catalyst layer activated by the heating process, wherein the hydrogen and moisture are formed on an electroplated film during an electroplating process for producing a printed circuit board and affect the degradation of adhesion between the metal seed layer and the rigid substrate. Accordingly, the invention can reduce the time required for restoring the adhesion between the metal seed layer and the rigid substrate degraded after electroplating, and can increase the adhesion between the metal seed layer and the rigid substrate.
PCT/KR2009/001460 2008-04-29 2009-03-23 Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same WO2009134009A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020080039731A KR20090113995A (en) 2008-04-29 2008-04-29 Board for the use of electroplating including metal catalyst layer and metal seed layer, and fabrication method of printed circuit board using the board
KR10-2008-0039731 2008-04-29

Publications (2)

Publication Number Publication Date
WO2009134009A2 WO2009134009A2 (en) 2009-11-05
WO2009134009A3 true WO2009134009A3 (en) 2009-12-23

Family

ID=41255514

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/001460 WO2009134009A2 (en) 2008-04-29 2009-03-23 Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same

Country Status (3)

Country Link
KR (1) KR20090113995A (en)
TW (1) TW200945974A (en)
WO (1) WO2009134009A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016103790B8 (en) 2016-03-03 2021-06-02 Infineon Technologies Ag Production of a package using a platable encapsulation material
KR20200010362A (en) * 2017-05-19 2020-01-30 베지 사사키 Board for mounting electronic components and manufacturing method thereof
CN116230686A (en) * 2021-12-02 2023-06-06 群创光电股份有限公司 Manufacturing method of composite layer circuit structure of electronic device
KR102606192B1 (en) * 2021-12-30 2023-11-29 주식회사 큐프럼 머티리얼즈 Nickel alloy composition of copper adhesion layer for copper bonded nitride substrate
WO2023128687A1 (en) * 2021-12-30 2023-07-06 주식회사 큐프럼 머티리얼즈 Nickel alloy composition for copper-bonding layer for copper-bonded nitride substrate

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960016650B1 (en) * 1994-05-16 1996-12-19 양승택 Additive bill processing method using supervision of data rate in the broad band service
KR20010015197A (en) * 1999-07-07 2001-02-26 이데이 노부유끼 Electroless plating method and electroless plating solution
KR20060049107A (en) * 2004-10-21 2006-05-18 알프스 덴키 가부시키가이샤 Plating substrate, electroless plating method and method of manufacturing circuit pattern using the same method
JP2008007800A (en) * 2006-06-27 2008-01-17 Seiko Epson Corp Manufacturing method of plated substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960016650B1 (en) * 1994-05-16 1996-12-19 양승택 Additive bill processing method using supervision of data rate in the broad band service
KR20010015197A (en) * 1999-07-07 2001-02-26 이데이 노부유끼 Electroless plating method and electroless plating solution
KR20060049107A (en) * 2004-10-21 2006-05-18 알프스 덴키 가부시키가이샤 Plating substrate, electroless plating method and method of manufacturing circuit pattern using the same method
JP2008007800A (en) * 2006-06-27 2008-01-17 Seiko Epson Corp Manufacturing method of plated substrate

Also Published As

Publication number Publication date
TW200945974A (en) 2009-11-01
WO2009134009A2 (en) 2009-11-05
KR20090113995A (en) 2009-11-03

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