WO2009129340A3 - Flash memory management - Google Patents

Flash memory management Download PDF

Info

Publication number
WO2009129340A3
WO2009129340A3 PCT/US2009/040715 US2009040715W WO2009129340A3 WO 2009129340 A3 WO2009129340 A3 WO 2009129340A3 US 2009040715 W US2009040715 W US 2009040715W WO 2009129340 A3 WO2009129340 A3 WO 2009129340A3
Authority
WO
WIPO (PCT)
Prior art keywords
flash memory
size
metadata
memory management
error correcting
Prior art date
Application number
PCT/US2009/040715
Other languages
French (fr)
Other versions
WO2009129340A4 (en
WO2009129340A2 (en
Inventor
Kevin L. Kilzer
Robert W. Ellis
Rudolph J Sterbenz
Original Assignee
Adtron, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/103,273 external-priority patent/US8566505B2/en
Priority claimed from US12/103,277 external-priority patent/US8028123B2/en
Application filed by Adtron, Inc. filed Critical Adtron, Inc.
Publication of WO2009129340A2 publication Critical patent/WO2009129340A2/en
Publication of WO2009129340A3 publication Critical patent/WO2009129340A3/en
Publication of WO2009129340A4 publication Critical patent/WO2009129340A4/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

Disclosed are techniques for flash memory management, including tracking payload data via one or more data structures configured to define the size of logical pages in a flash memory. In various embodiments, the logical page size may be larger than, equal to, or smaller than a physical page size of a flash memory chip. In other embodiments, defect information corresponding to a granularity smaller than a physical erase block size of a flash memory chip may be utilized. In still other embodiments, metadata and/or error correcting information are stored separately from payload data. In various embodiments, metadata and/or error correcting information are stored in a random access memory within a solid state drive.
PCT/US2009/040715 2008-04-15 2009-04-15 Flash memory management WO2009129340A2 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US4506008P 2008-04-15 2008-04-15
US12/103,273 US8566505B2 (en) 2008-04-15 2008-04-15 Flash management using sequential techniques
US12/103,277 US8028123B2 (en) 2008-04-15 2008-04-15 Circular wear leveling
US61/045,060 2008-04-15
US12/103,273 2008-04-15
US12/103,277 2008-04-15

Publications (3)

Publication Number Publication Date
WO2009129340A2 WO2009129340A2 (en) 2009-10-22
WO2009129340A3 true WO2009129340A3 (en) 2010-01-21
WO2009129340A4 WO2009129340A4 (en) 2010-03-25

Family

ID=41199716

Family Applications (3)

Application Number Title Priority Date Filing Date
PCT/US2009/040714 WO2009129339A2 (en) 2008-04-15 2009-04-15 Circular wear leveling
PCT/US2009/040713 WO2009129338A2 (en) 2008-04-15 2009-04-15 Flash management using sequential techniques
PCT/US2009/040715 WO2009129340A2 (en) 2008-04-15 2009-04-15 Flash memory management

Family Applications Before (2)

Application Number Title Priority Date Filing Date
PCT/US2009/040714 WO2009129339A2 (en) 2008-04-15 2009-04-15 Circular wear leveling
PCT/US2009/040713 WO2009129338A2 (en) 2008-04-15 2009-04-15 Flash management using sequential techniques

Country Status (1)

Country Link
WO (3) WO2009129339A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8959416B1 (en) 2011-12-16 2015-02-17 Western Digital Technologies, Inc. Memory defect management using signature identification
US8947961B2 (en) * 2013-03-12 2015-02-03 Macronix International Co., Ltd. Management of non-volatile memory
TWI653630B (en) * 2018-05-14 2019-03-11 慧榮科技股份有限公司 Method for accessing flash memory module and related flash memory controller and electronic device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5930504A (en) * 1996-07-22 1999-07-27 Intel Corporation Dynamic nonvolatile memory update in a computer system
US5963983A (en) * 1996-04-15 1999-10-05 International Business Machines Corporation Method and apparatus for dynamically creating conversion tables to access a semiconductor memory device
US20050021904A1 (en) * 2003-06-05 2005-01-27 Stmicroelectronics S.R.L. Mass memory device based on a flash memory with multiple buffers
US20060143365A1 (en) * 2002-06-19 2006-06-29 Tokyo Electron Device Limited Memory device, memory managing method and program
US7107389B2 (en) * 2002-08-29 2006-09-12 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and method for writing data into flash memory
US20080046630A1 (en) * 2006-08-21 2008-02-21 Sandisk Il Ltd. NAND flash memory controller exporting a logical sector-based interface

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6412080B1 (en) * 1999-02-23 2002-06-25 Microsoft Corporation Lightweight persistent storage system for flash memory devices
US20030163633A1 (en) * 2002-02-27 2003-08-28 Aasheim Jered Donald System and method for achieving uniform wear levels in a flash memory device
US7330927B1 (en) * 2003-05-07 2008-02-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Apparatus and methodology for a pointer manager
US6906961B2 (en) * 2003-06-24 2005-06-14 Micron Technology, Inc. Erase block data splitting
US20050038792A1 (en) * 2003-08-14 2005-02-17 Johnson Ted C. Apparatus and method for operating circular files
US7139864B2 (en) * 2003-12-30 2006-11-21 Sandisk Corporation Non-volatile memory and method with block management system
US8607016B2 (en) * 2004-07-21 2013-12-10 Sandisk Technologies Inc. FAT analysis for optimized sequential cluster management
US20070276973A1 (en) * 2004-09-30 2007-11-29 Intel Corporation Managing queues
US7464243B2 (en) * 2004-12-21 2008-12-09 Cisco Technology, Inc. Method and apparatus for arbitrarily initializing a portion of memory
US7509474B2 (en) * 2005-06-08 2009-03-24 Micron Technology, Inc. Robust index storage for non-volatile memory
JP2007272635A (en) * 2006-03-31 2007-10-18 Toshiba Corp Memory system and controller

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963983A (en) * 1996-04-15 1999-10-05 International Business Machines Corporation Method and apparatus for dynamically creating conversion tables to access a semiconductor memory device
US5930504A (en) * 1996-07-22 1999-07-27 Intel Corporation Dynamic nonvolatile memory update in a computer system
US20060143365A1 (en) * 2002-06-19 2006-06-29 Tokyo Electron Device Limited Memory device, memory managing method and program
US7107389B2 (en) * 2002-08-29 2006-09-12 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and method for writing data into flash memory
US20050021904A1 (en) * 2003-06-05 2005-01-27 Stmicroelectronics S.R.L. Mass memory device based on a flash memory with multiple buffers
US20080046630A1 (en) * 2006-08-21 2008-02-21 Sandisk Il Ltd. NAND flash memory controller exporting a logical sector-based interface

Also Published As

Publication number Publication date
WO2009129338A2 (en) 2009-10-22
WO2009129338A3 (en) 2010-02-25
WO2009129339A2 (en) 2009-10-22
WO2009129339A3 (en) 2010-03-04
WO2009129339A4 (en) 2010-04-22
WO2009129338A8 (en) 2009-12-10
WO2009129340A4 (en) 2010-03-25
WO2009129340A2 (en) 2009-10-22
WO2009129338A4 (en) 2010-04-08

Similar Documents

Publication Publication Date Title
WO2008132725A3 (en) A method for efficient storage of metadata in flash memory
TW200736909A (en) Memory controller for flash memory
WO2008094455A3 (en) Hierarchical immutable content-addressable memory processor
TW200746156A (en) Method for generating soft bits in flash memories
WO2009009076A3 (en) Error correction for memory
WO2010062655A3 (en) Error correction in multiple semiconductor memory units
WO2009072102A3 (en) System and methods employing mock thresholds to generate actual reading thresholds in flash memory devices
WO2009089612A8 (en) Nonvolatile semiconductor memory device
WO2010033455A3 (en) Embedded mapping information for memory devices
ATE512441T1 (en) PROVIDING ENERGY REDUCTION WHEN STORING DATA IN A MEMORY
ATE521030T1 (en) DATA STORAGE ARRANGEMENT AND DATA STORAGE METHOD
WO2011116071A3 (en) Mlc self-raid flash data protection scheme
ZA200803637B (en) Data management method in flash memory medium
WO2005076281A8 (en) Nonvolatile memory
WO2009005719A3 (en) Method of storing and accessing header data from memory
TW200634823A (en) System and method for use of on-chip non-volatile memory write cache
EP1895418A4 (en) Nonvolatile memory device, method of writing data, and method of reading out data
EP2077559A3 (en) Refresh method of a flash memory
WO2010002666A3 (en) Nand memory
WO2008055272A3 (en) Integrating data from symmetric and asymmetric memory
WO2006120686A3 (en) Flash memory management method that is resistant to data corruption by power loss
TW200638425A (en) Nonvolatile memory devices that support virtual page storage using odd-state memory cells and methods of programming same
TW200506609A (en) Data storage device, management information updating method in data storage device, and computer program
WO2011044515A3 (en) Memory system with multiple striping of raid groups and method for performing the same
WO2012082656A3 (en) Universal timing waveforms sets to improve random access read and write speed of memories

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09732350

Country of ref document: EP

Kind code of ref document: A2

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09732350

Country of ref document: EP

Kind code of ref document: A2