WO2009119968A1 - Film mince semi-conducteur à base d'oxyde et son procédé de fabrication - Google Patents

Film mince semi-conducteur à base d'oxyde et son procédé de fabrication Download PDF

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Publication number
WO2009119968A1
WO2009119968A1 PCT/KR2008/007840 KR2008007840W WO2009119968A1 WO 2009119968 A1 WO2009119968 A1 WO 2009119968A1 KR 2008007840 W KR2008007840 W KR 2008007840W WO 2009119968 A1 WO2009119968 A1 WO 2009119968A1
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Prior art keywords
precursor
thin film
mol
solution
oxide semiconductor
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PCT/KR2008/007840
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English (en)
Inventor
Joo Ho Moon
Dong Jo Kim
Changyoung Koo
Youngmin Jeong
Keun Kyu Song
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Industry-Academic Cooperation Foundation, Yonsei University
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Priority claimed from KR1020080028145A external-priority patent/KR100960808B1/ko
Priority claimed from KR1020080091075A external-priority patent/KR101025701B1/ko
Application filed by Industry-Academic Cooperation Foundation, Yonsei University filed Critical Industry-Academic Cooperation Foundation, Yonsei University
Publication of WO2009119968A1 publication Critical patent/WO2009119968A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/02—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition
    • C23C18/12—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material
    • C23C18/1204—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material inorganic material, e.g. non-oxide and non-metallic such as sulfides, nitrides based compounds
    • C23C18/1208—Oxides, e.g. ceramics
    • C23C18/1216—Metal oxides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/02—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition
    • C23C18/12—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material
    • C23C18/125—Process of deposition of the inorganic material
    • C23C18/1254—Sol or sol-gel processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02592—Microstructure amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02628—Liquid deposition using solutions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Definitions

  • the present invention relates to oxide semiconductor thin film and fabrication method thereof using a precursor solution of the oxide.
  • the present invention can be applied to low-cost fabrication of electronic devices such as thin film transistor.
  • photolithography including in series of vacuum deposition, exposure and etching processes requires much expensive apparatuses, which has been one of the main causes of high manufacturing cost in semiconductor industry.
  • patterning through photolithography is limited to solid substrate and cannot be applied to fabrication of flexible devices.
  • Polycrystal 1 ine silicon has some merits in view of property, lifetime, and performance stability for thin film transistors.
  • it needs vacuum processing and laser annealing for depositing thin film thereto, which resultant Iy increases the production cost of display.
  • Inorganic zinc-oxide (ZnO) thin-films have drawn significant attention as active channel layer for thin film transistor (TFT) applications due to their wide energy band gap and optical transparency.
  • TFT thin film transistor
  • thin-film transistors need to be processed by low-cost solution-based techniques, such as spin coating and ink-jet printing.
  • the precursor materials used in solution process methods should produce the TFT at lower processing temperatures, showing high field effect mobility and clear switching characteristic with a high on/off (I on/ off) ratio.
  • I on/ off on/off
  • the threshold voltage of a thin film transistor formed on oxide semiconductor may be greatly changed as bias stress is induced thereto. Since the instability of threshold voltage seriously influences the switching performance of a thin film transistor, oxide semiconductor has been difficult to be used as actual devices.
  • the present invention has been made to solve the above problems, and it is an aspect of the present invention to provide a semiconductor device for flexible substrate based electronics. It is another aspect of the present invention to provide an oxide semiconductor thin film by solution process.
  • One aspect of the present invention is to provide an amorphous oxide semiconductor thin film comprising ZnO, 10 - 130 mol of Ga2U3 for 100 mol of said ZnO, and 10 - 150 mol of In ⁇ Os or Sn ⁇ 2 for 100 mol of said ZnO.
  • the oxide semiconductor thin film is fabricated by heating a precursor solution comprising a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn.
  • Another aspect of the present invention is to provide an precursor solution for an oxide semiconductor thin film comprising an inorganic precursor, such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ⁇ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 - 130 mol of the second precursor and 10 ⁇ 150 mol of the third precursor for 100 mol of the first precursor.
  • an inorganic precursor such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ⁇ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 - 130 mol of the second precursor and 10 ⁇ 150 mol of the third precursor for 100 mol of the first precursor.
  • a thin film may be fabricated using the precursor solution by solution process such as ink-jet printing, dispensing, spin-coating, nano- imprinting, gravure printing, or offset printing. Heating the thin film generates conductive carriers in the film to change the film to be semiconductive.
  • the precursor solution may be used for ink-jet printing sol-gel solution (ink-jet printing ink) to fabricate various electronic devices.
  • novel flexible substrate based electronics can be fabricated.
  • the present invention provides low cost method for forming a thin film by using solution- based techniques instead of vacuum process with high cost equipments.
  • the present invention provides a low temperature process for a thin film transistor on a plastic substrate.
  • the oxide thin film according to the present invention has improved operating stability and excellent semiconductor performance.
  • the present invention may be applied to thin film transistor and other various devices for display, memory, and so on.
  • Figure 1 shows the processing steps for the oxide thin film in accordance with the present invention.
  • Figure 2 is a cross sectional view of the oxide semiconductor thin film transistor in accordance with the present invention.
  • Figure 3 is a graph showing the XRD pattern of the oxide thin film in accordance with the present invention.
  • Figures 4 and 5 are the SEM image and AFM image of the oxide thin film in accordance with the present invention.
  • FIG. 6 the TFT transfer characteristics of the oxide thin film in accordance with the present invention.
  • Figures 7 and 8 are graphs showing the transfer characteristics and the output characteristics of the oxide thin film in accordance with the present invention.
  • Figures 9 and 10 are graphs showing the bias-stress-induced effect on the transfer and the output characteristics of the GIZO TFT.
  • Figure 11 is a graph showing I D ⁇ V G curve as a function of the annealing temperature of the GIZO TFT.
  • Figure 12 is a graph showing the transfer characteristic of the GIZO TFT as a function of Ga content.
  • Figures 15 and 16 are graphs showing the device performance of the GSZO thin film.
  • Figures 17 and 18 are graphs showing the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress time.
  • Figure 19 is a graph showing the bias stress-induced threshold voltage shift as a function of stress time of GSZO thin film and ZTO thin film.
  • Figures 20 and 21 are graphs showing the change of the device performance of GSZO thin film and ZTO thin film depending on applied voltage.
  • Figure 22 is a graph showing the change of threshold voltage of GSZO thin film and ZTO thin film depending on gate voltage.
  • Figure 23 is a graph showing the device performance of GSZO thin film transistor.
  • the present invention provides sol-gel solution based amorphous ZnO thin film doped with Ga and In, or Ga and Sn (also denoted as GIZO or GSZO).
  • the present invention also provides the effect of the dopant content and annealing temperature on the characteristic of the amorphous oxide thin film transistor.
  • the oxide semiconductor thin film transistor in accordance with the present invention has an excellent device performance with mobility of more than 0.5 c ⁇ r/Vs and on/off ratio of more than 10 b , and may be effectively used for glass or flexible substrate based electronic devices.
  • a precursor solution is prepared (step 1) as shown in Figure 1.
  • the precursor solution comprises 0.1 - 1 M of an inorganic precursor, such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ⁇ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 ⁇ 130 mol of the second precursor and 10 ⁇ 150 mol of the third precursor for 100 mol of the first precursor.
  • an inorganic precursor such as metal nitride and/or metal acetate, consisting of a first precursor including Zn, a second precursor including Ga, and a third precursor including In or Sn; and 90 ⁇ 99 parts by mol of an organic solvent for every 100 parts by mol of total solution, wherein the inorganic precursor includes 10 ⁇ 130 mol of the second precursor and 10 ⁇ 150 mol of the third precursor for 100 mol of the first precursor.
  • the oxide semiconductor thin film will have excessive carriers therein and, consequently, the thin film will become conductive and cannot exhibit on/off switching property.
  • Ga is doped over the upper limit, Ga will reduce the carrier generation due to Ga' s higher bonding force with oxygen than that of Zn or In. As a result, the electronic property of the oxide semiconductor thin film will be deteriorated.
  • the precursor solution according to claim 1, wherein the organic solvent may be selected from 2-methoxyethanol , isopropanol, ethanol, ethylene glycol , butanediol, 1-butandiol, and 2-butandiol .
  • the precursor solution may includes 2 - 10 M of stabilizing agent selected from ethanolamine, dimethyl amine, triethanol amine, acetylacetone, and acetic acid, and may further include 2 ⁇ 15 M formamide for uniformity of film formation.
  • a thin film is formed on a substrate using the precursor solution by solution process such as ink-jet printing or spin-coating (step 2).
  • the thin film is then dried to remove the solvent from the film (step 1)
  • the thin film is annealed to remove residual organic matter from the film and to generate carriers in the film (step 4).
  • the drying step may be performed at 100 ⁇ 500 ° C under oxygen atmosphere, nitrogen atmosphere, plasma, or vapor, and the annealing step may be at 100 - 600 ° C under vacuum, or reducing atmosphere. If necessary, further annealing at 100 ⁇ 300 ° C may be added after the first annealing.
  • FIG. 2 shows the oxide semiconductor thin film transistor in accordance with the present invention.
  • An oxide thin film (130) is formed as a channel layer on gate (120) and gate dielectric (110) of a substrate (100).
  • Source (122) and drain (124) are formed on both sides of the surface of the oxide thin film (130).
  • the oxide thin film and the electrodes (source and drain) may be formed by solution process.
  • the precursor solution for Ga and In doped ZnO was prepared by a sol- gel reaction using Ga nitrate, In nitrate and Zn acetate as starting materials.
  • Low-viscosity alcohol was used as a solvent, and a small amount of ethanolamine complexation and coating agent were added into the precursor solution for long-term sol stability.
  • the GIZO precursor solution was deposited on (highly n-type doped) 200 nm-thick Si(VSi substrate by using a spin-coating method. The precursor solution was spin-coated at 4000 rpm for 20 sec, followed by drying at 200 ° C for 10 min. 20nm-thick GIZO thin-films were formed on the substrate.
  • the source and drain electrode 50 nm- thick Au
  • the source and drain electrode was deposited by using a thermal evaporation method with a patterned metal shadow mask in which the channel W/L (width/length) ratio was 50.
  • the GIZO channel thickness, surface roughness, and morphology were measured by using cross-sectional scanning electron microscopy (SEM), and atomic force microscopy (AFM).
  • SEM cross-sectional scanning electron microscopy
  • AFM atomic force microscopy
  • the crystal linity and the orientation of the GIZO film were investigated using X-ray diffraction (XRD), and the GIZO TFT performance was measured using an Agilent 5263A source-measure unit.
  • FIG. 3 shows the XRD patterns of GIZO thin-films annealed at 450 "C for 30 min.
  • the film's orientation is an important factor for inorganic semiconductors, but amorphous-phase semiconductors are preferred over polycrystalline ones for active channel layers from the viewpoint of processing temperature and uniformity of device characteristics.
  • Figure 4 and 5 show SEM and AFM images of a 20 nnrthick GIZO (Ga contents : 1.1) thin-film on SiU2/Si substrate.
  • the SEM image shows a clear and uniform surface morphology.
  • the surface roughness of the amorphous GIZO film was about 0.7 nm (rms. value), and no second phase was observed in the SEM and the AFM analyses.
  • Figure 6 shows the TFT transfer characteristics (I D -VG curve) of a GIZO transistor as a function of annealing temperature.
  • Figures 7 and 8 show the transfer characteristics U D -V G curve) and the output characteristics ( ID-V D curve) of a GIZO TFT annealed at 450 °C for 30 min.
  • Figures 9 and 10 show the bias-stress-induced effect on the transfer (ID ⁇ VG) and the output (ID-VD) characteristics of the GIZO TFT annealed at 450 °C for 30 min.
  • the off-currents slightly increases and the output drain currents decrease at the same V D . This might be caused by injected and/or trapped mobile charges, such as electrons and/or holes.
  • Figure 11 shows I D -V G curve as a function of the annealing temperature of GIZO TFTs.
  • the off-current was reduced, and the threshold voltage was shifted towards positive voltage (+VG) with decreasing process temperatures.
  • lowering the annealing temperature both suppresses charge carrier generation in the oxide semi-conductor and induces a higher density of point defects into the channel layer, which can affect the field effect mobility.
  • GIZO TFTs If the performance of GIZO TFTs is to be enhanced at a lower process temperature, it is necessary to control the Ga and the In content ratios.
  • Figure 12 shows the transfer (I D -V G ) characteristic of GIZO TFTs as a function of Ga content.
  • the on/off switching behavior of GIZO TFTs became insufficient as the Ga content in the GIZO system was decreased.
  • Incorporated Ga ions would be important in the Ga ⁇ and the In-co-doped ZnO system in terms of suppression of the charge carrier generation via oxygen vacancy formation because the Ga ion forms stronger chemical bonds with oxygen than Zn and In ions do.
  • ITO indium tin oxide
  • ZTO Zinc Tin Oxide
  • methyl alcohol methyl alcohol
  • IPA isopropyl alcohol
  • DI-Water DI-Water
  • GSZO ink was spin-coated on the substrate at 500rpm for 5 seconds and at 3000rpm for 20 seconds.
  • the GSZO film obtained was then heat-treated at 500 ° C for 4 hours with heating rate of 5 ° C .
  • Figure 15 shows the transfer (I D -V G ) characteristic of the fabricated
  • FIG. 16 shows the output (I D -V D ) characteristic of the GSZO film where V D was changed from -20 to 40 V with V G being fixed at 0, 10, 20, 30, 40 V.
  • the GSZO thin film exhibited reasonable characteristic with mobility of 1.03 c ⁇ r/Vs, threshold voltage of 3 V, and on/off ratio of 10 7 .
  • semiconductor thin film with excellent device performance can be fabricated by solution process according to the present invention.
  • Figures 17 and 18 show the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress time (0, 1, 5, 10,
  • Figure 19 shows the bias stress-induced threshold voltage shift as a function of stress time of GSZO thin film and ZTO thin film.
  • the GSZO thin film shows stability of threshold voltage without serious change during bias stress, but the threshold voltage of the ZTO thin film is found to be largely increased by induced bias stress.
  • Tables 1 and 2 show threshold voltage and its variation depending on time. In contrast with ZTO thin film, GSZO thin film shows little change of threshold voltage regardless of bias stress time. Table 1
  • Figures 20 and 21 show the change of device performance of GSZO thin film and ZTO thin film depending on the bias stress (0, 10, 20, 30V) at fixed bias time (lOmin).
  • Figure 22 shows the change of threshold voltage of GSZO thin film
  • the GSZO thin film shows stability of threshold voltage, but the threshold voltage of the ZTO thin film is getting increased as bias stress grows higher.
  • Tables 3 and 4 show threshold voltage and its variation depending on bias stress. In contrast with ZTO thin film, GSZO thin film shows little change of threshold voltage regardless of bias stress magnitude.
  • GSZO thin film transistor was fabricated using spin-coated GSZO layer.
  • Al source/drain electrodes were deposited on top of the GSZO layer, and then heat-treated at 200 °C under hydrogen atmosphere for 1 minute.
  • Figure 23 shows the device performance of GSZO thin film transistor at fixed VD (20V). During repeated measurement, the GSZO thin film shows reliable characteristic without increase of threshold voltage.
  • Table 5 shows the electrical properties of the GSZO TFT for various combinations
  • the GSZO composition is preferable to include under 20 mol% of Ga, since too much Ga content reduces mobility. Excessive Sn content compared to Zn lowers on/off ration and increase subthreshold slope.
  • Sn content is preferable to be limited to less than 50 mol% or less.
  • the GSZO composition preferably includes 40 ⁇ 90 mol Zn precursor, 10 ⁇ 50 mol Sn precursor, and 0 - 20 mol Ga precursor for 100 mol of total metal salt precursors.

Abstract

La présente invention concerne un film mince semi-conducteur amorphe à base d'oxyde de zinc dopé au gallium. Le film mince comporte de l'indium ou de l'étain comme dopant additionnel, et est fabriqué par un traitement en solution tel que le dépôt à la tournette ou l'impression jet d'encre, au moyen d'une solution précurseur avec du nitrure métallique ou de l'acétate métallique.
PCT/KR2008/007840 2008-03-27 2008-12-31 Film mince semi-conducteur à base d'oxyde et son procédé de fabrication WO2009119968A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2008-0028145 2008-03-27
KR1020080028145A KR100960808B1 (ko) 2008-03-27 2008-03-27 산화물 반도체 박막 및 그 제조 방법
KR1020080091075A KR101025701B1 (ko) 2008-09-17 2008-09-17 반도체성 잉크 조성물, 반도체성 산화물 박막, 및 그 제조방법
KR10-2008-0091075 2008-09-17

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102117767A (zh) * 2010-12-29 2011-07-06 上海大学 基于溶胶式全透明tft有源矩阵制造方法
WO2012014885A1 (fr) 2010-07-26 2012-02-02 日産化学工業株式会社 Composition de précurseur pour la formation d'une couche semi-conductrice d'oxyde métallique amorphe, couche semi-conductrice d'oxyde métallique amorphe, leur procédé de production et dispositif à semi-conducteur
WO2013159150A1 (fr) * 2012-04-27 2013-10-31 Commonwealth Scientific And Industrial Research Organisation Couches minces amorphes traitées par solution à basse température

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US5656338A (en) * 1994-12-13 1997-08-12 Gordon; Roy G. Liquid solution of TiBr4 in Br2 used as a precursor for the chemical vapor deposition of titanium or titanium nitride
JP2003267733A (ja) * 2002-03-13 2003-09-25 Japan Carlit Co Ltd:The 金属酸化物前駆体溶液とその調整方法及び金属酸化物薄膜とその形成方法
US20060062723A1 (en) * 2004-09-17 2006-03-23 Motohisa Noguchi Precursor solution, method for manufacturing precursor solution, PZTN compound oxide, method for manufacturing PZTN compound oxide, piezoelectric element, ink jet printer, ferroelectric capacitor, and ferroelectric memory
US20060269667A1 (en) * 2005-04-29 2006-11-30 Ce Ma Method and apparatus for using solution based precursors for atomic layer deposition
JP2007176929A (ja) * 2005-11-25 2007-07-12 Samsung Electronics Co Ltd 新規な芳香族エンジイン誘導体、これを含む有機半導体製造用の前駆体溶液、その前駆体溶液を用いた有機半導体薄膜およびその製造方法、ならびに電子素子

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Publication number Priority date Publication date Assignee Title
US5656338A (en) * 1994-12-13 1997-08-12 Gordon; Roy G. Liquid solution of TiBr4 in Br2 used as a precursor for the chemical vapor deposition of titanium or titanium nitride
JP2003267733A (ja) * 2002-03-13 2003-09-25 Japan Carlit Co Ltd:The 金属酸化物前駆体溶液とその調整方法及び金属酸化物薄膜とその形成方法
US20060062723A1 (en) * 2004-09-17 2006-03-23 Motohisa Noguchi Precursor solution, method for manufacturing precursor solution, PZTN compound oxide, method for manufacturing PZTN compound oxide, piezoelectric element, ink jet printer, ferroelectric capacitor, and ferroelectric memory
US20060269667A1 (en) * 2005-04-29 2006-11-30 Ce Ma Method and apparatus for using solution based precursors for atomic layer deposition
JP2007176929A (ja) * 2005-11-25 2007-07-12 Samsung Electronics Co Ltd 新規な芳香族エンジイン誘導体、これを含む有機半導体製造用の前駆体溶液、その前駆体溶液を用いた有機半導体薄膜およびその製造方法、ならびに電子素子

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012014885A1 (fr) 2010-07-26 2012-02-02 日産化学工業株式会社 Composition de précurseur pour la formation d'une couche semi-conductrice d'oxyde métallique amorphe, couche semi-conductrice d'oxyde métallique amorphe, leur procédé de production et dispositif à semi-conducteur
EP2600395A4 (fr) * 2010-07-26 2016-05-25 Nissan Chemical Ind Ltd Composition de précurseur pour la formation d'une couche semi-conductrice d'oxyde métallique amorphe, couche semi-conductrice d'oxyde métallique amorphe, leur procédé de production et dispositif à semi-conducteur
KR20180108911A (ko) 2010-07-26 2018-10-04 닛산 가가쿠 가부시키가이샤 아모르퍼스 금속 산화물 반도체층 형성용 전구체 조성물, 아모르퍼스 금속 산화물 반도체층 및 그 제조 방법 그리고 반도체 디바이스
US10756190B2 (en) 2010-07-26 2020-08-25 Nissan Chemical Industries, Ltd. Precursor composition for forming amorphous metal oxide semiconductor layer, amorphous metal oxide semiconductor layer, method for producing same, and semiconductor device
US11894429B2 (en) 2010-07-26 2024-02-06 Nissan Chemical Industries, Ltd. Amorphous metal oxide semiconductor layer and semiconductor device
CN102117767A (zh) * 2010-12-29 2011-07-06 上海大学 基于溶胶式全透明tft有源矩阵制造方法
WO2013159150A1 (fr) * 2012-04-27 2013-10-31 Commonwealth Scientific And Industrial Research Organisation Couches minces amorphes traitées par solution à basse température

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