WO2009078275A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2009078275A1
WO2009078275A1 PCT/JP2008/071895 JP2008071895W WO2009078275A1 WO 2009078275 A1 WO2009078275 A1 WO 2009078275A1 JP 2008071895 W JP2008071895 W JP 2008071895W WO 2009078275 A1 WO2009078275 A1 WO 2009078275A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
pad metal
wirings
semiconductor device
corner
Prior art date
Application number
PCT/JP2008/071895
Other languages
French (fr)
Japanese (ja)
Inventor
Tomokatsu Nakagawa
Masahiro Horio
Takaharu Miyazaki
Original Assignee
Sharp Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kabushiki Kaisha filed Critical Sharp Kabushiki Kaisha
Publication of WO2009078275A1 publication Critical patent/WO2009078275A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
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    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L2924/3511—Warping
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
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    • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

A semiconductor device is provided with an interposer substrate mounted on a film substrate, and a semiconductor element mounted on the interposer substrate. The interposer substrate is provided with a plurality of first substrate metal bumps, a plurality of first substrate pad metal pieces (23), and a plurality of substrate wirings (24). The semiconductor element is provided with a plurality of element metal bumps which are bonded to the first substrate metal bumps, respectively, by thermocompression, a plurality of element pad metal pieces (13), and a plurality of element wirings (14). The first substrate pad metal pieces (23) and the element pad metal pieces (13) have polygonal shapes wherein each corner protrudes outward. Each of the substrate wirings (24) is connected to a position at an interval from the apex of the corner of the corresponding first substrate pad metal piece (23), and each of the element wirings (14) is connected to a position at an interval from the apex of the corner of the corresponding element pad metal piece (13). Thus, in the semiconductor device, wiring disconnection is eliminated.
PCT/JP2008/071895 2007-12-14 2008-12-02 Semiconductor device WO2009078275A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007323764A JP4422753B2 (en) 2007-12-14 2007-12-14 Semiconductor device
JP2007-323764 2007-12-14

Publications (1)

Publication Number Publication Date
WO2009078275A1 true WO2009078275A1 (en) 2009-06-25

Family

ID=40795393

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071895 WO2009078275A1 (en) 2007-12-14 2008-12-02 Semiconductor device

Country Status (3)

Country Link
JP (1) JP4422753B2 (en)
TW (1) TW201001653A (en)
WO (1) WO2009078275A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102508527B1 (en) * 2016-07-01 2023-03-09 삼성전자주식회사 Flim type semiconductor package

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111433A (en) * 1983-11-22 1985-06-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH0429342A (en) * 1990-05-24 1992-01-31 Matsushita Electric Ind Co Ltd Film lead
JPH08213425A (en) * 1995-02-03 1996-08-20 Matsushita Electron Corp Semiconductor device and manufacture thereof
JPH10233401A (en) * 1997-02-19 1998-09-02 Ricoh Co Ltd Semiconductor device
JP2003031613A (en) * 2001-07-12 2003-01-31 Matsushita Electric Works Ltd Flip chip mounting body and method of mounting the same
JP2007318014A (en) * 2006-05-29 2007-12-06 Renesas Technology Corp Semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111433A (en) * 1983-11-22 1985-06-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH0429342A (en) * 1990-05-24 1992-01-31 Matsushita Electric Ind Co Ltd Film lead
JPH08213425A (en) * 1995-02-03 1996-08-20 Matsushita Electron Corp Semiconductor device and manufacture thereof
JPH10233401A (en) * 1997-02-19 1998-09-02 Ricoh Co Ltd Semiconductor device
JP2003031613A (en) * 2001-07-12 2003-01-31 Matsushita Electric Works Ltd Flip chip mounting body and method of mounting the same
JP2007318014A (en) * 2006-05-29 2007-12-06 Renesas Technology Corp Semiconductor device

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Publication number Publication date
TW201001653A (en) 2010-01-01
JP2009147167A (en) 2009-07-02
JP4422753B2 (en) 2010-02-24

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