WO2009077025A1 - Système de pesage numérique - Google Patents

Système de pesage numérique Download PDF

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Publication number
WO2009077025A1
WO2009077025A1 PCT/EP2008/008612 EP2008008612W WO2009077025A1 WO 2009077025 A1 WO2009077025 A1 WO 2009077025A1 EP 2008008612 W EP2008008612 W EP 2008008612W WO 2009077025 A1 WO2009077025 A1 WO 2009077025A1
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WO
WIPO (PCT)
Prior art keywords
signal
pulse
integrator
comparator
weighing device
Prior art date
Application number
PCT/EP2008/008612
Other languages
German (de)
English (en)
Inventor
Christian Oldendorf
Thomas Schink
Original Assignee
Sartorius Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sartorius Ag filed Critical Sartorius Ag
Publication of WO2009077025A1 publication Critical patent/WO2009077025A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01G—WEIGHING
    • G01G3/00—Weighing apparatus characterised by the use of elastically-deformable members, e.g. spring balances
    • G01G3/12—Weighing apparatus characterised by the use of elastically-deformable members, e.g. spring balances wherein the weighing element is in the form of a solid body stressed by pressure or tension during weighing
    • G01G3/14—Weighing apparatus characterised by the use of elastically-deformable members, e.g. spring balances wherein the weighing element is in the form of a solid body stressed by pressure or tension during weighing measuring variations of electrical resistance
    • G01G3/142—Circuits specially adapted therefor
    • G01G3/147—Circuits specially adapted therefor involving digital counting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/50—Analogue/digital converters with intermediate conversion to time interval
    • H03M1/52—Input signal integrated with linear return to datum

Definitions

  • the invention relates to a digital weighing device, comprising a force transducer which generates an analog sensor signal corresponding to an introduced force, an integrator which transmits the sensor signal as a measurement signal permanently applied to it during operation, and a workspsgel of a sensor temporarily applied to it
  • Integrated reference signal a integrator downstream comparator, the one
  • Integrator output signal with a threshold value and, when the threshold value is reached, each compares a pulse edge of a pulse signal on one
  • Shift control means which, depending on the
  • Pulse signal a switch for temporary application of the
  • Value determination means based on a
  • Such weighing devices are well known. These are weighing devices with a so-called integrating A / D converter for analog / digital conversion of the analog sensor signal.
  • the principle of the integrating A / D converter has long been known in many variants. Examples which may be mentioned here are DE 21 14 141, DE 28 20 601 C2 and DE 100 40 373 A1.
  • the measurement signal is applied to an input of an operational amplifier connected as an integrator.
  • the output of the operational amplifier is connected via a capacitor with its measuring signal input.
  • the supply line for a DC reference signal is also connected to the measuring signal input of the operational amplifier. This reference signal is only temporarily switched to a working level.
  • the capacitor is charged by the amplified in the operational amplifier measurement signal. If, after a predetermined period of time, the working level of the Switched reference signal, the capacitor discharges during a second clock component, whereby the integrator output signal drops.
  • the time of a zero crossing or, more generally, a threshold crossing of the integrator output signal is detected by means of a downstream comparator.
  • the duration of the second clock component ie the period during which the operating level of the reference signal is present at the integrator, is measured by suitable time-measuring means, for example a clocked counter.
  • the measured duration referred to here as the measurement interval, represents a measure of the charging of the capacitor in the first clock component and thus of the level of the measurement signal.
  • the counter value can be used directly as a digital measure of the measurement signal.
  • Adjustment or balancing should be understood here as the general consideration of factors influencing the generation of the weighing value. This includes, for example, the compensation of disturbing influences, such as temperature, material creep, etc., the consideration of individual Device properties, such as manufacturing tolerances and adjusting the device. Particularly important disturbances are often the current temperature of the measuring cells as well as production-related tolerances in the mechanical and / or electronic construction. Depending on the type of the respective adjustment parameter, the
  • Adjustment parameter source therefore, for example, a sensor, such as a temperature sensor, or a memory in which adjustment parameters have been deposited, for example, in the production of his. Also other variants of a sensor, such as a temperature sensor, or a memory in which adjustment parameters have been deposited, for example, in the production of his. Also other variants of a sensor, such as a temperature sensor, or a memory in which adjustment parameters have been deposited, for example, in the production of his. Also other variants of
  • Matching parameter source the special design of which is not relevant to the present invention, are conceivable.
  • the adjustment parameters must be determined from the location of their measurement or deposit, i. from the spatial area of the force transducer or the digitization electronics, are transmitted to the place where the arithmetic comparison of the measured values takes place.
  • wired, radio-link and transponder-based transmission variants are known. However, these are usually associated with additional mechanical and / or electronic effort.
  • adjustment parameter source is connected to the comparator pulse line and feeds the adjustment signal in time after the pulse edge in the comparator pulse line.
  • the basic idea of the present invention is the functional double assignment of an already absolutely necessary signal line. According to the invention, it is provided to use in particular a line which is required only sporadically during the measurement process and at approximately predictable intervals in time for its actual task.
  • a line is the comparator pulse line.
  • it is the primary task of the comparator pulse line to transmit a pulse edge which in each case indicates the time at which the integration of the measurement and the reference signal has ended and the operating level of the reference signal must again be disconnected from the integrator input.
  • the comparator pulse line is essentially unused.
  • the invention now proposes to use this line during the time of its non-use for a second task, namely the transmission of an adjustment parameter value. It may initially be surprising that the transmission of the adjustment parameter value to the switching control means arranged at the end point of the comparator pulse line makes sense. However, those skilled in the art will appreciate that typically the shift control means is used with the balancing means and, as provided in a preferred embodiment, also with the
  • Value determination means and the time determination means are integrated in a microprocessor.
  • the physical line is thus preferably between the comparator output and the microprocessor; only the computational utilization of the different data transmitted on the same physical line within the microprocessor is different.
  • a physical line branch may be provided such that both the switching control means and the balancing means are connected to the comparator pulse line.
  • the adjustment parameter source codes the adjustment parameter value as the length of a digital pulse which starts with the pulse edge.
  • the essential information to be communicated from the comparator to the switch control means is at a time especially coded as the transmission of a pulse edge, where both edge and level triggered electronics may be used. It follows that the time at which the level of the comparator pulse line returns to its initial level is irrelevant to the actual A / D conversion process, as long as this return occurs before the end of the current integration process, so that this point in time can be signaled with a renewed pulse edge (in fact, a return before the end of the
  • Abintegrationsintervalls sufficient; however, its duration depends on the size of the measuring signal and can not be foreseen). It is therefore preferably provided to use the time of the return of the comparator pulse to its output level or the duration of the comparator pulse as a measure of the adjustment parameter to be transmitted. Different variants of absolute or relative codings are conceivable here. It is also possible to compose partial information in successive measuring cycles. Thus, for example, it is possible for the adjustment parameter source to encode the adjustment parameter value as lengths of a plurality of digital pulses which start in successive cycles, each time with the pulse edge. Their summed lengths may represent the adjustment parameter value. Alternatively, the relation of transmitted pulse lengths in successive cycles can also code the adjustment parameter value. For example, in a first cycle, a known, predetermined reference value and in a second cycle the current adjustment parameter value can be transmitted as a fraction of the reference value, wherein the time lengths of the transmitted pulses have the same fractional ratio.
  • the adjustment parameter source comprises a flip-flop, which is provided by the Pulse signal is set, is reset by a triggered by the pulse signal delay element after the expiration of the adjustment parameter value corresponding delay time and feeds the thus modified pulse signal in the comparator pulse line at its output.
  • the term of the adjustment parameter value is to be understood broadly, so that the above-explained variants of the partial value and reference value transmission are also included.
  • a development of the invention therefore provides that the adjustment parameter source in successive cycles balancing signals, which represent values of different adjustment parameters, in the
  • Feeds comparator pulse line For example, in addition to temperature sensor data, a plurality of adjustment parameters representing the manufacturing tolerances of mechanical and tuning tolerances of electronic components, which are stored in a parameter memory, can be successively transmitted in the described manner.
  • a fundamentally arbitrary but strictly observable protocol must be provided here, which enables the correct interpretation of the data transmitted by the adjustment parameter source in the matching means.
  • the present invention develops its advantages in particular in a development in which the force transducer, the integrator, the comparator, the switch and the adjustment parameter source are integrated in a first module, and wherein the shift control means, the time determination means, the value determination means and the adjustment means are integrated in a second, separate module, which is preferably designed as a microprocessor.
  • the second module may be positioned some distance from the first module.
  • the absolutely necessary connection between the first and second module can, as is preferably provided, thereby reduce to a single line pair which electrically connects the modules and which comprises the comparator pulse line and a switching line connecting the switching control means and the switch.
  • These lines, ie the switching control line and the comparator pulse line are digital lines.
  • a digital line is understood here to be a line via which only two levels are included
  • Such lines are particularly resistant to interference, which explains their significant advantage over analog lines, in which the information content of the transmitted signal is in the continuous level profile.
  • the interference resistance of the digital line pairs enables new flexibility in the design of complex weighing devices.
  • a plurality of first modules are mechanically connected to a weighing platform and are connected via a line pair to a second module common to the first modules.
  • the second module is designed as a multi-channel microprocessor
  • the entire digital portion of the weighing processes can be centralized in one Digital module are processed while the analog portions of the weighing and the adjustment parameter acquisition is decentrally positioned in distributed load cells.
  • the connection between the units is purely digital, so that due to the interference resistance of the digital lines a significant, previously unprecedented flexibility in the construction of complex weighing devices is given.
  • Such an arrangement allows the overcoming of problems of so-called digital load cells known in the art.
  • Known digital load cells combine both the analog and the digital component in a module and only transmit a digital measured value to a downstream evaluation unit.
  • the synchronization of several such digital load cells is a significant problem that has so far been insufficiently resolved.
  • the present invention solves the synchronization problem by providing in a preferred development that an output of a switching signal, which causes the application of the working level of the reference signal to the integrator, from the common second module to the first module simultaneously on all the switching lines.
  • the Abintegrationsvorgang is started simultaneously in all load cells, so that the weighing values determined in the second module for all load cells, a common weighing time can be assigned, which is also known to the central evaluation unit.
  • Figure 1 is a schematic block diagram of a preferred embodiment of the invention
  • Figure 2 a schematic timing diagram for
  • Figure 1 shows a schematic block diagram of an embodiment of the present invention.
  • a resistor 10 which is connected to the output of a force transducer, not shown in Figure 1, one of the introduced into the force transducer weight force of an object to be weighed corresponding current is introduced into the inverting input of an operational amplifier.
  • the operational amplifier 12 is connected as an integrator, i. its output is via a capacitor 14 to the
  • a comparator 20 Connected downstream of the output of the operational amplifier 12 is a comparator 20, which compares the signal INT supplied by the integrator with a threshold value (here the ground potential) and outputs a pulse edge of a comparator pulse signal KIP to a comparator pulse line 22 when the threshold value is reached.
  • a switching unit 24 the function of which will be explained in more detail below, the comparator pulse signal KIP is modified without influencing the generated pulse edge and as modified
  • Comparator pulse signal KIP 'introduced into a digital module 26 is preferably designed as a microprocessor.
  • the switching control means 28 which control the switch 18, is shown separately.
  • the representation takes place in accordance with the functionality of a clocked flip-flop, although comparable functionality can also be achieved with other components and in particular with integration of the switching control means into the microprocessor.
  • the switching control means 28 In response to the modified comparator pulse signal KIP 'and other control signals originating from other areas of the digital module 26, the switching control means 28, whose Output are connected to a switching line 30, a switching signal AOP, which controls the switch 18.
  • such a digital weighing device is basically known, so that the details of the switch control and the digital value determination need not be carried out in depth here.
  • the preferably used multiple ramp method for digitizing an analog measured value which is preferably used within the scope of the invention, is known in principle to the person skilled in the art.
  • FIG. 2 shows a timing diagram illustrating the integrator signal INT, the comparator pulse signal KIP and the switching signal AOP as bold lines.
  • an integration phase Iup during which the switching signal AOP has an LO level and the switch 18 is open, only the measuring signal is applied to the operational amplifier 12.
  • the integrator signal INT increases accordingly.
  • the integration phase Iup ends and the switching signal AOP has an HI level, so that the switch 18 is closed and the charge accumulated in the capacitor 14 is reduced.
  • the integrator signal INT falls accordingly.
  • the period of time required to lower the integrator signal INT below a predetermined threshold value is representative of the previously integrated charge and thus of the measurement signal.
  • the reaching of the threshold value is signaled by the comparator 20 by outputting a pulse edge of the comparator pulse signal KIP.
  • the duration of this Abintegrations- or measuring interval Im can be detected by means of suitable timing means in the digital module. Note that in Figure 2 illustrated timing Diagrainm represents only a variant of possible controls the A / D conversion. Other variants may benefit from the present invention. It is essential that a time interval representative of the measuring signal can be determined by means of the pulse edge generated by the comparator 20 and the switching signal AOP or a control signal upstream of this.
  • the comparator pulse signal is modified to transmit further information.
  • FIG. 1 shows a temperature sensor 32 which codes a currently measured temperature value appropriately and sets a counter 34 with it.
  • the default value to which the counter 34 is set is representative of the temperature sensed by the sensor 32.
  • the counter 34 starts counting down from the predetermined value and outputs a pulse at its output at the end of the counting-down process.
  • a switching unit 24 implemented as a flip-flop is set by the pulse edge of the comparator pulse signal KIP.
  • the pulse output by the counter 34 at the end of the counting operation resets the flip-flop 24.
  • the output of the flip-flop 24 thus produces a signal KIP ', which shows a pulse which begins with the pulse edge of the signal KIP and whose duration is representative of the temperature value measured by the temperature sensor 32.
  • Comparator pulse signal KIP ' is used in the manner described above by the switching control means 28 for switching the switch 18.
  • the length of the pulse shown in FIG T is suitably decoded in the digital module 26 and used to correct the weighing value otherwise determined in the manner explained above.
  • the weighing value adjustment may involve very different parameters from different sources. Accordingly, the requirements for the timeliness of the various parameter values may be different. So a typical compensation parameter, such as the temperature of a load cell should be constantly updated, while it is often sufficient with Justierparametern to transmit them only once or only occasionally.
  • a corresponding communication between the analog and the digital module must take place. For example, it can be provided that, when the device is switched on, first such values are transmitted which are stored in a memory of a weighing cell or determined in a special, initial adjustment process. Thereafter, the device can switch to the "normal" mode in which continuously updated values are transmitted.
  • the digital module for example, hold the AOP signal at LO level, so that the integrator goes into saturation. This state can be detected in the load cell and interpreted as a request to transmit certain values below.
  • the embodiments shown in the figures and discussed in the specific description represent only illustrative embodiments of the present invention. A broad range of possible variations will be apparent to those skilled in the art in light of the disclosure herein. These relate in particular to the specific embodiment of the switching unit 24, which need not necessarily be designed as a flip-flop. It is also possible to code the determined adjustment parameter value (ie the temperature value in the described embodiment) differently than over a pulse length.
  • the digital module 26 is a multi-channel microprocessor which is connected to a plurality of load cells, which are each connected to it via a line pair 22/30. A synchronization of such a plurality of load cells can be carried out, for example, via the synchronous output of the switch 18 each closing pulse edge of the switching signal AOP.
  • the device according to the invention can also be extended to additional value transmission mechanisms, such as radio, transponder or wired routes.
  • additional value transmission mechanisms such as radio, transponder or wired routes.
  • modulating of values to be transmitted to eg common supply lines can be mentioned.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

Système de pesage numérique, qui comprend un capteur de force produisant un signal de capteur analogique correspondant à une force appliquée, un intégrateur (12, 14) intégrant le signal de capteur, en tant que signal de mesure appliqué de façon permanente à l'intégrateur en fonctionnement, ainsi qu'un niveau de travail d'un signal de référence, lequel niveau est appliqué temporairement audit intégrateur, un comparateur (20) monté en aval de l'intégrateur (12, 14), lequel comparateur compare un signal de sortie de l'intégrateur à une valeur seuil et, lorsque la valeur seuil est atteinte, produit un flanc d'impulsion d'un signal d'impulsion sur une ligne d'impulsions (22) du comparateur, des moyens de commande de commutation (28), qui commandent, en fonction du signal d'impulsion, un commutateur (18) permettant l'application temporaire du niveau de travail du signal de référence à l'intégrateur (12, 14), ainsi que des moyens de détermination de valeurs qui déterminent des valeurs de pesée représentant le signal de capteur sur la base d'une durée des intervalles au cours desquels le niveau de travail du signal de référence est appliqué à l'intégrateur (12, 14), laquelle durée est acquise par des moyens de détermination de temps (34), ainsi que des moyens de compensation qui compensent les valeurs de pesée sur la base d'un signal de compensation produit par une source de paramètres de compensation (24, 32, 34) et représentant une valeur codée, laquelle source de paramètres de compensation (24, 32, 34) est reliée à la ligne d'impulsions (22) du comparateur et injecte le signal de compensation dans la ligne d'impulsions (22) du comparateur après le flanc d'impulsion du point de vue temporel.
PCT/EP2008/008612 2007-12-19 2008-10-11 Système de pesage numérique WO2009077025A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007061787.0 2007-12-19
DE200710061787 DE102007061787B4 (de) 2007-12-19 2007-12-19 Digitale Wägevorrichtung

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WO2009077025A1 true WO2009077025A1 (fr) 2009-06-25

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3525991A (en) * 1966-06-15 1970-08-25 Toledo Scale Corp Converter
DE2114141A1 (de) * 1971-03-24 1972-09-28 Gruetzediek H Analog-Digital-Umsetzer mit einem integrierenden Verstaerker nach dem Mehrfach-Rampen-Verfahren
DE2820601A1 (de) * 1971-03-24 1979-11-15 Hartmut Dipl Phys Gruetzediek Analog-digital-umsetzer nach dem mehrfach-rampenverfahren
DE10040373A1 (de) * 1999-08-20 2001-02-22 Sartorius Gmbh Analog/Digital-Umsetzer
WO2005112268A1 (fr) * 2004-05-07 2005-11-24 Endress+Hauser Wetzer Gmbh+Co. Kg Dispositif de conversion analogique/numerique d'une tension de mesure

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2626966A1 (de) * 1976-06-16 1977-12-29 Bizerba Werke Kraut Kg Wilh Verfahren und vorrichtung zur fernuebertragung von digitalen messwerten, insbesondere in der wiegetechnik
DE3642495A1 (de) * 1986-12-12 1988-06-23 Martin Hans Juergen Dipl Ing F Analog-digital-wandler, insbesondere fuer elektromechanische waagen

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3525991A (en) * 1966-06-15 1970-08-25 Toledo Scale Corp Converter
DE2114141A1 (de) * 1971-03-24 1972-09-28 Gruetzediek H Analog-Digital-Umsetzer mit einem integrierenden Verstaerker nach dem Mehrfach-Rampen-Verfahren
DE2820601A1 (de) * 1971-03-24 1979-11-15 Hartmut Dipl Phys Gruetzediek Analog-digital-umsetzer nach dem mehrfach-rampenverfahren
DE10040373A1 (de) * 1999-08-20 2001-02-22 Sartorius Gmbh Analog/Digital-Umsetzer
WO2005112268A1 (fr) * 2004-05-07 2005-11-24 Endress+Hauser Wetzer Gmbh+Co. Kg Dispositif de conversion analogique/numerique d'une tension de mesure

Also Published As

Publication number Publication date
DE102007061787A1 (de) 2009-06-25
DE102007061787B4 (de) 2013-07-04

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