WO2009076801A1 - 一种rs码交织编码装置及方法 - Google Patents

一种rs码交织编码装置及方法 Download PDF

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WO2009076801A1
WO2009076801A1 PCT/CN2008/070868 CN2008070868W WO2009076801A1 WO 2009076801 A1 WO2009076801 A1 WO 2009076801A1 CN 2008070868 W CN2008070868 W CN 2008070868W WO 2009076801 A1 WO2009076801 A1 WO 2009076801A1
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data
column
code
bytes
remaining
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PCT/CN2008/070868
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English (en)
French (fr)
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Zhifeng Yuan
Jun Xu
Song Li
Xiangbiao Yan
Yuanli Fang
Jin Xu
Liujun Hu
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Zte Corporation
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Priority to EP08734224A priority Critical patent/EP2226944A4/en
Priority to US12/677,260 priority patent/US8279741B2/en
Publication of WO2009076801A1 publication Critical patent/WO2009076801A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations

Definitions

  • the present invention relates to the field of wireless communications, and in particular to an RS code interleaving coding apparatus and method in a wireless communication system.
  • the Linear Grouping Code is a set of fixed length code groups, which can be expressed as (n, k), and is usually used for forward error correction.
  • the k information bits are encoded into n-bit code group lengths at the time of encoding. Since the 2 k code words of the [ «, k, d] block code form an A-dimensional subspace, the 2 k code words must be formed by A linearly independent bases, if the A base is used Written in the form of a matrix, there is
  • Any codeword in the [ «»] code can be generated by a linear combination of the set of substrates, ie
  • G be the generator matrix of the code. Obviously, for each row of the generator matrix, as long as the linear independence is satisfied (the minimum distance is not considered), and the base of one dimensional space can arbitrarily select a linearly independent vector, the generation matrix G as a code is not unique. But regardless of which form they use, they all generate the same subspace, the same [", k ' code.
  • the finite field is an extension of the binary domain GF ( 2 ), it is represented by GF ( 2 ).
  • the so-called one-symbol error can mean that one bit in the symbol has an error, or that several bits in the symbol or even all m bits have an error. It can be seen that the RS code has a very strong random error and burst error correction capability, so it is widely used in the field of digital error control.
  • the link layer provides data transfer services for the network layer, and this service relies on the functions of this layer.
  • the link layer has functions: data link establishment and teardown, frame transmission and frame synchronization, error and flow control, and data link management.
  • Link Layer Forward Error Correction (FEC) is used as a supplement to the physical link layer forward error correction technology. It is used to implement link layer error control to ensure that the upper layer protocol can receive error-free datagrams. .
  • the RS code is very suitable as a link layer forward error correction (Link Layer Forward Error Correction) due to its excellent performance.
  • the interleaver commonly used in digital communication can be divided into byte interleaving and bit interleaving according to the interleaving object.
  • the main function of the Byte Interleaver is to scramble the original byte sequence so that the location of the error appears to be random.
  • the correlation of the byte sequences before and after the interleaving is weakened and distributed among many codewords, not just It is one of several codewords.
  • One of the outstanding advantages of this is that it greatly reduces the impact of data burst errors.
  • the RS encoder is usually used together with a byte interleaver, which is a Reed-Solomon Code with Byte Interleaver.
  • the byte interleaver can use a row-column interleaver whose number of columns is equal to the length of the RS code, and the number of rows varies with the number of code blocks.
  • the byte interleaver for the RS (255, 207) code is fixed to 255 columns, wherein the left 207 column is the information area, and the right 48 column is the check area.
  • the data in the interleaver When the data in the interleaver is output, the data is sequentially output from the top to the bottom from the 0th column, and the data of the first column is sequentially output from the top to the bottom after the 0th column is output, until the data of the 255 columns is all outputted.
  • the number of rows and the number of columns of the interleaver can be, but is not limited to, numbered from 0, and the consistency described in the present invention is numbered starting from 0.
  • the RS code interleaving coding method in the prior art has the following drawbacks: the parts with the padding value of 0 in the information area are grouped together, which causes the following padding value to be 0.
  • the corresponding continuous time zone is relatively protected, and the upper row corresponds to The continuous time zone is relatively lacking in protection.
  • the data of the check area is generated by row and read out by the column, the data interleaving is too regular, and the best interleaving effect is not achieved, so the performance of the entire output packet is not optimal.
  • the technical problem to be solved by the present invention is to provide an RS code interleaving coding apparatus and method for solving the defect that the performance of the entire output data packet and the reliability of the data link layer are not high.
  • the technical solution adopted by the present invention is: An RS code interleaving coding method, wherein the RS code used is RS (N, K, S), and the method includes the following steps:
  • the data in the data packet to be RS-interleaved encoded is sequentially written into the information area of the RS code byte interleaver;
  • the data packet to be RS code-interleaved is a service data packet obtained by encapsulating IP data into a time sliced code stream according to a multi-protocol.
  • the remaining bytes of the data packet are uniformly and discretely filled into the kc column, and the rest of the column The position is padded with 0, and the remaining columns of the information area are padded with 0.
  • step c the data of the check area is cyclically shifted by column or by row, and the number of bits of each column or row is not completely the same, and the number of bits per column or row is calculated according to a preset formula. get.
  • M is an interlace
  • S is the number of columns in the check region.
  • the present invention further provides an RS code interleaving coding apparatus, including: an RS code byte interleaver, a data writing module, an RS encoding module, and a data reading module;
  • the RS code byte interleaver is configured to store data to be interleaved, and the number of columns is N, the left K column is an information area, and the right S column is a check area;
  • the data writing module is configured to sequentially write data in a data packet to be RS-interleaved encoded into an information area of the RS code byte interleaver, and send a complete write signal to the RS encoding module;
  • the encoding module is configured to construct, according to the data that has been written in the information area, the data of each row of the RS code byte interleaver check area after receiving the completion of the write signal;
  • the device is characterized in that: the device further comprises a cyclic shift module;
  • the RS encoding module is further configured to: after the encoding is completed, send the completed encoded signal to the cyclic shift module; the cyclic shifting module is configured to: after receiving the completed encoded signal, the check region in the RS code byte interleaver The data is cyclically shifted and sent to the data readout module to complete the cyclic shift signal;
  • the data reading module is configured to sequentially read data of the check area in the RS code byte interleaver sequentially from the column after receiving the completion of the cyclic shift signal.
  • the data writing module sequentially writes the data in the data packet to be RS-interleaved into the information area of the RS code byte interleaver.
  • the data writing module After receiving the parameters, sequentially writes the first kc*M bytes of the data packet into the first kc column of the RS code byte interleaver information area column by column, each column from top to bottom. Write sequentially; and fill the remaining d bytes of data in the packet evenly and decentralized into the kc column, and fill the rest of the column with 0, and also fill the remaining columns of the information area with 0.
  • the data writing module uniformly and discretely fills the remaining d bytes of data in the data packet to the kc column, and padding the remaining positions of the column with 0 means:
  • the cyclic shifting module is configured to perform cyclic shift processing on the data of the check area in the RS code byte interleaver, which means: cyclically shifting data of the check area by column or by row Bits, the movement digits of each column or each row are not exactly the same, and the number of movements per column or row is obtained according to the preset convention.
  • the present invention provides an RS code interleaving coding apparatus and method, which performs cyclic shift in the direction of a column to ensure good diversity in the direction of the row, and functions as a row permutation of the row and column interleaver. So that the encoding has the best performance; the invention also proposes that evenly filling the zero bytes in the column with the stuffing bytes and the information packet bytes can make the time more Uniform protection. The benefit of this is that the interleaved time diversity is better.
  • FIG. 1 is a schematic diagram of RS code interleaving coding in the prior art
  • FIG. 2 is a schematic structural view of a device according to an embodiment of the present invention.
  • FIG. 3 is a flow chart of a method according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the RS code interleaving coding method for interleaving the padding portion according to the embodiment of the present invention
  • FIG. 5 is a schematic diagram of the RS code interleaving coding method before the cyclic shift of the check data according to the embodiment of the present invention
  • Figure 6 is a schematic diagram of the RS code interleaving coding method cyclically shifting the check data in the application example of the present invention. Preferred embodiment of the invention
  • the present invention provides an apparatus and method for RS code interleaving coding, which uniformly spreads a region with a padding value of 0 in the last column of the information area filled with valid information, and/or shifts the parity data of the parity region.
  • the RS code interleaving coding scheme in the prior art is improved, and the technical effect of improving the reliability of the data link layer can be achieved.
  • This embodiment provides an RS code interleaving coding apparatus, as shown in FIG. 2, including: an RS code byte interleaver, a parameter calculation module, a data writing module, an RS encoding module, a cyclic shift module, and a data reading module.
  • the data writing module is connected with the parameter calculation module and the RS encoding module
  • the RS code byte interleaver is connected with the data writing module, the RS encoding module, the cyclic shift module and the data reading module
  • the cyclic shift module is also connected with the RS.
  • the coding module and the data readout module are connected. among them:
  • the parameter calculation module is configured to receive the number F of bytes in the data packet, and calculate the number M of rows of the RS code byte interleaver according to the number of bytes F and the number of columns K of the information area, and calculate the information area can be used
  • the valid data fills the number of columns kc, and sends the calculated parameters to the data writing module.
  • the specific calculation method is detailed below.
  • the RS code byte interleaver is used to store data to be interleaved, the number of columns is N, the left K column is the information area, and the right S (S equal to NK) column is the check area.
  • the number of rows of the RS code byte interleaver in this embodiment The number of columns and the number of columns are numbered from 0, and other numbering methods can also be used for specific implementation.
  • the data writing module is configured to, after receiving the parameters sent by the parameter calculation module, sequentially write the data in the data packet to be RS-interleaved into the information area of the RS code byte interleaver, that is: the data packet.
  • the first kc*M bytes are sequentially written column by column into the first kc column of the RS code byte interleaver information area, and each column is sequentially written from top to bottom; then the remaining d bytes of data in the data packet are uniformly , fills the kc column decentralized, fills the rest of the column with 0, and finally fills the remaining columns of the information area with 0.
  • the data writing module is further configured to send a complete write signal to the RS encoding module after the data writing of the information area is completed.
  • the specific way of filling the kc column is: If (M/2, the 0th, g, 2* g , ..., (dl)*g rows in the column are sequentially written from top to bottom into the remaining of the service data packet. d bytes, the remaining row positions are filled with Md bytes 0; otherwise, the 0th, h, 2*h, ..., (Mdl)*h row positions in the column are filled with Md bytes 0, and the remaining rows The remaining d bytes of the service data packet are written in order from top to bottom.
  • the RS encoding module is configured to, after receiving the completed writing signal sent by the data writing module, construct data of each row of the check area in the RS code byte interleaver according to the data written in the information area, that is, according to the line manner RS coding, adding S bytes of check data after each line, the check data of each line is generated according to the data information of the front row K column, the specific method is the same as the prior art, and the filled form is as shown in FIG. 5 Shown, this figure only shows the case where the 0th row check data is filled.
  • the RS encoding module is further configured to send the encoded signal to the cyclic shift module after the encoding is completed.
  • the cyclic shifting module is configured to perform cyclic shift processing on the data of the check area in the RS code byte interleaver after receiving the encoded signal, that is, cyclically shift the data of the check area by column or by row, each column Or the number of movements of each row is not exactly the same, and the number of movements per column or row is obtained according to a preset convention, as calculated by a preset formula.
  • the specific shifting method is detailed below.
  • the cyclic shift module is further configured to send a complete cyclic shift signal to the data readout module after the cyclic shift is completed.
  • the data reading module is configured to sequentially read out the data of the check area in the RS code byte interleaver after the completion of the cyclic shift signal, and read out each column in a top-to-bottom manner.
  • This embodiment further provides an RS code interleaving coding method, and sets a given RS code to be (N, K, S), the corresponding byte interleaver has the number of columns N, the left K column is the information area, and the right S (S equals NK) column is the check area.
  • N N
  • K the information area
  • NK the right S (S equals NK) column
  • the number of rows and the number of columns of the interleaver are numbered from 0, and other numbering methods may be used for specific implementation.
  • the specific operation of the method of the present invention is as follows:
  • Step 201 The TS data is encapsulated into a TS (Time-slicing) code stream by a multi-protocol to obtain a byte size of the service data packet, and the byte size of the data packet is F bytes.
  • the specific operation method is the same as the prior art
  • Step 202 Calculate the number of rows M of the RS code byte interleaver according to the number of bytes F in the service data packet and the number of columns K of the information area, and fill the information area with valid data.
  • the number of columns kc, the column filled with valid data refers to the column that can be filled directly with the data in the original data packet;
  • the number of lines of the interleaver M ceil(F/K) , ceil means round up;
  • Kc floor(F/M), floor means rounding down; then calculate the following parameters:
  • d F mod M, mod represents the modulo operation; d represents the number of bytes remaining after filling the previous kc column; if d is not equal to 0, the following calculation is performed:
  • Step 203 First fill the first K column of the RS (N, K, S) code byte interleaver with the data of the service data packet according to the above calculated parameter, that is, the information area:
  • This step can be divided into the following substeps:
  • Step 2031 Write the first kc*M bytes of the service data packet into the first kc ⁇ ' J of the information area (ie, the 0th to the kc-1th columns) in a column by column, and each column is sequentially written from top to bottom; That is, starting from the top to bottom of the 0th column of the RS (N, K, S) code byte interleaver, filling the 0th column and then filling the 1st column from top to bottom, and so on, Until the first kc column of the RS (N, K, S) code byte interleaver is filled, and each column is filled with M bytes. If d is not equal to 0, step 2032 is performed, otherwise step 204 is performed;
  • Step 2032 uniformly and decentralized the remaining d bytes of data in the data packet to the kc ⁇
  • Step 2033 The remaining part of the information area, that is, the kc+1th column to the K-1th column are all filled with 0 bytes.
  • Step 204 Construct data of each check area according to the data of the information area, that is, perform RS coding according to the line manner, and add S bytes of check data after each line, and the check data of each line is based on the line before
  • the data information of the K column is generated, the specific method is the same as the prior art, and the filled form is as shown in FIG. 5, and the figure only shows the case of filling the 0th row check data;
  • Step 205 Perform cyclic shift processing on the check data in the RS code byte interleaver, which may be cyclically shifted by a row, or may be cyclically shifted by columns, and the number of bits of each row or column is not completely the same.
  • the number of shifts in a row or column can be obtained by a predetermined convention, as calculated by a preset formula.
  • the specific shift mode can be, but is not limited to, the following:
  • the data is rotated in the top-to-bottom direction, and all data in the same column are moved in the same number of bits.
  • Step 206 The data of the check area in the RS code byte interleaver is sequentially read out column by column, and each column is read out from top to bottom, and the XPE-FEC multiplexing adaptation package is performed.
  • the proposed RS code interleaving coding method of the present invention is specifically described by using an interleaving coding method of RS (255, 207, 48) codes as an example.
  • the IP data is encapsulated into a TS by a multi-protocol (Time) -slicing, time slicing) code stream, set the size of the encapsulated service data packet to 9600 bytes, and perform RS (255, 207, 48) on the data packet.
  • the code interleaving coding method is as follows:
  • Step 301 Calculate related parameters:
  • Step 302 Fill the first 207 columns of the RS (255, 207, 48) code byte interleaver with the data of the service data according to the above calculated parameters, that is, the information area:
  • Step 3021 Write the first kc*M of the service data packet, that is, 204*47 is equal to 9858 bytes, and write the first 204 ⁇ (ie, the 0th to the 203th columns) of the information area in a column by column, each column from Write sequentially from top to bottom, each column is filled with 47 bytes;
  • Step 303 RS coding is performed in a row manner, and 48 bytes of calibration data is added after each line, and the specific filling method is the same as the prior art.
  • Step 304 Perform cyclic shift processing on the data of the check area in the RS code byte interleaver, and define the following:
  • the cyclic shift floor(l*47/48) 0, that is, all the data of the column are not shifted;
  • the cyclic shift floor(3*47/48) 2 that is, all the data in the column is moved down by 2 bits.
  • the data that was originally on line 45 and line 46 is shifted to the 0th line and the 1st line of the column respectively; and so on,
  • the cyclic shift floor(47*47/48) 46, that is, all the data of the column is moved downward by 46 bits; the RS code byte interleaver after cyclic shift is shown in Fig. 6, the figure Only the case where the parity data of the 0th row is cyclically shifted is shown.
  • Step 305 The data of the check area in the RS code byte interleaver is sequentially read out column by column, and each column is read out from top to bottom, and the XPE-FEC multiplexing adaptation package is performed.
  • the time span of the data output in the area is large, and the diversity effect is good, thereby improving the performance of the entire data packet output, thereby improving the data link. Layer reliability.
  • the technical solution of the present invention uniformly spreads the area of the last column filled with valid information in the information area with a padding value of 0, and cyclically shifts the data of the check area, and outputs the data in the area.
  • the time span is large, and the diversity effect is good, thereby improving the performance of the entire data packet output, thereby improving the reliability of the data link layer.

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Description

一种 RS码交织编码装置及方法
技术领域
本发明涉及无线通信领域， 特别涉及无线通信系统中一种 RS码交织编 码装置及方法。
背景技术
线性分组码 ( Linear Grouping Code )是一组固定长度的码组， 可以表示 为 (n, k), 通常用于前向纠错。 在编码时 k个信息位被编成 n位码组长度。 由 于 [«, k, d]分组码的 2k个码字组成了一个 A维的子空间，则该 2k个码字一定可以 由 A个线性无关的基底张成， 若把该 A个基底写成矩阵的形式， 则有
Figure imgf000003_0001
§2,n-l §2,η-2 … §2,0
G
Figure imgf000003_0002
[«»]码中的任何码字， 都可以由这组基底的线性组合生成， 即
Figure imgf000003_0003
称 G为码的生成矩阵。 显然， 对于生成矩阵的各行来说， 只要满足线性无关 即可（没有考虑最小距离）， 而一个 维空间的基底可以任意选择 个线性无 关的矢量， 所以作为码的生成矩阵 G也不是唯一的， 但不论釆用哪一种形式， 它们都生成相同的子空间， 即同一个 ["， k' 码。
RS码（ Reed-Solomon Code里德 -索罗蒙码）是一种线性分组循环码， 它以长度为 n的一组符号（ symbols )为单位处理（通常 n=8bit,称为编码字） , 组中的 n个符号是由 k个欲传输的信息符号按一定关联关系生成的。 由于 n 个符号中还应包含误码保护信息， 所以要求 k < n编码形式用 （n, k )表示， 因此， 当 n=8时， 共有 28 =256种符号， 用十进制表示的符号范围是 0-255。 这 256种符号组成一个有限域（称伽罗华域） GF ( 28 ) 。 一般地， 当有限域 是二元域 GF ( 2 ) 的扩域时用 GF ( 2 )表示。 在 GF ( 2 )域中， 能纠正 t 个错误的（n, k )RS码，校验符号数为 2 x t,最小码距离 d2 x t+i=n_k+i (校 验矩阵是个满秩的矩阵）。 所谓 1个符号的错误可以是指符号中的 1 bit发生 错误， 也可以指符号中的若干 bit甚至所有 m bit都发生错误。 可见， RS码具 有极强的随机错误和突发错误纠正能力， 故在数字差错控制领域受到非常广 泛的应用。
链路层是为网络层提供数据传送服务的,这种服务要依靠本层具备的功 能来实现。 链路层具备功能有： 数据链路的建立和拆除、 帧传输和帧同步、 差错与流量控制、数据链路管理。链路层前向纠错（ Forward Error Correction, FEC )作为物理链路层前向纠错技术的补充， 用于实现链路层差错控制的功 能， 确保上一层协议能够接收无差错的数据报。 RS码由于其优异的性能， 非 常适合作为链路层前向纠错码 ( Link Layer Forward Error Correction ) 。
数字通信中常用的交织器按交织对象分可分为字节交织和位交织。 字节 交织器（ Byte Interleaver )的主要作用就是将原始字节序列打乱,使得错误的位 置看上去是随机的， 交织前后字节序列的相关性减弱， 并分布于许多码字间 而不仅仅是几个码字之间， 这样做很突出的一个优点便是大大降低了数据突 发错误的影响。
为了进一步改善链路层 FEC 的性能， RS编码器通常和字节交织器一起 使用， 即为 RS码交织编码方法（ Reed-Solomon Code with Byte Interleaver ) 。 一般情况下， 字节交织器可以用行列交织器， 其列数等于 RS码码长， 行数 随码块数目而改变。例如针对 RS(255, 207)码的字节交织器固定为 255列，其 中左边 207列为信息区， 右边 48列为校验区。 现有技术中 RS码交织编码方 法中， 当有业务数据包输入该字节交织器时， 先从上到下填充第 0列， 当第 0列填充完之后再从上往下填充第 1 歹 如此类推， 直到该业务数据包所有 数据均被填充在该交织器中， 前 207列中未被填充的部分用 0填充。 每一行 的校验值由 48位组成， 且该校验值是根据前 207位的数据信息形成的。 交织 编码后的形式如图 1所示。 当输出交织器中的数据时， 是从第 0列开始由上 到下依次输出， 第 0列输完之后再从上到下依次输出第 1列的数据， 直到该 255列的数据全部输出完毕。 交织器的行数及列数可以但不限于从 0开始编 号， 本发明中为描述的一致性均釆用从 0开始编号。
现有技术中的 RS码交织编码方法存在以下缺陷： 信息区中填充值为 0 的部分集中在一起， 这样会导致下面填充值为 0行对应连续时间区域相对得 到了过保护， 而上面行对应的连续时间区域相对缺少保护。 校验区的数据虽 然按行生成， 按列读出， 但输出时数据间交织过于规则， 达不到最佳的交织 效果， 所以整个输出数据包的性能达不到最佳。
发明内容
本发明要解决的技术问题是提供一种 RS码交织编码装置及方法， 以解 整个输出数据包的性能及数据链路层的可靠性不高的缺陷。
本发明釆用的技术方案是： 一种 RS码交织编码方法， 设所使用的 RS码 为 RS(N, K, S), 所述方法包括以下步骤：
a,将要进行 RS交织编码的数据包中的数据逐列依次写入 RS码字节交织 器的信息区；
b,根据所述信息区已写入的数据构造校验区每行的数据；
c,对所述校验区的数据进行循环移位处理， 然后将所述 RS码字节交织 器中校验区的数据逐列依次读出。
进一步地， 所述要进行 RS编码交织的数据包是将 IP数据按多协议封装 成时间分片码流， 得到的业务数据包。
进一步地， al , 根据所述数据包中的字节数及信息区的列数计算出所述 字节交织器的行数 M,并计算出所述信息区中能够用有效数据填满的列数 kc; a2,将所述数据包的前 kc*M个字节逐列依次写入所述信息区的前 kc列， 每列从上到下顺序写入；
a3 , 将所述数据包剩余的字节均匀地、 分散地填充到第 kc列， 该列其余 位置填充 0, 且对所述信息区剩余的列填充为 0。
进一步地， 所述步骤 a3 的具体操作为， 记 g= floor(MZd) , h = floor(M/(M-d)), 其中 M为 RS码字节交织器的行数， floor为向下取整运算； 若 d M/2, 将第 kc列中第 0, g, 2*g,—，（d-l)*g行从上到下依次写入所 述业务数据包剩余的 d个字节， 剩余行位置填充 M-d个字节 0; 否则， 将第 kc列中第 0, h,2*h, ... , (M-d-l)*h行位置填充 M-d个字节 0, 剩余行从上到下 依次写入所述业务数据包剩余的 d个字节。
进一步地， 步骤 c对校验区的数据是按列或按行进行循环移位处理， 各 列或各行的移动位数不完全相同， 每列或每行的移动位数按预设的公式计算 得到。
进一步地，步骤 c对校验区的数据是按列进行循环移位，第 i列的移动位 数为 floor(i*M/S ) , i=l, ... ,S-l , 其中 M为交织器的行数， S为校验区的列数。
本发明还提供一种 RS码交织编码装置， 包括： RS码字节交织器、 数据 写入模块、 RS编码模块、 数据读出模块；
所述 RS码字节交织器用于存储要交织的数据， 其列数为 N, 左边 K列 为信息区， 右边 S列为校验区；
所述数据写入模块用于将要进行 RS 交织编码的数据包中的数据逐列依 次写入所述 RS码字节交织器的信息区，并向 RS编码模块发送完成写入信号； 所述 RS 编码模块用于收到所述完成写入信号后根据所述信息区已写入 的数据构造所述 RS码字节交织器校验区每行的数据；
其特征在于： 所述装置还包括循环移位模块；
所述 RS编码模块还用于完成编码后向循环移位模块发送完成编码信号； 所述循环移位模块用于收到所述完成编码信号后对所述 RS码字节交织 器中校验区的数据进行循环移位处理， 并向数据读出模块发送完成循环移位 信号；
所述数据读出模块用于收到所述完成循环移位信号后将所述 RS码字节 交织器中校验区的数据逐列依次读出。 进一步地， 所述装置还包括参数计算模块， 用于根据所述数据包中的字 节数 F及信息区的列数 K计算出所述 RS码字节交织器的行数 M, 及所述信 息区中能够用有效数据填满的列数 kc, 并计算 d = F mod M; 若 d不等于 0, 还计算： g= floor(M/d), h = floor(M/(M-d)), mod为取模运算， floor为向下取 整运算； 并将计算的各参数发送给数据写入模块。
进一步地， 所述数据写入模块将要进行 RS 交织编码的数据包中的数据 逐列依次写入所述 RS码字节交织器的信息区是指：
数据写入模块收到所述各参数后将所述数据包的前 kc*M个字节逐列依 次写入所述 RS码字节交织器信息区的前 kc列， 每列从上到下顺序写入； 并 将数据包中剩余的 d个字节数据均匀地、 分散地填充到第 kc列， 并将该列其 余位置填充 0, 还将所述信息区剩余的列填充为 0。
进一步地， 所述数据写入模块将数据包中剩余的 d个字节数据均匀地、 分散地填充到第 kc列， 并将该列其余位置填充 0是指：
若 d M/2,将该列中第 0, g, 2*g,— , (d-l)*g行从上到下依次写入所述业 务数据包剩余的 d个字节， 剩余行位置填充 M-d个字节 0; 否则， 将该列中 第 0, h,2*h, ... , (M-d-l)*h行位置填充 M-d个字节 0, 剩余行从上到下依次写 入所述业务数据包剩余的 d个字节。
进一步地， 所述循环移位模块用于对所述 RS码字节交织器中校验区的 数据进行循环移位处理是指：对所述校验区的数据按列或按行进行循环移位， 各列或各行的移动位数不完全相同， 每列或每行的移动位数按预设的约定得 到。
进一步地， 所述循环移位模块对所述校验区的数据按列进行循环移位， 第 i列的移动位数为 floor(i*M/S ) , i=l, ... ,S-l , 其中 M为交织器的行数， S 为校验区的列数， floor为向下取整运算。
综上所述， 本发明提供了一种 RS码交织编码装置及方法， 在列的方向 上进行循环移位， 保证在行的方向也有很好的分集， 起着行列交织器的行置 换的作用， 从而使得编码具有最好的性能； 本发明还提出了在有填充字节和 信息数据包字节的列中， 均匀地放置填充零字节， 可以使得时间上具有更加 均匀的保护。 这样做的好处， 使得交织的时间分集效果更好。 附图概述
图 1 是现有技术中进行 RS码交织编码后的示意图；
图 2是本发明实施例的装置结构示意图；
图 3是本发明实施例的方法流程图；
图 4是本发明实施例 RS码交织编码方法对填充部分进行交织的示意图； 图 5是本发明实施例 RS码交织编码方法对校验数据循环移位前的示意 图；
图 6是本发明应用实例中 RS码交织编码方法对校验数据循环移位后的 示意图。 本发明的较佳实施方式
本发明提供一种 RS码交织编码装置及方法， 通过对信息区中填充有效 信息的最后一列的填充值为 0的区域均匀分散开， 和 /或对校验区的校验数据 进行移位来改进现有技术中 RS码交织编码方案， 并能达到提高数据链路层 的可靠性的技术效果。
本实施例提供了一种 RS码交织编码装置， 如图 2所示， 包括： RS码字 节交织器、 参数计算模块、 数据写入模块、 RS编码模块、 循环移位模块及数 据读出模块； 数据写入模块与参数计算模块及 RS编码模块相连， RS码字节 交织器与数据写入模块、 RS编码模块、循环移位模块及数据读出模块均相连， 循环移位模块还与 RS编码模块及数据读出模块相连。 其中：
参数计算模块用于接收数据包中的字节数 F, 并根据该字节数 F及信息 区的列数 K计算出 RS码字节交织器的行数 M, 并计算出信息区中能够用有 效数据填满的列数 kc, 并将计算出的各参数发送给数据写入模块。 具体计算 方法详见下文。
RS码字节交织器用于存储要交织的数据，其列数为 N,左边 K列为信息 区， 右边 S ( S等于 N-K )列为校验区。 本实施例中 RS码字节交织器的行数 及列数釆用从 0开始编号， 具体实现时也可釆用其他编号方式。
数据写入模块用于在收到参数计算模块发来的各参数后， 将要进行 RS 交织编码的数据包中的数据逐列依次写入 RS码字节交织器的信息区， 即： 将数据包的前 kc*M个字节逐列依次写入 RS码字节交织器信息区的前 kc列， 每列从上到下顺序写入； 然后将数据包中剩余的 d个字节数据均匀地、 分散 地填充到第 kc列， 并将该列其余位置填充 0, 最后将信息区剩余的列填充为 0。 数据写入模块还用于完成信息区的数据写入后向 RS编码模块发送完成写 入信号。
填充第 kc列的具体方式为： 若 ( M/2,将该列中第 0, g, 2*g, ... , (d-l)*g 行从上到下依次写入业务数据包剩余的 d个字节， 剩余行位置填充 M-d个字 节 0; 否则， 将该列中第 0, h,2*h, ...， （M-d-l)*h行位置填充 M-d个字节 0, 剩余行从上到下依次写入业务数据包剩余的 d个字节。
RS编码模块用于收到数据写入模块发来的完成写入信号后，根据信息区 已写入的数据构造 RS码字节交织器中校验区每行的数据， 即按照行的方式 进行 RS编码， 每一行后面添加 S个字节的校验数据， 每行的校验数据是根 据所在行前 K列的数据信息生成的， 具体方法同现有技术， 填充后的形式如 图 5所示， 该图只示出了填充第 0行校验数据的情形。 RS编码模块还用于完 成编码后向循环移位模块发送完成编码信号。
循环移位模块用于收到完成编码信号后对 RS码字节交织器中校验区的 数据进行循环移位处理， 即对校验区的数据按列或按行进行循环移位， 各列 或各行的移动位数不完全相同， 每列或每行的移动位数按预设的约定得到， 如由某个预设的公式计算得到。 具体移位方式详见下文。
循环移位模块还用于完成循环移位后向数据读出模块发送完成循环移位 信号。
数据读出模块用于收到完成循环移位信号后将 RS码字节交织器中校验 区的数据逐列依次读出， 每列按从上到下的方式读出。
本实施例还提供了一种 RS码交织编码方法， 设给定的 RS码为 (N, K, S), 则对应的字节交织器的列数为 N, 左边 K列为信息区， 右边 S ( S等于 N-K ) 列为校验区。 本实施例中交织器的行数及列数釆用从 0开始编号， 具 体实现时也可釆用其他编号方式。 如图 3所示， 本发明方法具体操作如下所 述：
步骤 201： 将 IP数据按多协议封装成的 TS ( Time-slicing, 时间分片 )码 流， 得到业务数据包的字节大小， 设该数据包的字节大小为 F个字节， 该步 骤具体操作方法同现有技术； 步骤 202: 根据业务数据包中的字节数 F及信息区的列数 K计算出 RS 码字节交织器的行数 M及信息区中能够用有效数据填满的列数 kc,用有效数 据填满的列是指直接用原数据包中的数据即可填满的列；
交织器的行数 M=ceil(F/K) , ceil表示向上取整；
kc = floor(F/M), floor表示向下取整； 再计算如下参数：
d = F mod M, mod表示取模运算； d表示填满前 kc列后剩余的字节数； 若 d不等于 0, 则进行如下计算：
g = floor(M/d), floor表示向下取整；
h = floor(M/(M-d)) , floor表示向下取整；
步骤 203: 先根据上述计算的参数用业务数据包的数据填充 RS(N, K, S)码字节交织器的前 K列， 即信息区：
该步可分为以下子步骤：
步骤 2031 : 将业务数据包的前 kc*M字节按逐列依次写入信息区的前 kc 歹' J (即第 0到第 kc-1列） ， 每列从上到下顺序写入； 即从 RS(N, K, S)码字 节交织器的第 0列按从上到下的顺序开始填充， 填完第 0列再按从上到下的 顺序填充第 1列， 如此类推， 直到填充完 RS(N, K, S)码字节交织器的前 kc 列， 且每列填充 M个字节。 若 d不等于 0则执行步骤 2032, 否则执行步骤 204;
步骤 2032: 用数据包中剩余的 d个字节数据均匀地、 分散地填充到第 kc 歹 |J , 该列其余位置填充 0, 具体填充方式可以但不限于是： 若 d M/2, 将该 列中第 0, g, 2*g,— , (d-l)*g行从上到下依次写入业务数据包剩余的 d个字节， 剩余行位置填充 M-d个字节 0; 否则， 将该列中第 0, h,2*h, ...，（M-d-l)*h行 填充 M-d个字节 0, 剩余行位置从上到下依次写入业务数据包剩余的 d个字 节， 填充后的形式如图 4所示， 这时在混合了信息数据和填充数据的列上填 充比特几乎均勾地分布在最后一列上面。 执行步骤 2033;
步骤 2033: 信息区的剩余部分， 即第 kc+1列至第 K-1列全部填充为 0 字节。
步骤 204: 根据信息区的数据构造每行校验区的数据， 即按照行的方式 进行 RS编码， 每一行后面添加 S个字节的校验数据， 每行的校验数据是根 据所在行前 K列的数据信息生成的， 具体方法同现有技术， 填充后的形式如 图 5所示， 该图只示出了填充第 0行校验数据的情形；
步骤 205： 对 RS码字节交织器中校验数据进行循环移位处理， 可以是按 行循环移位， 也可以是按列循环移位， 各行或各列的移动位数不完全相同， 每行或每列的移位位数可按某个预设的约定得到， 如由某个预设的公式计算 得到。 具体移位方式可以但不限于用如下方式：
对于第 0列所有行的数据不进行列循环移位操作；
对于第 i列的所有行的数据， 按照从上到下方向进行循环移位， 同一列 的所有数据移动位数相同。 计算移动位数的公式可以但不限于为： floor(i*M/S )位， i=l, ... ,S-l。
步骤 206: 将 RS码字节交织器中校验区的数据逐列依次读出， 每列按从 上到下的方式读出， 进行 XPE-FEC复用适配封装。
下面用一应用实例进一步说明本发明方法：
以 RS(255, 207,48)码的交织编码方法为例子， 具体说明本发明的提出的 RS码交织编码方法。
对于 RS(255, 207,48)码， 其信息符号序列是 207个字节， 编码后产生 48 个校验字节， 所以码字长度总共 255个字节。 因而， 该 RS码字节交织器固定 为 255列， 如图 4所示， 其中左边 207列为信息区， 右边 48列为校验区， 首先， 将 IP数据按多协议封装成的 TS ( Time-slicing, 时间分片）码流， 设封装后的业务数据包的大小为 9600个字节，对该数据包进行 RS(255,207,48) 码交织编码方法如下：
步骤 301 : 计算相关参数：
交织器的行数 M=ceil(9600/207)=47 , ceil表示向上取整。
d = F mod M=9600 mod 47=12, mod表示取模运算；
kc = floor(F/M)= floor(9600/47)=204 , floor表示向下取整；
g = floor(M/d)= floor(47/12)=3, floor表示向下取整；
步骤 302:根据上述计算的参数用业务数据的数据填充 RS(255 , 207 , 48) 码字节交织器的前 207列， 即信息区：
步骤 3021 : 将业务数据包的前 kc*M, 即 204*47等于 9588个字节按逐 列依次写入所述信息区的前 204歹 ^ (即第 0到第 203列） ， 每列从上到下顺 序写入， 每列填充 47个字节；
步骤 3022: 用数据包中剩余的 12个字节填充第 204列， d=12, M/2=47/2, 所以 d M/2, 因此将该列中第 0, g, 2*g, ... , (d-l)*g行， 即第 0, 3, 2*3, ... ,11*3 行填充为 d=12个字节的数据，该列中剩余行位置从上到下依次写入该剩余的 M-d=35个字节 0, 信息区的最后 2列， 即第 205 , 206列的所有行全部填充 为 0, 如图 4所示。
步骤 303: 按照行的方式进行 RS编码， 每一行后面添加 48个字节的校 验数据， 具体填充方法同现有技术。
步骤 304: 对 RS码字节交织器中校验区的数据进行循环移位处理， 定义 如下：
对于第 0列， 不进列循环移位操作；
对于第 i列， 按照从上到下方向， 循环移位 floor(i*M/S )位， i=l, ... ,S-l。 具体地，
对第 1列， 循环移位 floor(l*47/48 ) =0, 即该列所有数据均不移位； 对第 2列， 循环移位 floor(2*47/48 ) =1 , 即该列所有数据向下移动 1位， 原先处于第 46行的数据移位后位于该列的第 0行；
对第 3列， 循环移位 floor(3*47/48 ) =2, 即该列所有数据向下移动 2位， 原先处于第 45行及第 46行的数据移位后分别位于该列的第 0行及第 1行； 如此类推，
对第 47列， 循环移位 floor(47*47/48 ) =46, 即该列所有数据向下移动 46 位； 循环移位后的 RS码字节交织器示意图如图 6所示， 该图只示出了第 0 行的校验数据循环移位后的情况。
步骤 305: 将 RS码字节交织器中校验区的数据逐列依次读出， 每列按从 上到下的方式读出， 进行 XPE-FEC复用适配封装。
综上所述， 本发明对校验区的数据作循环移位处理后， 该区数据输出时 时间跨度大， 分集效果好， 从而提高了输出的整个数据包的性能， 进而提高 了数据链路层的可靠性。
工业实用性 釆用本发明的技术方案， 对信息区中填充有效信息的最后一列的填充值 为 0的区域均匀分散开， 并对校验区的数据作循环移位处理后， 该区数据输 出时时间跨度大， 分集效果好， 从而提高了输出的整个数据包的性能， 进而 提高了数据链路层的可靠性。

Claims

权 利 要 求 书
1、 一种 RS码交织编码方法， 设所使用的 RS码为 RS(N, K, S), 所述 方法包括以下步骤：
a,将要进行 RS交织编码的数据包中的数据逐列依次写入 RS码字节交织 器的信息区；
b,根据所述信息区已写入的数据构造校验区每行的数据；
c,对所述校验区的数据进行循环移位处理， 然后将所述 RS码字节交织 器中校验区的数据逐列依次读出。
2、 如权利要求 1所述的方法， 其特征在于：
所述要进行 RS编码交织的数据包是将 IP数据按多协议封装成时间分片 码流， 得到的业务数据包。
3、 如权利要求 1所述的方法， 其特征在于：
al , 根据所述数据包中的字节数及信息区的列数计算出所述字节交织器 的行数 M, 并计算出所述信息区中能够用有效数据填满的列数 kc;
a2,将所述数据包的前 kc*M个字节逐列依次写入所述信息区的前 kc列， 每列从上到下顺序写入；
a3 , 将所述数据包剩余的字节均匀地、 分散地填充到第 kc列， 该列其余 位置填充 0, 且对所述信息区剩余的列填充为 0。
4、 如权利要求 3所述的方法， 其特征在于：
所述步骤 a3的具体操作为， 记 g= floor(MZd), h = floor(M/(M-d)) , 其中
Μ为 RS码字节交织器的行数， floor为向下取整运算；
若 d M/2, 将第 kc列中第 0, g, 2*g,—，（d-l)*g行从上到下依次写入所 述业务数据包剩余的 d个字节， 剩余行位置填充 M-d个字节 0; 否则， 将第 kc列中第 0, h,2*h, ... , (M-d-l)*h行位置填充 M-d个字节 0, 剩余行从上到下 依次写入所述业务数据包剩余的 d个字节。
5、 如权利要求 1所述的方法， 其特征在于：
步骤 c对校验区的数据是按列或按行进行循环移位处理， 各列或各行的 移动位数不完全相同， 每列或每行的移动位数按预设的公式计算得到。
6、 如权利要求 5所述的方法， 其特征在于：
步骤 c 对校验区的数据是按列进行循环移位， 第 i 列的移动位数为 floor(i*M/S ) , i=l, ... ,S-l , 其中 M为交织器的行数， S为校验区的列数。
7、 一种 RS码交织编码装置， 包括： RS码字节交织器、 数据写入模块、 RS编码模块、 数据读出模块；
所述 RS码字节交织器用于存储要交织的数据， 其列数为 N, 左边 K列 为信息区， 右边 S列为校验区；
所述数据写入模块用于将要进行 RS 交织编码的数据包中的数据逐列依 次写入所述 RS码字节交织器的信息区，并向 RS编码模块发送完成写入信号； 所述 RS 编码模块用于收到所述完成写入信号后根据所述信息区已写入 的数据构造所述 RS码字节交织器校验区每行的数据；
其特征在于： 所述装置还包括循环移位模块；
所述 RS编码模块还用于完成编码后向循环移位模块发送完成编码信号； 所述循环移位模块用于收到所述完成编码信号后对所述 RS码字节交织 器中校验区的数据进行循环移位处理， 并向数据读出模块发送完成循环移位 信号；
所述数据读出模块用于收到所述完成循环移位信号后将所述 RS码字节 交织器中校验区的数据逐列依次读出。
8、 如权利要求 7所述的装置， 其特征在于：
所述装置还包括参数计算模块， 用于根据所述数据包中的字节数 F及信 息区的列数 K计算出所述 RS码字节交织器的行数 M, 及所述信息区中能够 用有效数据填满的列数 kc, 并计算 d = F mod M; 若 d不等于 0, 还计算： g= floor(MZd), h = floor(M/(M-d)) , mod为取模运算， floor为向下取整运算； 并 将计算的各参数发送给数据写入模块。
9、 如权利要求 7所述的装置， 其特征在于：
所述数据写入模块将要进行 RS 交织编码的数据包中的数据逐列依次写 入所述 RS码字节交织器的信息区是指：
数据写入模块收到所述各参数后将所述数据包的前 kc*M个字节逐列依 次写入所述 RS码字节交织器信息区的前 kc列， 每列从上到下顺序写入； 并 将数据包中剩余的 d个字节数据均匀地、 分散地填充到第 kc列， 并将该列其 余位置填充 0, 还将所述信息区剩余的列填充为 0。
10、 如权利要求 8或 9所述的装置， 其特征在于：
所述数据写入模块将数据包中剩余的 d个字节数据均匀地、 分散地填充 到第 kc列， 并将该列其余位置填充 0是指：
若 d M/2,将该列中第 0, g, 2*g,— , (d-l)*g行从上到下依次写入所述业 务数据包剩余的 d个字节， 剩余行位置填充 M-d个字节 0; 否则， 将该列中 第 0, h,2*h, ... , (M-d-l)*h行位置填充 M-d个字节 0, 剩余行从上到下依次写 入所述业务数据包剩余的 d个字节。
11、 如权利要求 7所述的装置， 其特征在于：
所述循环移位模块用于对所述 RS码字节交织器中校验区的数据进行循 环移位处理是指： 对所述校验区的数据按列或按行进行循环移位， 各列或各 行的移动位数不完全相同， 每列或每行的移动位数按预设的约定得到。
12、 如权利要求 11所述的装置， 其特征在于：
所述循环移位模块对所述校验区的数据按列进行循环移位， 第 i列的移 动位数为 floor(i*M/S ) , i=l, ... ,S-l , 其中 M为交织器的行数， S为校验区的 列数， floor为向下取整运算。
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