WO2009069622A1 - Data process device and data process method - Google Patents

Data process device and data process method Download PDF

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Publication number
WO2009069622A1
WO2009069622A1 PCT/JP2008/071389 JP2008071389W WO2009069622A1 WO 2009069622 A1 WO2009069622 A1 WO 2009069622A1 JP 2008071389 W JP2008071389 W JP 2008071389W WO 2009069622 A1 WO2009069622 A1 WO 2009069622A1
Authority
WO
WIPO (PCT)
Prior art keywords
code
data process
ldpc
error
symbol
Prior art date
Application number
PCT/JP2008/071389
Other languages
French (fr)
Japanese (ja)
Inventor
Takashi Yokokawa
Makiko Yamamoto
Original Assignee
Sony Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corporation filed Critical Sony Corporation
Publication of WO2009069622A1 publication Critical patent/WO2009069622A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

The present invention relates to a data process device whose resistance against an error such as a burst error or an erasure error of a code bit of an LDPC code can be improved, and a data process method. When one symbol is composed of two or more bits of a code bit of an LDPC (Low Density Parity Check) code, a column twist interleaver (24) performs a rearrangement process in which the code bit of the LDPC code is rearranged so as not to perform a mapping in which the plurality of code bits corresponding to '1' in one arbitrary row of a check matrix are mapped to one symbol. The present invention can be applied to for example, a transmission device for transmitting the LDPC code.
PCT/JP2008/071389 2007-11-26 2008-11-26 Data process device and data process method WO2009069622A1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2007-304690 2007-11-26
JP2007304690 2007-11-26
JP2008-027756 2008-02-07
JP2008027756 2008-02-07
JP2008-031724 2008-02-13
JP2008031724 2008-02-13

Publications (1)

Publication Number Publication Date
WO2009069622A1 true WO2009069622A1 (en) 2009-06-04

Family

ID=40678517

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071389 WO2009069622A1 (en) 2007-11-26 2008-11-26 Data process device and data process method

Country Status (2)

Country Link
TW (1) TW200943735A (en)
WO (1) WO2009069622A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2592773A1 (en) * 2011-11-10 2013-05-15 Panasonic Corporation Improved diversity fo rotated constellations with time-frequency slicing
EP2592772A1 (en) * 2011-11-10 2013-05-15 Panasonic Corporation Improved time diversity for rotated constellations
US8982927B2 (en) 2011-11-10 2015-03-17 Panasonic Corporation Transmitting method, receiving method, transmitter and receiver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006254466A (en) * 2005-03-11 2006-09-21 Samsung Electronics Co Ltd Apparatus for channel interleaving/deinterleaving in communication system using low density parity check code and control method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006254466A (en) * 2005-03-11 2006-09-21 Samsung Electronics Co Ltd Apparatus for channel interleaving/deinterleaving in communication system using low density parity check code and control method thereof

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ROBERT D. MADDOCK ET AL.: "Reliability-Based Coded Modulation With Low-Density Parity-Check Codes", IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 54, no. 3, March 2006 (2006-03-01), pages 403 - 406 *
STEPHANE Y. LE GOFF: "Signal Constellations for Bit-Interleaved Coded Modulation", IEEE TRANSACTIONS ON INFORMATION THEORY, vol. 49, no. 1, January 2003 (2003-01-01), pages 307 - 313 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2592773A1 (en) * 2011-11-10 2013-05-15 Panasonic Corporation Improved diversity fo rotated constellations with time-frequency slicing
EP2592772A1 (en) * 2011-11-10 2013-05-15 Panasonic Corporation Improved time diversity for rotated constellations
US8982927B2 (en) 2011-11-10 2015-03-17 Panasonic Corporation Transmitting method, receiving method, transmitter and receiver

Also Published As

Publication number Publication date
TW200943735A (en) 2009-10-16

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