WO2009066945A2

WO2009066945A2 - Apparatus and method for down-converting frequency in wireless communication system

Info

Publication number: WO2009066945A2
Application number: PCT/KR2008/006855
Authority: WO
Inventors: Yo-An Jung
Original assignee: Posdata Co., Ltd.
Priority date: 2007-11-21
Filing date: 2008-11-20
Publication date: 2009-05-28
Also published as: WO2009066945A3

Abstract

The present invention relates a frequency down-conversion apparatus and method for converting an Intermediate Frequency (IF) signal into a baseband signal in a wireless communication system. The present invention demodulates an IQ signal having an Intermediate Frequency (IF), received from a Radio Frequency (RF) unit, into an I signal and a Q signal having a baseband frequency, performs half -band filtering on the demodulated I signal and Q signal, and generates frequency down-converted I signal and Q signal with the baseband frequency by performing channel filtering on an I signal and Q signal performed the half -band filtering.

Description

Description Apparatus and method for down-converting frequency in wireless communication system Technical Field

[1] The present invention relates generally to a wireless communication system, and in particular, to a frequency down-conversion apparatus and method for converting an Intermediate Frequency (IF) signal into a baseband signal in a wireless communication system. Background Art

[2] Research on the next-generation wireless communication system is conducted to provide users with various Quality-of-Service (QoS) services at a high data rate. Particularly, for the next-generation wireless communication system, a study of a Base Station (BS) that provides services to users and of a network system consisting of BS's upper parts, is now made to transmit a large volume of service data to users at high speed, and research into frequency down-conversion of a signal is also being carried out to support data transmission in the network system.

[3] For the wireless communication systems, a data transmission/reception scheme has been proposed that uses Multi-Input Multi- Output (MIMO) between a BS and a Mobile Station (MS) to more effectively transmit service data to users, and a study of frequency down-conversion of multi-Frequency Assignment (FA) signals is made to support BS's multiple FAs for MIMO-based data transmission/reception. The BS includes various network units, and must convert Intermediate Frequency (IF) signals outputted from the network units, for example, Radio Frequency (RF) unit, into baseband signals and transfer them to a Digital Channel Card Unit (DCCU) in order to transmit service data to the users. Particularly, in order to support multiple FAs, the BS should convert an IF signal for the multiple FAs outputted from the RF unit into baseband signals with the multiple, and transfer them to the DCCU.

[4] FIG. 1 is a diagram schematically illustrating a frequency down-conversion apparatus in a general wireless communication system.

[5] Referring to FIG. 1, an IF IQ signal (FA IQ) outputted from an RF unit is inputted to a Surface Acoustic Wave (SAW) Filter (SAWF) 110, and an output signal of the SAWF 110 is inputted to multipliers 130 and 140. A cosine (cos) signal and a sine (sin) signal outputted from a Phase Locked Loop (PLL) 120 are inputted to the multipliers 130 and 140, respectively. The output signal of the SAWF 110 is multiplied by the cosine signal and the sine signal in the multipliers 130 and 140, and input to Low Pass Filters (LPFs) 150 and 160. Baseband I signal and Q signal, which are outputted from the LPFs 150 and 160, are inputted to Analog to Digital Converters (ADCs) 170 and 180 where they are output as digital baseband I signal and Q signal.

[6] As the frequency down-conversion apparatus uses ADCs for the baseband I signal and Q signal, it needs a space in the circuit, in which the ADCs are to be mounted, causing an increase in circuit complexity. Further, it requires quite a long time to perform debugging, including balance matching between I signals and Q signals, and should use the high-priced SAWF to receive an IF IQ signal outputted from the RF unit. To support multiple FAs, the frequency down-conversion apparatus performs frequency down-conversion separately for each FA path during frequency down- conversion on an IF signal for the multiple FAs, causing an increase in the number of paths for FA-by-FA frequency down-conversion and the number of PLLs that generate local signals of multiple FAs for frequency up-conversion.

[7] In addition, as the number of paths and PLLs for FA-by-FA frequency down- conversion increases, the frequency down-conversion apparatus is complex in its structure and design, and increases in size and complexity of a backboard where its constituent elements are mounted, making it difficult to implement the apparatus. Further, since the frequency down-conversion apparatus increases in the number of signal processing modules for the multiple FAs and in the number of connection lines between actually implemented Field Programmable Gate Array (FPGA) and the signal processing modules during frequency down-conversion, its interface and design is complex, the complexity increases due to an increase in the number of lines for providing clocks to the signal processing modules, and the size and complexity of the backboard increases, making it difficult to implement the apparatus. Disclosure of Invention

Technical Problem

[8] Accordingly, an aspect of the present invention is to provide an apparatus and method for frequency down-converting an IF signal into a baseband signal to support data transmission between network units in a wireless communication system.

[9] Another aspect of the present invention is to provide an apparatus and method for frequency down-converting an IF signal into baseband signals with multiple FAs to support the multiple FAs in a wireless communication system.

[10] Further another aspect of the present invention is to provide an apparatus and method for reducing complexity by digitally performing frequency down-conversion on IF signal for multiple FAs, and stably frequency down-converting the IF signal into baseband signals with multiple FAs in a wireless communication system. Technical Solution

[11] According to one aspect of the present invention, there is provided an apparatus for down-converting a frequency in a wireless communication system. The apparatus includes a demodulation part for demodulating an IQ signal having an Intermediate Frequency (IF), received from a Radio Frequency (RF) unit, into an I signal and Q signal having a baseband frequency; a half -band filter part for performing half-band filtering on the demodulated I signal and Q signal, and performing first inverse- interpolation on an I signal and Q signal performed the half -band filtering; and a channel filter part for performing channel filtering on an I signal and Q signal performed the first inverse-interpolation, performing second inverse-interpolation on an I signal and Q signal performed the channel filtering, and outputting frequency down-converted I signal and Q signal with the baseband frequency.

[12] According to another aspect of the present invention, there is provided a method for down-converting a frequency in a wireless communication system. The method includes demodulating an IQ signal having an Intermediate Frequency (IF), received from a Radio Frequency (RF) unit, into an I signal and a Q signal having a baseband frequency; performing half-band filtering on the demodulated I signal and Q signal; and generating frequency down-converted I signal and Q signal with the baseband frequency by performing channel filtering on an I signal and Q signal performed the half-band filtering.

Advantageous Effects

[13] The present invention down-converts an IF signal into a baseband signal and then removes image signals by performing filtering on the baseband signal in a wireless communication system, thereby digitally performing frequency down-conversion. This reduces the use of ADC and SAWF, facilitating simple structure and design of the frequency down-conversion apparatus and simple debugging, and contributing to a decrease in size of the board. In addition, the present invention frequency down- converts an IF signal for multiple FAs into baseband signals with the multiple FAs, and performs multiplexing and filtering on the frequency down-converted baseband signals in a wireless communication system, thereby digitally performing frequency down-conversion on the IF signal for multiple FAs. This reduces complexity and enables simple implementation, making it possible to frequency down-convert the IF signal into baseband signals in a stable manner, ensure simple debugging and reduce a size of the board. Brief Description of Drawings

[14] The above and other aspects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which:

[15] FIG. 1 is a diagram schematically illustrating a frequency down-conversion apparatus in a general wireless communication system;

[16] FIG. 2 is a diagram schematically illustrating a structure of a frequency down- conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[17] FIG. 3 is a diagram illustrating frequency spectra of input/output signals of constituent elements for a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[18] FIG. 4 is a diagram schematically illustrating a structure of a demodulation part of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[19] FIG. 5 is a diagram schematically illustrating a structure of a half-band filter part of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[20] FIG. 6 is a diagram schematically illustrating a structure of a channel filter part of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[21] FIG. 7 is a diagram illustrating an exemplary FPGA implemented for some components of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[22] FIG. 8 is a diagram schematically illustrating an exemplary implementation of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention;

[23] FIG. 9 is a diagram schematically illustrating an operation of a frequency down- conversion apparatus according to an embodiment of the present invention;

[24] FIG. 10 is a graph illustrating an output of a channel filter part in a frequency down- conversion apparatus for a wireless communication system according to an embodiment of the present invention;

[25] FIG. 11 is a diagram schematically illustrating a structure of a frequency down- conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[26] FIG. 12 is a diagram schematically illustrating a structure of a demodulation block of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[27] FIG. 13 is a diagram schematically illustrating a structure of a DeMUX in a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[28] FIG. 14 is a diagram illustrating an exemplary FPGA implemented for some components of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention;

[29] FIG. 15 is a diagram schematically illustrating an exemplary implementation of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention; and

[30] FIG. 16 is a diagram schematically illustrating an operation of a frequency dow n- conversion apparatus according to another embodiment of the present invention. Mode for the Invention

[31] Preferred embodiments of the present invention will now be described in detail with reference to the annexed drawings. In the drawings, the same or similar elements are denoted by the same reference numerals even though they are depicted in different drawings. In the following description, a detailed description of known functions and configurations incorporated herein has been omitted for clarity and conciseness.

[32] The present invention provides a frequency down-conversion apparatus and method for supporting data transmission between network units in a wireless communication system, the network units constituting the system. In the following description, an embodiment of the present invention frequency down-converts a signal having an Intermediate Frequency (IF) (hereinafter referred to as IF signal') into a signal having a baseband frequency (hereinafter referred to as 'baseband signal') lower than an IF. Further, the present invention provides a frequency down-conversion apparatus and method for supporting multiple Frequency Assignments (FAs) in a wireless communication system. When a multi-FA signal for supporting multiple FAs is received, an embodiment of the present invention frequency down-converts a signal having one FA, e.g., multi-FA signal into two or more signals having the multiple FAs, e.g. FA signals. Herein, the FA signal means a single signal having one of the multiple FAs, and the multi-FA signal means a single signal having one FA, which is combined the multiple FAs into by performing multiplexing on multiple signals with the multiple FAs to support multiple FAs.

[33] In addition, an embodiment of the present invention provides an apparatus and method for frequency down-converting one multi-FA signal having an IF (hereinafter referred to as IF multi-FA signal'), outputted from a Radio Frequency (RF) unit, into two or more FA signals having a baseband frequency (hereinafter referred to as 'baseband FA signals'), to transmit the baseband FA signals to network units, for example, Digital Channel Card Units (DCCUs), which form Base Station (BS) or BS's upper parts. In particular, the present invention frequency down-converts a IF multi- FA signal into baseband FA signals so as to support multiple FAs for Multi-Input Multi- Output (MIMO)-based data transmission/reception between a BS and a Mobile Station (MS) in a wireless communication system. [34] The present invention digitally frequency down-converts multi-FA IQ signal having an IF (hereinafter referred to as IF multi-FA IQ signal'), and outputs an FA I signals and Q signals having a baseband frequency (hereinafter referred to as 'baseband FA I signals and Q signals'). In the following description, for convenience, multiple FAs are assumed to be 3 FAs, so the multi-FA signal means a 3FA signal having one FA, which is combined the multiple FAs into by performing multiplexing on a first FA signal (FAl), a second FA signal (F A2) and a third FA signal (FA3). Further, when a 3FA signal having an IF is received, an embodiment of the present invention frequency down-converts the 3FA IQ signal into baseband FA I signals and Q signals, performs multiplexing on the frequency down-converted FA I signals and Q signals, performs filtering and inverse-interpolation (e.g., decimation) thereon, performs demultiplexing thereon, and outputs FA I signals and Q signals having a baseband frequency. With reference to FIG. 2, a detailed description will now be made of a frequency down- conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[35] FIG. 2 is a diagram schematically illustrating a structure of a frequency down- conversion apparatus in a wireless communication system according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating frequency spectra of input/output signals of constituent elements for the frequency down-conversion apparatus.

[36] Referring to FIG. 2, a frequency down-conversion apparatus includes an Analog to

Digital Converter (ADC) 210, a demodulation part 220, a Direct Digital Synthesizer (DDS) 230, a half-band filter part 240, and a channel filter part 250.

[37] The ADC 210 receives an IF signal outputted from an RF unit, for example, an IF IQ signal (FA IQ), and converts it into a digital signal by performing sampling on the received IF IQ signal (FA IQ) using a clock signal lower in frequency than the IF. Herein, the ADC 210 receives a 115 MHz IQ signal (FA IQ) from an RF unit (not shown), and outputs a 100 Mbps IQ signal digital-converted by performing sampling on the received signal using a 100 MHz clock signal lower in frequency than the IF.

[38] Reference numerals 310 and 320 in FIG. 3 represent frequency spectra of an input signal and an output signal of the ADC 210. To be specific, reference numeral 310 represents a frequency spectrum of a 115 MHz IF IQ signal, while reference numeral 320 represents a frequency spectrum for a digital 100 Mbps IF IQ signal that the ADC 210 has obtained by performing sampling on the input signal using a 100 MHz clock signal. Herein, the clock signal has same frequency as that of the DDS 230's output signal.

[39] The DDS 230 generates a cosine (cos) signal and a sine (sin) signal, and outputs the cos signal and the sin signal to the demodulation part 220. For example, the DDS 230 generates 15 MHz sin signal and cos signal and outputs them to the demodulation part 220 so that a 15 MHz IF IQ signal can be frequency down-converted into baseband signals, for example, baseband I signal and Q signal.

[40] The demodulation part 220 demodulates the digital IF IQ signal outputted from the

ADC 210 using the cos signal and sin signal outputted from the DDS 230, and the IF IQ signal is frequency down-converted into baseband I signal and Q signal by the demodulation. The demodulation part 220 increases a digital gain to increase power of the frequency down-converted signal. With reference to FIG. 4, a detailed description will now be made of the demodulation part 220.

[41] FIG. 4 is a diagram schematically illustrating a structure of the demodulation part

220 of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[42] Referring to FIG. 4, the demodulation part 220 includes a multiplication parti 410 for frequency down-converting an IF IQ signal into a baseband I signal, and a multiplication part2 420 for frequency down-converting the IF IQ signal into a baseband Q signal. The multiplication parti 410, which multiplies the IF IQ signal performed sampling in the ADC 210 by the cos signal and outputs a baseband I signal to the half- band filter part 240, includes a multiplier 1 412 for multiplying the IF IQ signal by the cos signal, and a reinterpreterl 414 for increasing a digital gain of the signal outputted from the multiplierl 412. The multiplication part2 420, which multiplies the IF IQ signal performed sampling in the ADC 210 by the sin signal and outputs a baseband Q signal to the half -band filter part 240, includes a multiplied 422 for multiplying the IF IQ signal by the sin signal, and a reinterpreted 424 for increasing a digital gain of the signal outputted from the multiplied 422.

[43] Reference numerals 320 and 330 in FIG. 3 represent frequency spectra of an input signal and an output signal of the demodulation part 220. To be specific, the input signal is frequency-shifted by 15 MHz through the demodulation part 220, the multiplication parti 410 in the demodulation part 220 outputs a 100 Mbps baseband I signal, and the multiplication part2 420 outputs a 100 Mbps baseband Q signal. Herein, since the baseband I signal and Q signal outputted from the multiplication parti 410 and the multiplication part2 420 are lower in power than the IF IQ signal, the reinterpreterl 414 and the reinterpreted 424 increase their digital gain to compensate for the power difference.

[44] The half -band filter part 240 passes only the low-frequency band signal on the frequency down-converted baseband I signal and Q signal by performing half-band filtering, and decreases a data rate. Herein, decreasing the data rate is performed by first inverse-interpolation, for example, 5-times inverse-interpolation (or 5-times decimation). Reference numerals 330 and 340 in FIG. 3 represent frequency spectra of an input signal and an output signal of the half-band filter part 240, and it can be seen that a 100 MHz signal is performed filtering from the input signal. With reference to FIG. 5, a detailed description will now be made of the half-band filter part 240.

[45] FIG. 5 is a diagram schematically illustrating a structure of the half -band filter part

240 of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[46] Referring to FIG. 5, the half-band filter part 240 includes a half -band filter parti 510 for performing half -band filtering on the baseband I signal outputted from the multiplication parti 410, and a half -band filter part2 520 for performing half-band filtering on the baseband Q signal outputted from the multiplication part2 420. The half -band filter parts 510 and 520 remove image signals from the baseband I signal and Q signal outputted from the multiplication parts 410 and 420 by passing only the low-frequency band signal (low-pass filtering), and decrease a data rate by performing first inverse- interpolation, for example, 5-times inverse-interpolation (or 5-times decimation). Herein, the half-band filter parts 510 and 520 include data width converters 512 and 522 for converting a data width of the baseband I signal and Q signal outputted from the multiplication parts 410 and 420 into a data width of half-band filters 514 and 524, the half -band filters 514 and 524 for removing image signals from the output signals of the data width converters 512 and 522 by performing the half -band filtering, and decreasing a data rate, and reinterpreters 516 and 526 for increasing a digital gain of the signals outputted from the half -band filters 514 and 524. The half -band filter parts 510 and 520 output the 100 Mbps baseband I signal and Q signal at a data rate of 20 Mbps through data rate reduction of 1/5. In other words, the half-band filter parts 510 and 520 output data rate-decreased signals by performing 5-times inverse-interpolation on the input signals.

[47] The channel filter part 250 performs band-pass filtering (or channel filtering) on the baseband I signal and Q signal outputted from the half-band filter part 240, decreases a data rate by performing second inverse-interpolation, for example, 2-times inverse- interpolation (or 2-times decimation), and outputs the final baseband I signal and Q signal (FA I, FA Q) to a DCCU (not shown). Reference numerals 340 and 350 in FIG. 3 represent frequency spectra of an input signal and an output signal of the channel filter part 250, and it can be seen that only the baseband signal is passed and the other signals are performed filtering from the input signal. With reference to FIG. 6, a detailed description will now be made of the channel filter part 250.

[48] FIG. 6 is a diagram schematically illustrating a structure of the channel filter part 250 of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[49] Referring to FIG. 6, the channel filter part 250 includes a channel filter parti 610 for performing channel filtering on the baseband I signal outputted from the half -band filter parti 510, and a channel filter part2 620 for performing channel filtering on the baseband Q signal outputted from the half -band filter part2 520. The channel filter parts 610 and 620 remove image signals from the output signals of the half-band filter parts 510 and 520 by performing channel filtering, for example, by performing bandpass filtering only the baseband signal, decrease a data rate by performing 2-times inverse-interpolation thereon, and then output the baseband I signal and Q signal that p erformed the channel filtering and 2-times inverse-interpolation. The channel filter parts 610 and 620 include data width converters 612 and 622 for converting a data width of the baseband I signal and Q signal outputted from the half-band filter parts 510 and 520 into a data width of channel filters 614 and 624, the channel filters 614 and 624 for removing image signals from the data width-converted signals by performing channel filtering, and outputting data rate-decreased baseband I signal and Q signal, and data width converters 616 and 626 for converting a data width of the output signals of the channel filters 614 and 624. The channel filter parts 610 and 620 output the 20 Mbps baseband I signal and Q signal at a data rate of 10 Mbps through data rate reduction of 1/2. In other words, the channel filter parts 610 and 620 output data rate-decreased signals by performing 2-times inverse-interpolation (or 2-times decimation) on the input signals.

[50] In the frequency down-conversion apparatus according to an embodiment of the present invention, some of its components can be can be realized with a Field Programmable Gate Array (FPGA). The baseband I signal and Q signal outputted from the channel filter part 250 can be inputted to a Giga Tranceiver Port (GTP) via a Common Public Interface (CPRI) interface, and then transported to a DCCU (not shown). That is, the frequency down-conversion apparatus, as shown in FIG. 7, can be implemented in an FPGA that includes the CPRI interface and the GTP, excluding the ADC 210. FIG. 7 is a diagram illustrating an exemplary FPGA implemented for some components of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention. The frequency down- conversion apparatus can also be designed using a system generator, and a frequency down-conversion apparatus designed using an FPGQ system generator will be described with reference to FIG. 8.

[51] FIG. 8 is a diagram schematically illustrating an exemplary implementation of a frequency down-conversion apparatus in a wireless communication system according to an embodiment of the present invention.

[52] Referring to FIG. 8, reference numeral 810 represents an input part to which an IF IQ signal (FA IQ) is inputted, and a DDS 230. Through the input part is inputted a 100 Mbps IF IQ signal obtained by performing sampling on a 115 MHz IF IQ signal using a clock signal, and the DDS 810 generates 15 MHz sin signal and cos signal. Reference numeral 820 represents a demodulation part 220, and the demodulation part 820 outputs baseband I signal and Q signal generated by multiplying the IF IQ signal by the cos signal and the sin signal outputted from the DDS 230. Reference numeral 830 represents a half-band filter part 240, and the half-band filter part 830 performs half-band filtering on its input signals, and outputs 20 Mbps baseband I signal and Q signal by performing 5-times inverse-interpolation (or 5-times decimation), on 100 Mbps I signal and Q signal performed the half-band filtering. Reference numeral 840 represents a channel filter part 250, and the channel filter part 840 performs channel filtering on its input signals, and outputs 10 Mbps baseband I signal and Q signal by performing 2-times inverse-interpolation (or 2-times decimation), on 20 Mbps I signal and Q signal performed the channel filtering. With reference to FIG. 9, a detailed description will now be made of an operation of a frequency down-conversion apparatus according to an embodiment of the present invention.

[53] FIG. 9 is a diagram schematically illustrating an operation of a frequency down- conversion apparatus according to an embodiment of the present invention.

[54] Referring to FIG. 9, in step S910, the frequency down-conversion apparatus converts an analog signal into a digital signal by performed sampling. At this point, a 115 MHz IF analog IQ signal is converted into an IF digital IQ signal, the IF IQ signal is performed sampling with a clock of 100 MHz, and the IF IQ signal performed sampling has a data rate of 100 Mbps.

[55] Thereafter, in step S920, the frequency down-conversion apparatus demodulates the digital-converted IF IQ signal by multiplying it by a cos signal and a sin signal. Herein, the cos signal and the sin signal have a frequency of 15 MHz, and the IF IQ signal is performed frequency down-conversion, i.e., is converted into baseband I signal and Q signal by being multiplied by the cos signal and the sin signal. The frequency down- conversion apparatus can perform frequency down-conversion using the image signals generated during sampling in the conversion process to the digital signal by the cos signal and the sin signal, and increases a digital gain to compensate power of the demodulated baseband I signal and Q signal and the IF IQ signal.

[56] In step S930, the frequency down-conversion apparatus performs half -band filtering on the demodulated baseband I signal and Q signal, passes only the low-frequency band signal on the demodulated baseband I signal and Q signal, and decreases a data rate by performing first inverse-interpolation. Herein, since the demodulated baseband I signal and Q signal have 32-bit data, the frequency down-conversion apparatus converts a data width (or bit width), of the demodulated baseband I signal and Q signal to perform half -band filtering, and then performs half-band filtering thereon. By performing the half -band filtering, only the low-frequency band signal in the de- modulated baseband I signal and Q signal is passed (low-pass filtering), resulting in the removal of the image signals from the demodulated baseband I signal and Q signal, and the data rate is decreased on the baseband I signal and Q signal performed the half- band filtering by performing 5-times inverse-interpolation. Herein, the frequency down-conversion apparatus decreases the data rate from 100 Mbps to 20 Mbps by the 5-times inverse-interpolation (or 5-times decimation), and then increases a digital gain.

[57] Next, in step S940, the frequency down-conversion apparatus performs channel filtering on the baseband I signal and Q signal performed the first inverse interpolation, decreases a data rate by performing second inverse-interpolation thereon, and outputs the final baseband I signal and Q signal. Herein, the frequency down-conversion apparatus converts a data width of the baseband I signal and Q signal performed the first inverse interpolation to perform channel filtering on the baseband I signal and Q signal performed the first inverse interpolation, and then performs channel filtering thereon. The frequency down-conversion apparatus removes image signals from the baseband I signal and Q signal performed the first inverse interpolation by the performing channel filtering, decreases the data rate from 20 Mbps to 10 Mbps by performing 2-times inverse-interpolation (or 2-times decimation) on the baseband I signal and Q signal performed the channel filtering, and outputs 10 Mbps baseband I signal and Q signal. The 10 Mbps baseband I signal and Q signal are inputted to a DCCU via a CPRI interface block, and the baseband I signal and Q signal that performed the channel filtering and data rate reduction, have a waveform shown in FIG. 10. FIG. 10 shows actual data in a frequency domain, which is a baseband signal outputted from the channel filter part 250, that performed the channel filtering and data rate reduction. With reference to FIG. 11, a detailed description will now be made of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[58] FIG. 11 is a diagram schematically illustrating a structure of a frequency down- conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[59] Referring to FIG. 11, a frequency down-conversion apparatus includes a demodulation block 1110 for frequency down-converting an IF multi-FA IQ signal with the one FA (3FA IQ) outputted from an RF unit via the ADC 210 of FIG. 2 into baseband FA I signals and Q signals with the multiple FAs, a multiplexer part 1120 for performing multiplexing on baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) outputted from the demodulation block 1110, a half -band filter part 1130 for performing half-band filtering on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the multiplexing, received from the multiplexer part 1120, a channel filter part 1140 for performing channel filtering on the baseband multi- FA I signal and Q signal (3FA I, 3FA Q) performed the half-band filtering, received from the half-band filter part 1130, and a demultiplexer part 1150 for performing demultiplexing on the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the channel filtering, received from the channel filter part 1140, and outputting baseband FA I signals and Q signals with the multiple FAs (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q).

[60] The demodulation block 1110 includes a DDS part for generating cos signals and sin signals, and a demodulation part for frequency down-converting an IF multi-FA signal (3FA IQ) using the cos signals and sin signals, and a detailed description thereof will be made with reference to FIG. 12. The frequency down-conversion apparatus further includes the ADC 210 shown in FIG. 2, and the IF multi-FA IQ signal (3FA IQ) is a signal that is converted into a digital signal by the ADC 210.

[61] In other words, the ADC 210 receives an IF analog multi-FA IQ signal (3FA IQ) from an RF unit, performs sampling the received IF analog multi-FA IQ signal (3FA IQ) using a clock signal having a frequency lower than the IF, and converts the analog signal into a digital signal by the sampling. For example, when a 115 MHz IF multi- FA IQ signal (3FA IQ) is received from the RF unit, the ADC 210 outputs digital- converted a 100 Mbps IF multi-FA IQ signal (3FA IQ) by performin sampling it using a 100 MHz clock signal lower in frequency than the IF. Herein, an input signal and an output signal of the ADC 210 are shown by reference numerals 310 and 320 of FIG. 3. With reference to FIG. 12, a description will now be made of the demodulation block 1110 of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[62] FIG. 12 is a diagram schematically illustrating a structure of a demodulation block of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[63] Referring to FIG. 12, the demodulation block 1110 includes a DDS part 1210 for generating sin signals and cos signals, and a demodulation part 1220 for frequency down-converting the IF multi-FA IQ signal (3FA IQ) that is converted into a digital signal at the ADC 210, into baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) using the sin signals and cos signals.

[64] The DDS part 1210 includes a FAl DDS 1212 for generating a sin signal and a cos signal corresponding to FAl, a FA2 DDS 1214 for generating a sin signal and a cos signal corresponding to FA2, and a FA3 DDS 1216 for generating a sin signal and a cos signal corresponding to FA3. The DDSs 1212, 1214 and 1216 outputs the generated sin signals and cos signals to FA multipliers in the demodulation part 1220 so that they are multiplied by the multi-FA IQ signal (3FA IQ) and converted into baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q). Herein, the DDS part 1210 generates 15 MHz sin signals and cos signals, and output them to the demodulation part 1220 so that a 15 MHz IF multi-FA IQ signal (3FA IQ) is converted into baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q).

[65] The demodulation part 1220 demodulates the digital IF multi-FA IQ signal (3FA IQ) outputted from the ADC 210 using the cos signals and sin signals outputted from the DDS part 1210, so that the IF multi-FA IQ signal (3FA IQ) is frequency down- converted into baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) by the demodulation, and increases a digital gain to increase power of the frequency down-converted signals. The demodulation part 1220 includes a multiplication parti 1230 for frequency down-converting the IF multi-FA IQ signal (3FA IQ) into baseband FA I signals (FAl I, FA2 I, FA3 I) using the cos signals outputted from the DDS part 1210, and a multiplication part2 1260 for frequency down- converting the IF multi-FA IQ signal (3FA IQ) into baseband FA Q signals (FAl Q, FA2 Q, FA3 Q) using the sin signals outputted from the DDS part 1210.

[66] The multiplication parts 1230 and 1260 multiply the IF multi-FA IQ signal (3FA IQ) outputted from the ADC 210 by the cosine signals and sin signals outputted from the DDS part 1210, and output the baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) to the multiplexer part 1120. The multiplication parts 1230 and 1260 include multipliers 1232, 1242, 1252, 1262, 1272 and 1282 for multiplying the IF multi-FA IQ signal (3FA IQ) by cos signals and sin signals, respectively, and reinterpreters 1234, 1244, 1254, 1264, 1274 and 1284 for increasing a digital gain of the signals outputted from the multipliers 1232, 1242, 1252, 1262, 1272 and 1282.

[67] Herein, frequency spectra of input signals and output signals of the demodulation part 1220 are shown by reference numerals 320 and 330 in FIG. 3. The input signals are frequency down-converted by 15 MHz by means of the demodulation part 1220, and the multiplication parts 1230 and 1260 in the demodulation part 1220 output 100 Mbps baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q). Since the output baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) are lower in power than the IF IQ signal, the multiplication parts 1230 and 1260 increase a digital gain to compensate for the power difference.

[68] The multiplexer part 1120 includes a multiplexerl (MUXl) 1122 for performing multiplexing on the baseband FA I signals (FAl I, FA2 I, FA3 I) outputted from the demodulation part 1220 in the demodulation block 1110, and a MUX2 1124 for performing multiplexing on the baseband FA Q signals (FAl Q, FA2 Q, FA3 Q) outputted from the demodulation part 1220 in the demodulation block 1110.

[69] The MUXs 1122 and 1124 receive the baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) outputted from the multiplication parts 1230 and 1260 in the demodulation part 1220, and perform interpolation thereon so as to easily perform multiplexing on the baseband FA I signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q). The MUXs 1122 and 1124 perform multiplexing on the baseband FA I signals and Q signals whose data rate is increased 3 times by the interpolation, for example, 3-times interpolation, and output baseband multi-FA I signal and Q signal (3FA I, 3FA Q) to the half -band filter part 1130. Herein, when 100 Mbps baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) are received from the multiplication parts 1230 and 1260, the MUXs 1122 and 1124 output 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) to the half -band filter part 1130. The MUXs 1122 and 1124 output a reference signal to the half -band filter part 1130 so that the half-band filter part 1130 can perform the half -band filtering to remove image signals. The half -band filter part 1130 performs half-band filtering based on a predetermined criterion considering the reference signal.

[70] The half -band filter part 1130 receives the baseband multi-FA I signal and Q signal

(3FA I, 3FA Q) outputted from the multiplexer part 1120, passes only the low- frequency band signal (low-pass filtering) on the received baseband multi-FA I signal and Q signal (3FA I, 3FA Q) by performing the half-band filtering, decreases a data rate by performing first inverse-interpolation, for example, 5-times inverse-interpolation (or 5-times decimation), and outputs the baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performed the half-band filtering and the first inverse-interpolation, to the channel filter part 1140. Herein, by performing the half-band filtering, the half-band filter part 1130 removes image signals included in the baseband multi-FA I signal and Q signal (3FA I, 3FA Q), and signals (for example, high- frequency signals having a frequency higher than to the IF) having a frequency higher than the cos signals and sin signals. At this point, the half-band filter part 1130 receives a reference signal from the multiplexer part 1120 as a reference signal for performing the half -band filtering, and performs the half-band filtering based on a predetermined criterion. Frequency spectra of the input signals and output signals of the half-band filter part 1130 are shown by reference numerals 330 and 340 of FIG. 3, and it can be seen that a 100 MHz signal is performed filtering on the input signals.

[71] The half -band filter part 1130 includes a half-band filter parti 1132 for performing the half -band filtering the baseband multi-FA I signal (3FA I) performed the multiplexing, outputted from the MUXl 1122 in the multiplexer part 1120, and a half-band filter part2 1134 for performing the half-band filtering the baseband multi-FA Q signal (3FA Q) performed the multiplexing, outputted from the MUX2 1124 in the multiplexer part 1120. The half-band filter parti 1132 and the half -band filter part2 1134 have the same function and structure as that of the half -band filter parts 510 and 520 shown in FIG. 5.

[72] That is, the half-band filter parts 1132 and 1134 remove image signals from the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the multiplexing, outputted from the MUXs 1122 and 1124 by performing the half-band filtering, decrease a data rate by performing 5-times inverse-interpolation, and output the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) to the channel filter part 1140. The half-band filter parts 1132 and 1134 include data width converters 512 and 522 for converting a data width of the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the multiplexing, outputted from the MUXs 1122 and 1124 into a data width of the half -band filters 514 and 524, half-band filters 514 and 524 for removing image signals from the output signals of the data width converters 512 and 522 by performing half-band filtering, and decreasing a data rate by performing 5-times inverse-interpolation, and reinterpreters 516 and 526 for increasing a digital gain of the signals outputted from the half-band filters 514 and 524.

[73] Herein, the half -band filter parts 1132 and 1134 output the 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) at a data rate of 60 Mbps through data rate reduction of 1/5. In other words, the half-band filter parts 1132 and 1134 output data rate-decreased signals to the channel filter part 1140 by performing 5-times inverse-interpolation (or 5-times decimation) on the input signals.

[74] The channel filter part 1140 passes only the baseband signal on the baseband multi-

FA I signal and Q signal (3FA I, 3FA Q) outputted from the half-band filter part 1130, i.e., performs the channel filtering, decreases a data rate by performing second inverse- interpolation, for example, 2-times inverse-interpolation (or 2-times decimation), and outputs the baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performed the channel filtering and 2-times inverse-interpolation, to the demultiplexer part 1150. Herein, the channel filter part 1140 removes image signals included in the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) by performing the channel filtering, and outputs a synchronization signal determined by the channel filtering to the demultiplexer part 1150, and the demultiplexer part 1150 performs the demultiplexing using the synchronization signal. Frequency spectra of the input signals and output signals of the channel filter part 1140 are represented by reference numerals 340 and 350 of FIG. 3, and it can be seen that only the baseband signal is passed and the other signals are performed filtering on the input signals.

[75] The channel filter part 1140 includes a channel filter parti 1142 for performing the channel filtering on the baseband multi-FA I signal (3FA I) outputted from the half- band filter parti 1132 in the half -band filter part 1130, and a channel filter part2 1144 for performing channel filtering on the baseband multi-FA Q signal (3FA Q) outputted from the half-band filter part2 1134 in the half -band filter part 1130. The channel filter parti 1142 and the channel filter part2 1144 have the same function and structure as that of the channel filter parts 610 and 620 shown in FIG. 6.

[76] That is, the channel filter parts 1142 and 1144 remove image signals from the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) outputted from the half -band filter parts 1132 and 1134 by performing channel filtering, decrease a data rate by performing 2-times inverse-interpolation, output the baseband multi-FA I signal (3FA I) to the demultiplexer part 1150 at the data rate, and output a synchronization signal determined by the channel filtering to the demultiplexer part 1150. The channel filter parts 1142 and 1144 include data width converters 612 and 622 for converting a data width of the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) outputted from the half -band filter parts 1132 and 1134, into a data width of channel filters 614 and 624, the channel filters 614 and 624 for removing image signals from the output signals of the data width converters 612 and 622 by performing channel filtering, and outputting the baseband multi-FA I signal and Q signal (3FA I, 3FA Q) whose data rate is decreased by performing 2-times inverse-interpolation, and data width converters 616 and 626 for converting a data width of the output signals of the channel filters 614 and 624.

[77] Herein, the channel filter parti 1142 and the channel filter part2 1144 output 60

Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) at a data rate of 30 Mbps through data rate reduction of 1/2. In other words, the channel filter parti 1142 and channel filter part2 1144 output data rate-decreased signals to the demultiplexer part 1150 by performing 2-times inverse-interpolation (or 2-times decimation) on the input signals.

[78] The demultiplexer part 1150 includes a DeMUXl 1152 for performing demultiplexing on the baseband multi-FA I signal (3FA I) outputted from the channel filter parti 1142 in the channel filter part 1140, a DeMUX2 1154 for performing demultiplexing on the baseband multi-FA Q signal (3FA Q) outputted from the channel filter part2 1144 in the channel filter part 1140.

[79] The DeMUXs 1152 and 1154 receive the baseband multi-FA I signal and Q signal

(3FA I, 3FA Q) and the synchronization signal outputted from the channel filter parts 1142 and 1144, perform demultiplexing on the received baseband multi-FA I signal and Q signal (3FA I, 3FA Q) according to the synchronization signal, perform third inverse-interpolation, for example, 3-times inverse-interpolation (or 3-times decimation), as opposed to interpolation by the multiplexer part 1120, on the FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) performed the demultiplexing, and output baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q). Herein, the DeMUXs 1152 and 1154 perform demultiplexing on the baseband multi-FA I signal and Q signal (3FA I. 3FA Q) as opposed to the MUXs 1122 and 1124, and then perform 3-times inverse-interpolation. At this point, the DeMUXs 1152 and 1154 perform demultiplexing on the multi-FA I signal and Q signal (3FA I, 3FA Q) according to the synchronization signal received from the channel filter parts 1142 and 1144. When 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the channel filter parts 1142 and 1144, the DeMUXs 1152 and 1154 perform demultiplexing the multi-FA I signal and Q signal (3FA I, 3FA Q), and output 10 Mbps baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) by performing 3-times inverse-interpolation. With reference to FIG. 13, a detailed description will now be made of the demultiplexer part 1150 in a wireless communication system according to another embodiment of the present invention.

[80] FIG. 13 is a diagram schematically illustrating a structure of a DeMUX 1152/1154 in a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[81] Referring to FIG. 13, the DeMUX 1152/1154 includes register units 1322, 1324 and

1326 for receiving the baseband multi-FA I signal/Q signal (3FA 1/3 FA Q) outputted from the channel filter part 1142/1144 and outputting FA I signals/Q signals (FAl V FAl Q, FA2 I/FA2 Q, FA3 I/FA3 Q), operation units 1312, 1314 and 1316 for outputting enable signals for the register units 1322, 1324 and 1326, and a setting unit 1302 for outputting setting signals for an AND operation of the operation units 1312, 1314 and 1316. When the DeMUX 1152/1154 receives a synchronization signal sync from the channel filter part 1142/1144, the synchronization signal is inputted to each of the operation units 1312, 1314 and 1316. The synchronization signal is a signal determined for synchronization of FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) in the multi-FA I signal/Q signal (3FA I/3FA Q) according to the channel filtering of the channel filter part 1142/1144. The DeMUX 1152/1154, though not illustrated in detail, further includes inverse-interpolation units for performing 3-times inverse-interpolation on the FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) outputted from the register units 1322, 1324 and 1326, and outputting the FA I signals/Q signals (FAl I/FA1 Q, FA2 I/FA2 Q, FA3 I/FA3 Q) performed the multiplexing and inverse-interpolation.

[82] The register units 1322, 1324 and 1326 each receive the multi-FA I signal/Q signal

(3FA 1/3 FA Q) outputted from the channel filter part 1142/1144, and when the register units 1322, 1324 and 1326 are enabled by the enable signals outputted from the operation units 1312, 1314 and 1316, they separate the multi-FA I signal/Q signal (3FA I/3FA Q) according to FA, and output corresponding FA I signals/Q signals. In other words, when the register unitl 1322 is enabled as an enable signal is received from the operation unitl 1332, the register unitl 1322 separates an FAl I signal/Q signal (FAl I/FA1 Q) from the multi-FA I signal/Q signal (3FA I/3FA Q). When the register unit2 1324 is enabled as an enable signal is received from the operation unit2 1314, the register unit2 1324 separates an FA2 I signal/Q signal (FA2 I/FA2 Q) from the multi-FA I signal/Q signal (3FA 1/3 FA Q). When the register unit3 1326 is enabled as an enable signal is received from the operation unit3 1316, the register unit3 1326 separates an FA3 I signal/Q signal (FA3 I/FA3 Q) from the multi-FA I signal/Q signal (3FA I/3FA Q).

[83] The operation units 1312, 1314 and 1316 receive the synchronization signal from the channel filter part 1142/1144, receive setting signals from the setting unit 1302, and perform an AND operation on a synchronization value of the synchronization signal and setting values of the setting signals. The operation units 1312, 1314 and 1316 output the enable signals to the register units 1322, 1324 and 1326 according to the result values of the AND operation.

[84] The setting unit 1302 sets setting values for an AND operation of the operation units

1312, 1314 and 1316, and outputs setting signals including the setting values to the operation units 1312, 1314 and 1316. An operation of the DeMUX 1152/1154 will now be described in detail by way of example.

[85] The channel filter part 1142/1144 by performing the channel filtering on the multi-

FA I signal/Q signal (3FA I/3FA Q) outputs a synchronization signal sync having in sequence a different synchronization value for each FA to the DeMUX 1152/1154. In other words, the channel filter part 1142/1144 outputs to the DeMUX 1152/1154 a synchronization signal that has in sequence a synchronization value corresponding to FAl, a synchronization value corresponding to FA2 and a synchronization value corresponding to F A3, according to the channel filtering for FAl, FA2 and F A3. For convenience, it will be assumed herein that the synchronization value corresponding to FAl is 0, the synchronization value corresponding to FA2 is 1, and the synchronization value corresponding to FA3 is 2.

[86] The synchronization signal sync including the synchronization values for individual

FAs is inputted to the operation units 1312, 1314 and 1316. The setting unit 1302 sets different setting values for individual FAs, and outputs setting signals including the setting values to the operation units 1312, 1314 and 1316. Herein, the setting unit 1302 separately sets a setting value corresponding to FAl, a setting value corresponding to FA2, and a setting value corresponding to FA3, and outputs setting signals including only one setting value to corresponding operation units. The setting value corresponding to FAl is 0, the setting value corresponding to FA2 is 1, and the setting value corresponding to FA3 is 2. A setting signal with a setting value 0 is inputted to the operation unitl 1312, a setting signal with a setting value 1 is inputted to the operation unit2 1314, and a setting signal with a setting value 2 is inputted to the operation unit3 1316.

[87] The operation units 1312, 1314 and 1316 perform an AND operation on the synchronization values in the received synchronization signal (sync) and the setting values in the received setting signals, and output enable signals to the corresponding register units 1322, 1324 and 1326 according to the result values of the AND operation. Herein, when the setting value and synchronization value corresponding to FAl are received, the operation unitl 1312 outputs an enable signal to the register unitl 1322 by means of an AND operation, and the register unitl 1322 is enabled and outputs an FAl I signal/Q signal (FAl I/FA1 Q). Similarly, when the setting value and synchronization value corresponding to FA2 are received, the operation unit2 1314 outputs an enable signal to the register unit2 1324 by means of an AND operation, and the register unit2 1324 is enabled and outputs an FA2 I signal/Q signal (FA2 I/FA2 Q). In addition, when the setting value and synchronization value corresponding to FA3 are received, the operation unit3 1316 outputs an enable signal to the register unit3 1326 by means of an AND operation, and the register unit3 1326 is enabled and outputs an FA3 I signal/Q signal (F A3 I/FA3 Q).

[88] In the frequency down-conversion apparatus according to another embodiment of the present invention, some of its components can be realized with an FPGA. The baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) outputted from the demultiplexer part 1150 can be inputted to a GTP via a CPRI interface, and then transported to a DCCU (not shown). That is, the frequency down- conversion apparatus, as shown in FIG. 14, can be implemented in an FPGA that includes the CPRI interface and the GTP, excluding the ADC. FIG. 14 is a diagram illustrating an exemplary FPGA implemented for some components of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention. The frequency down-conversion apparatus can also be designed using a system generator, and a frequency down-conversion apparatus designed using an FPGQ system generator will be described with reference to FIG. 15.

[89] FIG. 15 is a diagram schematically illustrating an exemplary implementation of a frequency down-conversion apparatus in a wireless communication system according to another embodiment of the present invention.

[90] Referring to FIG. 15, reference numeral 1510 represents the multiplexer part 1120 of

FIG. 11, reference numeral 1520 represents the half-band filter part 1130 of FIG. 11, reference numeral 1530 represents the channel filter part 1140 of FIG. 11, and reference numeral 1540 represents the demultiplexer part 1150 of FIG. 11.

[91] When the frequency down-converted 100 Mbps baseband FA I signals and Q signals

(FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) are received from the demodulation block 1110, the multiplexer part 1510 performs the multiplexing on the received baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q), performs 3-times interpolation thereon, and outputs 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q). When the 300 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) performed the multiplexing are received from the multiplexer part 1510, the half-band filter part 1520 performs the half-band filtering on the received baseband multi-FA I signal and Q signal (3FA I, 3FA Q), and outputs 60 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) by performing 5-times inverse-interpolation (or 5-times decimation).

[92] When the 60 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q), performed the half-band filtering and 5-times inverse-interpolation, are received from the half -band filter part 1520, the channel filter part 1530 performs the channel filtering on the received baseband multi-FA I signal and Q signal (3FA I, 3FA Q), and outputs 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) by performing 2-times inverse-interpolation (or 2-times decimation). When the 30 Mbps baseband multi-FA I signal and Q signal (3FA I, 3FA Q) are received from the channel filter part 1530, the demultiplexer part 1540 performs the demultiplexing on the received baseband multi-FA I signal and Q signal (3FA I, 3FA Q), and outputs 10 Mbps baseband FA I signals and Q signals (FAl I, FA2 I, FA3 I, FAl Q, FA2 Q, FA3 Q) by performing 3-times inverse-interpolation (or 3-times decimation). With reference to FIG. 16, a detailed description will now be made of an operation of a frequency down-conversion apparatus according to another embodiment of the present invention.

[93] FIG. 16 is a diagram schematically illustrating an operation of a frequency down- conversion apparatus according to another embodiment of the present invention.

[94] Referring to FIG. 16, in step S1610, a frequency down-conversion apparatus converts an IF analog multi-FA IQ signal into an IF digital multi-FA IQ signal by performing sampling, and demodulates the digital-converted IF multi-FA IQ signal into baseband FA I signals and Q signals by multiplying the digital IF multi-FA IQ signal by cos signals and sin signals. Herein, a 115 MHz IF analog multi-FA IQ signal is converted into an IF digital multi-FA IQ signal by an ADC. The IF analog multi-FA IQ signal is performed sampling with a clock of 100 MHz, and the IF multi-FA IQ signal performed the sampling has a data rate of 100 Mbps. Further, the cos signals and sin signals have a frequency of 15 MHz, and the IF multi-FA IQ signal is frequency down- converted into baseband FA I signals and Q signals by being multiplied by the cos signals and the sin signals. The frequency down-conversion apparatus can perform frequency down-conversion using the image signals generated during sampling in the conversion process to the digital signal by the cos signals and the sin signals, and increases a digital gain to compensate power of the demodulated baseband FA I signals and Q signals.

[95] Thereafter, in step S 1620, the frequency down-conversion apparatus performs

3-times interpolation on the demodulated baseband FA I signals and Q signals, and performs multiplexing on the baseband I signals and Q signals performed the 3-times interpolation. Herein, when the demodulated baseband FA I signals and Q signals have a data rate of 100 Mbps, the data rate is increased to 300 Mbps by 3-times interpolation, and 300 Mbps baseband multi-FA I signal and Q signal are outputted by performing multiplexing.

[96] In step S 1630, the frequency down-conversion apparatus performs the half-band filtering the baseband multi-FA I signal and Q signal performed the multiplexing, passes only the low-frequency band signal on the baseband multi-FA I signal and Q signal performed the multiplexing, and decreases a data rate by performing the first inverse-interpolation. Herein, since the baseband multi-FA I signal and Q signal performed the multiplexing have 32-bit data, the frequency down-conversion apparatus converts a data width (or bit width), of the baseband multi-FA I signal and Q signal performed the multiplexing to perform the half -band filtering, and then performs the half-band filtering thereon. By the performing the half -band filtering, only the low- frequency band signal on the baseband multi-FA I signal and Q signal is passed (low-pass filtering), resulting in the removal of the image signals from the baseband multi-FA I signal and Q signal performed the multiplexing, and the data rate is decreased on the baseband multi-FA I signal and Q signal performed the half -band filtering by performing the first inverse-interpolation, for example, 5-times inverse- interpolation (or 5-times decimation). Herein, the frequency down-conversion apparatus decreases the data rate from 300 Mbps to 60 Mbps by the 5-times inverse- interpolation, and then increases a digital gain.

[97] Thereafter, in step S 1640, the frequency down-conversion apparatus performs the channel filtering the baseband FA I signals and Q signals performed the first inverse- interpolation, and decreases a data rate by performing second inverse-interpolation. Herein, to perform the channel filtering on the baseband FA I signals and Q signals performed the first inverse-interpolation, the frequency down-conversion apparatus converts a data width of the baseband FA I signals and Q signals performed the first inverse-interpolation, before it performs the channel filtering. The image signals are removed from the baseband multi-FA I signal and Q signal performed the first inverse- interpolation by performing the channel filtering, and the data rate is decreased by performing the second inverse-interpolation, for example, 2-times inverse-interpolation (or 2-times decimation), on the baseband multi-FA I signal and Q signal performed the channel filtering. Herein, the frequency down-conversion apparatus decreases the data rate from 60 Mbps to 30 Mbps by performing 2-times inverse- interpolation, and converts a data width of the 30 Mbps baseband multi-FA I signal and Q signal.

[98] Thereafter, in step S 1650, the frequency down-conversion apparatus performs the demultiplexing the baseband multi-FA I signal and Q signal performed the second inverse-interpolation, and decreases a data rate by performing the third inverse- interpolation. Herein, the baseband FA I signals and Q signals are performed the demultiplexing into baseband FA I signals and Q signals by performing the demultiplexing, and the frequency down-conversion apparatus decreases the data rate from 30 Mbps to 10 Mbps by performing 3-times inverse-interpolation (or 3-times decimation), on the FA I signals and Q signals performed the multiplexing, and outputs 10 Mbps baseband FA I signals and Q signals.

[99] While the invention has been shown and described with reference to a certain preferred embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

[1] An apparatus for down-converting a frequency in a wireless communication system, the apparatus comprising: a demodulation part for demodulating an IQ signal having an Intermediate Frequency (IF), received from a Radio Frequency (RF) unit, into an I signal and Q signal having a baseband frequency; a half -band filter part for performing half-band filtering on the demodulated I signal and Q signal, and performing first inverse-interpolation on an I signal and Q signal performed the half-band filtering; and a channel filter part for performing channel filtering on an I signal and Q signal performed the first inverse-interpolation, performing second inverse-interpolation on an I signal and Q signal performed the channel filtering, and outputting frequency down-converted I signal and Q signal with the baseband frequency.

[2] The apparatus of claim 1, further comprising: a Direct Digital Synthesizer (DDS) for generating a cosine (cos) signal and sine (sin) signal for the IQ signal, and outputting the cos signal and sin signal to the demodulation part; wherein the demodulation part demodulates the IQ signal into the I signal and a Q signal using the cos signal and sin signal.

[3] The apparatus of claim 2, wherein the demodulation part comprises: a first multiplication part including; a first multiplier for multiplying the IQ signal by the cos signal; and a first reinterpreter for increasing a digital gain of an output signal of the first multiplier, and outputting the I signal having the baseband frequency; and a second multiplication part including; a second multiplier for multiplying the IQ signal by the sin signal; and a second reinterpreter for increasing a digital gain of an output signal of the second multiplier, and outputting the Q signal having the baseband frequency.

[4] The apparatus of claim 2, further comprising: a conversion part for converting an analog signal received from the RF unit into a digital signal, and outputting the IQ signal to the demodulation part; wherein the conversion part performs sampling the analog signal using a clock signal having a frequency lower than the IF, and outputs to the demodulation part the IQ signal which is converted into a digital signal by the sampling.

[5] The apparatus of claim 4, wherein the cos signal and sin signal have the same frequency as that of the clock signal.

[6] The apparatus of claim 1, wherein the half-band filter part comprises: a first half -band filter part including; a first data width converter for converting a data width of the demodulated I signal; a first half -band filter for performing half -band filtering on an output signal of the first data width converter, and performing 5-times inverse-interpolation on the I signal performed the half-band filtering; and a first reinterpreter for increasing a digital gain of an output signal of the first half-band filter, and outputting the I signal performed the first inverse-interpolation; and a second half-band filter part including; a second data width converter for converting a data width of the demodulated Q signal; a second half-band filter for performing half-band filtering on an output signal of the second data width converter, and performing 5-times inverse-interpolation on the Q signal performed the half -band filtering; and a second reinterpreter for increasing a digital gain of an output signal of the second half-band filter, and outputting the Q signal performed the first inverse- interpolation.

[7] The apparatus of claim 1, wherein the half-band filter part performs the half -band filtering on the demodulated I signal and Q signal, and performs 5-times inverse- interpolation on the I signal and Q signal performed the half-band filtering.

[8] The apparatus of claim 1, wherein the channel filter part comprises: a first channel filter part including; a first data width converter for converting a data width of the I signal performed the first inverse-interpolation; a first channel filter for performing channel filtering on an output signal of the first data width converter, and performing 2-times inverse-interpolation on the I signal performed the channel filtering; and a second data width converter for converting a data width of an output signal of the first channel filter, and outputting the frequency down-converted I signal; and a second channel filter part including; a third data width converter for converting a data width of the Q signal performed the first inverse-interpolation; a second channel filter for performing channel filtering on an output signal of the third data width converter, and performing 2-times inverse-interpolation on the Q signal performed the channel filtering; and a fourth data width converter for converting a data width of an output signal of the second channel filter, and outputting the frequency down-converted Q signal.

[9] The apparatus of claim 1, wherein the channel filter part performs channel filtering on the I signal and Q signal performed the first inverse-interpolation, and performs 2-times inverse-interpolation on the I signal and Q signal performed the channel filtering.

[10] The apparatus of claim 1, further comprising: a Direct Digital Synthesizer (DDS) part for generating cosine (cos) signals and sine (sin) signals for a multi-Frequency Assignments (FA) IQ signal having the IF with one FA, which is combined multiple FAs into, received from the RF unit, and outputting the cos signals and sin signals to the demodulation part; wherein the demodulation part demodulates the multi-FA IQ signal into FA I signals and Q signals, having the baseband frequency with the multiple FAs, using the cos signals and sin signals.

[11] The apparatus of claim 10, wherein the demodulation part comprises: a first multiplication part including; first multipliers for multiplying the multi-FA IQ signal by the cos signals; and first reinterpreters for increasing a digital gain of output signals of the first multipliers, and outputting the FA I signals; and a second multiplication part including; second multipliers for multiplying the multi-FA IQ signal by the sine signals; and second reinterpreters for increasing a digital gain of output signals of the second multipliers, and outputting the FA Q signals.

[12] The apparatus of claim 10, further comprising: a multiplexer part for performing multiplexing the demodulated FA I signals and Q signals into multi-FA I signal and Q signal having the baseband frequency with the one FA, and outputting the multi-FA I signal and Q signal performed the multiplexing to the half -band filter part; and a demultiplexer part for performing demultiplexing frequency down-converted multi-FA I signal and Q signal having the baseband frequency with the one FA, received from the channel filter part, into FA I signals and Q signals, and outputting frequency down-converted FA I signals and Q signals having the baseband frequency with the multiple FAs.

[13] The apparatus of claim 12, wherein the multiplexer part performs 3-times interpolation on the demodulated FA I signals and Q signals, and performs multiplexing on FA I signals and Q signals performed the 3-times interpolation; and the demultiplexer part performs demultiplexing the frequency down-converted multi-FA I signal and Q signal, performs 3-times inverse-interpolation on FA I signals and Q signals performed the demultiplexing, and outputs the frequency down-converted FA I signals and Q signals.

[14] The apparatus of claim 12, wherein the half-band filter part removes an image signal from the multi-FA I signal and Q signal by performing the half-band filtering based on a criterion determined according to the multiplexing by the multiplexer part, and performs the first inverse-interpolation on a multi-FA I signal and Q signal performed the half -band filtering to decrease a data rate.

[15] The apparatus of claim 14, wherein the channel filter part removes an image signal from a multi-FA I signal and Q signal performed the first inverse interpolation by performing the channel filtering, and performs the second inverse- interpolation on a multi-FA I signal and Q signal performed the channel filtering to decrease a data rate.

[16] The apparatus of claim 12, wherein the demultiplexer part performs demultiplexing on the frequency down-converted multi-FA I signal and Q signal, performs third inverse-interpolation on the FA I signals and Q signals performed the demultiplexing to decrease a data rate, and outputs the frequency down- converted FA I signals and Q signals.

[17] The apparatus of claim 12, wherein the demultiplexer part comprises: a setting unit for outputting setting signals for the frequency down-converted multi-FA I signal and Q signal; operation units for generating enable signals using a synchronization signal for synchronization of the FA I signals and Q signals and the setting signals; register units for separating the frequency down-converted multi-FA I signal and

Q signal into FA I signals and Q signals, and outputting FA I signals and Q signals in response to the enable signals; and inverse-interpolation units for performing inverse-interpolation on the outputted

FA I signals and Q signals, and outputting the frequency down-converted FA I signals and Q signals.

[18] A method for down-converting a frequency in a wireless communication system, the method comprising: demodulating an IQ signal having an Intermediate Frequency (IF), received from a Radio Frequency (RF) unit, into an I signal and a Q signal having a baseband frequency; performing half-band filtering on the demodulated I signal and Q signal; and generating frequency down-converted I signal and Q signal with the baseband frequency by performing channel filtering on an I signal and Q signal performed the half -band filtering.

[19] The method of claim 18, wherein the step of demodulating comprises: generating a cosine (cos) signal and a sine (sin) signal for the IQ signal; and generating the I signal having the baseband frequency by multiplying the IQ signal by the cos signal, and generating the Q signal having the baseband frequency by multiplying the IQ signal by the sin signal.

[20] The method of claim 18, wherein the step of demodulating comprises: performing sampling an analog signal received from the RF unit using a clock signal having a frequency lower than the IF, and generating the IQ signal which is converted into a digital signal by the sampling.

[21] The method of claim 18, wherein the step of performing half-band filtering removes an image signal from the demodulated I signal and Q signal by performing the half -band filtering, and generates the I signal and Q signal performed the half-band filtering by performing 5-times inverse-interpolation on the image signal-removed I signal and Q signal.

[22] The method of claim 18, wherein the step of generating removes an image signal from the I signal and Q signal performed the half -band filtering by performing channel filtering, and generates the frequency down-converted I signal and Q signal by performing 2-times inverse-interpolation on the image signal-removed I signal and Q signal.

[23] The method of claim 18, wherein the step of demodulating comprises: generating cosine (cos) signals and sine (sin) signals for a multi-Frequency Assignments (FA) IQ signal having the IF with one FA, which is combined multiple FAs into, when the multi-FA IQ signal having the IF is received from the RF unit; and generating FA I signals having the baseband frequency with the multiple FAs by multiplying the multi-FA IQ signal by the cos signals, and generating FA Q signals having the baseband frequency with the multiple FAs by multiplying the multi-FA IQ signal by the sin signals.

[24] The method of claim 23, wherein the performing half-band filtering comprises: combining the FA I signals into a multi-FA I signal having the baseband frequency with the one FA, combining the FA Q signals into a multi-FA Q signal having the baseband frequency with the one FA; wherein the performing half-band filtering performs the half-band filtering on the combined multi-FA I signal and Q signal.

[25] The method of claim 24, wherein the step of combining performs 3-times interpolation on the FA I signals and Q signals, and generating the multi-FA I signal and Q signal by combining FA I signals and Q signals performed the 3-times interpolation.

[26] The method of claim 24, wherein the step of performing half-band filtering removes an image signal from the combined multi-FA I signal and Q signal by performing the half -band filtering based on a criterion determined according to the combination, and generates a multi-FA I signal and Q signal performed the half-band filtering by performing 5-times inverse-interpolation on the image signal-removed multi-FA I signal and Q signal.

[27] The method of claim 26, wherein the step of performing channel filtering comprises: removing an image signal from the multi-FA I signal and Q signal performed the half-band filtering by performing channel filtering, and generating a multi-FA I signal and Q signal performed the channel filtering by performing 2-times inverse-interpolation; and separating the multi-FA I signal performed the channel filtering into FA I signals, and separating the multi-FA Q signal performed the channel filtering into FA Q signals.

[28] The method of claim 27, wherein the step of separating separates the multi-FA I signal and Q signal performed the channel filtering in sync with the channel filtering, and generates frequency down-converted FA I signals and Q signals having the baseband frequency with the multiple FAs by performing 3-times inverse-interpolation.