WO2009060628A1 - Méthode d'attribution de bits de remplissage et émetteur - Google Patents

Méthode d'attribution de bits de remplissage et émetteur Download PDF

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Publication number
WO2009060628A1
WO2009060628A1 PCT/JP2008/003241 JP2008003241W WO2009060628A1 WO 2009060628 A1 WO2009060628 A1 WO 2009060628A1 JP 2008003241 W JP2008003241 W JP 2008003241W WO 2009060628 A1 WO2009060628 A1 WO 2009060628A1
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WO
WIPO (PCT)
Prior art keywords
coding blocks
coding
block lengths
supported
blocks
Prior art date
Application number
PCT/JP2008/003241
Other languages
English (en)
Japanese (ja)
Inventor
Hao Jiang
Ming Xu
Kenichi Kuri
Akihiko Nishio
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Publication of WO2009060628A1 publication Critical patent/WO2009060628A1/fr

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/118Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6356Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

L'invention porte sur une méthode d'attribution de bits de remplissage comportant les étapes suivantes: division de la séquence initiale de bits d'information pour identifier le nombre de blocs de codage nécessaires à la division sur la base des longueurs des blocs de codage supporté par le codage des canaux; sélection d'au moins deux blocs de codage présentant chacun une longueur correspondant à une valeur discrète voisine de celle des blocs de codage supporté par le codage des canaux, en fonction du nombre identifié de blocs de codage et de la longueur des blocs de codage supportés; réduction du nombre de bits de remplissage à attribuer aux blocs de codage sélectionnés; attribution des bits de remplissage à tous les blocs de codage, dont les longueurs sont en moyenne minimales, parmi les blocs de codage; et attribution de tous les bits de remplissage à chacun des blocs de codage pour égaliser sensiblement le rapport de codage de chaque paquet de codage en fonction dudit rapport.
PCT/JP2008/003241 2007-11-09 2008-11-07 Méthode d'attribution de bits de remplissage et émetteur WO2009060628A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN200710186027.4 2007-11-09
CNA2007101860274A CN101431396A (zh) 2007-11-09 2007-11-09 在拆分码字中分配填充比特的方法

Publications (1)

Publication Number Publication Date
WO2009060628A1 true WO2009060628A1 (fr) 2009-05-14

Family

ID=40625535

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003241 WO2009060628A1 (fr) 2007-11-09 2008-11-07 Méthode d'attribution de bits de remplissage et émetteur

Country Status (2)

Country Link
CN (1) CN101431396A (fr)
WO (1) WO2009060628A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010004416A (ja) * 2008-06-23 2010-01-07 Fujitsu Ltd 移動無線装置
JP2016012945A (ja) * 2009-11-13 2016-01-21 パナソニック インテレクチュアル プロパティ コーポレーション オブアメリカPanasonic Intellectual Property Corporation of America 符号化装置、送信装置、符号化方法及び送信方法
CN108540262A (zh) * 2017-03-03 2018-09-14 华为技术有限公司 数据处理的方法和装置
JP2020504529A (ja) * 2017-01-05 2020-02-06 華為技術有限公司Huawei Technologies Co.,Ltd. 情報処理方法、デバイス、および通信システム
US10721033B2 (en) 2017-08-23 2020-07-21 Kabushiki Kaisha Toshiba Wireless communication apparatus and wireless communication method
CN111865475A (zh) * 2019-04-24 2020-10-30 烽火通信科技股份有限公司 分组交换方法及系统

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315911B (zh) * 2011-09-29 2017-10-27 中兴通讯股份有限公司 一种低密度奇偶校验码编码方法及装置
CN104917588A (zh) * 2015-04-13 2015-09-16 李焱 提高非视距毫米波室内通信系统传输可靠性信道编码方法
WO2018171778A1 (fr) * 2017-03-24 2018-09-27 华为技术有限公司 Procédé et appareil de communication
CN108631941B (zh) 2017-03-24 2021-02-23 华为技术有限公司 通信方法和装置
CN112398483A (zh) * 2019-08-15 2021-02-23 中兴通讯股份有限公司 一种ldpc编码方法、装置、基站及可读存储介质

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007020678A1 (fr) * 2005-08-12 2007-02-22 Fujitsu Limited Appareil de transmission, appareil de codage et appareil de décodage

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007020678A1 (fr) * 2005-08-12 2007-02-22 Fujitsu Limited Appareil de transmission, appareil de codage et appareil de décodage

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"3GPP TS 36.212, V8.0.0", September 2007, article "Evolved Universal Terrestrial Radio Access (E-UTRA)" *

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010004416A (ja) * 2008-06-23 2010-01-07 Fujitsu Ltd 移動無線装置
JP2016012945A (ja) * 2009-11-13 2016-01-21 パナソニック インテレクチュアル プロパティ コーポレーション オブアメリカPanasonic Intellectual Property Corporation of America 符号化装置、送信装置、符号化方法及び送信方法
US10075184B2 (en) 2009-11-13 2018-09-11 Panasonic Intellectual Property Corporation Of America Encoding apparatus, transmission apparatus, encoding method and transmission method
US10333551B2 (en) 2009-11-13 2019-06-25 Panasonic Intellectual Property Corporation Of America Decoding apparatus, reception apparatus, encoding method and reception method
US10693497B2 (en) 2009-11-13 2020-06-23 Panasonic Intellectual Property Corporation Of America Decoding apparatus, reception apparatus, encoding method and reception method
US11463107B2 (en) 2009-11-13 2022-10-04 Panasonic Intellectual Property Corporation Of America Decoding apparatus, reception apparatus, encoding method and reception method
JP2020504529A (ja) * 2017-01-05 2020-02-06 華為技術有限公司Huawei Technologies Co.,Ltd. 情報処理方法、デバイス、および通信システム
JP7026689B2 (ja) 2017-01-05 2022-02-28 華為技術有限公司 情報処理方法、デバイス、および通信システム
CN108540262A (zh) * 2017-03-03 2018-09-14 华为技术有限公司 数据处理的方法和装置
US10721033B2 (en) 2017-08-23 2020-07-21 Kabushiki Kaisha Toshiba Wireless communication apparatus and wireless communication method
CN111865475A (zh) * 2019-04-24 2020-10-30 烽火通信科技股份有限公司 分组交换方法及系统
CN111865475B (zh) * 2019-04-24 2022-08-30 烽火通信科技股份有限公司 分组交换方法及系统

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Publication number Publication date
CN101431396A (zh) 2009-05-13

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