WO2009058148A1

WO2009058148A1 - Mram testing

Info

Publication number: WO2009058148A1
Application number: PCT/US2007/083307
Authority: WO
Inventors: Syed M. Alam; Matthieu Blazy-Winning; Joseph J. Nahas; Kenneth R. Papworth; Mark Deherrea; Jason Janesky
Original assignee: Freescale Semiconductor Inc.
Priority date: 2007-11-01
Filing date: 2007-11-01
Publication date: 2009-05-07
Also published as: KR20100087310A; CN101842843A; JP5127078B2; CN101842843B; JP2011503763A

Abstract

A method for testing a toggle MRAM (10) having a plurality of cells (12, 14, 16, 18, 20, 22, 24, 26, 28) includes selecting a cell (12) of the plurality of cells to be tested, writing a first state to the cell (12), reading from the cell (12) to verify the first state, consecutively toggling a state of a first neighbor (14, 16, 18 or 20) of the cell and a state of a second neighbor (14, 16, 18, or 20) of the cell according to a predetermined sequence of neighbors where the first neighbor of the cell is adjacent to the cell and the second neighbor of the cell is adjacent to the cell and where the predetermined sequence of neighbors indicates an order in which to consecutively toggle the state of the first neighbor and the state of the second neighbor, and, after the consecutively toggling, reading from the cell to determine if a change from the first state to a second state occurred.

Description

MRAM TESTING

Background

Field

[0001] This disclosure relates generally to MRAMs, and more specifically, to techniques for testing MRAMs.

Related Art

[0002] Magnetoresistive random access memories (MRAMs) have been found to be beneficial for use as a memory because they are non-volatile and have fast operation both in reading and writing. One approach to MRAMs that has been effective is to operate the MRAM as a toggle memory. In such case the state of an MRAM cell is provided at a desired logic state by either leaving it in its present state because the present state is the desired state or toggling the memory state to the opposite logic state of the present logic state. Operating the MRAM as a toggle memory has been found to provide more reliable operation than an approach that directly writes the state of the cell. Directly writing the logic state of MRAM cell has been found to cause problems with write disturb by too frequently causing other cells along the bit line to also be incorrectly written to the same logic state. Toggle writing has been found to be far less susceptible to write disturb than direct writing. In order for toggle writing to be effective, the logic state of the cell must be read to determine if a toggle operation should be performed. This adds to the time for a write operation, but even with the extra read operation, the write operation is in the order of tens of nanoseconds whereas typical floating gate non-volatile memories (NVMs) require in the order of milliseconds for write. The use of flash type floating gate NVM has become quite popular. Although the benefits of MRAM are apparent, flash remains the NVM of choice at least in part because of the reliability is well understood.

[0003] Thus there would be a benefit in establishing that MRAMs can be reliable and predictably so. Brief Description of the Drawings

[0004] The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.

[0005] FIG. 1 is a circuit diagram of a portion of an MRAM;

[0006] FIG. 2 is a block diagram of a system using the MRAM of FIG. 1 ;

[0007] FIG. 3 is a block diagram of a portion of the system of FIG. 2;

[0008] FIG. 4 is more detail of a portion of the block diagram shown in FIG. 3; and

[0009] FIG. 5 is a flow chart describing a method of testing an MRAM according to one embodiment.

Detailed Description

[0010] An MRAM is tested for write disturb issues by testing each cell for write disturb by consecutively toggling adjacent neighbor cells of the cell being tested. In one example, a write disturb has been found to sometimes occur when toggling an adjacent cell on the same word line followed by togging an adjacent cell on the same bit line. This type of testing can be made more thorough by also toggling other adjacent memory cells as well as repeating the toggling of the neighbor cells.

[0011] Shown in FIG. 1 is a portion of a memory 10 comprising an MRAM cell 12, an MRAM cell 14, an MRAM cell 16, an MRAM cell 18, an MRAM cell 20, an MRAM cell 22, an MRAM cell 24, an MRAM cell 26, and an MRAM cell 28. MRAM cells 22, 14, and 24 are along a row coupled to a word line 30. MRAM cells 20, 12, and 16 are along a row coupled to a word line 32. MRAM cells 26, 18, and 28 are along a row coupled to a word line 34. MRAM cells 22, 20, and 26 are along a column coupled to a bit line 36. MRAM cells 14, 12, and 18 are along a column coupled to a bit line 38. MRAM cells 24, 16, and 28 are along a column coupled to a bit line 40. For the example of MRAM cell 12 being the cell under test (CUT), MRAM cells 14 and 18 are neighbor cells to MRAM cell 12 because they are adjacent to MRAM cell 12 and are along the same bit line as MRAM cell 12. MRAM cells 20 and 16 are also neighbor cells to MRAM cell 12 because they are adjacent to MRAM cell 12 and are along the same word line as MRAM cell 12. MRAM cells 22, 24, 26, and 28 are not considered neighbor cells to MRAM cell 12 because they are not on either the same word line or the same bit line as MRAM cell 12.

[0012] Write disturb has been found to be more of a problem for the case of toggling neighbor cells when one is on the same word line as the cell under test (CUT) and the other is on the same bit line as the CUT. Thus, for ensuring high reliability, MRAM cell 12 has neighbor cells consecutively toggled during testing.

[0013] Shown in FIG. 2 is a system 50 comprising memory 10, a built-in self-test (BIST) circuit 52, a processor 54, modules 56, an interface circuit 58, and a bus 60. Memory 10 is coupled to BIST circuit 52, interface circuit 58, and bus 60. BIST circuit 52 is further coupled to interface circuit 58. Processor 54 is coupled to interface circuit 58 and bus 60. Modules 56 are coupled to processor 54, interface circuit 58, and bus 60. Interface circuit 58 additionally has an input/output for coupling externally to system 50, which may be a single integrated circuit. Modules 56 may be a plurality of circuit functions such as peripheral control, memory, or another processor. BIST circuit 52 provides testing of memory 10 that includes testing of individual memory cells by consecutive toggling of neighbor cells. This is provided responsive to an external source through interface circuit 58. Processor 54 otherwise controls memory 10 and to at least some extent, modules 56. System 50 may include other circuits as well as those shown. Testing of memory 10 may also be performed under the control of processor 54 or through interface 58.

[0014] Shown in FIG. 3 is a BIST circuit 52 and memory 10 in more detail. There are also connections between BIST circuit 52 and memory 10 to other circuits that are not shown for simplicity in the drawing. BIST circuit 52 comprises an other BIST logic 62, a configuration storage circuitry 64, and a force toggle logic circuit 66. Memory 10 comprises a memory controller 68 and a memory array 70. Other BIST logic 62 and force toggle logic circuit 66 direct the testing of the memory array 70 via the memory controller 68 based on an input from configuration storage circuitry 64 that includes a sequence or sequences of toggling certain of the neighbors of the CUT. A separate signal, a force toggle indicator, is generated by force toggle logic circuit 66 to indicate that a forced toggle is to be performed. A force toggle is one that ensures a toggle of the cell occurs regardless of the content of the cell. Contents of configuration storage circuitry 64 are loaded through other BIST logic 62.

[0015] Shown in FIG. 4 is more detail of configuration storage circuitry 64. Configuration storage circuitry 64 may be a register that provides information concerning the CUT and how the CUT is to be tested. Configuration storage circuitry 64 has a field 72, a field 74, a field 76, a field 78, a field 80, and a field 82. Field 76 is the location, which may be an address, of a neighbor 0. Field 78 is the location, which may be an address, of a neighbor 1. Field 80 is the location, which may be an address, of a neighbor 2. Field 82 is the location, which may be an address, of a neighbor 3. For the example of MRAM cell 12 being the CUT, fields 76-82 would identify the locations of memory cells14, 16, 18, and 20 in the order desired for the test of the CUT. Field 72 identifies the last field of fields 76-82 to be used which has the affect of identifying which of the neighbors is the last neighbor to be toggled in the sequence. For example the sequence may only include two neighbors and the last one would be the second one toggled in the sequence. Even if only two are in the sequence, the sequence may be performed multiple times. Field 74 indicates the count of the additional times beyond the first time that the sequence of toggling the neighbors will be performed. The fields in configuration storage circuitry 64 can be organized in any order relative to each other, one embodiment of which is shown in FIG. 4.

[0016] Shown in FIG. 5 is a flow diagram 100 for performing the test of CUT, which may be MRAM cell 12. In a step 102, a CUT is written to a known state which is achieved with a read followed by a toggle if needed. A read of the CUT is performed in step 104 to verify the write in step 102. Steps 102 and 104 are performed under the direction of other BIST logic 62 as are last steps 128 and 130. The other steps are under the direction of configuration storage circuitry 64 and force toggle logic circuit 66. In step 106, the neighbor identified in field 76 is toggled. For MRAM cell 12 this could be any one of memory cells 14, 16, 18, and 20. In step 108, a determination is made if the neighbor toggled is the last neighbor identified in field 72. If it is, in step 110, a determination is made if the toggle is to be repeated based on field 74. If there is a repeat left to perform, the next step is step 106. The letter "A" is used to indicate a return to step 106. If in step 110 it is determined that there are no repeats left to be performed, then in step 128 the CUT is read to verify that the CUT has not changed state and thus there has not been a write disturb. Any time step 128 is performed, a next cell may be selected in step 130 as the next CUT and the process would thus begin again with step 102 with the newly selected CUT.

[0017] If in step 108, it is determined that the neighbor toggled in step 106 was not the last neighbor to be toggled, then the next step is to toggle the neighbor identified in field 78. This may also identify any of the four neighbors of the CUT. Even though it is shown as neighbor 1 in step 112, it may be the same as the neighbor identified in field 76 and toggled in step 106. After neighbor 1 has been toggled, a decision is made in step 114 if that is the last neighbor identified in field 72. If it is the last neighbor, a decision is made in step 116 if there are additional repeats that have not yet been performed based on field 74. If not, then in step 128 the CUT is read to determine if there has been a write disturb. If there are additional repeats yet to be performed, then the next step is step 106. If neighbor 1 is not the last neighbor, then the neighbor, neighbor 2, identified in field 80 is toggled in step 118. This also may be any of the four neighbors including either neighbor 0 or neighbor 1. In step 120, it is determined if neighbor 2 is the last neighbor. If it is, a decision is made in step 122 if there are any additional repeats based on field 74. If there are no additional repeats, then in step 128 the CUT is read to determine if there was a write disturb. If there is an additional repeat, then the next step is step 106. If neighbor 2 is not the last neighbor, then the neighbor identified in field 82 as neighbor 3 is toggled in step 124. Similarly as for neighbors 0, 1 , and 2, neighbor 3 may be any of the four neighbors of the CUT. After the cell identified as neighbor 3 has been toggled in step 124, a decision is made in step 126 if there is another repeat left to perform based on field 74. If there is another repeat to be performed, then the next step is step 106 and the process continues. It there are no other repeats to be performed, then in step 128 the CUT is read to determine if there has been a write disturb.

[0018] Flow chart 100 thus shows that a variety of options for toggling the neighbors is available. One example is simply to toggle two neighbors in which one is on the same column as the CUT and the other is on the same row as the CUT. This two cell sequence can be repeated. In fact it may be repeated the number of times as indicated in field 74. In such case a column and a row neighbor would be consecutively toggled and then repeated as desired. Also the same neighbor may be toggled consecutively. This could be achieved by identifying the same neighbor in both fields 76 and 78. This may be repeated as desired as well and/or adding another cell or cells to the sequence. Not only may this flow chart be used for providing testing to identify if a cell is reliable, it may be used to investigate the different combinations of toggling that provides the most risk for causing write disturb. This could be useful in identifying future margin tests as well as identifying potential areas of improvement in establishing MRAM as being reliable.

[0019] As shown in FIG. 1 , the MRAM cells are drawn as ellipses in which the long axis is at a 45 degree angle to the rows and columns. The most significant problem with write disturb is with the two neighbor cells that have their long axes aligned. Thus, for MRAM cell 12 as the CUT, the most dangerous combination for write disturb is consecutive toggles of MRAM cells 20 and 14 or cells 16 and 18. Thus, it may be beneficial to simply toggle the neighbors whose major axes are most closely aligned for testing write disturb and then move to the next CUT.

[0020] By now it should be appreciated that there has been provided a method for testing a toggle MRAM having a plurality of cells. The method includes selecting a cell of the plurality of cells to be tested. The method further includes writing a first state to the cell. The method further includes reading from the cell to verify the first state. The method further includes consecutively toggling a state of a first neighbor of the cell and a state of a second neighbor of the cell according to a predetermined sequence of neighbors, wherein the first neighbor of the cell is adjacent to the cell and the second neighbor of the cell is adjacent to the cell, and wherein the predetermined sequence of neighbors indicates an order in which to consecutively toggle the state of the first neighbor and the state of the second neighbor. The method further includes, after the step of consecutively toggling, reading from the cell to determine if a change from the first state to a second state occurred. The toggling of the state of the first neighbor not being performed in response to a read of the first neighbor, and the toggling of the state of the second neighbor not being performed in response to a read of the second neighbor. The method may be further characterized by a read of the first neighbor not being performed immediately prior to the toggling of the state of the first neighbor and a read of the second neighbor not being performed immediately prior to the toggling of the state of the second neighbor. The method may further include obtaining the predetermined sequence of neighbors from configuration storage circuitry. The method may be further characterized by the configuration storage circuitry further indicating a last neighbor of the predetermined sequence of neighbors. The method may be further characterized by the configuration storage circuitry comprising a repeat indicator used to determine a number of times to repeat the predetermined sequence of neighbors, wherein, prior to the reading from the cell to determine if the change from the first state to the second state occurred, repeating the consecutive toggling of the first and second neighbors according to the predetermined sequence of neighbors the number of times determined using the repeat indicator. The method may be further characterized by the first neighbor being along a same bitline as the cell and the second neighbor being along a same wordline as the cell. The method may be further characterized by the predetermined sequence of neighbors indicating that the first neighbor follows the second neighbor, and wherein the consecutively toggling the state of the first neighbor of the cell and the state of the second neighbor of the cell is performed such that the state of the second neighbor is toggled prior to the state of the first neighbor.

[0021] Also there is a data processing system having an MRAM array having a plurality of cells, an MRAM controller coupled to the MRAM array, and testing logic. The testing logic is coupled to the MRAM controller and comprises configuration storage circuitry which stores a predetermined sequence of at least two neighbor locations, wherein, for each cell of the plurality of cells being tested, the testing logic consecutively toggles a state of neighbors of the cell being tested as indicated by the at least two neighbor locations of the predetermined sequence. The data processing system may be further characterized by the MRAM array, the MRAM controller, and the testing logic being located on a single integrated circuit. The data processing system may be further characterized by the configuration storage circuitry storing a last neighbor indicator to indicate an end of the predetermined sequence. The data processing system may be further characterized by the configuration storage circuitry storing a repeat indicator which indicates a number of times the testing logic consecutively toggles a sequence of the at least two neighbors of the cell being tested indicated by the predetermined sequence. The data processing system may be further characterized by the toggling not being preformed in response to a read of the neighbor being toggled.

[0022] There is also described a method for testing a toggle MRAM having a plurality of cells. The method includes selecting a cell to be tested from the plurality of cells. The method further includes writing a first state to the cell. The method further includes reading from the cell to verify the first state. The method further includes determining a first neighbor of the cell as indicated by a predetermined sequence of neighbors, wherein the first neighbor is adjacent to the cell. The method further includes toggling a state of the first neighbor of the cell, wherein the toggling of the state of the first neighbor is not performed in response to a read of the first neighbor. The method further includes determining a second neighbor of the cell as indicated by the predetermined sequence of neighbors, wherein the second neighbor is adjacent to the cell. The method further includes toggling a state of the second neighbor of the cell, wherein the toggling of the state of the second neighbor is not performed in response to a read of the second neighbor. The method further includes, after the toggling of the state of the second neighbor, reading from the cell to determine if a change from the first state to a second state occurred. The method further includes, after the reading from the cell to determine if the change from the first state to the second state occurred, selecting a next cell of the plurality of cells to be tested. The method may further comprise, after the toggling of the state of the first neighbor of the cell, determining that the first neighbor is not a last neighbor of the predetermined sequence. The method may further comprise, after the toggling of the state of the second neighbor of the cell and prior to the reading from the cell to determine if the change from the first state to the second state occurred, determining that the second neighbor is the last neighbor of the predetermined sequence. The method may further comprise, after the determining that the second neighbor is the last neighbor of the predetermined sequence, determining if a repeat of the predetermined sequence is indicated. The method may further comprise, after the selecting the next cell, writing a third state to the next cell; reading from the next cell to verify the third state; determining a third neighbor of the next cell as indicated by the predetermined sequence of neighbors, wherein the third neighbor is adjacent to the next cell; toggling a state of the third neighbor of the next cell, wherein the toggling of the state of the third neighbor of the next cell is not performed in response to a read of the third neighbor of the next cell; determining a fourth neighbor of the next cell as indicated by the predetermined sequence of neighbors, wherein the fourth neighbor is adjacent to the next cell; toggling a state of the fourth neighbor of the next cell, wherein the toggling of the state of the fourth neighbor of the next cell is not performed in response to a read of the fourth neighbor of the next cell; and after the toggling of the state of the fourth neighbor of the next cell, reading from the next cell to determine if a change from the third state to a fourth state occurred. The method may be further characterized by the second state being one of a logic state or an indeterminate state. The method may be further characterized by the first neighbor and the second neighbor not being along a same wordline or a same bitline.

[0023] Because the apparatus implementing the present invention is, for the most part, composed of electronic components and circuits known to those skilled in the art, circuit details will not be explained in any greater extent than that considered necessary as illustrated above, for the understanding and appreciation of the underlying concepts of the present invention and in order not to obfuscate or distract from the teachings of the present invention.

[0024] Some of the above embodiments, as applicable, may be implemented using a variety of different information processing systems. For example, although Figure 1 and the discussion thereof describe an exemplary information processing architecture, this exemplary architecture is presented merely to provide a useful reference in discussing various aspects of the invention. Of course, the description of the architecture has been simplified for purposes of discussion, and it is just one of many different types of appropriate architectures that may be used in accordance with the invention. Those skilled in the art will recognize that the boundaries between logic blocks are merely illustrative and that alternative embodiments may merge logic blocks or circuit elements or impose an alternate decomposition of functionality upon various logic blocks or circuit elements.

[0025] Although the invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. For example, in the flow chart in Fig.5, boxes 116, 122, and 126 could be eliminated and the YES output from boxes 114 and 120 and the output of box 124 all could connect to the input of box 110. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. Any benefits, advantages, or solutions to problems that are described herein with regard to specific embodiments are not intended to be construed as a critical, required, or essential feature or element of any or all the claims.

[0026] The term "coupled," as used herein, is not intended to be limited to a direct coupling or a mechanical coupling.

[0027] Furthermore, the terms "a" or "an," as used herein, are defined as one or more than one. Also, the use of introductory phrases such as "at least one" and "one or more" in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an." The same holds true for the use of definite articles.

[0028] Unless stated otherwise, terms such as "first" and "second" are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other priohtization of such elements.

Claims

1. A method for testing a toggle MRAM having a plurality of cells, the method comprising: selecting a cell of the plurality of cells to be tested; writing a first state to the cell; reading from the cell to verify the first state; consecutively toggling a state of a first neighbor of the cell and a state of a second neighbor of the cell according to a predetermined sequence of neighbors, wherein the first neighbor of the cell is adjacent to the cell and the second neighbor of the cell is adjacent to the cell, and wherein the predetermined sequence of neighbors indicates an order in which to consecutively toggle the state of the first neighbor and the state of the second neighbor; after the step of consecutively toggling, reading from the cell to determine if a change from the first state to a second state occurred.

2. The method of claim 1 , wherein the toggling of the state of the first neighbor is not performed in response to a read of the first neighbor, and the toggling of the state of the second neighbor is not performed in response to a read of the second neighbor.

3. The method of claim 1 , wherein a read of the first neighbor is not performed immediately prior to the toggling of the state of the first neighbor, and a read of the second neighbor is not performed immediately prior to the toggling of the state of the second neighbor.

4. The method of claim 1 , further comprising obtaining the predetermined sequence of neighbors from configuration storage circuitry.

5. The method of claim 4, wherein the configuration storage circuitry further indicates a last neighbor of the predetermined sequence of neighbors.

6. The method of claim 4, wherein the configuration storage circuitry comprises a repeat indicator used to determine a number of times to repeat the predetermined sequence of neighbors, wherein, prior to the reading from the cell to determine if the change from the first state to the second state occurred, repeating the consecutive toggling of the first and second neighbors according to the predetermined sequence of neighbors the number of times determined using the repeat indicator.

7. The method of claim 1 , wherein the first neighbor is along a same bitline as the cell and the second neighbor is along a same wordline as the cell.

8. The method of claim 1 , wherein the predetermined sequence of neighbors indicates that the first neighbor follows the second neighbor, and wherein the consecutively toggling the state of the first neighbor of the cell and the state of the second neighbor of the cell is performed such that the state of the second neighbor is toggled prior to the state of the first neighbor.

9. A data processing system, comprising: an MRAM array having a plurality of cells; an MRAM controller coupled to the MRAM array; and testing logic coupled to the MRAM controller, the testing logic comprising configuration storage circuitry which stores a predetermined sequence of at least two neighbor locations, wherein, for each cell of the plurality of cells being tested, the testing logic consecutively toggles a state of neighbors of the cell being tested as indicated by the at least two neighbor locations of the predetermined sequence.

10. The data processing system of claim 9, wherein the MRAM array, the MRAM controller, and the testing logic are located on a single integrated circuit.

11. The data processing system of claim 9, wherein the configuration storage circuitry stores a last neighbor indicator to indicate an end of the predetermined sequence.

12. The data processing system of claim 9, wherein the configuration storage circuitry stores a repeat indicator which indicates a number of times the testing logic consecutively toggles a sequence of the at least two neighbors of the cell being tested indicated by the predetermined sequence.

13. The data processing system of claim 9, wherein the toggling is not preformed in response to a read of the neighbor being toggled.

14. A method for testing a toggle MRAM having a plurality of cells, the method comprising: selecting a cell to be tested from the plurality of cells; writing a first state to the cell; reading from the cell to verify the first state; determining a first neighbor of the cell as indicated by a predetermined sequence of neighbors, wherein the first neighbor is adjacent to the cell; toggling a state of the first neighbor of the cell, wherein the toggling of the state of the first neighbor is not performed in response to a read of the first neighbor; determining a second neighbor of the cell as indicated by the predetermined sequence of neighbors, wherein the second neighbor is adjacent to the cell; toggling a state of the second neighbor of the cell, wherein the toggling of the state of the second neighbor is not performed in response to a read of the second neighbor; after the toggling of the state of the second neighbor, reading from the cell to determine if a change from the first state to a second state occurred; and after the reading from the cell to determine if the change from the first state to the second state occurred, selecting a next cell of the plurality of cells to be tested.

15. The method of claim 14, wherein after the toggling of the state of the first neighbor of the cell, the method further comprises determining that the first neighbor is not a last neighbor of the predetermined sequence.

16. The method of claim 15, wherein after the toggling of the state of the second neighbor of the cell and prior to the reading from the cell to determine if the change from the first state to the second state occurred, the method further comprises determining that the second neighbor is the last neighbor of the predetermined sequence.

17. The method of claim 16, wherein after the determining that the second neighbor is the last neighbor of the predetermined sequence, the method further comprises determining if a repeat of the predetermined sequence is indicated.

18. The method of claim 14, wherein after the selecting the next cell, the method further comprises: writing a third state to the next cell; reading from the next cell to verify the third state; determining a third neighbor of the next cell as indicated by the predetermined sequence of neighbors, wherein the third neighbor is adjacent to the next cell; toggling a state of the third neighbor of the next cell, wherein the toggling of the state of the third neighbor of the next cell is not performed in response to a read of the third neighbor of the next cell; determining a fourth neighbor of the next cell as indicated by the predetermined sequence of neighbors, wherein the fourth neighbor is adjacent to the next cell; toggling a state of the fourth neighbor of the next cell, wherein the toggling of the state of the fourth neighbor of the next cell is not performed in response to a read of the fourth neighbor of the next cell; after the toggling of the state of the fourth neighbor of the next cell, reading from the next cell to determine if a change from the third state to a fourth state occurred.

19. The method of claim 14, wherein the second state is one of a logic state or an indeterminate state.

20. The method of claim 14, wherein the first neighbor and the second neighbor are not along a same wordline or a same bitline.