WO2009040697A3 - Etalonnage de rejet de mode commun automatique - Google Patents

Etalonnage de rejet de mode commun automatique Download PDF

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Publication number
WO2009040697A3
WO2009040697A3 PCT/IB2008/053723 IB2008053723W WO2009040697A3 WO 2009040697 A3 WO2009040697 A3 WO 2009040697A3 IB 2008053723 W IB2008053723 W IB 2008053723W WO 2009040697 A3 WO2009040697 A3 WO 2009040697A3
Authority
WO
WIPO (PCT)
Prior art keywords
analog
digital
signal
mode rejection
analog input
Prior art date
Application number
PCT/IB2008/053723
Other languages
English (en)
Other versions
WO2009040697A2 (fr
Inventor
Fabio Sebastiano
Lucien Johannes Breems
Raf Lodewijk Jan Roovers
Original Assignee
Nxp Bv
Fabio Sebastiano
Lucien Johannes Breems
Raf Lodewijk Jan Roovers
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv, Fabio Sebastiano, Lucien Johannes Breems, Raf Lodewijk Jan Roovers filed Critical Nxp Bv
Priority to CN200880108593A priority Critical patent/CN101809863A/zh
Priority to EP08807654.2A priority patent/EP2195922B1/fr
Priority to US12/679,484 priority patent/US8174416B2/en
Publication of WO2009040697A2 publication Critical patent/WO2009040697A2/fr
Publication of WO2009040697A3 publication Critical patent/WO2009040697A3/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/303Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters using a switching device
    • H03F1/304Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters using a switching device and using digital means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45636Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedback means
    • H03F3/45641Measuring at the loading circuit of the differential amplifier
    • H03F3/4565Controlling the common source circuit of the differential amplifier
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45448Indexing scheme relating to differential amplifiers the common source circuit [CSC] comprising an addition circuit made by mirrors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45456Indexing scheme relating to differential amplifiers the CSC comprising bias stabilisation means, e.g. DC-level stability, positive or negative temperature coefficient dependent control
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45471Indexing scheme relating to differential amplifiers the CSC comprising one or more extra current sources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45504Indexing scheme relating to differential amplifiers the CSC comprising more than one switch

Abstract

La présente invention concerne un circuit et un procédé pour un étalonnage de rejet de mode commun automatique dans un système de conversion différentiel, et une compensation de déséquilibre pour équilibrer le point de fonctionnement d'un circuit dans le trajet de signal et pour améliorer le rejet de mode commun. Le circuit pour un étalonnage de rejet de mode commun automatique dans un système de conversion différentiel comprend un étage d'entrée analogique pour un signal d'entrée analogique (101), un convertisseur analogique à numérique (106) pour convertir un signal analogique (107) en sa représentation numérique (108), un bloc numérique (105) agencé pour adapter ladite représentation numérique (108) d'une partie d'un décalage en courant continu dudit signal d'entrée analogique (101) selon que ledit signal d'entrée analogique (101) est dans une plage d'entrée prédéterminée dudit convertisseur analogique à numérique (106), et un convertisseur numérique à analogique (103) agencé dans un trajet de rétroaction (102) dudit bloc numérique (105) à des moyens de soustraction (101) dudit étage d'entrée analogique pour convertir un signal numérique (104) en un signal de sortie analogique (109), ledit signal de sortie analogique (109) étant soustrait dudit signal d'entrée analogique (101) conduisant audit signal analogique (107).
PCT/IB2008/053723 2007-09-28 2008-09-15 Etalonnage de rejet de mode commun automatique WO2009040697A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN200880108593A CN101809863A (zh) 2007-09-28 2008-09-15 自动共模抑制校准
EP08807654.2A EP2195922B1 (fr) 2007-09-28 2008-09-15 Etalonnage de rejet de mode commun automatique
US12/679,484 US8174416B2 (en) 2007-09-28 2008-09-15 Automatic common-mode rejection calibration

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP07117546 2007-09-28
EP07117546.7 2007-09-28

Publications (2)

Publication Number Publication Date
WO2009040697A2 WO2009040697A2 (fr) 2009-04-02
WO2009040697A3 true WO2009040697A3 (fr) 2009-08-06

Family

ID=40511965

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/053723 WO2009040697A2 (fr) 2007-09-28 2008-09-15 Etalonnage de rejet de mode commun automatique

Country Status (4)

Country Link
US (1) US8174416B2 (fr)
EP (1) EP2195922B1 (fr)
CN (1) CN101809863A (fr)
WO (1) WO2009040697A2 (fr)

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MX2012006325A (es) * 2009-12-02 2012-12-17 Univ New York State Res Found Sensor de gas con compensacion para variaciones de linea base.
US8901996B2 (en) * 2010-11-30 2014-12-02 Infineon Technologies Ag Configurable system for cancellation of the mean value of a modulated signal
JP5588407B2 (ja) * 2011-08-26 2014-09-10 株式会社東芝 Ad変換装置およびdc−dc変換装置
CN102393484A (zh) * 2011-08-31 2012-03-28 华东光电集成器件研究所 一种电流稳定性检测装置
ES2534958B1 (es) * 2013-09-30 2016-02-09 Consejo Superior De Investigaciones Científicas (Csic) Sistema y procedimiento para la calibración de etapas de adquisición y acondicionamiento de biopotenciales eléctricos
CN104614055B (zh) * 2013-11-01 2017-11-10 梅特勒-托利多(常州)精密仪器有限公司 带有数字补偿功能的模拟称重传感器
DE102014009955A1 (de) * 2014-07-07 2016-01-07 Drägerwerk AG & Co. KGaA Einrichtung und Verfahren zur Erfassung von elektrischen Potentialen
US9729164B2 (en) * 2015-08-14 2017-08-08 Cirrus Logic, Inc. Dual processing paths for differential mode and common mode signals for an adaptable analog-to-digital converter (ADC) topology
DE102016212991A1 (de) * 2016-02-26 2017-08-31 Volkswagen Aktiengesellschaft Datenübertragungssystem, Steuergerät und Verfahren zur Datenübertragung
US10027447B2 (en) * 2016-10-17 2018-07-17 Analog Devices, Inc. Circuits for on-situ differential impedance balance error measurement and correction
US10327659B2 (en) * 2016-11-13 2019-06-25 Analog Devices, Inc. Quantization noise cancellation in a feedback loop
AU2019205603B2 (en) 2018-01-05 2021-01-21 GS Elektromedizinische Geräte G. Stemple GmbH Gas sensor, and method for operating the gas sensor
CA3088990C (fr) * 2018-01-05 2023-12-19 Hahn-Schickard-Gesellschaft Fuer Angewandte Forschung E.V. Systeme d'evaluation pour un capteur de gaz thermique, procede et programmes informatiques
CN110855295B (zh) * 2019-11-06 2023-06-13 珠海亿智电子科技有限公司 一种数模转换器和控制方法
IT202000007021A1 (it) * 2020-04-02 2021-10-02 St Microelectronics Srl Circuito convertitore, dispositivo e procedimento di compensazione dell'offset corrispondenti
CN111614371B (zh) * 2020-05-25 2021-07-06 中国电子科技集团公司第五十四研究所 一种无源互调电路干扰抑制设计方法
US11881969B2 (en) * 2022-04-22 2024-01-23 Samsung Display Co., Ltd. Real-time DC-balance aware AFE offset cancellation
CN114533087B (zh) * 2022-04-28 2022-08-26 之江实验室 一种基于斩波技术消除电极间直流偏移的方法及系统
US20240072823A1 (en) * 2022-08-25 2024-02-29 Cirrus Logic International Semiconductor Ltd. Calibration of anti-aliasing filter mismatch

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JP3349948B2 (ja) 1998-03-23 2002-11-25 沖電気工業株式会社 アナログ/ディジタル変換装置
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Also Published As

Publication number Publication date
EP2195922A2 (fr) 2010-06-16
US20100201551A1 (en) 2010-08-12
US8174416B2 (en) 2012-05-08
EP2195922B1 (fr) 2015-03-04
CN101809863A (zh) 2010-08-18
WO2009040697A2 (fr) 2009-04-02

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