WO2009026831A1 - Système et procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique - Google Patents

Système et procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique Download PDF

Info

Publication number
WO2009026831A1
WO2009026831A1 PCT/CN2008/072069 CN2008072069W WO2009026831A1 WO 2009026831 A1 WO2009026831 A1 WO 2009026831A1 CN 2008072069 W CN2008072069 W CN 2008072069W WO 2009026831 A1 WO2009026831 A1 WO 2009026831A1
Authority
WO
WIPO (PCT)
Prior art keywords
clock
optical channel
synchronization
module
payload unit
Prior art date
Application number
PCT/CN2008/072069
Other languages
English (en)
Chinese (zh)
Inventor
Lei Shi
Juan Dong
Chen Wang
Xiuying Wang
Original Assignee
Huawei Technologies Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Publication of WO2009026831A1 publication Critical patent/WO2009026831A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1652—Optical Transport Network [OTN]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0089—Multiplexing, e.g. coding, scrambling, SONET
    • H04J2203/0094—Virtual Concatenation

Definitions

  • the present invention relates to the field of optical communications, and in particular, to a virtual cascade synchronization system and method in an optical transport network. Background technique
  • the 0TN device can be used to carry large bandwidth services, such as STM (Statistic Time-division Multiplexing) -64, 10G Ethernet, 40G POS (Packet Over SDH (Synchronous Digital Hierarchy) System)) and so on.
  • STM Statistic Time-division Multiplexing
  • 10G Ethernet 10G Ethernet
  • 40G POS Packet Over SDH (Synchronous Digital Hierarchy) System)
  • OTN's virtual concatenation technology divides the large-bandwidth service into several network-supported granules for transmission, and only needs to support large-bandwidth processing at both the transmitting and receiving ends.
  • the frame structure of OPUk-Xv is a byte block frame structure with 4 rows and 3810X columns, which is composed of OPUk_Xv overhead area (OH, OverHead) and payload area (Payload).
  • the client data is encapsulated, mapped, framed, and sent to the receiver.
  • the OPUk-Xv payload is mapped to IJX OPUk, and each OPUk is transmitted in an ODUk (Optical Channel Data Unit), and X ODUks form ODUk-Xv.
  • ODUk Optical Channel Data Unit
  • the OTN In the receiving direction, the OTN is deframed and demapped to recover the customer data. Since the OTN is an asynchronous system, the virtual channel transport unit (OTUk) is asynchronous, and the single container OPUk traverses in the OTN network in the form of OTUk. The element needs to perform the asynchronous mapping/demapping process. The OTUk from each network element will have a difference in rate and phase. Therefore, in the receiving direction, the asynchronous OTUk container needs to be synchronized to a system clock domain.
  • the virtual channel transport unit OTUk
  • each ODUk in the ODUk-Xv is transmitted separately in the network, different ODUks have different delays when transmitting through the network, so there is sometimes a delay between the ODUks at the end, and thus a delay difference between the OPUks. .
  • This delay difference must be compensated, so the virtual cascade delay compensation alignment is required, and finally the customer data is recovered by asynchronous demapping.
  • Constant Bit Rate (CBR) signals (STM-64, STM-256) can be asynchronous The way is mapped to OPUk-4v.
  • the frame structure of OPUk-4v is shown in Figure 2.
  • the OPUk-4v payload area consists of 4x4x3 808 bytes.
  • Each line consists of 1 positive adjustment opportunity byte (PJO, Positive Justification Opportunity), 1 negative Negative Justification Opportunity (NJO) byte and 3 JC (Justification Control) bytes.
  • PJO Positive Adjust opportunity byte
  • NJO Negative Justification Opportunity
  • JC Justification Control
  • the 10 Gbit I s signal can be loaded into the OPU1 - 4v, and the 40 Gbit / s signal can be loaded into the OPU 2 - 4v.
  • each line can be adjusted by one byte of positive/negative code rate; in the OPUk-4v frame, 4 times of positive/negative code rate adjustment can be made for 4 times.
  • mapping path of the OTN virtual concatenation standard is as follows: STM-64 ⁇ OPUl-4v ⁇ 4 X 0PU1 ⁇ 4 X ODU1 ⁇ 4 X OTU1.
  • the write clock of the synchronous FIFO (First In First Out) is the respective OTU1 clock
  • the read clock of the synchronous FIFO is the OTU1 system clock, which is used to read 0PU1 from the FIFO.
  • the FIFO is only the clock domain isolation, thus synchronizing the four OTU1 to one clock.
  • the read control portion of the virtual cascade delay compensation is framed as shown in Fig. 2, and the aligned OPU1-4V structure is output, and the demapping portion recovers the STM-64 from the OPU1-4V.
  • the scheme directly selects one channel from the four OTU1 clocks as the system clock, and has higher requirements on the four OTU1 clocks, and requires four OTU1 clocks to be the same frequency. If the 4-channel OTU1 clock has a frequency difference, the position of OPU1 in OTU1 is fixed. When the system clock is used to synchronize the OPU1 container, the fixed position of the OPU1 in OTU1 cannot be guaranteed, and the virtual cascade delay compensation is performed. After that, the frame structure cannot be reproduced, thereby introducing random unmeasurable jitter. Asynchronous demapping is not able to effectively control the leakage of this part of the jitter, which is especially disadvantageous for services with strict jitter specifications such as STM64.
  • the above system is a system with multiple virtual concatenation groups, such as a system that receives a total of eight OTU1s, but the eight paths belong to two different virtual concatenation groups, each of which is a virtual level from the same source node.
  • the application scenario also needs to deal with the problem of introducing jitter into the service during the synchronization process.
  • another set of virtual concatenation groups will also be affected, and in such a system, the solution is even more undesirable.
  • the read clock of the synchronous FIFO can be selected from the received four branches or from the local clock.
  • the same problem as in the prior art 1 is also generated when the 0TU1 system clock is selected from one of the four branches.
  • the 0TU1 system clock is selected from the local clock, since the 0TU1 system clock is different from the received 0TU1 clock of the four branches, although the write FIFO is 0TU1, the readout from the FIFO is 0PU1, but is read from the FIFO. 0PU1
  • the position in the OTU1 is not fixed, that is, the interval between the OPU1 frame and the frame is not fixed, that is, the OTU1 frame structure has been broken.
  • the virtual cascade delay compensation unit aligns the four OPU1s, but the interval between the aligned OPU1-4V frames and the frames is also random, which is equivalent to providing a random tracking clock to the asynchronous demapping unit, which is not conducive to recovery.
  • the jitter indicator meets the required clock. Therefore, although the scheme can synchronize the OTU1 of the branch to a system clock, the jitter amplitude introduced by the synchronization link cannot be measured, and the asynchronous demapping unit cannot perform effective filtering, and finally degrades the output service clock quality.
  • an embodiment of the present invention provides a virtual concatenation synchronization system and method in an optical transport network.
  • the technical solution is as follows:
  • a virtual cascade synchronization system in an optical transport network comprising:
  • the synchronization module is configured to perform clock synchronization processing on each branch optical channel transmission unit, generate synchronization control information, and perform pointer adjustment on the synchronization control information of each branch according to the FIFO water line to generate a synchronized optical channel payload unit and Its corresponding gap clock;
  • a virtual cascade delay compensation module configured to perform virtual cascade delay compensation on the synchronized optical channel payload units of all branches, according to the optical channel payload unit synchronized with each branch and its corresponding notch clock Obtaining an aligned optical channel payload unit virtual concatenation container and its corresponding notch clock;
  • An asynchronous demapping module configured to extract a service payload from the aligned optical channel payload unit virtual concatenation container, and obtain a mapping according to the aligned optical channel payload unit virtual concatenation container and its corresponding gap clock respectively Positive and negative adjustment information and optical channel payload unit pointer adjustment information;
  • a smoothing service obtaining module configured to select a scheduling pattern with a uniformly distributed gap according to the positive and negative adjustment information of the mapping and the optical channel payload unit pointer adjustment information, and obtain smoothing from the service payload according to the scheduling pattern uniformly distributed by the gap Business payload;
  • a service data recovery module configured to acquire a data clock by tracking a scheduling pattern uniformly distributed by the gap, and recover the service data from the smoothed service payload by using the data clock.
  • the embodiment of the invention further provides a virtual concatenation method in an optical transport network, the method comprising the following steps: performing clock synchronization processing on each branch optical channel transmission unit to generate synchronization control information, according to FIFO water
  • the line adjusts the synchronization control information of each branch to generate a synchronized optical channel payload unit and its corresponding gap clock; performing virtual cascade delay compensation on the synchronized optical channel payload units of all branches, Obtaining an aligned optical channel payload unit virtual concatenation container according to the optical channel payload unit synchronized with each branch and its corresponding notch clock, according to the corresponding gap of the optical channel payload unit synchronized by each branch
  • the clock obtains the optical channel payload unit virtual cascade container phase Shoulder clock
  • Tracking the scheduling pattern of the gap uniformly distributed acquires a data clock and recovers the service data from the smoothed service payload using the data clock.
  • the technical solution in the embodiment of the present invention effectively suppresses the jitter introduced by the synchronization and the mapping by using the OPUk fixed-point floating and the virtual cascade delay compensation re-framing and the asynchronous demapping of the synchronization process, and solves the fixed bit rate through the OTN.
  • FIG. 1 is a structural diagram of an OPU-Xv in the prior art
  • FIG. 2 is a schematic diagram of a mapping structure of a CBR10G/CBR40G in the prior art
  • 3 is a structural diagram of OTN synchronization and virtual cascade delay compensation/asynchronous demapping in the prior art 1;
  • FIG. 5 is a structural diagram of an OTN virtual concatenation synchronization system according to Embodiment 1 of the present invention.
  • FIG. 6 is a schematic diagram of a fixed-point floating of an OPUk according to Embodiment 1 of the present invention.
  • FIG. 7 is a structural diagram of a synchronization module according to Embodiment 1 of the present invention.
  • FIG. 8 is a structural diagram of a virtual cascade delay compensation module according to Embodiment 1 of the present invention.
  • FIG. 9 is a schematic diagram of a smooth service acquisition module according to Embodiment 1 of the present invention.
  • FIG. 10 is a flowchart of an OTN virtual concatenation synchronization method according to Embodiment 2 of the present invention. detailed description
  • all virtual concatenation group members are compensated by using system clock synchronization and virtual concatenation delay.
  • the key steps of the OTN virtual concatenation receiving direction are synchronization and virtual concatenation delay compensation.
  • the embodiment of the present invention effectively suppresses the jitter introduced by the synchronization by the OPUk fixed point floating and the virtual cascade delay compensation re-framing and the asynchronous demapping in the synchronization process, thereby solving the fixed bit rate (CBR) transmitted by the OTN virtual concatenation transmission.
  • CBR fixed bit rate
  • the asynchronous mapping/demapping process of the STM-64 to 4 X OTU1 is taken as an example to describe the synchronization system and method of the OTN virtual concatenation, and other systems, such as the STM-2560TN virtual concatenation synchronization system, are similar. No longer.
  • an embodiment of the present invention provides an OTN virtual concatenation synchronization system.
  • the system comprises five units, namely a synchronization module (201), a virtual cascade delay compensation module (202), an asynchronous demapping module (203), a smoothing service acquisition module (204) and a service data recovery module (205). Each unit will be specifically described below.
  • the synchronization module (201) completes the clock synchronization processing of the four OTU1s, generates synchronous control information, and performs pointer adjustment on the synchronization control information of each branch according to the FIFO waterline, thereby generating a synchronized optical channel payload unit and the branch peer.
  • the optical channel payload unit corresponds to the gap clock.
  • the synchronization module (201) adopts a fixed-point floating mode, and allows the OPU to float in a fixed area of the OTU1.
  • the first row and the 14th byte of the OTU1 are defined as the OPU1 negative adjustment position; the first row and the fifteenth byte are defined as the OPU1 positive adjustment position.
  • the byte of the other location may be selected as the positive and negative adjustment position of the OPU1, as long as it is the OTU idle bit, and is not limited to the positive and negative adjustment position definition method of the embodiment.
  • the OPU1 frequency deviation range that can be accommodated in the OPU1 area is calculated as follows:
  • OPU1 rate 2.48832Gbps
  • the structure can accommodate the reception of OPU1 fluctuating between -65.65 ppm and 65.65 ppm.
  • the peer module (201) includes four channels, each of which includes a synchronization sub-module (2012), a waterline detection sub-module (2012), and a fixed-point floating control sub-module (2013).
  • the synchronization sub-module (2012) further includes an OPU1 write control unit (20121) and an OPU1 FIFO unit (20122) for performing clock synchronization processing on each of the branch optical channel transmission units to generate a synchronized optical channel payload unit.
  • the specific structure of the synchronization module (201) is as follows: The synchronization sub-module (2011) is used for clock synchronization processing of each branch optical channel transmission unit to generate synchronization control information.
  • the OPU1 write control subunit receives the OTU1, extracts the OPU1 therefrom, writes the OPU1 into the OPU1 FIFO, and writes the clock to the OTU1 clock received by each channel.
  • the OPU1FIFO receives OPU1 and isolates the clock domain.
  • the waterline detection sub-module (2012) is used to detect the watermark of each branch FIFO and send the detection result to the corresponding fixed-point floating control sub-module (2013).
  • the fixed-point floating control sub-module (2013) is used to set the positive adjustment position and the negative adjustment position at the fixed position of the optical channel transmission unit, and the synchronization sub-module is in the positive and negative adjustment position according to the detection result of the water line detection sub-module (2012) ( 2011)
  • the generated synchronization control information is adjusted by the pointer.
  • the fixed-point floating control sub-module (2013) generates a read control input to the OPU1FIFO unit (20122) as a read control.
  • the OPU1 read control adopts the fixed-point floating mode.
  • the read control is at a fixed position (that is, the defined positive and negative adjustment positions). According to the FIFO water line, it is determined whether the OPU1 is floating or not, and the read rate is adjusted.
  • the fixed-point floating control sub-module (2013) adjusts according to the detected result. If the FIFO water line is higher than the high water line, that is, the write rate of the OPU1 FIFO unit (20122) is greater than the read rate, the fixed-point floating control The module (2013) uses the negative adjustment OPU1 floating area to increase the read rate; if the FIFO water line is lower than the low water line, ie the write rate of the OPU1FIFO unit (20122) is less than the read rate, the positive adjustment OPU1 floating area is used. To reduce the read rate; if the FIFO water line is between the high and low water lines, the OPU1 does not float.
  • the read control generated by the fixed-point floating control sub-module (2013) may be equivalent to the gap clock, and the gap clock 1_1, the gap clock 1_2, the gap clock 1_3, and the gap clock 1_4 are respectively deducted from the overhead and padding information after each branch is synchronized.
  • the gap clock acts as the write clock for the virtual cascaded delay compensation module (202).
  • OPU1 uses the same clock from the read clock of OPU1FIFO unit (20122) and the write clock of fixed-point floating control sub-module (2013).
  • the source of this clock can be selected from each branch or local clock.
  • the OPU1 outputted by the OPU1 FIFO unit (20122) is output to the next-stage imaginary delay delay compensation module (202) through the fixed-point floating control sub-module (2013).
  • the virtual concatenation process only has the frame alignment function, that is, the slowest member in a virtual concatenation group is aligned after arrival, and the number of frames can be aligned.
  • the disadvantage of this method is that the output data traffic after the alignment is random, and the synchronization process pointer adjustment cannot be transparently transmitted.
  • the output of the virtual concatenation buffer is added to the reframing unit, and the virtual concatenation delay compensation module (202) performs the virtual concatenation delay compensation on the four OPU1s, completes the alignment function, and transparently transmits the synchronization process. Introduced OPU1 pointer adjustment information.
  • the virtual cascade delay compensation module (202) is configured to perform virtual cascade delay compensation on the synchronized optical channel payload units of all branches, and the synchronized light of each branch generated according to the synchronization module (201)
  • the channel payload unit and its corresponding notch clock obtain the aligned optical channel payload unit virtual concatenation container and the optical channel payload unit virtual concatenation container corresponding Notch clock 2.
  • the virtual concatenated delay compensation module (202) includes four virtual concatenated delay compensation buffer sub-modules (2021) 1, 2, 3, and 4, and the slowest channel identification sub-module (2022) and the virtual concatenation. Reframing the submodule (2023).
  • the virtual cascade delay compensation buffer sub-module (2021) 1, 2, 3 and 4 are used for receiving and buffering four OPU1s sent from the synchronization module (201), and the four OPUs respectively use the gap clocks 1_1, 1_2, 1_3 and 1_4 is written, and then sent to the virtual concatenation reframing sub-module (2023).
  • the input end of the slowest channel identification sub-module (2022) inputs the multi-frame number information and the gap clocks 1_1, 1_2, 1_3, and 1_4, and selects the channel number of the optical channel payload unit of the slowest path according to the multi-frame number information.
  • the gap clock is used as a read control for the virtual concatenated delay compensation buffer.
  • the slowest channel selection method can be implemented according to the minimum multiframe number decision.
  • the multi-frame numbers of the four branches are compared, and the minimum multi-frame number is obtained by taking the minimum, and the channel number corresponding to the current minimum multi-frame number is the slowest channel.
  • the gap clock corresponding to the slowest channel is the notch clock 2.
  • the gap clock 2 that is selected at the same time includes the OPU1 pointer adjustment information introduced by the foregoing synchronization process.
  • the pointer adjustment information is substantially due to the jitter introduced by different sources of the source and sink clocks, and needs to be processed by the subsequent smooth service acquisition module (204).
  • the virtual concatenation reframing sub-module (2023) receives the 4-way OPU1 sent by the virtual concatenated delay compensation buffer sub-module (2021) 1, 2, 3, and 4, and simultaneously inputs the notch clock 2 into the virtual concatenation and re-framing the sub-frame.
  • the module (2023) obtains aligned OPUl-4v as a read control.
  • the contiguous OPU 1-4V generated by the imaginary delay compensation module (202) is input to the asynchronous demapping module (203), and the missing clock 2 is used as the write clock of the asynchronous demapping module (203).
  • the asynchronous demapping module (203) includes a demapping submodule (2031) and a statistic submodule (2032).
  • the demapping sub-module (2031) extracts the STM-64 service payload from the aligned OPU1-4V output by the imaginary cascading delay compensation module (202), and inputs the smoothing sub-module into the smoothing service acquisition module (204) (2042)
  • the gap clock 3 is generated by deleting the overhead and the control information and padding information inserted in the asynchronous mapping, and is input to the smoothing submodule (2042) in the smoothing service obtaining module (204), which reflects the STM-64. Payload rate.
  • the demapping sub-module (2031) also inputs the notch clock 2 and the aligned OPU 1-4V to the statistical subunit.
  • the statistical subunit can also be used to obtain the notch clock 2 and the aligned OPU1-4V directly from the virtual concatenated delay compensation module (202).
  • mapping jitter When the customer service is transmitted in the OTN network, there will be multiple links to bring jitter.
  • the mapping of the customer service into the OPUk-xV needs to be performed. Code rate adjustment, this process introduces mapping jitter.
  • due to the asynchronous nature of the OTN there is no synchronization between the virtual cascaded member clocks of different NEs on the sink node, and the synchronization process is required. The synchronization of the virtual cascaded member clocks also causes jitter damage to the service.
  • the pointer of the SDH (Synchronous Digital Hierarchy) network adjusts the jitter, and the pointer adjustment jitter is also called combined jitter. Mapping jitter and combined jitter are required to be addressed in the sink nodes of the OTN network to ensure the performance of the customer's service.
  • the statistics sub-module (2032) can identify the OPU1 pointer adjustment information according to the difference between the gap clock 2 and the standard OPU1 clock, according to the OPU1-4W, the positive and negative adjustment information when the asynchronous mapping is performed, and the acquired OPU1 pointer.
  • the adjustment information and the positive and negative adjustment information are provided for use by the clock smoothing sub-module (2041) in the smooth service acquisition module (204).
  • the smoothing service obtaining module (204) implements smoothing of the clock gap caused by the mapping/demapping process and the synchronization process, that is, selecting a scheduling pattern with uniformly distributed gaps according to the positive and negative adjustment information of the mapping and the optical channel payload unit pointer adjustment information. . And a smoothed service payload is obtained from the traffic payload sent by the heterogeneous demapping module (203) according to the obtained scheduling pattern in which the gaps are uniformly distributed. As shown in FIG. 9, the smoothing service acquisition module (204) includes a clock smoothing sub-module (2041) and a smoothing sub-module (2042).
  • the function of the clock smoothing sub-module (2041) is to customize the scheduling pattern, that is, to generate a scheduling pattern in which the gaps are evenly distributed (ie, the notch clock 4).
  • the scheduling pattern is selected based on the positive and negative adjustment information of the asynchronous mapping and the OPU1 pointer adjustment information of the synchronization process.
  • the calculation method of the business smoothing scheduling pattern is as follows: Assume that three scheduling patterns MapA, MapB, and MapC are used, which correspond to positive adjustment, negative adjustment, and no adjustment, respectively, and the usage probability of MapA is Pl, and the usage probability of MapB is P2, then MapC The probability of use is 1-P1-P2, then the following formula holds:
  • V SysFreq x [MapA x P ⁇ + MapB x P2 + MapC x (1 - PI - P2)]x Width
  • V STM-64 service rate
  • Width- Smooths the bit width of the FIFO.
  • the clock smoothing sub-module (2041) includes an adding unit (2041 1 ), a leak rate control unit (20412), and a pattern selection control unit (20413).
  • the adding unit (20411) adds the positive and negative adjustment information of the mapping and the optical channel payload unit pointer adjustment information, that is, the sum of the asynchronous mapping positive and negative adjustment values and the OPU1 pointer adjustment value to obtain a leakage value for selecting the scheduling pattern. And send the leak value to the leak rate control unit (20412).
  • the leak rate control unit (20412) can perform bit level leakage of the leak value through the leak rate control algorithm, control the leak rate of the leak value, and extend the low frequency high amplitude jitter to the high frequency low amplitude jitter, which will be controlled after the leak rate.
  • the leak value is sent to the pattern selection control unit (20413).
  • the pattern selection control unit (20413) is configured to select a scheduling pattern according to the leakage value sent by the leakage rate control unit (20412), if the leakage value is positive, and the absolute value is greater than or equal to one leakage unit (ie, the bit width of the FIFO), then selecting MapA; If the leak value is negative, and the absolute value is greater than or equal to one leak unit, select MapB; if the absolute value of the leak value is less than one leak unit, select MapC, and put the selected schedule pattern into a uniform gap, The clock with a uniform gap is selected as the notch clock 4.
  • the gap clock 4 is input to a tracking buffer sub-module (2051) and a clock-tracking phase-locked loop (PLL) in the service data recovery module (205).
  • the scheme of adding the positive/negative adjustment information and the optical channel payload unit pointer adjustment information may not be adopted, but is separately sent to the subsequent one-stage leakage rate control unit and the pattern selection control unit (20413), and the pattern is adopted.
  • the selection control unit (20413) selects a scheduling pattern in which the gaps are evenly distributed, thereby acquiring a service clock and recovering service data.
  • the function of the smoothing sub-module (2042) is to write the payload outputted by the demapping sub-module (2031) in the asynchronous demapping module (203) by the notch clock 3, according to the scheduling pattern of the gap uniformly distributed (ie, the notch clock 4)
  • the service payload readout rate from the smoothing sub-module (2042) is controlled to obtain a smooth service payload, and the acceleration or delay of the phase-locked loop adjustment action is reduced by controlling the traffic flow, thereby reducing jitter.
  • the smoothed service payload is sent to the service data recovery module (205).
  • the payload clock jitter caused by the OPU1 pointer adjustment causes a clock jitter if it is completely released in one pattern selection period at a time.
  • a low-frequency filter processing unit (20421) is added for performing leakage rate control on the statistical judgment of the leakage value. That is, the low-pass filtering link of the phase-locked loop filters out the short-term oscillation of the pointer, and the adjustment judgment of the OPU pointer is used as a parameter for controlling the leakage rate, and the bleed speed of the pointer adjustment is controlled, and the clock can be reduced. Instant shaking.
  • the filtered leakage value is sent to the pattern selection control unit (20413).
  • the use of each positive and negative adjustment opportunity is called a release, and the release control strategy of the release refers to the smooth use of the statistically adjusted adjustment opportunity.
  • the service data recovery module (205) is composed of a trace buffer sub-module (2051) and a clock-tracking phase-locked loop (PLL).
  • PLL phase-locked loop
  • the clock tracking phase-locked loop (2052) is used to obtain a data clock for the scheduling pattern in which the notch is evenly distributed.
  • the clock tracking phase locked loop can be an analog loop or a digital loop.
  • the reference clock is tracked, that is, the tracked object is the gap clock 4, and the acquired data clock is a continuous STM-64 clock.
  • the Trace Cache sub-module (2051) is configured to recover service data from the smoothed service payload using the service clock recovered by the clocked phase-locked loop (2052).
  • an embodiment of the present invention further provides a virtual concatenation synchronization method in an optical transport network.
  • the fixed-point floating mode is adopted.
  • the two idle bytes of the OTU1 are respectively defined as positive and negative adjustment positions.
  • the first row and the 14th byte of the OTU1 are defined as the OPU1 negative adjustment position;
  • the 1st line and the 15th byte are the OPU1 positive adjustment positions.
  • the bytes of other positions may also be selected as the positive and negative adjustment positions of the OPU1, and are not limited to the positive and negative adjustment position definition methods of the embodiment.
  • the positive and negative adjustment positions are relatively fixed at the OTU1 position to allow the OPU1 to float at a fixed position.
  • clock synchronization processing is performed on each branch optical channel transmission unit in the OTN virtual cascade receiving direction, and each branch OPU1 is adjusted according to the FIFO water line to generate a synchronized OPU1.
  • the specific steps are as follows:
  • Step 101 Each branch writes OPU1 to the FIFO using its own OTU1 clock.
  • Step 102 Using the system clock as a read clock, synchronizing the OPU1 of each branch to generate synchronous control information; wherein the system clock adopts the same clock, and the source of the clock may be selected from each branch or a local clock.
  • Step 103 Perform pointer adjustment on the synchronization control information of each branch according to the FIFO water line to generate the synchronized OPU1 and its corresponding gap clock.
  • the OPU1 read control adopts the fixed-point floating mode, that is, the read control determines whether the OPU1 is floating according to the FIFO water line at the fixed position of the OTU1 (that is, the defined positive and negative adjustment positions), that is, the read rate is adjusted.
  • Detect each branch FIFO water line and adjust the 0PU1 floating area at the positive and negative adjustment positions according to the detection result of the FIFO water line. If the FIFO water line is higher than the high water line, use the negative adjustment OPU1 floating area to improve the readout. Rate; If the FIFO water line is lower than the low water line, use the positive adjustment OPU1 floating area to reduce the read rate; if the FIFO water line is between the high and low water lines, OPU1 does not float.
  • the read control of the OPU1 FIFO that is, the read enable can be equivalent to the gap clock, and the four paths are the gap clock 1_1, the gap clock 1_2, the gap clock 1_3, and the gap clock 1_4. It is equivalent to using the notch clock 1_1 to the notch clock 1_4 as a read control to read the OPU1 of the corresponding channel. So far, the synchronization step is completed.
  • the subsequent steps need to perform virtual cascade delay compensation on the OPU1 of all the branches of the OPU1-4V through the virtual cascade delay compensation, according to the OPU1 of each branch and its corresponding gap clock.
  • the aligned OPU1 virtual concatenation container obtains the corresponding gap clock of the OPU1 virtual concatenation container according to the corresponding gap clock of the OPU1 synchronized by each branch.
  • Step 104 Write each branch OPU1 read in step 103 to the FIFO according to the respective gap clock.
  • Step 105 Identify the notch clock of the slowest one of the branches as the gap clock 2, and read the aligned OPU1 according to the missing clock 2 to obtain the aligned OPU1-4v.
  • the gap clock 2 is the corresponding gap clock of the OPU1 virtual concatenation container.
  • Step 106 Extract the STM-64 payload from the OPU1-4V obtained in step 105, and generate the gap clock 3 by deleting the overhead and the control information and padding information inserted during the asynchronous mapping.
  • Step 107 Identify the OPU1 pointer adjustment information according to the gap clock 2 obtained in step 105, and adjust the information according to the positive and negative values when the OPU1-4 ⁇ is asynchronously mapped.
  • the pointer adjustment information and the positive and negative adjustment information introduce low frequency and high amplitude jitter, it needs to be filtered out by a further smoothing step. Therefore, the following smoothing step is required to obtain a smooth gap clock, and the smoothed gap clock is used to read the smoothed service. Payload.
  • Step 108 Select a scheduling pattern in which the gaps are uniformly distributed according to the positive and negative adjustment information of the mapping obtained in step 107 and the OPU1 pointer adjustment information, and obtain a smooth service from the service payload obtained in step 106 according to the scheduling pattern uniformly distributed by the gap. Payload.
  • the payload is written to the FIFO by the gap clock 3, and the gap clock 4 is generated by the service smoothing algorithm to control the read rate of the service payload from the FIFO.
  • the scheduling pattern calculation method of the business smoothing algorithm is as follows: Assume that three scheduling patterns MapA, MapB, and MapC are used, which correspond to positive adjustment, negative adjustment, and no adjustment, respectively.
  • the OPU1 pointer adjustment information obtained in step 107 is added to the positive and negative adjustment information to obtain a leakage value, which can be bit-level leakage through the leakage rate control algorithm, and after the leakage rate control algorithm, the low-frequency high-amplitude jitter is obtained.
  • the payload clock jitter caused by the OPU1 pointer adjustment will cause the clock jitter if it is completely released in one pattern selection period at a time.
  • a little low-frequency filtering processing is added, and the adjustment judgment of the OPU pointer is used as a parameter for controlling the leakage rate control. , Control the bleed speed of the pointer adjustment, which can reduce the instantaneous jitter of the clock.
  • Step 109 Track the scheduling pattern with evenly distributed gaps, and obtain a data clock.
  • the clock can be tracked through the phase-locked loop.
  • the clock-tracking phase-locked loop can be an analog loop or a digital loop.
  • the tracking reference clock, that is, the tracked object is the gap clock 4, and the acquired data clock. For continuous STM-64 clocks.
  • the service data is recovered from the smoothed service payload obtained in step 107 using the data clock acquired via the phase locked loop.
  • the technical solution in the embodiment of the present invention solves the fixed bit rate and the OTN virtual concatenation by re-framing the OPUk fixed-point floating and virtual concatenated delay compensation, and combining the asynchronous de-mapping to effectively suppress the synchronization and the jitter introduced by the mapping.
  • Some of the steps in the embodiment of the present invention may be implemented by software, and the corresponding software program may be stored in a readable storage medium such as an optical disk or a hard disk.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

La présente invention concerne un système et un procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique, cette invention concernant un champ de communication optique. Ledit système comporte un module de synchronisation, un module de compensation de retard de concaténation virtuelle, un module de démappage asynchrone, un module d'obtention de service ajusté et un module de récupération de données de service. Ledit système consiste à : utiliser un point fixé OPUk flottant dans la synchronisation ; et à récupérer des données de service en associant la compensation de concaténation virtuelle et le démappage asynchrone. Ledit schéma technique proposé dans cette invention peut supprimer l'oscillation causée par la synchronisation et la compensation de retard de concaténation virtuelle et résoudre le problème de la détérioration de la cible d'oscillation des impulsions d'horloge causée par des données à débit binaire constant transportées par la concaténation virtuelle OTN.
PCT/CN2008/072069 2007-08-24 2008-08-20 Système et procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique WO2009026831A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN2007101461698A CN101374030B (zh) 2007-08-24 2007-08-24 一种光传送网中的虚级联同步系统及方法
CN200710146169.8 2007-08-24

Publications (1)

Publication Number Publication Date
WO2009026831A1 true WO2009026831A1 (fr) 2009-03-05

Family

ID=40386698

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2008/072069 WO2009026831A1 (fr) 2007-08-24 2008-08-20 Système et procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique

Country Status (2)

Country Link
CN (1) CN101374030B (fr)
WO (1) WO2009026831A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102480415A (zh) * 2010-11-26 2012-05-30 中兴通讯股份有限公司 一种通过基准时钟恢复光传送网时钟的方法及装置

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101867848B (zh) * 2009-04-20 2013-06-05 华为技术有限公司 高速数据流的传输方法及相应设备、系统
WO2010135864A1 (fr) * 2009-05-26 2010-12-02 华为技术有限公司 Procédé, dispositif et système de communication pour transmettre des données de client
CN102014312B (zh) * 2009-09-04 2014-03-12 中兴通讯股份有限公司 客户信号失效的指示方法与装置
CN102811108B (zh) * 2011-06-02 2016-06-29 中兴通讯股份有限公司 一种优化保护倒换性能的方法及系统
CN103067152A (zh) * 2012-12-26 2013-04-24 中国海洋石油总公司 一种海洋地震勘测系统中时钟分发的方法及系统
CN108959143B (zh) * 2017-05-22 2023-06-27 中兴通讯股份有限公司 一种光传输网设备和业务处理方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1490992A (zh) * 2002-10-16 2004-04-21 Eci���Ź�˾ 在被保护的同步通信网中的业务量处理
US20040213299A1 (en) * 2003-04-22 2004-10-28 Sameer Gupta Pointer generation method and apparatus for delay compensation in virtual concatenation applications
CN1549533A (zh) * 2003-05-23 2004-11-24 中兴通讯股份有限公司 一种虚级联延时补偿恢复装置
CN1983885A (zh) * 2005-12-31 2007-06-20 华为技术有限公司 光通道数据单元到同步光传输网络的解映射方法及装置
CN1996807A (zh) * 2005-12-26 2007-07-11 中兴通讯股份有限公司 一种实现无损伤虚级联延时补偿的方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1490992A (zh) * 2002-10-16 2004-04-21 Eci���Ź�˾ 在被保护的同步通信网中的业务量处理
US20040213299A1 (en) * 2003-04-22 2004-10-28 Sameer Gupta Pointer generation method and apparatus for delay compensation in virtual concatenation applications
CN1549533A (zh) * 2003-05-23 2004-11-24 中兴通讯股份有限公司 一种虚级联延时补偿恢复装置
CN1996807A (zh) * 2005-12-26 2007-07-11 中兴通讯股份有限公司 一种实现无损伤虚级联延时补偿的方法
CN1983885A (zh) * 2005-12-31 2007-06-20 华为技术有限公司 光通道数据单元到同步光传输网络的解映射方法及装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GUO, XIN ET AL.: "Design and application of SDH pointer leakage ASIC MXTULPx8-5.", STUDY ON OPTICAL COMMUNICATIONS, 31 December 2002 (2002-12-31), pages 46 - 47 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102480415A (zh) * 2010-11-26 2012-05-30 中兴通讯股份有限公司 一种通过基准时钟恢复光传送网时钟的方法及装置

Also Published As

Publication number Publication date
CN101374030A (zh) 2009-02-25
CN101374030B (zh) 2011-05-18

Similar Documents

Publication Publication Date Title
US9473261B1 (en) System and method to achieve datapath latency symmetry through an OTN wrapper
WO2009026831A1 (fr) Système et procédé destinés à la synchronisation de concaténation virtuelle dans un réseau de transport optique
US7873073B2 (en) Method and system for synchronous high speed Ethernet GFP mapping over an optical transport network
US8699886B2 (en) Externally synchronized optical transport network systems and associated methods
US8155148B2 (en) Telecommunications transport methods and systems for the transparent mapping/demapping of client data signals
WO2008110119A1 (fr) Procédé de multiplexage de données ethernet indépendantes, dispositif et système associés
US8446906B2 (en) Providing access to client overhead while transparently transmitting the client signal
WO2007143949A1 (fr) Procédé et appareil de récupération d'horloge
WO2005074211A1 (fr) Procedes et appareils permettant d'eviter la perte de donnees au niveau d'un collecteur lcas (schema d'ajustement de la capacite de la liaison) au moyen d'un controle de debit selon la vitesse
WO2010034229A1 (fr) Procédé et appareil de mappage et de démappage de données de service
US6882662B2 (en) Pointer adjustment wander and jitter reduction apparatus for a desynchronizer
US20180013509A1 (en) Transmission method
CN103299562B (zh) 客户端信号映射电路以及映射方法
US7457390B2 (en) Timeshared jitter attenuator in multi-channel mapping applications
WO2014086592A1 (fr) Procédé et appareil pour transmettre un signal de transport asynchrone sur une section optique
CN101252403B (zh) 在光传送网络中业务传送的实现方法
EP2093914B1 (fr) Un système de communication et dispositif d'émission
US7940806B1 (en) Synchronous payload envelope mapping without pointer adjustments
JP2005505988A (ja) デジタル・データ同期化の方法および装置
US6240106B1 (en) Retiming arrangement for SDH data transmission system
CN1983885B (zh) 光通道数据单元到同步光传输网络的解映射方法及装置
JP5951154B2 (ja) 光伝送送信装置および光伝送受信装置
US20080101377A1 (en) Efficient Scalable Implementation of VCAT/LCAS for SDH and PDH Signals
US20030235215A1 (en) Apparatus and method for aggregation and transportation for plesiosynchronous framing oriented data formats
US7590154B2 (en) Sampled accumulation system and method for jitter attenuation

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08784060

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08784060

Country of ref document: EP

Kind code of ref document: A1