WO2009025341A1 - Tranche de monocristal de silicium pour igbt et procédé de fabrication d'une tranche de monocristal de silicium pour igbt - Google Patents

Tranche de monocristal de silicium pour igbt et procédé de fabrication d'une tranche de monocristal de silicium pour igbt Download PDF

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Publication number
WO2009025341A1
WO2009025341A1 PCT/JP2008/064954 JP2008064954W WO2009025341A1 WO 2009025341 A1 WO2009025341 A1 WO 2009025341A1 JP 2008064954 W JP2008064954 W JP 2008064954W WO 2009025341 A1 WO2009025341 A1 WO 2009025341A1
Authority
WO
WIPO (PCT)
Prior art keywords
igbt
single crystal
silicon single
wafer
crystal wafer
Prior art date
Application number
PCT/JP2008/064954
Other languages
English (en)
Japanese (ja)
Inventor
Shigeru Umeno
Koji Kato
Toshiaki Ono
Manabu Nishimoto
Masataka Hourai
Original Assignee
Sumco Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corporation filed Critical Sumco Corporation
Priority to JP2009529067A priority Critical patent/JPWO2009025341A1/ja
Publication of WO2009025341A1 publication Critical patent/WO2009025341A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
    • H01L29/66348Vertical insulated gate bipolar transistors with a recessed gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

L'invention porte sur un procédé de fabrication d'une tranche, suivant lequel une marge de vitesse de traction peut être accrue et une tranche ayant un taux réduit de défaillances de fuite de jonction p/n avec une petite fluctuation de résistivité peut être fabriquée. L'invention porte également sur une tranche de monocristal de silicium composée d'un monocristal de silicium poussé par la méthode de Czochralski pour IGBT. Dans la tranche, les défauts COP et les grappes de dislocation sont éliminés dans toute la région dans une direction de diamètre de cristal. La tranche a un taux de défaillances rupture de fuite de jonction p/n de 3 % ou moins après traitement thermique qui simule un traitement thermique dans le procédé de fabrication des IGBT.
PCT/JP2008/064954 2007-08-21 2008-08-21 Tranche de monocristal de silicium pour igbt et procédé de fabrication d'une tranche de monocristal de silicium pour igbt WO2009025341A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009529067A JPWO2009025341A1 (ja) 2007-08-21 2008-08-21 Igbt用のシリコン単結晶ウェーハ及びigbt用のシリコン単結晶ウェーハの製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007215333 2007-08-21
JP2007-215333 2007-08-21

Publications (1)

Publication Number Publication Date
WO2009025341A1 true WO2009025341A1 (fr) 2009-02-26

Family

ID=40378241

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/064954 WO2009025341A1 (fr) 2007-08-21 2008-08-21 Tranche de monocristal de silicium pour igbt et procédé de fabrication d'une tranche de monocristal de silicium pour igbt

Country Status (2)

Country Link
JP (1) JPWO2009025341A1 (fr)
WO (1) WO2009025341A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012089392A1 (fr) * 2010-12-28 2012-07-05 Siltronic Ag Procédé de fabrication d'un monocristal de silicium, monocristal de silicium et tranche

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005154172A (ja) * 2003-11-21 2005-06-16 Shin Etsu Handotai Co Ltd シリコン単結晶の製造方法及びシリコン単結晶製造装置の設計方法並びにシリコン単結晶製造装置
JP2006312575A (ja) * 2005-04-08 2006-11-16 Sumco Corp シリコンウェーハおよびその製造方法
JP2006344823A (ja) * 2005-06-09 2006-12-21 Sumco Corp Igbt用のシリコンウェーハ及びその製造方法
JP2007191350A (ja) * 2006-01-19 2007-08-02 Sumco Corp Igbt用シリコン単結晶ウェーハ及びigbt用シリコン単結晶ウェーハの製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004073057A1 (fr) * 2003-02-14 2004-08-26 Sumitomo Mitsubishi Silicon Corporation Procede de fabrication d'une tranche de silicium
JPWO2004083496A1 (ja) * 2003-02-25 2006-06-22 株式会社Sumco シリコンウェーハ及びその製造方法、並びにシリコン単結晶育成方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005154172A (ja) * 2003-11-21 2005-06-16 Shin Etsu Handotai Co Ltd シリコン単結晶の製造方法及びシリコン単結晶製造装置の設計方法並びにシリコン単結晶製造装置
JP2006312575A (ja) * 2005-04-08 2006-11-16 Sumco Corp シリコンウェーハおよびその製造方法
JP2006344823A (ja) * 2005-06-09 2006-12-21 Sumco Corp Igbt用のシリコンウェーハ及びその製造方法
JP2007191350A (ja) * 2006-01-19 2007-08-02 Sumco Corp Igbt用シリコン単結晶ウェーハ及びigbt用シリコン単結晶ウェーハの製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012089392A1 (fr) * 2010-12-28 2012-07-05 Siltronic Ag Procédé de fabrication d'un monocristal de silicium, monocristal de silicium et tranche
JP2012148949A (ja) * 2010-12-28 2012-08-09 Siltronic Ag シリコン単結晶の製造方法、シリコン単結晶、およびウエハ
US8961685B2 (en) 2010-12-28 2015-02-24 Siltronic Ag Method of manufacturing silicon single crystal, silicon single crystal, and wafer

Also Published As

Publication number Publication date
JPWO2009025341A1 (ja) 2010-11-25

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